//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 image[1];
.global .align 1 .b8 image2[1];
.global .align 1 .b8 imageHDR[1];
.global .align 1 .b8 imageFinal[1];
.global .align 4 .f32 DoNormalize;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo11DoNormalizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename11DoNormalizeE[6] = {102, 108, 111, 97, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum11DoNormalizeE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic11DoNormalizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation11DoNormalizeE[1];

.visible .entry _Z6oxMainv(

)
{
	.reg .pred 	%p<4>;
	.reg .b16 	%rs<20>;
	.reg .f32 	%f<88>;
	.reg .b32 	%r<79>;
	.reg .b64 	%rd<80>;


	ld.global.v2.u32 	{%r20, %r21}, [pixelID];
	cvt.u64.u32	%rd4, %r20;
	cvt.u64.u32	%rd5, %r21;
	mov.u64 	%rd56, imageHDR;
	cvta.global.u64 	%rd3, %rd56;
	mov.u32 	%r18, 2;
	mov.u32 	%r7, 8;
	mov.u64 	%rd55, 0;
	// inline asm
	call (%rd2), _rt_buffer_get_64, (%rd3, %r18, %r7, %rd4, %rd5, %rd55, %rd55);
	// inline asm
	ld.u16 	%rs2, [%rd2];
	// inline asm
	{  cvt.f32.f16 %f17, %rs2;}

	// inline asm
	ld.global.v2.u32 	{%r24, %r25}, [pixelID];
	cvt.u64.u32	%rd10, %r24;
	cvt.u64.u32	%rd11, %r25;
	// inline asm
	call (%rd8), _rt_buffer_get_64, (%rd3, %r18, %r7, %rd10, %rd11, %rd55, %rd55);
	// inline asm
	ld.u16 	%rs3, [%rd8+2];
	// inline asm
	{  cvt.f32.f16 %f18, %rs3;}

	// inline asm
	ld.global.v2.u32 	{%r28, %r29}, [pixelID];
	cvt.u64.u32	%rd16, %r28;
	cvt.u64.u32	%rd17, %r29;
	// inline asm
	call (%rd14), _rt_buffer_get_64, (%rd3, %r18, %r7, %rd16, %rd17, %rd55, %rd55);
	// inline asm
	ld.u16 	%rs4, [%rd14+4];
	// inline asm
	{  cvt.f32.f16 %f19, %rs4;}

	// inline asm
	mul.f32 	%f20, %f18, 0f3F372474;
	fma.rn.f32 	%f21, %f17, 0f3E59999A, %f20;
	fma.rn.f32 	%f22, %f19, 0f3D93A92A, %f21;
	ld.global.v2.u32 	{%r32, %r33}, [pixelID];
	cvt.u64.u32	%rd22, %r32;
	cvt.u64.u32	%rd23, %r33;
	mov.u64 	%rd57, image2;
	cvta.global.u64 	%rd21, %rd57;
	mov.u32 	%r19, 16;
	// inline asm
	call (%rd20), _rt_buffer_get_64, (%rd21, %r18, %r19, %rd22, %rd23, %rd55, %rd55);
	// inline asm
	ld.v4.f32 	{%f23, %f24, %f25, %f26}, [%rd20];
	ld.global.v2.u32 	{%r36, %r37}, [pixelID];
	cvt.u64.u32	%rd28, %r36;
	cvt.u64.u32	%rd29, %r37;
	mov.u64 	%rd58, image;
	cvta.global.u64 	%rd27, %rd58;
	mov.u32 	%r17, 4;
	// inline asm
	call (%rd26), _rt_buffer_get_64, (%rd27, %r18, %r17, %rd28, %rd29, %rd55, %rd55);
	// inline asm
	ld.u8 	%rs5, [%rd26];
	cvt.rn.f32.u16	%f30, %rs5;
	div.rn.f32 	%f31, %f30, 0f437F0000;
	fma.rn.f32 	%f32, %f31, 0f40000000, 0fBF800000;
	ld.global.v2.u32 	{%r40, %r41}, [pixelID];
	cvt.u64.u32	%rd34, %r40;
	cvt.u64.u32	%rd35, %r41;
	// inline asm
	call (%rd32), _rt_buffer_get_64, (%rd27, %r18, %r17, %rd34, %rd35, %rd55, %rd55);
	// inline asm
	ld.u8 	%rs6, [%rd32+1];
	cvt.rn.f32.u16	%f33, %rs6;
	div.rn.f32 	%f34, %f33, 0f437F0000;
	fma.rn.f32 	%f35, %f34, 0f40000000, 0fBF800000;
	ld.global.v2.u32 	{%r44, %r45}, [pixelID];
	cvt.u64.u32	%rd40, %r44;
	cvt.u64.u32	%rd41, %r45;
	// inline asm
	call (%rd38), _rt_buffer_get_64, (%rd27, %r18, %r17, %rd40, %rd41, %rd55, %rd55);
	// inline asm
	ld.u8 	%rs7, [%rd38+2];
	cvt.rn.f32.u16	%f36, %rs7;
	div.rn.f32 	%f37, %f36, 0f437F0000;
	fma.rn.f32 	%f38, %f37, 0f40000000, 0fBF800000;
	mul.f32 	%f39, %f35, %f35;
	fma.rn.f32 	%f40, %f32, %f32, %f39;
	fma.rn.f32 	%f41, %f38, %f38, %f40;
	sqrt.rn.f32 	%f42, %f41;
	rcp.rn.f32 	%f43, %f42;
	mul.f32 	%f44, %f32, %f43;
	mul.f32 	%f45, %f35, %f43;
	mul.f32 	%f46, %f38, %f43;
	fma.rn.f32 	%f1, %f22, %f44, %f23;
	fma.rn.f32 	%f2, %f22, %f45, %f24;
	fma.rn.f32 	%f3, %f22, %f46, %f25;
	ld.global.v2.u32 	{%r48, %r49}, [pixelID];
	cvt.u64.u32	%rd46, %r48;
	cvt.u64.u32	%rd47, %r49;
	// inline asm
	call (%rd44), _rt_buffer_get_64, (%rd27, %r18, %r17, %rd46, %rd47, %rd55, %rd55);
	// inline asm
	ld.u8 	%rs8, [%rd44+3];
	cvt.rn.f32.u16	%f47, %rs8;
	div.rn.f32 	%f48, %f47, 0f437F0000;
	ld.global.v2.u32 	{%r52, %r53}, [pixelID];
	cvt.u64.u32	%rd52, %r52;
	cvt.u64.u32	%rd53, %r53;
	// inline asm
	call (%rd50), _rt_buffer_get_64, (%rd21, %r18, %r19, %rd52, %rd53, %rd55, %rd55);
	// inline asm
	ld.f32 	%f49, [%rd50+12];
	min.f32 	%f87, %f48, %f49;
	ld.global.f32 	%f50, [DoNormalize];
	setp.gt.f32	%p1, %f50, 0f3F000000;
	@%p1 bra 	BB0_2;
	bra.uni 	BB0_1;

BB0_2:
	mul.f32 	%f54, %f2, %f2;
	fma.rn.f32 	%f55, %f1, %f1, %f54;
	fma.rn.f32 	%f56, %f3, %f3, %f55;
	sqrt.rn.f32 	%f57, %f56;
	rcp.rn.f32 	%f58, %f57;
	mul.f32 	%f5, %f1, %f58;
	mul.f32 	%f6, %f2, %f58;
	mul.f32 	%f7, %f3, %f58;
	ld.global.v2.u32 	{%r64, %r65}, [pixelID];
	cvt.u64.u32	%rd68, %r64;
	cvt.u64.u32	%rd69, %r65;
	mov.u64 	%rd72, uvnormal;
	cvta.global.u64 	%rd67, %rd72;
	// inline asm
	call (%rd66), _rt_buffer_get_64, (%rd67, %r18, %r17, %rd68, %rd69, %rd55, %rd55);
	// inline asm
	ld.u32 	%r1, [%rd66];
	shr.u32 	%r68, %r1, 16;
	cvt.u16.u32	%rs1, %r68;
	and.b16  	%rs9, %rs1, 255;
	cvt.u16.u32	%rs10, %r1;
	or.b16  	%rs11, %rs10, %rs9;
	setp.eq.s16	%p2, %rs11, 0;
	mov.f32 	%f84, 0f00000000;
	mov.f32 	%f85, %f84;
	mov.f32 	%f86, %f84;
	@%p2 bra 	BB0_4;

	ld.u8 	%rs12, [%rd66+1];
	and.b16  	%rs14, %rs10, 255;
	cvt.rn.f32.u16	%f59, %rs14;
	div.rn.f32 	%f60, %f59, 0f437F0000;
	fma.rn.f32 	%f61, %f60, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f62, %rs12;
	div.rn.f32 	%f63, %f62, 0f437F0000;
	fma.rn.f32 	%f64, %f63, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f65, %rs9;
	div.rn.f32 	%f66, %f65, 0f437F0000;
	fma.rn.f32 	%f67, %f66, 0f40000000, 0fBF800000;
	mul.f32 	%f68, %f64, %f64;
	fma.rn.f32 	%f69, %f61, %f61, %f68;
	fma.rn.f32 	%f70, %f67, %f67, %f69;
	sqrt.rn.f32 	%f71, %f70;
	rcp.rn.f32 	%f72, %f71;
	mul.f32 	%f84, %f61, %f72;
	mul.f32 	%f85, %f64, %f72;
	mul.f32 	%f86, %f67, %f72;

BB0_4:
	mul.f32 	%f73, %f6, %f85;
	fma.rn.f32 	%f74, %f5, %f84, %f73;
	fma.rn.f32 	%f14, %f7, %f86, %f74;
	setp.leu.f32	%p3, %f87, 0f00000000;
	@%p3 bra 	BB0_6;

	fma.rn.f32 	%f75, %f14, 0f3F000000, 0f3F000000;
	mov.f32 	%f76, 0f3B808081;
	max.f32 	%f87, %f75, %f76;

BB0_6:
	ld.global.v2.u32 	{%r71, %r72}, [pixelID];
	cvt.u64.u32	%rd75, %r71;
	cvt.u64.u32	%rd76, %r72;
	mov.u64 	%rd79, imageFinal;
	cvta.global.u64 	%rd74, %rd79;
	// inline asm
	call (%rd73), _rt_buffer_get_64, (%rd74, %r18, %r17, %rd75, %rd76, %rd55, %rd55);
	// inline asm
	fma.rn.f32 	%f77, %f5, 0f3F000000, 0f3F000000;
	mul.f32 	%f78, %f77, 0f437F0000;
	cvt.rzi.u32.f32	%r75, %f78;
	fma.rn.f32 	%f79, %f6, 0f3F000000, 0f3F000000;
	mul.f32 	%f80, %f79, 0f437F0000;
	cvt.rzi.u32.f32	%r76, %f80;
	fma.rn.f32 	%f81, %f7, 0f3F000000, 0f3F000000;
	mul.f32 	%f82, %f81, 0f437F0000;
	cvt.rzi.u32.f32	%r77, %f82;
	mul.f32 	%f83, %f87, 0f437F0000;
	cvt.rzi.u32.f32	%r78, %f83;
	cvt.u16.u32	%rs16, %r78;
	cvt.u16.u32	%rs17, %r77;
	cvt.u16.u32	%rs18, %r76;
	cvt.u16.u32	%rs19, %r75;
	st.v4.u8 	[%rd73], {%rs19, %rs18, %rs17, %rs16};
	bra.uni 	BB0_7;

BB0_1:
	ld.global.v2.u32 	{%r58, %r59}, [pixelID];
	cvt.u64.u32	%rd61, %r58;
	cvt.u64.u32	%rd62, %r59;
	// inline asm
	call (%rd59), _rt_buffer_get_64, (%rd21, %r18, %r19, %rd61, %rd62, %rd55, %rd55);
	// inline asm
	st.v4.f32 	[%rd59], {%f1, %f2, %f3, %f87};

BB0_7:
	ret;
}