// // Generated by NVIDIA NVVM Compiler // // Compiler Build ID: CL-23083092 // Cuda compilation tools, release 9.1, V9.1.85 // Based on LLVM 3.4svn // .version 6.1 .target sm_30 .address_size 64 // .globl _Z6oxMainv .global .align 8 .b8 pixelID[8]; .global .align 8 .b8 resolution[8]; .global .align 4 .b8 normal[12]; .global .align 4 .b8 camPos[12]; .global .align 4 .b8 root[4]; .global .align 4 .u32 imageEnabled; .global .texref lightmap; .global .align 16 .b8 tileInfo[16]; .global .align 4 .u32 additive; .global .align 1 .b8 image[1]; .global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0}; .global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0}; .global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E; .global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E; .global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE; .global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE; .global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0}; .global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0}; .global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0}; .global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0}; .global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0}; .global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919; .global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919; .global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0}; .global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0}; .global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1]; .global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1]; .global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1]; .visible .entry _Z6oxMainv( ) { .reg .pred %p<14>; .reg .b16 %rs<39>; .reg .f32 %f<98>; .reg .b32 %r<125>; .reg .b64 %rd<223>; ld.global.v2.u32 {%r18, %r19}, [pixelID]; cvt.u64.u32 %rd9, %r18; cvt.u64.u32 %rd10, %r19; mov.u64 %rd13, image; cvta.global.u64 %rd8, %rd13; mov.u32 %r16, 2; mov.u32 %r17, 8; mov.u64 %rd12, 0; // inline asm call (%rd7), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd9, %rd10, %rd12, %rd12); // inline asm ld.u16 %rs3, [%rd7+6]; mov.f32 %f46, 0f00000000; // inline asm { cvt.rn.f16.f32 %rs2, %f46;} // inline asm setp.gt.u16 %p1, %rs3, %rs2; @%p1 bra BB0_17; ld.global.v2.u32 {%r31, %r32}, [pixelID]; cvt.u64.u32 %rd16, %r31; cvt.u64.u32 %rd17, %r32; // inline asm call (%rd14), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd16, %rd17, %rd12, %rd12); // inline asm ld.u16 %rs4, [%rd14]; // inline asm { cvt.f32.f16 %f80, %rs4;} // inline asm ld.global.v2.u32 {%r35, %r36}, [pixelID]; cvt.u64.u32 %rd22, %r35; cvt.u64.u32 %rd23, %r36; // inline asm call (%rd20), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd22, %rd23, %rd12, %rd12); // inline asm ld.u16 %rs5, [%rd20+2]; // inline asm { cvt.f32.f16 %f81, %rs5;} // inline asm ld.global.v2.u32 {%r39, %r40}, [pixelID]; cvt.u64.u32 %rd28, %r39; cvt.u64.u32 %rd29, %r40; // inline asm call (%rd26), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd28, %rd29, %rd12, %rd12); // inline asm ld.u16 %rs6, [%rd26+4]; // inline asm { cvt.f32.f16 %f82, %rs6;} // inline asm ld.global.v2.u32 {%r43, %r44}, [pixelID]; setp.eq.s32 %p2, %r43, 0; add.s32 %r46, %r43, -1; cvt.u64.u32 %rd39, %r46; selp.b64 %rd34, 0, %rd39, %p2; setp.eq.s32 %p3, %r44, 0; add.s32 %r48, %r44, -1; cvt.u64.u32 %rd40, %r48; selp.b64 %rd35, 0, %rd40, %p3; ld.global.v2.u32 {%r49, %r50}, [resolution]; add.s32 %r52, %r49, -1; setp.eq.s32 %p4, %r43, %r52; add.s32 %r53, %r43, 1; selp.b32 %r1, %r52, %r53, %p4; add.s32 %r55, %r50, -1; setp.eq.s32 %p5, %r44, %r55; add.s32 %r56, %r44, 1; selp.b32 %r2, %r55, %r56, %p5; // inline asm call (%rd32), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs7, [%rd32+6]; mov.u32 %r119, 0; setp.le.u16 %p6, %rs7, %rs2; @%p6 bra BB0_3; // inline asm call (%rd41), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs8, [%rd41]; // inline asm { cvt.f32.f16 %f50, %rs8;} // inline asm // inline asm call (%rd47), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs9, [%rd47+2]; // inline asm { cvt.f32.f16 %f51, %rs9;} // inline asm // inline asm call (%rd53), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs10, [%rd53+4]; // inline asm { cvt.f32.f16 %f52, %rs10;} // inline asm add.f32 %f80, %f80, %f50; add.f32 %f81, %f81, %f51; add.f32 %f82, %f82, %f52; mov.u32 %r119, 1; BB0_3: ld.global.u32 %rd62, [pixelID]; // inline asm call (%rd60), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd62, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs11, [%rd60+6]; setp.le.u16 %p7, %rs11, %rs2; @%p7 bra BB0_5; // inline asm call (%rd67), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd62, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs12, [%rd67]; // inline asm { cvt.f32.f16 %f53, %rs12;} // inline asm // inline asm call (%rd73), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd62, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs13, [%rd73+2]; // inline asm { cvt.f32.f16 %f54, %rs13;} // inline asm // inline asm call (%rd79), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd62, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs14, [%rd79+4]; // inline asm { cvt.f32.f16 %f55, %rs14;} // inline asm add.f32 %f80, %f80, %f53; add.f32 %f81, %f81, %f54; add.f32 %f82, %f82, %f55; add.s32 %r119, %r119, 1; BB0_5: cvt.u64.u32 %rd88, %r1; // inline asm call (%rd86), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs15, [%rd86+6]; setp.le.u16 %p8, %rs15, %rs2; @%p8 bra BB0_7; // inline asm call (%rd93), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs16, [%rd93]; // inline asm { cvt.f32.f16 %f56, %rs16;} // inline asm // inline asm call (%rd99), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs17, [%rd99+2]; // inline asm { cvt.f32.f16 %f57, %rs17;} // inline asm // inline asm call (%rd105), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd35, %rd12, %rd12); // inline asm ld.u16 %rs18, [%rd105+4]; // inline asm { cvt.f32.f16 %f58, %rs18;} // inline asm add.f32 %f80, %f80, %f56; add.f32 %f81, %f81, %f57; add.f32 %f82, %f82, %f58; add.s32 %r119, %r119, 1; BB0_7: ld.global.u32 %rd115, [pixelID+4]; // inline asm call (%rd112), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd115, %rd12, %rd12); // inline asm ld.u16 %rs19, [%rd112+6]; setp.le.u16 %p9, %rs19, %rs2; @%p9 bra BB0_9; // inline asm call (%rd119), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd115, %rd12, %rd12); // inline asm ld.u16 %rs20, [%rd119]; // inline asm { cvt.f32.f16 %f59, %rs20;} // inline asm // inline asm call (%rd125), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd115, %rd12, %rd12); // inline asm ld.u16 %rs21, [%rd125+2]; // inline asm { cvt.f32.f16 %f60, %rs21;} // inline asm // inline asm call (%rd131), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd115, %rd12, %rd12); // inline asm ld.u16 %rs22, [%rd131+4]; // inline asm { cvt.f32.f16 %f61, %rs22;} // inline asm add.f32 %f80, %f80, %f59; add.f32 %f81, %f81, %f60; add.f32 %f82, %f82, %f61; add.s32 %r119, %r119, 1; BB0_9: // inline asm call (%rd138), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd115, %rd12, %rd12); // inline asm ld.u16 %rs23, [%rd138+6]; setp.le.u16 %p10, %rs23, %rs2; @%p10 bra BB0_11; // inline asm call (%rd145), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd115, %rd12, %rd12); // inline asm ld.u16 %rs24, [%rd145]; // inline asm { cvt.f32.f16 %f62, %rs24;} // inline asm // inline asm call (%rd151), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd115, %rd12, %rd12); // inline asm ld.u16 %rs25, [%rd151+2]; // inline asm { cvt.f32.f16 %f63, %rs25;} // inline asm // inline asm call (%rd157), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd115, %rd12, %rd12); // inline asm ld.u16 %rs26, [%rd157+4]; // inline asm { cvt.f32.f16 %f64, %rs26;} // inline asm add.f32 %f80, %f80, %f62; add.f32 %f81, %f81, %f63; add.f32 %f82, %f82, %f64; add.s32 %r119, %r119, 1; BB0_11: cvt.u64.u32 %rd167, %r2; // inline asm call (%rd164), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd167, %rd12, %rd12); // inline asm ld.u16 %rs27, [%rd164+6]; setp.le.u16 %p11, %rs27, %rs2; @%p11 bra BB0_13; // inline asm call (%rd171), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd167, %rd12, %rd12); // inline asm ld.u16 %rs28, [%rd171]; // inline asm { cvt.f32.f16 %f65, %rs28;} // inline asm // inline asm call (%rd177), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd167, %rd12, %rd12); // inline asm ld.u16 %rs29, [%rd177+2]; // inline asm { cvt.f32.f16 %f66, %rs29;} // inline asm // inline asm call (%rd183), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd34, %rd167, %rd12, %rd12); // inline asm ld.u16 %rs30, [%rd183+4]; // inline asm { cvt.f32.f16 %f67, %rs30;} // inline asm add.f32 %f80, %f80, %f65; add.f32 %f81, %f81, %f66; add.f32 %f82, %f82, %f67; add.s32 %r119, %r119, 1; BB0_13: // inline asm call (%rd190), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd167, %rd12, %rd12); // inline asm ld.u16 %rs31, [%rd190+6]; setp.le.u16 %p12, %rs31, %rs2; @%p12 bra BB0_15; // inline asm call (%rd197), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd167, %rd12, %rd12); // inline asm ld.u16 %rs32, [%rd197]; // inline asm { cvt.f32.f16 %f68, %rs32;} // inline asm // inline asm call (%rd203), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd167, %rd12, %rd12); // inline asm ld.u16 %rs33, [%rd203+2]; // inline asm { cvt.f32.f16 %f69, %rs33;} // inline asm // inline asm call (%rd209), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd88, %rd167, %rd12, %rd12); // inline asm ld.u16 %rs34, [%rd209+4]; // inline asm { cvt.f32.f16 %f70, %rs34;} // inline asm add.f32 %f80, %f80, %f68; add.f32 %f81, %f81, %f69; add.f32 %f82, %f82, %f70; add.s32 %r119, %r119, 1; BB0_15: setp.eq.s32 %p13, %r119, 0; @%p13 bra BB0_17; cvt.rn.f32.u32 %f75, %r119; rcp.rn.f32 %f76, %f75; mul.f32 %f71, %f80, %f76; mul.f32 %f72, %f81, %f76; mul.f32 %f73, %f82, %f76; ld.global.v2.u32 {%r114, %r115}, [pixelID]; cvt.u64.u32 %rd218, %r114; cvt.u64.u32 %rd219, %r115; // inline asm call (%rd216), _rt_buffer_get_64, (%rd8, %r16, %r17, %rd218, %rd219, %rd12, %rd12); // inline asm // inline asm { cvt.rn.f16.f32 %rs37, %f73;} // inline asm // inline asm { cvt.rn.f16.f32 %rs36, %f72;} // inline asm // inline asm { cvt.rn.f16.f32 %rs35, %f71;} // inline asm mov.f32 %f74, 0f3F800000; // inline asm { cvt.rn.f16.f32 %rs38, %f74;} // inline asm st.v4.u16 [%rd216], {%rs35, %rs36, %rs37, %rs38}; BB0_17: ret; }