//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 lightMeshBuffer[1];
.global .align 4 .u32 lightMeshBufferSize;
.global .align 4 .f32 lightInvCutoff;
.global .align 4 .f32 lightPointSize;
.global .align 4 .b8 lightColor[12];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 rnd_seeds2[1];
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[36];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<143>;
	.reg .b16 	%rs<47>;
	.reg .f32 	%f<853>;
	.reg .b32 	%r<362>;
	.reg .b64 	%rd<148>;


	mov.u64 	%rd147, __local_depot0;
	cvta.local.u64 	%SP, %rd147;
	ld.global.u32 	%r1, [lightMeshBufferSize];
	abs.s32 	%r2, %r1;
	ld.global.u32 	%r3, [samples];
	ld.global.v2.u32 	{%r105, %r106}, [pixelID];
	cvt.u64.u32	%rd22, %r105;
	cvt.u64.u32	%rd23, %r106;
	mov.u64 	%rd26, uvnormal;
	cvta.global.u64 	%rd21, %rd26;
	mov.u32 	%r103, 2;
	mov.u32 	%r104, 4;
	mov.u64 	%rd25, 0;
	// inline asm
	call (%rd20), _rt_buffer_get_64, (%rd21, %r103, %r104, %rd22, %rd23, %rd25, %rd25);
	// inline asm
	ld.u32 	%r4, [%rd20];
	shr.u32 	%r109, %r4, 16;
	cvt.u16.u32	%rs1, %r109;
	and.b16  	%rs3, %rs1, 255;
	cvt.u16.u32	%rs4, %r4;
	or.b16  	%rs5, %rs4, %rs3;
	setp.eq.s16	%p7, %rs5, 0;
	mov.f32 	%f807, 0f00000000;
	mov.f32 	%f808, %f807;
	mov.f32 	%f809, %f807;
	@%p7 bra 	BB0_2;

	ld.u8 	%rs6, [%rd20+1];
	and.b16  	%rs8, %rs4, 255;
	cvt.rn.f32.u16	%f173, %rs8;
	div.rn.f32 	%f174, %f173, 0f437F0000;
	fma.rn.f32 	%f175, %f174, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f176, %rs6;
	div.rn.f32 	%f177, %f176, 0f437F0000;
	fma.rn.f32 	%f178, %f177, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f179, %rs3;
	div.rn.f32 	%f180, %f179, 0f437F0000;
	fma.rn.f32 	%f181, %f180, 0f40000000, 0fBF800000;
	mul.f32 	%f182, %f178, %f178;
	fma.rn.f32 	%f183, %f175, %f175, %f182;
	fma.rn.f32 	%f184, %f181, %f181, %f183;
	sqrt.rn.f32 	%f185, %f184;
	rcp.rn.f32 	%f186, %f185;
	mul.f32 	%f807, %f175, %f186;
	mul.f32 	%f808, %f178, %f186;
	mul.f32 	%f809, %f181, %f186;

BB0_2:
	ld.global.v2.u32 	{%r110, %r111}, [pixelID];
	ld.global.v2.u32 	{%r113, %r114}, [tileInfo];
	add.s32 	%r5, %r110, %r113;
	add.s32 	%r6, %r111, %r114;
	setp.eq.f32	%p8, %f808, 0f00000000;
	setp.eq.f32	%p9, %f807, 0f00000000;
	and.pred  	%p10, %p9, %p8;
	setp.eq.f32	%p11, %f809, 0f00000000;
	and.pred  	%p12, %p10, %p11;
	@%p12 bra 	BB0_130;
	bra.uni 	BB0_3;

BB0_130:
	ld.global.u32 	%r361, [imageEnabled];
	and.b32  	%r312, %r361, 1;
	setp.eq.b32	%p138, %r312, 1;
	@!%p138 bra 	BB0_132;
	bra.uni 	BB0_131;

BB0_131:
	cvt.u64.u32	%rd109, %r5;
	cvt.u64.u32	%rd110, %r6;
	mov.u64 	%rd113, image;
	cvta.global.u64 	%rd108, %rd113;
	// inline asm
	call (%rd107), _rt_buffer_get_64, (%rd108, %r103, %r104, %rd109, %rd110, %rd25, %rd25);
	// inline asm
	mov.u16 	%rs31, 0;
	st.v4.u8 	[%rd107], {%rs31, %rs31, %rs31, %rs31};
	ld.global.u32 	%r361, [imageEnabled];

BB0_132:
	and.b32  	%r315, %r361, 8;
	setp.eq.s32	%p139, %r315, 0;
	@%p139 bra 	BB0_134;

	cvt.u64.u32	%rd116, %r5;
	cvt.u64.u32	%rd117, %r6;
	mov.u64 	%rd120, image_Mask;
	cvta.global.u64 	%rd115, %rd120;
	// inline asm
	call (%rd114), _rt_buffer_get_64, (%rd115, %r103, %r103, %rd116, %rd117, %rd25, %rd25);
	// inline asm
	mov.f32 	%f790, 0f00000000;
	cvt.rzi.u32.f32	%r318, %f790;
	cvt.u16.u32	%rs32, %r318;
	mov.u16 	%rs33, 0;
	st.v2.u8 	[%rd114], {%rs32, %rs33};
	ld.global.u32 	%r361, [imageEnabled];

BB0_134:
	and.b32  	%r319, %r361, 4;
	setp.eq.s32	%p140, %r319, 0;
	@%p140 bra 	BB0_138;

	ld.global.u32 	%r320, [additive];
	setp.eq.s32	%p141, %r320, 0;
	cvt.u64.u32	%rd18, %r5;
	cvt.u64.u32	%rd19, %r6;
	@%p141 bra 	BB0_137;

	mov.u64 	%rd133, image_HDR;
	cvta.global.u64 	%rd122, %rd133;
	mov.u32 	%r324, 8;
	// inline asm
	call (%rd121), _rt_buffer_get_64, (%rd122, %r103, %r324, %rd18, %rd19, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs40, %rs41, %rs42, %rs43}, [%rd121];
	// inline asm
	{  cvt.f32.f16 %f791, %rs40;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f792, %rs41;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f793, %rs42;}

	// inline asm
	// inline asm
	call (%rd127), _rt_buffer_get_64, (%rd122, %r103, %r324, %rd18, %rd19, %rd25, %rd25);
	// inline asm
	add.f32 	%f794, %f791, 0f00000000;
	add.f32 	%f795, %f792, 0f00000000;
	add.f32 	%f796, %f793, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs39, %f796;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs38, %f795;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs37, %f794;}

	// inline asm
	mov.u16 	%rs44, 0;
	st.v4.u16 	[%rd127], {%rs37, %rs38, %rs39, %rs44};
	bra.uni 	BB0_138;

BB0_3:
	ld.global.v2.u32 	{%r123, %r124}, [pixelID];
	cvt.u64.u32	%rd29, %r123;
	cvt.u64.u32	%rd30, %r124;
	mov.u64 	%rd39, uvpos;
	cvta.global.u64 	%rd28, %rd39;
	mov.u32 	%r119, 12;
	// inline asm
	call (%rd27), _rt_buffer_get_64, (%rd28, %r103, %r119, %rd29, %rd30, %rd25, %rd25);
	// inline asm
	ld.f32 	%f9, [%rd27+8];
	ld.f32 	%f8, [%rd27+4];
	ld.f32 	%f7, [%rd27];
	mul.f32 	%f189, %f7, 0f3456BF95;
	mul.f32 	%f190, %f8, 0f3456BF95;
	mul.f32 	%f191, %f9, 0f3456BF95;
	abs.f32 	%f10, %f807;
	div.rn.f32 	%f192, %f189, %f10;
	abs.f32 	%f193, %f808;
	div.rn.f32 	%f194, %f190, %f193;
	abs.f32 	%f11, %f809;
	div.rn.f32 	%f195, %f191, %f11;
	abs.f32 	%f196, %f192;
	abs.f32 	%f197, %f194;
	abs.f32 	%f198, %f195;
	mov.f32 	%f199, 0f38D1B717;
	max.f32 	%f200, %f196, %f199;
	max.f32 	%f201, %f197, %f199;
	max.f32 	%f202, %f198, %f199;
	fma.rn.f32 	%f12, %f807, %f200, %f7;
	fma.rn.f32 	%f13, %f808, %f201, %f8;
	fma.rn.f32 	%f14, %f809, %f202, %f9;
	ld.global.v2.u32 	{%r127, %r128}, [pixelID];
	cvt.u64.u32	%rd35, %r127;
	cvt.u64.u32	%rd36, %r128;
	mov.u64 	%rd40, rnd_seeds;
	cvta.global.u64 	%rd34, %rd40;
	// inline asm
	call (%rd33), _rt_buffer_get_64, (%rd34, %r103, %r104, %rd35, %rd36, %rd25, %rd25);
	// inline asm
	ld.u32 	%r337, [%rd33];
	mov.pred 	%p13, 0;
	mov.f32 	%f19, 0f00000000;
	mov.u32 	%r9, 0;
	setp.lt.s32	%p14, %r2, 1;
	@%p14 bra 	BB0_4;

	ld.global.f32 	%f15, [lightPointSize];
	mul.f32 	%f16, %f12, 0f3456BF95;
	mul.f32 	%f17, %f13, 0f3456BF95;
	mul.f32 	%f18, %f14, 0f3456BF95;
	mov.f32 	%f19, 0f00000000;
	mov.u32 	%r330, 0;
	abs.f32 	%f328, %f17;
	abs.f32 	%f329, %f16;
	max.f32 	%f330, %f329, %f328;
	abs.f32 	%f331, %f18;
	max.f32 	%f332, %f330, %f331;
	mov.u32 	%r9, %r330;
	mov.f32 	%f20, %f19;

BB0_6:
	shl.b32 	%r10, %r330, 1;
	cvt.s64.s32	%rd43, %r10;
	mov.u64 	%rd47, lightMeshBuffer;
	cvta.global.u64 	%rd42, %rd47;
	mov.u32 	%r133, 1;
	// inline asm
	call (%rd41), _rt_buffer_get_64, (%rd42, %r133, %r119, %rd43, %rd25, %rd25, %rd25);
	// inline asm
	ld.f32 	%f205, [%rd41];
	sub.f32 	%f206, %f205, %f7;
	ld.f32 	%f207, [%rd41+4];
	sub.f32 	%f208, %f207, %f8;
	ld.f32 	%f209, [%rd41+8];
	sub.f32 	%f210, %f209, %f9;
	mul.f32 	%f211, %f208, %f208;
	fma.rn.f32 	%f212, %f206, %f206, %f211;
	fma.rn.f32 	%f213, %f210, %f210, %f212;
	sqrt.rn.f32 	%f21, %f213;
	rcp.rn.f32 	%f214, %f21;
	mul.f32 	%f22, %f206, %f214;
	mul.f32 	%f23, %f208, %f214;
	mul.f32 	%f24, %f210, %f214;
	mul.f32 	%f215, %f808, %f23;
	fma.rn.f32 	%f216, %f807, %f22, %f215;
	fma.rn.f32 	%f25, %f809, %f24, %f216;
	setp.leu.f32	%p15, %f25, 0f00000000;
	@%p15 bra 	BB0_23;

	setp.eq.s32	%p16, %r3, 0;
	mul.f32 	%f217, %f21, %f21;
	div.rn.f32 	%f26, %f15, %f217;
	ld.global.v2.u32 	{%r137, %r138}, [pixelID];
	cvt.u64.u32	%rd54, %r138;
	cvt.u64.u32	%rd55, %r137;
	and.b64  	%rd50, %rd55, 255;
	and.b64  	%rd51, %rd54, 255;
	mov.u64 	%rd56, rnd_seeds2;
	cvta.global.u64 	%rd49, %rd56;
	mov.u32 	%r136, 3;
	// inline asm
	call (%rd48), _rt_buffer_get_64, (%rd49, %r103, %r136, %rd50, %rd51, %rd25, %rd25);
	// inline asm
	@%p16 bra 	BB0_9;

	ld.u8 	%rs10, [%rd48];
	cvt.rn.f32.u16	%f218, %rs10;
	div.rn.f32 	%f219, %f218, 0fC37F0000;
	fma.rn.f32 	%f220, %f219, 0f3F333333, 0f3F800000;
	setp.gt.f32	%p18, %f26, %f220;
	mov.pred 	%p142, -1;
	@%p18 bra 	BB0_25;

BB0_9:
	ld.global.f32 	%f223, [lightInvCutoff];
	mul.f32 	%f27, %f21, %f223;
	mov.f32 	%f227, 0f40800000;
	abs.f32 	%f29, %f27;
	setp.lt.f32	%p19, %f29, 0f00800000;
	mul.f32 	%f229, %f29, 0f4B800000;
	selp.f32	%f230, 0fC3170000, 0fC2FE0000, %p19;
	selp.f32	%f231, %f229, %f29, %p19;
	mov.b32 	 %r141, %f231;
	and.b32  	%r142, %r141, 8388607;
	or.b32  	%r143, %r142, 1065353216;
	mov.b32 	 %f232, %r143;
	shr.u32 	%r144, %r141, 23;
	cvt.rn.f32.u32	%f233, %r144;
	add.f32 	%f234, %f230, %f233;
	setp.gt.f32	%p20, %f232, 0f3FB504F3;
	mul.f32 	%f235, %f232, 0f3F000000;
	add.f32 	%f236, %f234, 0f3F800000;
	selp.f32	%f237, %f235, %f232, %p20;
	selp.f32	%f238, %f236, %f234, %p20;
	add.f32 	%f239, %f237, 0fBF800000;
	add.f32 	%f222, %f237, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f221,%f222;
	// inline asm
	add.f32 	%f240, %f239, %f239;
	mul.f32 	%f241, %f221, %f240;
	mul.f32 	%f242, %f241, %f241;
	mov.f32 	%f243, 0f3C4CAF63;
	mov.f32 	%f244, 0f3B18F0FE;
	fma.rn.f32 	%f245, %f244, %f242, %f243;
	mov.f32 	%f246, 0f3DAAAABD;
	fma.rn.f32 	%f247, %f245, %f242, %f246;
	mul.rn.f32 	%f248, %f247, %f242;
	mul.rn.f32 	%f249, %f248, %f241;
	sub.f32 	%f250, %f239, %f241;
	neg.f32 	%f251, %f241;
	add.f32 	%f252, %f250, %f250;
	fma.rn.f32 	%f253, %f251, %f239, %f252;
	mul.rn.f32 	%f254, %f221, %f253;
	add.f32 	%f255, %f249, %f241;
	sub.f32 	%f256, %f241, %f255;
	add.f32 	%f257, %f249, %f256;
	add.f32 	%f258, %f254, %f257;
	add.f32 	%f259, %f255, %f258;
	sub.f32 	%f260, %f255, %f259;
	add.f32 	%f261, %f258, %f260;
	mov.f32 	%f262, 0f3F317200;
	mul.rn.f32 	%f263, %f238, %f262;
	mov.f32 	%f264, 0f35BFBE8E;
	mul.rn.f32 	%f265, %f238, %f264;
	add.f32 	%f266, %f263, %f259;
	sub.f32 	%f267, %f263, %f266;
	add.f32 	%f268, %f259, %f267;
	add.f32 	%f269, %f261, %f268;
	add.f32 	%f270, %f265, %f269;
	add.f32 	%f271, %f266, %f270;
	sub.f32 	%f272, %f266, %f271;
	add.f32 	%f273, %f270, %f272;
	mul.rn.f32 	%f274, %f227, %f271;
	neg.f32 	%f275, %f274;
	fma.rn.f32 	%f276, %f227, %f271, %f275;
	fma.rn.f32 	%f277, %f227, %f273, %f276;
	mov.f32 	%f278, 0f00000000;
	fma.rn.f32 	%f279, %f278, %f271, %f277;
	add.rn.f32 	%f280, %f274, %f279;
	neg.f32 	%f281, %f280;
	add.rn.f32 	%f282, %f274, %f281;
	add.rn.f32 	%f283, %f282, %f279;
	mov.b32 	 %r145, %f280;
	setp.eq.s32	%p21, %r145, 1118925336;
	add.s32 	%r146, %r145, -1;
	mov.b32 	 %f284, %r146;
	add.f32 	%f285, %f283, 0f37000000;
	selp.f32	%f286, %f284, %f280, %p21;
	selp.f32	%f30, %f285, %f283, %p21;
	mul.f32 	%f287, %f286, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f288, %f287;
	mov.f32 	%f289, 0fBF317200;
	fma.rn.f32 	%f290, %f288, %f289, %f286;
	mov.f32 	%f291, 0fB5BFBE8E;
	fma.rn.f32 	%f292, %f288, %f291, %f290;
	mul.f32 	%f293, %f292, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f294, %f293;
	add.f32 	%f295, %f288, 0f00000000;
	ex2.approx.f32 	%f296, %f295;
	mul.f32 	%f297, %f294, %f296;
	setp.lt.f32	%p22, %f286, 0fC2D20000;
	selp.f32	%f298, 0f00000000, %f297, %p22;
	setp.gt.f32	%p23, %f286, 0f42D20000;
	selp.f32	%f812, 0f7F800000, %f298, %p23;
	setp.eq.f32	%p24, %f812, 0f7F800000;
	@%p24 bra 	BB0_11;

	fma.rn.f32 	%f812, %f812, %f30, %f812;

BB0_11:
	mov.f32 	%f803, 0f40000000;
	cvt.rzi.f32.f32	%f802, %f803;
	add.f32 	%f801, %f802, %f802;
	mov.f32 	%f800, 0f40800000;
	sub.f32 	%f799, %f800, %f801;
	abs.f32 	%f798, %f799;
	setp.lt.f32	%p25, %f27, 0f00000000;
	setp.eq.f32	%p26, %f798, 0f3F800000;
	and.pred  	%p1, %p25, %p26;
	mov.b32 	 %r147, %f812;
	xor.b32  	%r148, %r147, -2147483648;
	mov.b32 	 %f299, %r148;
	selp.f32	%f814, %f299, %f812, %p1;
	setp.eq.f32	%p27, %f27, 0f00000000;
	@%p27 bra 	BB0_14;
	bra.uni 	BB0_12;

BB0_14:
	add.f32 	%f302, %f27, %f27;
	selp.f32	%f814, %f302, 0f00000000, %p26;
	bra.uni 	BB0_15;

BB0_12:
	setp.geu.f32	%p28, %f27, 0f00000000;
	@%p28 bra 	BB0_15;

	mov.f32 	%f806, 0f40800000;
	cvt.rzi.f32.f32	%f301, %f806;
	setp.neu.f32	%p29, %f301, 0f40800000;
	selp.f32	%f814, 0f7FFFFFFF, %f814, %p29;

BB0_15:
	add.f32 	%f303, %f29, 0f40800000;
	mov.b32 	 %r149, %f303;
	setp.lt.s32	%p31, %r149, 2139095040;
	@%p31 bra 	BB0_20;

	setp.gtu.f32	%p32, %f29, 0f7F800000;
	@%p32 bra 	BB0_19;
	bra.uni 	BB0_17;

BB0_19:
	add.f32 	%f814, %f27, 0f40800000;
	bra.uni 	BB0_20;

BB0_17:
	setp.neu.f32	%p33, %f29, 0f7F800000;
	@%p33 bra 	BB0_20;

	selp.f32	%f814, 0fFF800000, 0f7F800000, %p1;

BB0_20:
	mov.u32 	%r328, 1;
	mov.u64 	%rd142, lightMeshBuffer;
	cvta.global.u64 	%rd141, %rd142;
	shl.b32 	%r327, %r330, 1;
	mov.f32 	%f304, 0f3F800000;
	sub.f32 	%f305, %f304, %f814;
	setp.eq.f32	%p34, %f27, 0f3F800000;
	selp.f32	%f306, 0f00000000, %f305, %p34;
	cvt.sat.f32.f32	%f307, %f306;
	mul.f32 	%f308, %f26, %f307;
	add.s32 	%r152, %r327, 1;
	cvt.s64.s32	%rd59, %r152;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd141, %r328, %r119, %rd59, %rd25, %rd25, %rd25);
	// inline asm
	ld.f32 	%f309, [%rd57];
	mul.f32 	%f310, %f22, %f309;
	ld.f32 	%f311, [%rd57+4];
	mul.f32 	%f312, %f23, %f311;
	neg.f32 	%f313, %f312;
	sub.f32 	%f314, %f313, %f310;
	ld.f32 	%f315, [%rd57+8];
	mul.f32 	%f316, %f24, %f315;
	sub.f32 	%f317, %f314, %f316;
	cvt.sat.f32.f32	%f318, %f317;
	mul.f32 	%f41, %f308, %f318;
	cvt.sat.f32.f32	%f42, %f25;
	mul.f32 	%f319, %f41, %f42;
	setp.leu.f32	%p35, %f319, 0f3727C5AC;
	@%p35 bra 	BB0_22;

	mov.u32 	%r329, 1;
	add.u64 	%rd64, %SP, 28;
	cvta.to.local.u64 	%rd65, %rd64;
	max.f32 	%f326, %f332, %f199;
	sub.f32 	%f327, %f21, %f326;
	mov.u32 	%r156, 1065353216;
	st.local.u32 	[%rd65], %r156;
	ld.global.u32 	%r153, [root];
	// inline asm
	call _rt_trace_64, (%r153, %f12, %f13, %f14, %f22, %f23, %f24, %r329, %f326, %f327, %rd64, %r104);
	// inline asm
	ld.local.f32 	%f334, [%rd65];
	mul.f32 	%f335, %f41, 0f3EA2F983;
	mul.f32 	%f336, %f335, %f334;
	fma.rn.f32 	%f20, %f42, %f336, %f20;
	add.f32 	%f19, %f19, %f334;

BB0_22:
	add.s32 	%r9, %r9, 1;

BB0_23:
	add.s32 	%r330, %r330, 1;
	setp.lt.s32	%p37, %r330, %r2;
	@%p37 bra 	BB0_6;
	bra.uni 	BB0_24;

BB0_4:
	mov.f32 	%f20, %f19;

BB0_24:
	mov.pred 	%p142, %p13;

BB0_25:
	cvt.rn.f32.s32	%f337, %r9;
	mov.f32 	%f338, 0f3F800000;
	max.f32 	%f339, %f337, %f338;
	div.rn.f32 	%f839, %f20, %f339;
	div.rn.f32 	%f840, %f19, %f339;
	@!%p142 bra 	BB0_78;
	bra.uni 	BB0_26;

BB0_26:
	abs.f32 	%f805, %f809;
	abs.f32 	%f804, %f807;
	setp.gt.f32	%p38, %f804, %f805;
	neg.f32 	%f342, %f808;
	selp.f32	%f343, %f342, 0f00000000, %p38;
	neg.f32 	%f344, %f809;
	selp.f32	%f345, %f807, %f344, %p38;
	selp.f32	%f346, 0f00000000, %f808, %p38;
	mul.f32 	%f347, %f345, %f345;
	fma.rn.f32 	%f348, %f343, %f343, %f347;
	fma.rn.f32 	%f349, %f346, %f346, %f348;
	sqrt.rn.f32 	%f350, %f349;
	rcp.rn.f32 	%f351, %f350;
	mul.f32 	%f53, %f343, %f351;
	mul.f32 	%f54, %f345, %f351;
	mul.f32 	%f55, %f346, %f351;
	mov.f32 	%f823, 0f00000000;
	setp.lt.s32	%p39, %r3, 1;
	mov.f32 	%f824, %f823;
	@%p39 bra 	BB0_77;

	cvt.rn.f32.s32	%f354, %r3;
	rcp.rn.f32 	%f56, %f354;
	add.u64 	%rd66, %SP, 0;
	cvta.to.local.u64 	%rd3, %rd66;
	mul.f32 	%f57, %f12, 0f3456BF95;
	mul.f32 	%f58, %f13, 0f3456BF95;
	mul.f32 	%f59, %f14, 0f3456BF95;
	add.u64 	%rd67, %SP, 32;
	cvta.to.local.u64 	%rd4, %rd67;
	mul.f32 	%f355, %f807, %f54;
	mul.f32 	%f356, %f808, %f53;
	sub.f32 	%f60, %f356, %f355;
	mul.f32 	%f357, %f809, %f53;
	mul.f32 	%f358, %f807, %f55;
	sub.f32 	%f61, %f358, %f357;
	mul.f32 	%f359, %f808, %f55;
	mul.f32 	%f360, %f809, %f54;
	sub.f32 	%f62, %f360, %f359;
	mov.f32 	%f823, 0f00000000;
	mov.u32 	%r157, 0;
	abs.f32 	%f361, %f58;
	abs.f32 	%f362, %f57;
	max.f32 	%f363, %f362, %f361;
	abs.f32 	%f364, %f59;
	max.f32 	%f365, %f363, %f364;
	mov.u32 	%r334, %r157;
	mov.f32 	%f824, %f823;

BB0_28:
	cvt.rn.f32.s32	%f65, %r334;
	max.f32 	%f66, %f365, %f199;
	mov.u32 	%r336, %r157;

BB0_29:
	mad.lo.s32 	%r159, %r337, 1664525, 1013904223;
	and.b32  	%r160, %r159, 16777215;
	cvt.rn.f32.u32	%f367, %r160;
	fma.rn.f32 	%f368, %f367, 0f33800000, %f65;
	mul.f32 	%f369, %f56, %f368;
	mad.lo.s32 	%r337, %r159, 1664525, 1013904223;
	and.b32  	%r161, %r337, 16777215;
	cvt.rn.f32.u32	%f370, %r161;
	cvt.rn.f32.s32	%f371, %r336;
	fma.rn.f32 	%f372, %f370, 0f33800000, %f371;
	mul.f32 	%f373, %f56, %f372;
	sqrt.rn.f32 	%f69, %f369;
	mul.f32 	%f831, %f373, 0f40C90FDB;
	abs.f32 	%f71, %f831;
	setp.neu.f32	%p40, %f71, 0f7F800000;
	mov.f32 	%f825, %f831;
	@%p40 bra 	BB0_31;

	mov.f32 	%f374, 0f00000000;
	mul.rn.f32 	%f825, %f831, %f374;

BB0_31:
	mul.f32 	%f375, %f825, 0f3F22F983;
	cvt.rni.s32.f32	%r347, %f375;
	cvt.rn.f32.s32	%f376, %r347;
	neg.f32 	%f377, %f376;
	mov.f32 	%f378, 0f3FC90FDA;
	fma.rn.f32 	%f379, %f377, %f378, %f825;
	mov.f32 	%f380, 0f33A22168;
	fma.rn.f32 	%f381, %f377, %f380, %f379;
	mov.f32 	%f382, 0f27C234C5;
	fma.rn.f32 	%f826, %f377, %f382, %f381;
	abs.f32 	%f383, %f825;
	setp.leu.f32	%p41, %f383, 0f47CE4780;
	@%p41 bra 	BB0_42;

	mov.b32 	 %r21, %f825;
	shr.u32 	%r22, %r21, 23;
	shl.b32 	%r164, %r21, 8;
	or.b32  	%r23, %r164, -2147483648;
	mov.u32 	%r339, 0;
	mov.u64 	%rd143, __cudart_i2opi_f;
	mov.u32 	%r338, -6;
	mov.u64 	%rd144, %rd3;

BB0_33:
	.pragma "nounroll";
	ld.const.u32 	%r167, [%rd143];
	// inline asm
	{
	mad.lo.cc.u32   %r165, %r167, %r23, %r339;
	madc.hi.u32     %r339, %r167, %r23,  0;
	}
	// inline asm
	st.local.u32 	[%rd144], %r165;
	add.s64 	%rd144, %rd144, 4;
	add.s64 	%rd143, %rd143, 4;
	add.s32 	%r338, %r338, 1;
	setp.ne.s32	%p42, %r338, 0;
	@%p42 bra 	BB0_33;

	and.b32  	%r170, %r22, 255;
	add.s32 	%r171, %r170, -128;
	shr.u32 	%r172, %r171, 5;
	and.b32  	%r28, %r21, -2147483648;
	st.local.u32 	[%rd3+24], %r339;
	mov.u32 	%r173, 6;
	sub.s32 	%r174, %r173, %r172;
	mul.wide.s32 	%rd69, %r174, 4;
	add.s64 	%rd9, %rd3, %rd69;
	ld.local.u32 	%r340, [%rd9];
	ld.local.u32 	%r341, [%rd9+-4];
	and.b32  	%r31, %r22, 31;
	setp.eq.s32	%p43, %r31, 0;
	@%p43 bra 	BB0_36;

	mov.u32 	%r175, 32;
	sub.s32 	%r176, %r175, %r31;
	shr.u32 	%r177, %r341, %r176;
	shl.b32 	%r178, %r340, %r31;
	add.s32 	%r340, %r177, %r178;
	ld.local.u32 	%r179, [%rd9+-8];
	shr.u32 	%r180, %r179, %r176;
	shl.b32 	%r181, %r341, %r31;
	add.s32 	%r341, %r180, %r181;

BB0_36:
	shr.u32 	%r182, %r341, 30;
	shl.b32 	%r183, %r340, 2;
	add.s32 	%r342, %r182, %r183;
	shl.b32 	%r37, %r341, 2;
	shr.u32 	%r184, %r342, 31;
	shr.u32 	%r185, %r340, 30;
	add.s32 	%r38, %r184, %r185;
	setp.eq.s32	%p44, %r184, 0;
	@%p44 bra 	BB0_37;
	bra.uni 	BB0_38;

BB0_37:
	mov.u32 	%r343, %r28;
	mov.u32 	%r344, %r37;
	bra.uni 	BB0_39;

BB0_38:
	not.b32 	%r186, %r342;
	neg.s32 	%r344, %r37;
	setp.eq.s32	%p45, %r37, 0;
	selp.u32	%r187, 1, 0, %p45;
	add.s32 	%r342, %r187, %r186;
	xor.b32  	%r343, %r28, -2147483648;

BB0_39:
	clz.b32 	%r346, %r342;
	setp.eq.s32	%p46, %r346, 0;
	shl.b32 	%r188, %r342, %r346;
	mov.u32 	%r189, 32;
	sub.s32 	%r190, %r189, %r346;
	shr.u32 	%r191, %r344, %r190;
	add.s32 	%r192, %r191, %r188;
	selp.b32	%r46, %r342, %r192, %p46;
	mov.u32 	%r193, -921707870;
	mul.hi.u32 	%r345, %r46, %r193;
	setp.eq.s32	%p47, %r28, 0;
	neg.s32 	%r194, %r38;
	selp.b32	%r347, %r38, %r194, %p47;
	setp.lt.s32	%p48, %r345, 1;
	@%p48 bra 	BB0_41;

	mul.lo.s32 	%r195, %r46, -921707870;
	shr.u32 	%r196, %r195, 31;
	shl.b32 	%r197, %r345, 1;
	add.s32 	%r345, %r196, %r197;
	add.s32 	%r346, %r346, 1;

BB0_41:
	mov.u32 	%r198, 126;
	sub.s32 	%r199, %r198, %r346;
	shl.b32 	%r200, %r199, 23;
	add.s32 	%r201, %r345, 1;
	shr.u32 	%r202, %r201, 7;
	add.s32 	%r203, %r202, 1;
	shr.u32 	%r204, %r203, 1;
	add.s32 	%r205, %r204, %r200;
	or.b32  	%r206, %r205, %r343;
	mov.b32 	 %f826, %r206;

BB0_42:
	mul.rn.f32 	%f77, %f826, %f826;
	add.s32 	%r54, %r347, 1;
	and.b32  	%r55, %r54, 1;
	setp.eq.s32	%p49, %r55, 0;
	@%p49 bra 	BB0_44;
	bra.uni 	BB0_43;

BB0_44:
	mov.f32 	%f386, 0f3C08839E;
	mov.f32 	%f387, 0fB94CA1F9;
	fma.rn.f32 	%f827, %f387, %f77, %f386;
	bra.uni 	BB0_45;

BB0_43:
	mov.f32 	%f384, 0fBAB6061A;
	mov.f32 	%f385, 0f37CCF5CE;
	fma.rn.f32 	%f827, %f385, %f77, %f384;

BB0_45:
	@%p49 bra 	BB0_47;
	bra.uni 	BB0_46;

BB0_47:
	mov.f32 	%f391, 0fBE2AAAA3;
	fma.rn.f32 	%f392, %f827, %f77, %f391;
	mov.f32 	%f393, 0f00000000;
	fma.rn.f32 	%f828, %f392, %f77, %f393;
	bra.uni 	BB0_48;

BB0_46:
	mov.f32 	%f388, 0f3D2AAAA5;
	fma.rn.f32 	%f389, %f827, %f77, %f388;
	mov.f32 	%f390, 0fBF000000;
	fma.rn.f32 	%f828, %f389, %f77, %f390;

BB0_48:
	fma.rn.f32 	%f829, %f828, %f826, %f826;
	@%p49 bra 	BB0_50;

	fma.rn.f32 	%f829, %f828, %f77, %f338;

BB0_50:
	and.b32  	%r207, %r54, 2;
	setp.eq.s32	%p52, %r207, 0;
	@%p52 bra 	BB0_52;

	mov.f32 	%f395, 0f00000000;
	mov.f32 	%f396, 0fBF800000;
	fma.rn.f32 	%f829, %f829, %f396, %f395;

BB0_52:
	@%p40 bra 	BB0_54;

	mov.f32 	%f397, 0f00000000;
	mul.rn.f32 	%f831, %f831, %f397;

BB0_54:
	mul.f32 	%f398, %f831, 0f3F22F983;
	cvt.rni.s32.f32	%r357, %f398;
	cvt.rn.f32.s32	%f399, %r357;
	neg.f32 	%f400, %f399;
	fma.rn.f32 	%f402, %f400, %f378, %f831;
	fma.rn.f32 	%f404, %f400, %f380, %f402;
	fma.rn.f32 	%f832, %f400, %f382, %f404;
	abs.f32 	%f406, %f831;
	setp.leu.f32	%p54, %f406, 0f47CE4780;
	@%p54 bra 	BB0_65;

	mov.b32 	 %r57, %f831;
	shr.u32 	%r58, %r57, 23;
	shl.b32 	%r210, %r57, 8;
	or.b32  	%r59, %r210, -2147483648;
	mov.u32 	%r349, 0;
	mov.u64 	%rd145, __cudart_i2opi_f;
	mov.u32 	%r348, -6;
	mov.u64 	%rd146, %rd3;

BB0_56:
	.pragma "nounroll";
	ld.const.u32 	%r213, [%rd145];
	// inline asm
	{
	mad.lo.cc.u32   %r211, %r213, %r59, %r349;
	madc.hi.u32     %r349, %r213, %r59,  0;
	}
	// inline asm
	st.local.u32 	[%rd146], %r211;
	add.s64 	%rd146, %rd146, 4;
	add.s64 	%rd145, %rd145, 4;
	add.s32 	%r348, %r348, 1;
	setp.ne.s32	%p55, %r348, 0;
	@%p55 bra 	BB0_56;

	and.b32  	%r216, %r58, 255;
	add.s32 	%r217, %r216, -128;
	shr.u32 	%r218, %r217, 5;
	and.b32  	%r64, %r57, -2147483648;
	st.local.u32 	[%rd3+24], %r349;
	mov.u32 	%r219, 6;
	sub.s32 	%r220, %r219, %r218;
	mul.wide.s32 	%rd71, %r220, 4;
	add.s64 	%rd14, %rd3, %rd71;
	ld.local.u32 	%r350, [%rd14];
	ld.local.u32 	%r351, [%rd14+-4];
	and.b32  	%r67, %r58, 31;
	setp.eq.s32	%p56, %r67, 0;
	@%p56 bra 	BB0_59;

	mov.u32 	%r221, 32;
	sub.s32 	%r222, %r221, %r67;
	shr.u32 	%r223, %r351, %r222;
	shl.b32 	%r224, %r350, %r67;
	add.s32 	%r350, %r223, %r224;
	ld.local.u32 	%r225, [%rd14+-8];
	shr.u32 	%r226, %r225, %r222;
	shl.b32 	%r227, %r351, %r67;
	add.s32 	%r351, %r226, %r227;

BB0_59:
	shr.u32 	%r228, %r351, 30;
	shl.b32 	%r229, %r350, 2;
	add.s32 	%r352, %r228, %r229;
	shl.b32 	%r73, %r351, 2;
	shr.u32 	%r230, %r352, 31;
	shr.u32 	%r231, %r350, 30;
	add.s32 	%r74, %r230, %r231;
	setp.eq.s32	%p57, %r230, 0;
	@%p57 bra 	BB0_60;
	bra.uni 	BB0_61;

BB0_60:
	mov.u32 	%r353, %r64;
	mov.u32 	%r354, %r73;
	bra.uni 	BB0_62;

BB0_61:
	not.b32 	%r232, %r352;
	neg.s32 	%r354, %r73;
	setp.eq.s32	%p58, %r73, 0;
	selp.u32	%r233, 1, 0, %p58;
	add.s32 	%r352, %r233, %r232;
	xor.b32  	%r353, %r64, -2147483648;

BB0_62:
	clz.b32 	%r356, %r352;
	setp.eq.s32	%p59, %r356, 0;
	shl.b32 	%r234, %r352, %r356;
	mov.u32 	%r235, 32;
	sub.s32 	%r236, %r235, %r356;
	shr.u32 	%r237, %r354, %r236;
	add.s32 	%r238, %r237, %r234;
	selp.b32	%r82, %r352, %r238, %p59;
	mov.u32 	%r239, -921707870;
	mul.hi.u32 	%r355, %r82, %r239;
	setp.eq.s32	%p60, %r64, 0;
	neg.s32 	%r240, %r74;
	selp.b32	%r357, %r74, %r240, %p60;
	setp.lt.s32	%p61, %r355, 1;
	@%p61 bra 	BB0_64;

	mul.lo.s32 	%r241, %r82, -921707870;
	shr.u32 	%r242, %r241, 31;
	shl.b32 	%r243, %r355, 1;
	add.s32 	%r355, %r242, %r243;
	add.s32 	%r356, %r356, 1;

BB0_64:
	mov.u32 	%r244, 126;
	sub.s32 	%r245, %r244, %r356;
	shl.b32 	%r246, %r245, 23;
	add.s32 	%r247, %r355, 1;
	shr.u32 	%r248, %r247, 7;
	add.s32 	%r249, %r248, 1;
	shr.u32 	%r250, %r249, 1;
	add.s32 	%r251, %r250, %r246;
	or.b32  	%r252, %r251, %r353;
	mov.b32 	 %f832, %r252;

BB0_65:
	mul.rn.f32 	%f94, %f832, %f832;
	and.b32  	%r90, %r357, 1;
	setp.eq.s32	%p62, %r90, 0;
	@%p62 bra 	BB0_67;
	bra.uni 	BB0_66;

BB0_67:
	mov.f32 	%f409, 0f3C08839E;
	mov.f32 	%f410, 0fB94CA1F9;
	fma.rn.f32 	%f833, %f410, %f94, %f409;
	bra.uni 	BB0_68;

BB0_66:
	mov.f32 	%f407, 0fBAB6061A;
	mov.f32 	%f408, 0f37CCF5CE;
	fma.rn.f32 	%f833, %f408, %f94, %f407;

BB0_68:
	@%p62 bra 	BB0_70;
	bra.uni 	BB0_69;

BB0_70:
	mov.f32 	%f414, 0fBE2AAAA3;
	fma.rn.f32 	%f415, %f833, %f94, %f414;
	mov.f32 	%f416, 0f00000000;
	fma.rn.f32 	%f834, %f415, %f94, %f416;
	bra.uni 	BB0_71;

BB0_69:
	mov.f32 	%f411, 0f3D2AAAA5;
	fma.rn.f32 	%f412, %f833, %f94, %f411;
	mov.f32 	%f413, 0fBF000000;
	fma.rn.f32 	%f834, %f412, %f94, %f413;

BB0_71:
	fma.rn.f32 	%f835, %f834, %f832, %f832;
	@%p62 bra 	BB0_73;

	fma.rn.f32 	%f835, %f834, %f94, %f338;

BB0_73:
	and.b32  	%r253, %r357, 2;
	setp.eq.s32	%p65, %r253, 0;
	@%p65 bra 	BB0_75;

	mov.f32 	%f418, 0f00000000;
	mov.f32 	%f419, 0fBF800000;
	fma.rn.f32 	%f835, %f835, %f419, %f418;

BB0_75:
	mul.f32 	%f428, %f69, %f829;
	mul.f32 	%f429, %f428, %f428;
	sub.f32 	%f431, %f338, %f429;
	mul.f32 	%f432, %f69, %f835;
	mul.f32 	%f433, %f432, %f432;
	sub.f32 	%f434, %f431, %f433;
	mov.f32 	%f435, 0f00000000;
	max.f32 	%f436, %f435, %f434;
	sqrt.rn.f32 	%f437, %f436;
	mul.f32 	%f438, %f53, %f432;
	mul.f32 	%f439, %f54, %f432;
	mul.f32 	%f440, %f55, %f432;
	fma.rn.f32 	%f441, %f62, %f428, %f438;
	fma.rn.f32 	%f442, %f61, %f428, %f439;
	fma.rn.f32 	%f443, %f60, %f428, %f440;
	fma.rn.f32 	%f423, %f807, %f437, %f441;
	fma.rn.f32 	%f424, %f808, %f437, %f442;
	fma.rn.f32 	%f425, %f809, %f437, %f443;
	mov.u32 	%r255, 0;
	st.local.u32 	[%rd4], %r255;
	ld.global.u32 	%r254, [root];
	mov.f32 	%f427, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r254, %f12, %f13, %f14, %f423, %f424, %f425, %r255, %f66, %f427, %rd67, %r104);
	// inline asm
	ld.local.f32 	%f444, [%rd4];
	setp.lt.f32	%p66, %f444, 0f00000000;
	selp.f32	%f445, 0f00000000, %f444, %p66;
	selp.f32	%f446, 0f00000000, 0f3F800000, %p66;
	add.f32 	%f823, %f823, %f446;
	add.f32 	%f824, %f824, %f445;
	add.s32 	%r336, %r336, 1;
	setp.lt.s32	%p67, %r336, %r3;
	@%p67 bra 	BB0_29;

	add.s32 	%r334, %r334, 1;
	setp.lt.s32	%p68, %r334, %r3;
	@%p68 bra 	BB0_28;

BB0_77:
	mul.lo.s32 	%r257, %r3, %r3;
	cvt.rn.f32.s32	%f447, %r257;
	div.rn.f32 	%f839, %f824, %f447;
	div.rn.f32 	%f840, %f823, %f447;

BB0_78:
	setp.gt.s32	%p69, %r1, -1;
	selp.f32	%f114, %f840, %f839, %p69;
	ld.global.u32 	%r359, [imageEnabled];
	and.b32  	%r258, %r359, 8;
	setp.eq.s32	%p70, %r258, 0;
	@%p70 bra 	BB0_91;

	cvt.u64.u32	%rd75, %r5;
	cvt.u64.u32	%rd76, %r6;
	mov.u64 	%rd79, image_Mask;
	cvta.global.u64 	%rd74, %rd79;
	// inline asm
	call (%rd73), _rt_buffer_get_64, (%rd74, %r103, %r103, %rd75, %rd76, %rd25, %rd25);
	// inline asm
	mov.f32 	%f450, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f451, %f450;
	fma.rn.f32 	%f452, %f451, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f115, %f452;
	abs.f32 	%f116, %f114;
	setp.lt.f32	%p71, %f116, 0f00800000;
	mul.f32 	%f453, %f116, 0f4B800000;
	selp.f32	%f454, 0fC3170000, 0fC2FE0000, %p71;
	selp.f32	%f455, %f453, %f116, %p71;
	mov.b32 	 %r261, %f455;
	and.b32  	%r262, %r261, 8388607;
	or.b32  	%r263, %r262, 1065353216;
	mov.b32 	 %f456, %r263;
	shr.u32 	%r264, %r261, 23;
	cvt.rn.f32.u32	%f457, %r264;
	add.f32 	%f458, %f454, %f457;
	setp.gt.f32	%p72, %f456, 0f3FB504F3;
	mul.f32 	%f459, %f456, 0f3F000000;
	add.f32 	%f460, %f458, 0f3F800000;
	selp.f32	%f461, %f459, %f456, %p72;
	selp.f32	%f462, %f460, %f458, %p72;
	add.f32 	%f463, %f461, 0fBF800000;
	add.f32 	%f449, %f461, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f448,%f449;
	// inline asm
	add.f32 	%f464, %f463, %f463;
	mul.f32 	%f465, %f448, %f464;
	mul.f32 	%f466, %f465, %f465;
	mov.f32 	%f467, 0f3C4CAF63;
	mov.f32 	%f468, 0f3B18F0FE;
	fma.rn.f32 	%f469, %f468, %f466, %f467;
	mov.f32 	%f470, 0f3DAAAABD;
	fma.rn.f32 	%f471, %f469, %f466, %f470;
	mul.rn.f32 	%f472, %f471, %f466;
	mul.rn.f32 	%f473, %f472, %f465;
	sub.f32 	%f474, %f463, %f465;
	neg.f32 	%f475, %f465;
	add.f32 	%f476, %f474, %f474;
	fma.rn.f32 	%f477, %f475, %f463, %f476;
	mul.rn.f32 	%f478, %f448, %f477;
	add.f32 	%f479, %f473, %f465;
	sub.f32 	%f480, %f465, %f479;
	add.f32 	%f481, %f473, %f480;
	add.f32 	%f482, %f478, %f481;
	add.f32 	%f483, %f479, %f482;
	sub.f32 	%f484, %f479, %f483;
	add.f32 	%f485, %f482, %f484;
	mov.f32 	%f486, 0f3F317200;
	mul.rn.f32 	%f487, %f462, %f486;
	mov.f32 	%f488, 0f35BFBE8E;
	mul.rn.f32 	%f489, %f462, %f488;
	add.f32 	%f490, %f487, %f483;
	sub.f32 	%f491, %f487, %f490;
	add.f32 	%f492, %f483, %f491;
	add.f32 	%f493, %f485, %f492;
	add.f32 	%f494, %f489, %f493;
	add.f32 	%f495, %f490, %f494;
	sub.f32 	%f496, %f490, %f495;
	add.f32 	%f497, %f494, %f496;
	mov.f32 	%f498, 0f3EE8BA2E;
	mul.rn.f32 	%f499, %f498, %f495;
	neg.f32 	%f500, %f499;
	fma.rn.f32 	%f501, %f498, %f495, %f500;
	fma.rn.f32 	%f502, %f498, %f497, %f501;
	mov.f32 	%f503, 0f00000000;
	fma.rn.f32 	%f504, %f503, %f495, %f502;
	add.rn.f32 	%f505, %f499, %f504;
	neg.f32 	%f506, %f505;
	add.rn.f32 	%f507, %f499, %f506;
	add.rn.f32 	%f508, %f507, %f504;
	mov.b32 	 %r265, %f505;
	setp.eq.s32	%p73, %r265, 1118925336;
	add.s32 	%r266, %r265, -1;
	mov.b32 	 %f509, %r266;
	add.f32 	%f510, %f508, 0f37000000;
	selp.f32	%f511, %f509, %f505, %p73;
	selp.f32	%f117, %f510, %f508, %p73;
	mul.f32 	%f512, %f511, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f513, %f512;
	mov.f32 	%f514, 0fBF317200;
	fma.rn.f32 	%f515, %f513, %f514, %f511;
	mov.f32 	%f516, 0fB5BFBE8E;
	fma.rn.f32 	%f517, %f513, %f516, %f515;
	mul.f32 	%f518, %f517, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f519, %f518;
	add.f32 	%f520, %f513, 0f00000000;
	ex2.approx.f32 	%f521, %f520;
	mul.f32 	%f522, %f519, %f521;
	setp.lt.f32	%p74, %f511, 0fC2D20000;
	selp.f32	%f523, 0f00000000, %f522, %p74;
	setp.gt.f32	%p75, %f511, 0f42D20000;
	selp.f32	%f841, 0f7F800000, %f523, %p75;
	setp.eq.f32	%p76, %f841, 0f7F800000;
	@%p76 bra 	BB0_81;

	fma.rn.f32 	%f841, %f841, %f117, %f841;

BB0_81:
	setp.lt.f32	%p77, %f114, 0f00000000;
	setp.eq.f32	%p78, %f115, 0f3F800000;
	and.pred  	%p3, %p77, %p78;
	mov.b32 	 %r267, %f841;
	xor.b32  	%r268, %r267, -2147483648;
	mov.b32 	 %f524, %r268;
	selp.f32	%f843, %f524, %f841, %p3;
	setp.eq.f32	%p79, %f114, 0f00000000;
	@%p79 bra 	BB0_84;
	bra.uni 	BB0_82;

BB0_84:
	add.f32 	%f527, %f114, %f114;
	selp.f32	%f843, %f527, 0f00000000, %p78;
	bra.uni 	BB0_85;

BB0_137:
	mov.u64 	%rd140, image_HDR;
	cvta.global.u64 	%rd135, %rd140;
	mov.u32 	%r326, 8;
	// inline asm
	call (%rd134), _rt_buffer_get_64, (%rd135, %r103, %r326, %rd18, %rd19, %rd25, %rd25);
	// inline asm
	mov.f32 	%f797, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs45, %f797;}

	// inline asm
	mov.u16 	%rs46, 0;
	st.v4.u16 	[%rd134], {%rs45, %rs45, %rs45, %rs46};
	bra.uni 	BB0_138;

BB0_82:
	setp.geu.f32	%p80, %f114, 0f00000000;
	@%p80 bra 	BB0_85;

	cvt.rzi.f32.f32	%f526, %f498;
	setp.neu.f32	%p81, %f526, 0f3EE8BA2E;
	selp.f32	%f843, 0f7FFFFFFF, %f843, %p81;

BB0_85:
	add.f32 	%f528, %f116, 0f3EE8BA2E;
	mov.b32 	 %r269, %f528;
	setp.lt.s32	%p83, %r269, 2139095040;
	@%p83 bra 	BB0_90;

	setp.gtu.f32	%p84, %f116, 0f7F800000;
	@%p84 bra 	BB0_89;
	bra.uni 	BB0_87;

BB0_89:
	add.f32 	%f843, %f114, 0f3EE8BA2E;
	bra.uni 	BB0_90;

BB0_87:
	setp.neu.f32	%p85, %f116, 0f7F800000;
	@%p85 bra 	BB0_90;

	selp.f32	%f843, 0fFF800000, 0f7F800000, %p3;

BB0_90:
	mul.f32 	%f529, %f843, 0f437F0000;
	setp.eq.f32	%p86, %f114, 0f3F800000;
	selp.f32	%f530, 0f437F0000, %f529, %p86;
	cvt.rzi.u32.f32	%r270, %f530;
	cvt.u16.u32	%rs11, %r270;
	mov.u16 	%rs12, 255;
	st.v2.u8 	[%rd73], {%rs11, %rs12};
	ld.global.u32 	%r359, [imageEnabled];

BB0_91:
	ld.global.f32 	%f531, [lightColor];
	mul.f32 	%f128, %f839, %f531;
	ld.global.f32 	%f532, [lightColor+4];
	mul.f32 	%f129, %f839, %f532;
	ld.global.f32 	%f533, [lightColor+8];
	mul.f32 	%f130, %f839, %f533;
	and.b32  	%r271, %r359, 1;
	setp.eq.b32	%p87, %r271, 1;
	@!%p87 bra 	BB0_126;
	bra.uni 	BB0_92;

BB0_92:
	mov.f32 	%f536, 0f3E666666;
	cvt.rzi.f32.f32	%f537, %f536;
	fma.rn.f32 	%f538, %f537, 0fC0000000, 0f3EE66666;
	abs.f32 	%f131, %f538;
	abs.f32 	%f132, %f128;
	setp.lt.f32	%p88, %f132, 0f00800000;
	mul.f32 	%f539, %f132, 0f4B800000;
	selp.f32	%f540, 0fC3170000, 0fC2FE0000, %p88;
	selp.f32	%f541, %f539, %f132, %p88;
	mov.b32 	 %r272, %f541;
	and.b32  	%r273, %r272, 8388607;
	or.b32  	%r274, %r273, 1065353216;
	mov.b32 	 %f542, %r274;
	shr.u32 	%r275, %r272, 23;
	cvt.rn.f32.u32	%f543, %r275;
	add.f32 	%f544, %f540, %f543;
	setp.gt.f32	%p89, %f542, 0f3FB504F3;
	mul.f32 	%f545, %f542, 0f3F000000;
	add.f32 	%f546, %f544, 0f3F800000;
	selp.f32	%f547, %f545, %f542, %p89;
	selp.f32	%f548, %f546, %f544, %p89;
	add.f32 	%f549, %f547, 0fBF800000;
	add.f32 	%f535, %f547, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f534,%f535;
	// inline asm
	add.f32 	%f550, %f549, %f549;
	mul.f32 	%f551, %f534, %f550;
	mul.f32 	%f552, %f551, %f551;
	mov.f32 	%f553, 0f3C4CAF63;
	mov.f32 	%f554, 0f3B18F0FE;
	fma.rn.f32 	%f555, %f554, %f552, %f553;
	mov.f32 	%f556, 0f3DAAAABD;
	fma.rn.f32 	%f557, %f555, %f552, %f556;
	mul.rn.f32 	%f558, %f557, %f552;
	mul.rn.f32 	%f559, %f558, %f551;
	sub.f32 	%f560, %f549, %f551;
	neg.f32 	%f561, %f551;
	add.f32 	%f562, %f560, %f560;
	fma.rn.f32 	%f563, %f561, %f549, %f562;
	mul.rn.f32 	%f564, %f534, %f563;
	add.f32 	%f565, %f559, %f551;
	sub.f32 	%f566, %f551, %f565;
	add.f32 	%f567, %f559, %f566;
	add.f32 	%f568, %f564, %f567;
	add.f32 	%f569, %f565, %f568;
	sub.f32 	%f570, %f565, %f569;
	add.f32 	%f571, %f568, %f570;
	mov.f32 	%f572, 0f3F317200;
	mul.rn.f32 	%f573, %f548, %f572;
	mov.f32 	%f574, 0f35BFBE8E;
	mul.rn.f32 	%f575, %f548, %f574;
	add.f32 	%f576, %f573, %f569;
	sub.f32 	%f577, %f573, %f576;
	add.f32 	%f578, %f569, %f577;
	add.f32 	%f579, %f571, %f578;
	add.f32 	%f580, %f575, %f579;
	add.f32 	%f581, %f576, %f580;
	sub.f32 	%f582, %f576, %f581;
	add.f32 	%f583, %f580, %f582;
	mov.f32 	%f584, 0f3EE66666;
	mul.rn.f32 	%f585, %f584, %f581;
	neg.f32 	%f586, %f585;
	fma.rn.f32 	%f587, %f584, %f581, %f586;
	fma.rn.f32 	%f588, %f584, %f583, %f587;
	mov.f32 	%f589, 0f00000000;
	fma.rn.f32 	%f590, %f589, %f581, %f588;
	add.rn.f32 	%f591, %f585, %f590;
	neg.f32 	%f592, %f591;
	add.rn.f32 	%f593, %f585, %f592;
	add.rn.f32 	%f594, %f593, %f590;
	mov.b32 	 %r276, %f591;
	setp.eq.s32	%p90, %r276, 1118925336;
	add.s32 	%r277, %r276, -1;
	mov.b32 	 %f595, %r277;
	add.f32 	%f596, %f594, 0f37000000;
	selp.f32	%f597, %f595, %f591, %p90;
	selp.f32	%f133, %f596, %f594, %p90;
	mul.f32 	%f598, %f597, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f599, %f598;
	mov.f32 	%f600, 0fBF317200;
	fma.rn.f32 	%f601, %f599, %f600, %f597;
	mov.f32 	%f602, 0fB5BFBE8E;
	fma.rn.f32 	%f603, %f599, %f602, %f601;
	mul.f32 	%f604, %f603, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f605, %f604;
	add.f32 	%f606, %f599, 0f00000000;
	ex2.approx.f32 	%f607, %f606;
	mul.f32 	%f608, %f605, %f607;
	setp.lt.f32	%p91, %f597, 0fC2D20000;
	selp.f32	%f609, 0f00000000, %f608, %p91;
	setp.gt.f32	%p92, %f597, 0f42D20000;
	selp.f32	%f844, 0f7F800000, %f609, %p92;
	setp.eq.f32	%p93, %f844, 0f7F800000;
	@%p93 bra 	BB0_94;

	fma.rn.f32 	%f844, %f844, %f133, %f844;

BB0_94:
	setp.lt.f32	%p94, %f128, 0f00000000;
	setp.eq.f32	%p95, %f131, 0f3F800000;
	and.pred  	%p4, %p94, %p95;
	mov.b32 	 %r278, %f844;
	xor.b32  	%r279, %r278, -2147483648;
	mov.b32 	 %f610, %r279;
	selp.f32	%f846, %f610, %f844, %p4;
	setp.eq.f32	%p96, %f128, 0f00000000;
	@%p96 bra 	BB0_97;
	bra.uni 	BB0_95;

BB0_97:
	add.f32 	%f613, %f128, %f128;
	selp.f32	%f846, %f613, 0f00000000, %p95;
	bra.uni 	BB0_98;

BB0_95:
	setp.geu.f32	%p97, %f128, 0f00000000;
	@%p97 bra 	BB0_98;

	cvt.rzi.f32.f32	%f612, %f584;
	setp.neu.f32	%p98, %f612, 0f3EE66666;
	selp.f32	%f846, 0f7FFFFFFF, %f846, %p98;

BB0_98:
	add.f32 	%f614, %f132, 0f3EE66666;
	mov.b32 	 %r280, %f614;
	setp.lt.s32	%p100, %r280, 2139095040;
	@%p100 bra 	BB0_103;

	setp.gtu.f32	%p101, %f132, 0f7F800000;
	@%p101 bra 	BB0_102;
	bra.uni 	BB0_100;

BB0_102:
	add.f32 	%f846, %f128, 0f3EE66666;
	bra.uni 	BB0_103;

BB0_100:
	setp.neu.f32	%p102, %f132, 0f7F800000;
	@%p102 bra 	BB0_103;

	selp.f32	%f846, 0fFF800000, 0f7F800000, %p4;

BB0_103:
	setp.eq.f32	%p103, %f128, 0f3F800000;
	selp.f32	%f144, 0f3F800000, %f846, %p103;
	abs.f32 	%f145, %f129;
	setp.lt.f32	%p104, %f145, 0f00800000;
	mul.f32 	%f617, %f145, 0f4B800000;
	selp.f32	%f618, 0fC3170000, 0fC2FE0000, %p104;
	selp.f32	%f619, %f617, %f145, %p104;
	mov.b32 	 %r281, %f619;
	and.b32  	%r282, %r281, 8388607;
	or.b32  	%r283, %r282, 1065353216;
	mov.b32 	 %f620, %r283;
	shr.u32 	%r284, %r281, 23;
	cvt.rn.f32.u32	%f621, %r284;
	add.f32 	%f622, %f618, %f621;
	setp.gt.f32	%p105, %f620, 0f3FB504F3;
	mul.f32 	%f623, %f620, 0f3F000000;
	add.f32 	%f624, %f622, 0f3F800000;
	selp.f32	%f625, %f623, %f620, %p105;
	selp.f32	%f626, %f624, %f622, %p105;
	add.f32 	%f627, %f625, 0fBF800000;
	add.f32 	%f616, %f625, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f615,%f616;
	// inline asm
	add.f32 	%f628, %f627, %f627;
	mul.f32 	%f629, %f615, %f628;
	mul.f32 	%f630, %f629, %f629;
	fma.rn.f32 	%f633, %f554, %f630, %f553;
	fma.rn.f32 	%f635, %f633, %f630, %f556;
	mul.rn.f32 	%f636, %f635, %f630;
	mul.rn.f32 	%f637, %f636, %f629;
	sub.f32 	%f638, %f627, %f629;
	neg.f32 	%f639, %f629;
	add.f32 	%f640, %f638, %f638;
	fma.rn.f32 	%f641, %f639, %f627, %f640;
	mul.rn.f32 	%f642, %f615, %f641;
	add.f32 	%f643, %f637, %f629;
	sub.f32 	%f644, %f629, %f643;
	add.f32 	%f645, %f637, %f644;
	add.f32 	%f646, %f642, %f645;
	add.f32 	%f647, %f643, %f646;
	sub.f32 	%f648, %f643, %f647;
	add.f32 	%f649, %f646, %f648;
	mul.rn.f32 	%f651, %f626, %f572;
	mul.rn.f32 	%f653, %f626, %f574;
	add.f32 	%f654, %f651, %f647;
	sub.f32 	%f655, %f651, %f654;
	add.f32 	%f656, %f647, %f655;
	add.f32 	%f657, %f649, %f656;
	add.f32 	%f658, %f653, %f657;
	add.f32 	%f659, %f654, %f658;
	sub.f32 	%f660, %f654, %f659;
	add.f32 	%f661, %f658, %f660;
	mul.rn.f32 	%f663, %f584, %f659;
	neg.f32 	%f664, %f663;
	fma.rn.f32 	%f665, %f584, %f659, %f664;
	fma.rn.f32 	%f666, %f584, %f661, %f665;
	fma.rn.f32 	%f668, %f589, %f659, %f666;
	add.rn.f32 	%f669, %f663, %f668;
	neg.f32 	%f670, %f669;
	add.rn.f32 	%f671, %f663, %f670;
	add.rn.f32 	%f672, %f671, %f668;
	mov.b32 	 %r285, %f669;
	setp.eq.s32	%p106, %r285, 1118925336;
	add.s32 	%r286, %r285, -1;
	mov.b32 	 %f673, %r286;
	add.f32 	%f674, %f672, 0f37000000;
	selp.f32	%f675, %f673, %f669, %p106;
	selp.f32	%f146, %f674, %f672, %p106;
	mul.f32 	%f676, %f675, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f677, %f676;
	fma.rn.f32 	%f679, %f677, %f600, %f675;
	fma.rn.f32 	%f681, %f677, %f602, %f679;
	mul.f32 	%f682, %f681, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f683, %f682;
	add.f32 	%f684, %f677, 0f00000000;
	ex2.approx.f32 	%f685, %f684;
	mul.f32 	%f686, %f683, %f685;
	setp.lt.f32	%p107, %f675, 0fC2D20000;
	selp.f32	%f687, 0f00000000, %f686, %p107;
	setp.gt.f32	%p108, %f675, 0f42D20000;
	selp.f32	%f847, 0f7F800000, %f687, %p108;
	setp.eq.f32	%p109, %f847, 0f7F800000;
	@%p109 bra 	BB0_105;

	fma.rn.f32 	%f847, %f847, %f146, %f847;

BB0_105:
	setp.lt.f32	%p110, %f129, 0f00000000;
	and.pred  	%p5, %p110, %p95;
	mov.b32 	 %r287, %f847;
	xor.b32  	%r288, %r287, -2147483648;
	mov.b32 	 %f688, %r288;
	selp.f32	%f849, %f688, %f847, %p5;
	setp.eq.f32	%p112, %f129, 0f00000000;
	@%p112 bra 	BB0_108;
	bra.uni 	BB0_106;

BB0_108:
	add.f32 	%f691, %f129, %f129;
	selp.f32	%f849, %f691, 0f00000000, %p95;
	bra.uni 	BB0_109;

BB0_106:
	setp.geu.f32	%p113, %f129, 0f00000000;
	@%p113 bra 	BB0_109;

	cvt.rzi.f32.f32	%f690, %f584;
	setp.neu.f32	%p114, %f690, 0f3EE66666;
	selp.f32	%f849, 0f7FFFFFFF, %f849, %p114;

BB0_109:
	add.f32 	%f692, %f145, 0f3EE66666;
	mov.b32 	 %r289, %f692;
	setp.lt.s32	%p116, %r289, 2139095040;
	@%p116 bra 	BB0_114;

	setp.gtu.f32	%p117, %f145, 0f7F800000;
	@%p117 bra 	BB0_113;
	bra.uni 	BB0_111;

BB0_113:
	add.f32 	%f849, %f129, 0f3EE66666;
	bra.uni 	BB0_114;

BB0_111:
	setp.neu.f32	%p118, %f145, 0f7F800000;
	@%p118 bra 	BB0_114;

	selp.f32	%f849, 0fFF800000, 0f7F800000, %p5;

BB0_114:
	setp.eq.f32	%p119, %f129, 0f3F800000;
	selp.f32	%f157, 0f3F800000, %f849, %p119;
	abs.f32 	%f158, %f130;
	setp.lt.f32	%p120, %f158, 0f00800000;
	mul.f32 	%f695, %f158, 0f4B800000;
	selp.f32	%f696, 0fC3170000, 0fC2FE0000, %p120;
	selp.f32	%f697, %f695, %f158, %p120;
	mov.b32 	 %r290, %f697;
	and.b32  	%r291, %r290, 8388607;
	or.b32  	%r292, %r291, 1065353216;
	mov.b32 	 %f698, %r292;
	shr.u32 	%r293, %r290, 23;
	cvt.rn.f32.u32	%f699, %r293;
	add.f32 	%f700, %f696, %f699;
	setp.gt.f32	%p121, %f698, 0f3FB504F3;
	mul.f32 	%f701, %f698, 0f3F000000;
	add.f32 	%f702, %f700, 0f3F800000;
	selp.f32	%f703, %f701, %f698, %p121;
	selp.f32	%f704, %f702, %f700, %p121;
	add.f32 	%f705, %f703, 0fBF800000;
	add.f32 	%f694, %f703, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f693,%f694;
	// inline asm
	add.f32 	%f706, %f705, %f705;
	mul.f32 	%f707, %f693, %f706;
	mul.f32 	%f708, %f707, %f707;
	fma.rn.f32 	%f711, %f554, %f708, %f553;
	fma.rn.f32 	%f713, %f711, %f708, %f556;
	mul.rn.f32 	%f714, %f713, %f708;
	mul.rn.f32 	%f715, %f714, %f707;
	sub.f32 	%f716, %f705, %f707;
	neg.f32 	%f717, %f707;
	add.f32 	%f718, %f716, %f716;
	fma.rn.f32 	%f719, %f717, %f705, %f718;
	mul.rn.f32 	%f720, %f693, %f719;
	add.f32 	%f721, %f715, %f707;
	sub.f32 	%f722, %f707, %f721;
	add.f32 	%f723, %f715, %f722;
	add.f32 	%f724, %f720, %f723;
	add.f32 	%f725, %f721, %f724;
	sub.f32 	%f726, %f721, %f725;
	add.f32 	%f727, %f724, %f726;
	mul.rn.f32 	%f729, %f704, %f572;
	mul.rn.f32 	%f731, %f704, %f574;
	add.f32 	%f732, %f729, %f725;
	sub.f32 	%f733, %f729, %f732;
	add.f32 	%f734, %f725, %f733;
	add.f32 	%f735, %f727, %f734;
	add.f32 	%f736, %f731, %f735;
	add.f32 	%f737, %f732, %f736;
	sub.f32 	%f738, %f732, %f737;
	add.f32 	%f739, %f736, %f738;
	mul.rn.f32 	%f741, %f584, %f737;
	neg.f32 	%f742, %f741;
	fma.rn.f32 	%f743, %f584, %f737, %f742;
	fma.rn.f32 	%f744, %f584, %f739, %f743;
	fma.rn.f32 	%f746, %f589, %f737, %f744;
	add.rn.f32 	%f747, %f741, %f746;
	neg.f32 	%f748, %f747;
	add.rn.f32 	%f749, %f741, %f748;
	add.rn.f32 	%f750, %f749, %f746;
	mov.b32 	 %r294, %f747;
	setp.eq.s32	%p122, %r294, 1118925336;
	add.s32 	%r295, %r294, -1;
	mov.b32 	 %f751, %r295;
	add.f32 	%f752, %f750, 0f37000000;
	selp.f32	%f753, %f751, %f747, %p122;
	selp.f32	%f159, %f752, %f750, %p122;
	mul.f32 	%f754, %f753, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f755, %f754;
	fma.rn.f32 	%f757, %f755, %f600, %f753;
	fma.rn.f32 	%f759, %f755, %f602, %f757;
	mul.f32 	%f760, %f759, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f761, %f760;
	add.f32 	%f762, %f755, 0f00000000;
	ex2.approx.f32 	%f763, %f762;
	mul.f32 	%f764, %f761, %f763;
	setp.lt.f32	%p123, %f753, 0fC2D20000;
	selp.f32	%f765, 0f00000000, %f764, %p123;
	setp.gt.f32	%p124, %f753, 0f42D20000;
	selp.f32	%f850, 0f7F800000, %f765, %p124;
	setp.eq.f32	%p125, %f850, 0f7F800000;
	@%p125 bra 	BB0_116;

	fma.rn.f32 	%f850, %f850, %f159, %f850;

BB0_116:
	setp.lt.f32	%p126, %f130, 0f00000000;
	and.pred  	%p6, %p126, %p95;
	mov.b32 	 %r296, %f850;
	xor.b32  	%r297, %r296, -2147483648;
	mov.b32 	 %f766, %r297;
	selp.f32	%f852, %f766, %f850, %p6;
	setp.eq.f32	%p128, %f130, 0f00000000;
	@%p128 bra 	BB0_119;
	bra.uni 	BB0_117;

BB0_119:
	add.f32 	%f769, %f130, %f130;
	selp.f32	%f852, %f769, 0f00000000, %p95;
	bra.uni 	BB0_120;

BB0_117:
	setp.geu.f32	%p129, %f130, 0f00000000;
	@%p129 bra 	BB0_120;

	cvt.rzi.f32.f32	%f768, %f584;
	setp.neu.f32	%p130, %f768, 0f3EE66666;
	selp.f32	%f852, 0f7FFFFFFF, %f852, %p130;

BB0_120:
	add.f32 	%f770, %f158, 0f3EE66666;
	mov.b32 	 %r298, %f770;
	setp.lt.s32	%p132, %r298, 2139095040;
	@%p132 bra 	BB0_125;

	setp.gtu.f32	%p133, %f158, 0f7F800000;
	@%p133 bra 	BB0_124;
	bra.uni 	BB0_122;

BB0_124:
	add.f32 	%f852, %f130, 0f3EE66666;
	bra.uni 	BB0_125;

BB0_122:
	setp.neu.f32	%p134, %f158, 0f7F800000;
	@%p134 bra 	BB0_125;

	selp.f32	%f852, 0fFF800000, 0f7F800000, %p6;

BB0_125:
	setp.eq.f32	%p135, %f130, 0f3F800000;
	selp.f32	%f771, 0f3F800000, %f852, %p135;
	cvt.u64.u32	%rd83, %r6;
	cvt.u64.u32	%rd82, %r5;
	mov.u64 	%rd86, image;
	cvta.global.u64 	%rd81, %rd86;
	// inline asm
	call (%rd80), _rt_buffer_get_64, (%rd81, %r103, %r104, %rd82, %rd83, %rd25, %rd25);
	// inline asm
	cvt.sat.f32.f32	%f772, %f771;
	mul.f32 	%f773, %f772, 0f437FFD71;
	cvt.rzi.u32.f32	%r301, %f773;
	cvt.sat.f32.f32	%f774, %f157;
	mul.f32 	%f775, %f774, 0f437FFD71;
	cvt.rzi.u32.f32	%r302, %f775;
	cvt.sat.f32.f32	%f776, %f144;
	mul.f32 	%f777, %f776, 0f437FFD71;
	cvt.rzi.u32.f32	%r303, %f777;
	cvt.u16.u32	%rs13, %r301;
	cvt.u16.u32	%rs14, %r303;
	cvt.u16.u32	%rs15, %r302;
	mov.u16 	%rs16, 255;
	st.v4.u8 	[%rd80], {%rs13, %rs15, %rs14, %rs16};
	ld.global.u32 	%r359, [imageEnabled];

BB0_126:
	and.b32  	%r304, %r359, 4;
	setp.eq.s32	%p136, %r304, 0;
	@%p136 bra 	BB0_138;

	ld.global.u32 	%r305, [additive];
	setp.eq.s32	%p137, %r305, 0;
	cvt.u64.u32	%rd16, %r5;
	cvt.u64.u32	%rd17, %r6;
	// inline asm
	{  cvt.rn.f16.f32 %rs17, %f338;}

	// inline asm
	@%p137 bra 	BB0_129;

	mov.u64 	%rd99, image_HDR;
	cvta.global.u64 	%rd88, %rd99;
	mov.u32 	%r309, 8;
	// inline asm
	call (%rd87), _rt_buffer_get_64, (%rd88, %r103, %r309, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs24, %rs25, %rs26, %rs27}, [%rd87];
	// inline asm
	{  cvt.f32.f16 %f779, %rs24;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f780, %rs25;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f781, %rs26;}

	// inline asm
	// inline asm
	call (%rd93), _rt_buffer_get_64, (%rd88, %r103, %r309, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f782, %f128, %f779;
	add.f32 	%f783, %f129, %f780;
	add.f32 	%f784, %f130, %f781;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f784;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs22, %f783;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs21, %f782;}

	// inline asm
	st.v4.u16 	[%rd93], {%rs21, %rs22, %rs23, %rs17};
	bra.uni 	BB0_138;

BB0_129:
	mov.u64 	%rd106, image_HDR;
	cvta.global.u64 	%rd101, %rd106;
	mov.u32 	%r311, 8;
	// inline asm
	call (%rd100), _rt_buffer_get_64, (%rd101, %r103, %r311, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs30, %f130;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f129;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f128;}

	// inline asm
	st.v4.u16 	[%rd100], {%rs28, %rs29, %rs30, %rs17};

BB0_138:
	ret;
}