//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_Dir[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 4 .u32 ignoreNormal;
.global .align 1 .b8 localLights[1];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[4];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<133>;
	.reg .b16 	%rs<63>;
	.reg .f32 	%f<1214>;
	.reg .b32 	%r<201>;
	.reg .b64 	%rd<126>;


	mov.u64 	%rd125, __local_depot0;
	cvta.local.u64 	%SP, %rd125;
	ld.global.v2.u32 	{%r30, %r31}, [pixelID];
	cvt.u64.u32	%rd10, %r30;
	cvt.u64.u32	%rd11, %r31;
	mov.u64 	%rd14, uvnormal;
	cvta.global.u64 	%rd9, %rd14;
	mov.u32 	%r28, 2;
	mov.u32 	%r29, 4;
	mov.u64 	%rd13, 0;
	// inline asm
	call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
	// inline asm
	ld.u32 	%r1, [%rd8];
	shr.u32 	%r34, %r1, 16;
	cvt.u16.u32	%rs1, %r34;
	and.b16  	%rs5, %rs1, 255;
	cvt.u16.u32	%rs6, %r1;
	or.b16  	%rs7, %rs6, %rs5;
	setp.eq.s16	%p8, %rs7, 0;
	mov.f32 	%f1155, 0f00000000;
	mov.f32 	%f1156, %f1155;
	mov.f32 	%f1157, %f1155;
	@%p8 bra 	BB0_2;

	ld.u8 	%rs8, [%rd8+1];
	and.b16  	%rs10, %rs6, 255;
	cvt.rn.f32.u16	%f205, %rs10;
	div.rn.f32 	%f206, %f205, 0f437F0000;
	fma.rn.f32 	%f207, %f206, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f208, %rs8;
	div.rn.f32 	%f209, %f208, 0f437F0000;
	fma.rn.f32 	%f210, %f209, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f211, %rs5;
	div.rn.f32 	%f212, %f211, 0f437F0000;
	fma.rn.f32 	%f213, %f212, 0f40000000, 0fBF800000;
	mul.f32 	%f214, %f210, %f210;
	fma.rn.f32 	%f215, %f207, %f207, %f214;
	fma.rn.f32 	%f216, %f213, %f213, %f215;
	sqrt.rn.f32 	%f217, %f216;
	rcp.rn.f32 	%f218, %f217;
	mul.f32 	%f1155, %f207, %f218;
	mul.f32 	%f1156, %f210, %f218;
	mul.f32 	%f1157, %f213, %f218;

BB0_2:
	ld.global.v2.u32 	{%r35, %r36}, [pixelID];
	ld.global.v2.u32 	{%r38, %r39}, [tileInfo];
	add.s32 	%r2, %r35, %r38;
	add.s32 	%r3, %r36, %r39;
	setp.eq.f32	%p9, %f1156, 0f00000000;
	setp.eq.f32	%p10, %f1155, 0f00000000;
	and.pred  	%p11, %p10, %p9;
	setp.eq.f32	%p12, %f1157, 0f00000000;
	and.pred  	%p13, %p11, %p12;
	@%p13 bra 	BB0_100;
	bra.uni 	BB0_3;

BB0_100:
	ld.global.u32 	%r200, [imageEnabled];
	and.b32  	%r175, %r200, 1;
	setp.eq.b32	%p127, %r175, 1;
	@!%p127 bra 	BB0_102;
	bra.uni 	BB0_101;

BB0_101:
	cvt.u64.u32	%rd86, %r2;
	cvt.u64.u32	%rd87, %r3;
	mov.u64 	%rd90, image;
	cvta.global.u64 	%rd85, %rd90;
	// inline asm
	call (%rd84), _rt_buffer_get_64, (%rd85, %r28, %r29, %rd86, %rd87, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs43, 0;
	st.v4.u8 	[%rd84], {%rs43, %rs43, %rs43, %rs43};
	ld.global.u32 	%r200, [imageEnabled];

BB0_102:
	and.b32  	%r178, %r200, 8;
	setp.eq.s32	%p128, %r178, 0;
	@%p128 bra 	BB0_104;

	cvt.u64.u32	%rd93, %r2;
	cvt.u64.u32	%rd94, %r3;
	mov.u64 	%rd97, image_Mask;
	cvta.global.u64 	%rd92, %rd97;
	// inline asm
	call (%rd91), _rt_buffer_get_64, (%rd92, %r28, %r28, %rd93, %rd94, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1147, 0f00000000;
	cvt.rzi.u32.f32	%r181, %f1147;
	cvt.u16.u32	%rs44, %r181;
	mov.u16 	%rs45, 0;
	st.v2.u8 	[%rd91], {%rs44, %rs45};
	ld.global.u32 	%r200, [imageEnabled];

BB0_104:
	and.b32  	%r182, %r200, 4;
	setp.eq.s32	%p129, %r182, 0;
	@%p129 bra 	BB0_108;

	ld.global.u32 	%r183, [additive];
	setp.eq.s32	%p130, %r183, 0;
	cvt.u64.u32	%rd6, %r2;
	cvt.u64.u32	%rd7, %r3;
	@%p130 bra 	BB0_107;

	mov.u64 	%rd110, image_HDR;
	cvta.global.u64 	%rd99, %rd110;
	mov.u32 	%r187, 8;
	// inline asm
	call (%rd98), _rt_buffer_get_64, (%rd99, %r28, %r187, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs52, %rs53, %rs54, %rs55}, [%rd98];
	// inline asm
	{  cvt.f32.f16 %f1148, %rs52;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1149, %rs53;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1150, %rs54;}

	// inline asm
	// inline asm
	call (%rd104), _rt_buffer_get_64, (%rd99, %r28, %r187, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1151, %f1148, 0f00000000;
	add.f32 	%f1152, %f1149, 0f00000000;
	add.f32 	%f1153, %f1150, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f1153;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f1152;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs49, %f1151;}

	// inline asm
	mov.u16 	%rs56, 0;
	st.v4.u16 	[%rd104], {%rs49, %rs50, %rs51, %rs56};
	bra.uni 	BB0_108;

BB0_3:
	ld.global.v2.u32 	{%r47, %r48}, [pixelID];
	cvt.u64.u32	%rd17, %r47;
	cvt.u64.u32	%rd18, %r48;
	mov.u64 	%rd26, uvpos;
	cvta.global.u64 	%rd16, %rd26;
	mov.u32 	%r44, 12;
	// inline asm
	call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
	// inline asm
	ld.f32 	%f9, [%rd15+8];
	ld.f32 	%f8, [%rd15+4];
	ld.f32 	%f7, [%rd15];
	mul.f32 	%f226, %f7, 0f3456BF95;
	mul.f32 	%f227, %f8, 0f3456BF95;
	mul.f32 	%f228, %f9, 0f3456BF95;
	abs.f32 	%f229, %f1155;
	div.rn.f32 	%f230, %f226, %f229;
	abs.f32 	%f231, %f1156;
	div.rn.f32 	%f232, %f227, %f231;
	abs.f32 	%f233, %f1157;
	div.rn.f32 	%f234, %f228, %f233;
	abs.f32 	%f235, %f230;
	abs.f32 	%f236, %f232;
	abs.f32 	%f237, %f234;
	mov.f32 	%f238, 0f38D1B717;
	max.f32 	%f239, %f235, %f238;
	max.f32 	%f240, %f236, %f238;
	max.f32 	%f241, %f237, %f238;
	fma.rn.f32 	%f10, %f1155, %f239, %f7;
	fma.rn.f32 	%f11, %f1156, %f240, %f8;
	fma.rn.f32 	%f12, %f1157, %f241, %f9;
	mov.u64 	%rd27, localLights;
	cvta.global.u64 	%rd25, %rd27;
	mov.u32 	%r45, 1;
	mov.u32 	%r46, 96;
	// inline asm
	call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
	// inline asm
	cvt.u32.u64	%r4, %rd21;
	setp.eq.s32	%p14, %r4, 0;
	mov.f32 	%f1158, 0f00000000;
	mov.f32 	%f18, %f1158;
	mov.f32 	%f19, %f1158;
	mov.f32 	%f20, %f1158;
	mov.f32 	%f1162, %f1158;
	mov.f32 	%f1163, %f1158;
	mov.f32 	%f1164, %f1158;
	@%p14 bra 	BB0_46;

	mov.f32 	%f249, 0f40000000;
	cvt.rzi.f32.f32	%f250, %f249;
	add.f32 	%f251, %f250, %f250;
	mov.f32 	%f252, 0f40800000;
	sub.f32 	%f253, %f252, %f251;
	abs.f32 	%f13, %f253;
	mul.f32 	%f14, %f10, 0f3456BF95;
	mul.f32 	%f15, %f11, 0f3456BF95;
	mul.f32 	%f16, %f12, 0f3456BF95;
	mov.f32 	%f248, 0f00000000;
	mov.u32 	%r192, 0;
	abs.f32 	%f432, %f14;
	abs.f32 	%f433, %f15;
	max.f32 	%f434, %f432, %f433;
	abs.f32 	%f435, %f16;
	max.f32 	%f436, %f434, %f435;
	mov.f32 	%f1158, %f248;
	mov.f32 	%f18, %f248;
	mov.f32 	%f19, %f248;
	mov.f32 	%f20, %f248;
	mov.f32 	%f1162, %f248;
	mov.f32 	%f1163, %f248;
	mov.f32 	%f1164, %f248;

BB0_5:
	cvt.u64.u32	%rd30, %r192;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
	// inline asm
	ld.v4.f32 	{%f256, %f257, %f258, %f259}, [%rd28+80];
	ld.v4.f32 	{%f260, %f261, %f262, %f263}, [%rd28+64];
	ld.v4.f32 	{%f264, %f265, %f266, %f267}, [%rd28+48];
	ld.v4.f32 	{%f268, %f1169, %f1170, %f271}, [%rd28+32];
	ld.v4.f32 	{%f272, %f273, %f274, %f275}, [%rd28+16];
	ld.v4.f32 	{%f276, %f277, %f278, %f279}, [%rd28];
	mov.b32 	 %r6, %f259;
	sub.f32 	%f281, %f277, %f7;
	sub.f32 	%f282, %f278, %f8;
	sub.f32 	%f283, %f279, %f9;
	mul.f32 	%f284, %f282, %f282;
	fma.rn.f32 	%f285, %f281, %f281, %f284;
	fma.rn.f32 	%f286, %f283, %f283, %f285;
	sqrt.rn.f32 	%f50, %f286;
	rcp.rn.f32 	%f287, %f50;
	mul.f32 	%f51, %f281, %f287;
	mul.f32 	%f52, %f282, %f287;
	mul.f32 	%f53, %f283, %f287;
	mul.f32 	%f54, %f50, %f275;
	abs.f32 	%f55, %f54;
	setp.lt.f32	%p15, %f55, 0f00800000;
	mul.f32 	%f288, %f55, 0f4B800000;
	selp.f32	%f289, 0fC3170000, 0fC2FE0000, %p15;
	selp.f32	%f290, %f288, %f55, %p15;
	mov.b32 	 %r54, %f290;
	and.b32  	%r55, %r54, 8388607;
	or.b32  	%r56, %r55, 1065353216;
	mov.b32 	 %f291, %r56;
	shr.u32 	%r57, %r54, 23;
	cvt.rn.f32.u32	%f292, %r57;
	add.f32 	%f293, %f289, %f292;
	setp.gt.f32	%p16, %f291, 0f3FB504F3;
	mul.f32 	%f294, %f291, 0f3F000000;
	add.f32 	%f295, %f293, 0f3F800000;
	selp.f32	%f296, %f294, %f291, %p16;
	selp.f32	%f297, %f295, %f293, %p16;
	add.f32 	%f298, %f296, 0fBF800000;
	add.f32 	%f255, %f296, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f254,%f255;
	// inline asm
	add.f32 	%f299, %f298, %f298;
	mul.f32 	%f300, %f254, %f299;
	mul.f32 	%f301, %f300, %f300;
	mov.f32 	%f302, 0f3C4CAF63;
	mov.f32 	%f303, 0f3B18F0FE;
	fma.rn.f32 	%f304, %f303, %f301, %f302;
	mov.f32 	%f305, 0f3DAAAABD;
	fma.rn.f32 	%f306, %f304, %f301, %f305;
	mul.rn.f32 	%f307, %f306, %f301;
	mul.rn.f32 	%f308, %f307, %f300;
	sub.f32 	%f309, %f298, %f300;
	neg.f32 	%f310, %f300;
	add.f32 	%f311, %f309, %f309;
	fma.rn.f32 	%f312, %f310, %f298, %f311;
	mul.rn.f32 	%f313, %f254, %f312;
	add.f32 	%f314, %f308, %f300;
	sub.f32 	%f315, %f300, %f314;
	add.f32 	%f316, %f308, %f315;
	add.f32 	%f317, %f313, %f316;
	add.f32 	%f318, %f314, %f317;
	sub.f32 	%f319, %f314, %f318;
	add.f32 	%f320, %f317, %f319;
	mov.f32 	%f321, 0f3F317200;
	mul.rn.f32 	%f322, %f297, %f321;
	mov.f32 	%f323, 0f35BFBE8E;
	mul.rn.f32 	%f324, %f297, %f323;
	add.f32 	%f325, %f322, %f318;
	sub.f32 	%f326, %f322, %f325;
	add.f32 	%f327, %f318, %f326;
	add.f32 	%f328, %f320, %f327;
	add.f32 	%f329, %f324, %f328;
	add.f32 	%f330, %f325, %f329;
	sub.f32 	%f331, %f325, %f330;
	add.f32 	%f332, %f329, %f331;
	mul.rn.f32 	%f56, %f252, %f330;
	neg.f32 	%f334, %f56;
	fma.rn.f32 	%f335, %f252, %f330, %f334;
	fma.rn.f32 	%f336, %f252, %f332, %f335;
	fma.rn.f32 	%f57, %f248, %f330, %f336;
	add.rn.f32 	%f58, %f56, %f57;
	mov.b32 	 %r58, %f58;
	setp.eq.s32	%p1, %r58, 1118925336;
	add.s32 	%r59, %r58, -1;
	mov.b32 	 %f338, %r59;
	selp.f32	%f339, %f338, %f58, %p1;
	mul.f32 	%f340, %f339, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f341, %f340;
	mov.f32 	%f342, 0fBF317200;
	fma.rn.f32 	%f343, %f341, %f342, %f339;
	mov.f32 	%f344, 0fB5BFBE8E;
	fma.rn.f32 	%f345, %f341, %f344, %f343;
	mul.f32 	%f346, %f345, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f347, %f346;
	add.f32 	%f348, %f341, 0f00000000;
	ex2.approx.f32 	%f349, %f348;
	mul.f32 	%f350, %f347, %f349;
	setp.lt.f32	%p17, %f339, 0fC2D20000;
	selp.f32	%f351, 0f00000000, %f350, %p17;
	setp.gt.f32	%p18, %f339, 0f42D20000;
	selp.f32	%f1165, 0f7F800000, %f351, %p18;
	setp.eq.f32	%p19, %f1165, 0f7F800000;
	@%p19 bra 	BB0_7;

	neg.f32 	%f352, %f58;
	add.rn.f32 	%f353, %f56, %f352;
	add.rn.f32 	%f354, %f353, %f57;
	add.f32 	%f355, %f354, 0f37000000;
	selp.f32	%f356, %f355, %f354, %p1;
	fma.rn.f32 	%f1165, %f1165, %f356, %f1165;

BB0_7:
	setp.lt.f32	%p20, %f54, 0f00000000;
	setp.eq.f32	%p21, %f13, 0f3F800000;
	and.pred  	%p2, %p20, %p21;
	mov.b32 	 %r60, %f1165;
	xor.b32  	%r61, %r60, -2147483648;
	mov.b32 	 %f357, %r61;
	selp.f32	%f1167, %f357, %f1165, %p2;
	setp.eq.f32	%p22, %f54, 0f00000000;
	@%p22 bra 	BB0_10;
	bra.uni 	BB0_8;

BB0_10:
	add.f32 	%f360, %f54, %f54;
	selp.f32	%f1167, %f360, 0f00000000, %p21;
	bra.uni 	BB0_11;

BB0_8:
	setp.geu.f32	%p23, %f54, 0f00000000;
	@%p23 bra 	BB0_11;

	cvt.rzi.f32.f32	%f359, %f252;
	setp.neu.f32	%p24, %f359, 0f40800000;
	selp.f32	%f1167, 0f7FFFFFFF, %f1167, %p24;

BB0_11:
	add.f32 	%f361, %f55, 0f40800000;
	mov.b32 	 %r62, %f361;
	setp.lt.s32	%p26, %r62, 2139095040;
	@%p26 bra 	BB0_16;

	setp.gtu.f32	%p27, %f55, 0f7F800000;
	@%p27 bra 	BB0_15;
	bra.uni 	BB0_13;

BB0_15:
	add.f32 	%f1167, %f54, 0f40800000;
	bra.uni 	BB0_16;

BB0_13:
	setp.neu.f32	%p28, %f55, 0f7F800000;
	@%p28 bra 	BB0_16;

	selp.f32	%f1167, 0fFF800000, 0f7F800000, %p2;

BB0_16:
	mul.f32 	%f362, %f50, %f273;
	mov.f32 	%f1183, 0f3F800000;
	sub.f32 	%f364, %f1183, %f1167;
	setp.eq.f32	%p29, %f54, 0f3F800000;
	selp.f32	%f365, 0f00000000, %f364, %p29;
	cvt.sat.f32.f32	%f366, %f365;
	fma.rn.f32 	%f367, %f362, %f362, %f274;
	div.rn.f32 	%f84, %f366, %f367;
	mul.f32 	%f368, %f1156, %f52;
	fma.rn.f32 	%f369, %f1155, %f51, %f368;
	fma.rn.f32 	%f370, %f1157, %f53, %f369;
	ld.global.u32 	%r63, [ignoreNormal];
	setp.eq.s32	%p30, %r63, 0;
	selp.f32	%f371, %f370, 0f3F800000, %p30;
	cvt.sat.f32.f32	%f85, %f371;
	setp.eq.f32	%p31, %f276, 0f3F800000;
	@%p31 bra 	BB0_23;
	bra.uni 	BB0_17;

BB0_23:
	setp.leu.f32	%p35, %f271, 0f00000000;
	@%p35 bra 	BB0_19;

	mul.f32 	%f402, %f256, %f51;
	mul.f32 	%f403, %f257, %f52;
	neg.f32 	%f404, %f403;
	sub.f32 	%f405, %f404, %f402;
	mul.f32 	%f406, %f258, %f53;
	sub.f32 	%f407, %f405, %f406;
	setp.gt.f32	%p36, %f407, 0f00000000;
	selp.f32	%f408, 0f3F800000, 0f00000000, %p36;
	mul.f32 	%f409, %f265, %f52;
	fma.rn.f32 	%f410, %f264, %f51, %f409;
	mul.f32 	%f411, %f261, %f52;
	fma.rn.f32 	%f412, %f260, %f51, %f411;
	fma.rn.f32 	%f413, %f266, %f53, %f410;
	fma.rn.f32 	%f414, %f262, %f53, %f412;
	fma.rn.f32 	%f415, %f267, %f413, 0f3F000000;
	mov.f32 	%f416, 0f3F800000;
	sub.f32 	%f398, %f416, %f415;
	fma.rn.f32 	%f399, %f267, %f414, 0f3F000000;
	cvt.rzi.s32.f32	%r67, %f271;
	mov.f32 	%f401, 0f00000000;
	// inline asm
	call (%f394, %f395, %f396, %f397), _rt_texture_get_f_id, (%r67, %r28, %f398, %f399, %f401, %f401);
	// inline asm
	mul.f32 	%f417, %f408, %f394;
	mul.f32 	%f418, %f408, %f395;
	mul.f32 	%f419, %f408, %f396;
	mul.f32 	%f1168, %f268, %f417;
	mul.f32 	%f1169, %f1169, %f418;
	mul.f32 	%f1170, %f1170, %f419;
	bra.uni 	BB0_25;

BB0_17:
	setp.eq.f32	%p32, %f276, 0f40000000;
	@%p32 bra 	BB0_21;
	bra.uni 	BB0_18;

BB0_21:
	setp.leu.f32	%p34, %f271, 0f00000000;
	@%p34 bra 	BB0_19;

	mul.f32 	%f388, %f265, %f52;
	fma.rn.f32 	%f389, %f264, %f51, %f388;
	mul.f32 	%f390, %f261, %f52;
	fma.rn.f32 	%f391, %f260, %f51, %f390;
	mul.f32 	%f392, %f257, %f52;
	fma.rn.f32 	%f393, %f256, %f51, %f392;
	fma.rn.f32 	%f385, %f266, %f53, %f389;
	fma.rn.f32 	%f386, %f262, %f53, %f391;
	fma.rn.f32 	%f387, %f258, %f53, %f393;
	cvt.rzi.s32.f32	%r64, %f271;
	mov.u32 	%r65, 6;
	mov.u32 	%r66, 0;
	// inline asm
	call (%f381, %f382, %f383, %f384), _rt_texture_get_base_id, (%r64, %r65, %f385, %f386, %f387, %r66);
	// inline asm
	mul.f32 	%f1168, %f268, %f381;
	mul.f32 	%f1169, %f1169, %f382;
	mul.f32 	%f1170, %f1170, %f383;
	bra.uni 	BB0_25;

BB0_18:
	setp.neu.f32	%p33, %f276, 0f40800000;
	@%p33 bra 	BB0_19;

	mul.f32 	%f372, %f256, %f51;
	mul.f32 	%f373, %f257, %f52;
	neg.f32 	%f374, %f373;
	sub.f32 	%f375, %f374, %f372;
	mul.f32 	%f376, %f258, %f53;
	sub.f32 	%f377, %f375, %f376;
	fma.rn.f32 	%f378, %f271, %f377, %f267;
	cvt.sat.f32.f32	%f379, %f378;
	mul.f32 	%f380, %f379, %f379;
	mul.f32 	%f1171, %f84, %f380;
	mov.f32 	%f1168, %f268;
	bra.uni 	BB0_26;

BB0_19:
	mov.f32 	%f1168, %f268;

BB0_25:
	mov.f32 	%f1171, %f84;

BB0_26:
	max.f32 	%f426, %f1168, %f1169;
	max.f32 	%f427, %f426, %f1170;
	mul.f32 	%f97, %f85, %f1171;
	mul.f32 	%f428, %f97, %f427;
	setp.lt.f32	%p38, %f428, 0f3727C5AC;
	mov.pred 	%p132, -1;
	mov.f32 	%f104, 0f00000000;
	mov.f32 	%f105, %f104;
	mov.f32 	%f106, %f104;
	mov.f32 	%f107, %f104;
	mov.f32 	%f108, %f104;
	mov.f32 	%f109, %f104;
	@%p38 bra 	BB0_28;

	mul.f32 	%f104, %f1168, %f97;
	mul.f32 	%f105, %f1169, %f97;
	mul.f32 	%f106, %f1170, %f97;
	ld.global.u8 	%rs12, [imageEnabled];
	and.b16  	%rs13, %rs12, 64;
	setp.eq.s16	%p40, %rs13, 0;
	selp.f32	%f107, 0f00000000, %f51, %p40;
	selp.f32	%f108, 0f00000000, %f52, %p40;
	selp.f32	%f109, 0f00000000, %f53, %p40;
	mov.pred 	%p132, 0;

BB0_28:
	@%p132 bra 	BB0_45;

	setp.eq.s32	%p41, %r6, 0;
	mov.u16 	%rs62, 0;
	@%p41 bra 	BB0_40;

	abs.s32 	%r8, %r6;
	mov.f32 	%f1182, 0f00000000;
	setp.lt.s32	%p42, %r8, 1;
	@%p42 bra 	BB0_39;

	max.f32 	%f111, %f436, %f238;
	and.b32  	%r9, %r8, 3;
	setp.eq.s32	%p43, %r9, 0;
	add.u64 	%rd35, %SP, 0;
	cvta.to.local.u64 	%rd2, %rd35;
	mov.f32 	%f1182, 0f00000000;
	mov.u32 	%r196, 0;
	@%p43 bra 	BB0_37;

	setp.eq.s32	%p44, %r9, 1;
	mov.f32 	%f1179, 0f00000000;
	mov.u32 	%r194, 0;
	@%p44 bra 	BB0_36;

	setp.eq.s32	%p45, %r9, 2;
	mov.f32 	%f1178, 0f00000000;
	mov.u32 	%r193, 0;
	@%p45 bra 	BB0_35;

	sub.f32 	%f448, %f277, %f272;
	sub.f32 	%f449, %f278, %f272;
	sub.f32 	%f450, %f279, %f272;
	sub.f32 	%f451, %f448, %f7;
	sub.f32 	%f452, %f449, %f8;
	sub.f32 	%f453, %f450, %f9;
	mul.f32 	%f454, %f452, %f452;
	fma.rn.f32 	%f455, %f451, %f451, %f454;
	fma.rn.f32 	%f456, %f453, %f453, %f455;
	sqrt.rn.f32 	%f447, %f456;
	rcp.rn.f32 	%f457, %f447;
	mul.f32 	%f443, %f457, %f451;
	mul.f32 	%f444, %f457, %f452;
	mul.f32 	%f445, %f457, %f453;
	ld.global.u32 	%r76, [imageEnabled];
	and.b32  	%r77, %r76, 32;
	setp.eq.s32	%p46, %r77, 0;
	selp.f32	%f458, 0f3F800000, 0f41200000, %p46;
	mul.f32 	%f446, %f458, %f111;
	mov.u32 	%r78, 1065353216;
	st.local.u32 	[%rd2], %r78;
	ld.global.u32 	%r72, [root];
	// inline asm
	call _rt_trace_64, (%r72, %f10, %f11, %f12, %f443, %f444, %f445, %r45, %f446, %f447, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f459, [%rd2];
	add.f32 	%f1178, %f459, 0f00000000;
	mov.u32 	%r193, %r45;

BB0_35:
	cvt.rn.f32.s32	%f468, %r193;
	mul.f32 	%f469, %f468, 0f3DD32618;
	cvt.rmi.f32.f32	%f470, %f469;
	sub.f32 	%f471, %f469, %f470;
	mul.f32 	%f472, %f468, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f473, %f472;
	sub.f32 	%f474, %f472, %f473;
	mul.f32 	%f475, %f468, 0f3DC74539;
	cvt.rmi.f32.f32	%f476, %f475;
	sub.f32 	%f477, %f475, %f476;
	add.f32 	%f478, %f474, 0f4199851F;
	add.f32 	%f479, %f477, 0f4199851F;
	add.f32 	%f480, %f471, 0f4199851F;
	mul.f32 	%f481, %f474, %f479;
	fma.rn.f32 	%f482, %f471, %f478, %f481;
	fma.rn.f32 	%f483, %f480, %f477, %f482;
	add.f32 	%f484, %f471, %f483;
	add.f32 	%f485, %f474, %f483;
	add.f32 	%f486, %f477, %f483;
	add.f32 	%f487, %f484, %f485;
	mul.f32 	%f488, %f486, %f487;
	cvt.rmi.f32.f32	%f489, %f488;
	sub.f32 	%f490, %f488, %f489;
	add.f32 	%f491, %f484, %f486;
	mul.f32 	%f492, %f485, %f491;
	cvt.rmi.f32.f32	%f493, %f492;
	sub.f32 	%f494, %f492, %f493;
	add.f32 	%f495, %f485, %f486;
	mul.f32 	%f496, %f484, %f495;
	cvt.rmi.f32.f32	%f497, %f496;
	sub.f32 	%f498, %f496, %f497;
	fma.rn.f32 	%f499, %f490, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f500, %f494, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f501, %f498, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f502, %f272, %f499, %f277;
	fma.rn.f32 	%f503, %f272, %f500, %f278;
	fma.rn.f32 	%f504, %f272, %f501, %f279;
	sub.f32 	%f505, %f502, %f7;
	sub.f32 	%f506, %f503, %f8;
	sub.f32 	%f507, %f504, %f9;
	mul.f32 	%f508, %f506, %f506;
	fma.rn.f32 	%f509, %f505, %f505, %f508;
	fma.rn.f32 	%f510, %f507, %f507, %f509;
	sqrt.rn.f32 	%f467, %f510;
	rcp.rn.f32 	%f511, %f467;
	mul.f32 	%f463, %f511, %f505;
	mul.f32 	%f464, %f511, %f506;
	mul.f32 	%f465, %f511, %f507;
	ld.global.u32 	%r82, [imageEnabled];
	and.b32  	%r83, %r82, 32;
	setp.eq.s32	%p47, %r83, 0;
	selp.f32	%f512, 0f3F800000, 0f41200000, %p47;
	mul.f32 	%f466, %f512, %f111;
	mov.u32 	%r84, 1065353216;
	st.local.u32 	[%rd2], %r84;
	ld.global.u32 	%r79, [root];
	// inline asm
	call _rt_trace_64, (%r79, %f10, %f11, %f12, %f463, %f464, %f465, %r45, %f466, %f467, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f513, [%rd2];
	add.f32 	%f1179, %f1178, %f513;
	add.s32 	%r194, %r193, 1;

BB0_36:
	cvt.rn.f32.s32	%f522, %r194;
	mul.f32 	%f523, %f522, 0f3DD32618;
	cvt.rmi.f32.f32	%f524, %f523;
	sub.f32 	%f525, %f523, %f524;
	mul.f32 	%f526, %f522, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f527, %f526;
	sub.f32 	%f528, %f526, %f527;
	mul.f32 	%f529, %f522, 0f3DC74539;
	cvt.rmi.f32.f32	%f530, %f529;
	sub.f32 	%f531, %f529, %f530;
	add.f32 	%f532, %f528, 0f4199851F;
	add.f32 	%f533, %f531, 0f4199851F;
	add.f32 	%f534, %f525, 0f4199851F;
	mul.f32 	%f535, %f528, %f533;
	fma.rn.f32 	%f536, %f525, %f532, %f535;
	fma.rn.f32 	%f537, %f534, %f531, %f536;
	add.f32 	%f538, %f525, %f537;
	add.f32 	%f539, %f528, %f537;
	add.f32 	%f540, %f531, %f537;
	add.f32 	%f541, %f538, %f539;
	mul.f32 	%f542, %f540, %f541;
	cvt.rmi.f32.f32	%f543, %f542;
	sub.f32 	%f544, %f542, %f543;
	add.f32 	%f545, %f538, %f540;
	mul.f32 	%f546, %f539, %f545;
	cvt.rmi.f32.f32	%f547, %f546;
	sub.f32 	%f548, %f546, %f547;
	add.f32 	%f549, %f539, %f540;
	mul.f32 	%f550, %f538, %f549;
	cvt.rmi.f32.f32	%f551, %f550;
	sub.f32 	%f552, %f550, %f551;
	fma.rn.f32 	%f553, %f544, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f554, %f548, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f555, %f552, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f556, %f272, %f553, %f277;
	fma.rn.f32 	%f557, %f272, %f554, %f278;
	fma.rn.f32 	%f558, %f272, %f555, %f279;
	sub.f32 	%f559, %f556, %f7;
	sub.f32 	%f560, %f557, %f8;
	sub.f32 	%f561, %f558, %f9;
	mul.f32 	%f562, %f560, %f560;
	fma.rn.f32 	%f563, %f559, %f559, %f562;
	fma.rn.f32 	%f564, %f561, %f561, %f563;
	sqrt.rn.f32 	%f521, %f564;
	rcp.rn.f32 	%f565, %f521;
	mul.f32 	%f517, %f565, %f559;
	mul.f32 	%f518, %f565, %f560;
	mul.f32 	%f519, %f565, %f561;
	ld.global.u32 	%r88, [imageEnabled];
	and.b32  	%r89, %r88, 32;
	setp.eq.s32	%p48, %r89, 0;
	selp.f32	%f566, 0f3F800000, 0f41200000, %p48;
	mul.f32 	%f520, %f566, %f111;
	mov.u32 	%r90, 1065353216;
	st.local.u32 	[%rd2], %r90;
	ld.global.u32 	%r85, [root];
	mov.u32 	%r86, 1;
	// inline asm
	call _rt_trace_64, (%r85, %f10, %f11, %f12, %f517, %f518, %f519, %r86, %f520, %f521, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f567, [%rd2];
	add.f32 	%f1182, %f1179, %f567;
	add.s32 	%r196, %r194, 1;

BB0_37:
	setp.lt.u32	%p49, %r8, 4;
	@%p49 bra 	BB0_39;

BB0_38:
	cvt.rn.f32.s32	%f600, %r196;
	mul.f32 	%f601, %f600, 0f3DD32618;
	cvt.rmi.f32.f32	%f602, %f601;
	sub.f32 	%f603, %f601, %f602;
	mul.f32 	%f604, %f600, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f605, %f604;
	sub.f32 	%f606, %f604, %f605;
	mul.f32 	%f607, %f600, 0f3DC74539;
	cvt.rmi.f32.f32	%f608, %f607;
	sub.f32 	%f609, %f607, %f608;
	add.f32 	%f610, %f606, 0f4199851F;
	add.f32 	%f611, %f609, 0f4199851F;
	add.f32 	%f612, %f603, 0f4199851F;
	mul.f32 	%f613, %f606, %f611;
	fma.rn.f32 	%f614, %f603, %f610, %f613;
	fma.rn.f32 	%f615, %f612, %f609, %f614;
	add.f32 	%f616, %f603, %f615;
	add.f32 	%f617, %f606, %f615;
	add.f32 	%f618, %f609, %f615;
	add.f32 	%f619, %f616, %f617;
	mul.f32 	%f620, %f618, %f619;
	cvt.rmi.f32.f32	%f621, %f620;
	sub.f32 	%f622, %f620, %f621;
	add.f32 	%f623, %f616, %f618;
	mul.f32 	%f624, %f617, %f623;
	cvt.rmi.f32.f32	%f625, %f624;
	sub.f32 	%f626, %f624, %f625;
	add.f32 	%f627, %f617, %f618;
	mul.f32 	%f628, %f616, %f627;
	cvt.rmi.f32.f32	%f629, %f628;
	sub.f32 	%f630, %f628, %f629;
	fma.rn.f32 	%f631, %f622, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f632, %f626, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f633, %f630, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f634, %f272, %f631, %f277;
	fma.rn.f32 	%f635, %f272, %f632, %f278;
	fma.rn.f32 	%f636, %f272, %f633, %f279;
	sub.f32 	%f637, %f634, %f7;
	sub.f32 	%f638, %f635, %f8;
	sub.f32 	%f639, %f636, %f9;
	mul.f32 	%f640, %f638, %f638;
	fma.rn.f32 	%f641, %f637, %f637, %f640;
	fma.rn.f32 	%f642, %f639, %f639, %f641;
	sqrt.rn.f32 	%f575, %f642;
	rcp.rn.f32 	%f643, %f575;
	mul.f32 	%f571, %f643, %f637;
	mul.f32 	%f572, %f643, %f638;
	mul.f32 	%f573, %f643, %f639;
	ld.global.u32 	%r103, [imageEnabled];
	and.b32  	%r104, %r103, 32;
	setp.eq.s32	%p50, %r104, 0;
	selp.f32	%f644, 0f3F800000, 0f41200000, %p50;
	mul.f32 	%f574, %f644, %f111;
	mov.u32 	%r105, 1065353216;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r91, [root];
	mov.u32 	%r101, 1;
	// inline asm
	call _rt_trace_64, (%r91, %f10, %f11, %f12, %f571, %f572, %f573, %r101, %f574, %f575, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f645, [%rd2];
	add.f32 	%f646, %f1182, %f645;
	add.s32 	%r106, %r196, 1;
	cvt.rn.f32.s32	%f647, %r106;
	mul.f32 	%f648, %f647, 0f3DD32618;
	cvt.rmi.f32.f32	%f649, %f648;
	sub.f32 	%f650, %f648, %f649;
	mul.f32 	%f651, %f647, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f652, %f651;
	sub.f32 	%f653, %f651, %f652;
	mul.f32 	%f654, %f647, 0f3DC74539;
	cvt.rmi.f32.f32	%f655, %f654;
	sub.f32 	%f656, %f654, %f655;
	add.f32 	%f657, %f653, 0f4199851F;
	add.f32 	%f658, %f656, 0f4199851F;
	add.f32 	%f659, %f650, 0f4199851F;
	mul.f32 	%f660, %f653, %f658;
	fma.rn.f32 	%f661, %f650, %f657, %f660;
	fma.rn.f32 	%f662, %f659, %f656, %f661;
	add.f32 	%f663, %f650, %f662;
	add.f32 	%f664, %f653, %f662;
	add.f32 	%f665, %f656, %f662;
	add.f32 	%f666, %f663, %f664;
	mul.f32 	%f667, %f665, %f666;
	cvt.rmi.f32.f32	%f668, %f667;
	sub.f32 	%f669, %f667, %f668;
	add.f32 	%f670, %f663, %f665;
	mul.f32 	%f671, %f664, %f670;
	cvt.rmi.f32.f32	%f672, %f671;
	sub.f32 	%f673, %f671, %f672;
	add.f32 	%f674, %f664, %f665;
	mul.f32 	%f675, %f663, %f674;
	cvt.rmi.f32.f32	%f676, %f675;
	sub.f32 	%f677, %f675, %f676;
	fma.rn.f32 	%f678, %f669, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f679, %f673, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f680, %f677, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f681, %f272, %f678, %f277;
	fma.rn.f32 	%f682, %f272, %f679, %f278;
	fma.rn.f32 	%f683, %f272, %f680, %f279;
	sub.f32 	%f684, %f681, %f7;
	sub.f32 	%f685, %f682, %f8;
	sub.f32 	%f686, %f683, %f9;
	mul.f32 	%f687, %f685, %f685;
	fma.rn.f32 	%f688, %f684, %f684, %f687;
	fma.rn.f32 	%f689, %f686, %f686, %f688;
	sqrt.rn.f32 	%f583, %f689;
	rcp.rn.f32 	%f690, %f583;
	mul.f32 	%f579, %f690, %f684;
	mul.f32 	%f580, %f690, %f685;
	mul.f32 	%f581, %f690, %f686;
	ld.global.u32 	%r107, [imageEnabled];
	and.b32  	%r108, %r107, 32;
	setp.eq.s32	%p51, %r108, 0;
	selp.f32	%f691, 0f3F800000, 0f41200000, %p51;
	mul.f32 	%f582, %f691, %f111;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r94, [root];
	// inline asm
	call _rt_trace_64, (%r94, %f10, %f11, %f12, %f579, %f580, %f581, %r101, %f582, %f583, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f692, [%rd2];
	add.f32 	%f693, %f646, %f692;
	add.s32 	%r109, %r196, 2;
	cvt.rn.f32.s32	%f694, %r109;
	mul.f32 	%f695, %f694, 0f3DD32618;
	cvt.rmi.f32.f32	%f696, %f695;
	sub.f32 	%f697, %f695, %f696;
	mul.f32 	%f698, %f694, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f699, %f698;
	sub.f32 	%f700, %f698, %f699;
	mul.f32 	%f701, %f694, 0f3DC74539;
	cvt.rmi.f32.f32	%f702, %f701;
	sub.f32 	%f703, %f701, %f702;
	add.f32 	%f704, %f700, 0f4199851F;
	add.f32 	%f705, %f703, 0f4199851F;
	add.f32 	%f706, %f697, 0f4199851F;
	mul.f32 	%f707, %f700, %f705;
	fma.rn.f32 	%f708, %f697, %f704, %f707;
	fma.rn.f32 	%f709, %f706, %f703, %f708;
	add.f32 	%f710, %f697, %f709;
	add.f32 	%f711, %f700, %f709;
	add.f32 	%f712, %f703, %f709;
	add.f32 	%f713, %f710, %f711;
	mul.f32 	%f714, %f712, %f713;
	cvt.rmi.f32.f32	%f715, %f714;
	sub.f32 	%f716, %f714, %f715;
	add.f32 	%f717, %f710, %f712;
	mul.f32 	%f718, %f711, %f717;
	cvt.rmi.f32.f32	%f719, %f718;
	sub.f32 	%f720, %f718, %f719;
	add.f32 	%f721, %f711, %f712;
	mul.f32 	%f722, %f710, %f721;
	cvt.rmi.f32.f32	%f723, %f722;
	sub.f32 	%f724, %f722, %f723;
	fma.rn.f32 	%f725, %f716, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f726, %f720, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f727, %f724, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f728, %f272, %f725, %f277;
	fma.rn.f32 	%f729, %f272, %f726, %f278;
	fma.rn.f32 	%f730, %f272, %f727, %f279;
	sub.f32 	%f731, %f728, %f7;
	sub.f32 	%f732, %f729, %f8;
	sub.f32 	%f733, %f730, %f9;
	mul.f32 	%f734, %f732, %f732;
	fma.rn.f32 	%f735, %f731, %f731, %f734;
	fma.rn.f32 	%f736, %f733, %f733, %f735;
	sqrt.rn.f32 	%f591, %f736;
	rcp.rn.f32 	%f737, %f591;
	mul.f32 	%f587, %f737, %f731;
	mul.f32 	%f588, %f737, %f732;
	mul.f32 	%f589, %f737, %f733;
	ld.global.u32 	%r110, [imageEnabled];
	and.b32  	%r111, %r110, 32;
	setp.eq.s32	%p52, %r111, 0;
	selp.f32	%f738, 0f3F800000, 0f41200000, %p52;
	mul.f32 	%f590, %f738, %f111;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r97, [root];
	// inline asm
	call _rt_trace_64, (%r97, %f10, %f11, %f12, %f587, %f588, %f589, %r101, %f590, %f591, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f739, [%rd2];
	add.f32 	%f740, %f693, %f739;
	add.s32 	%r112, %r196, 3;
	cvt.rn.f32.s32	%f741, %r112;
	mul.f32 	%f742, %f741, 0f3DD32618;
	cvt.rmi.f32.f32	%f743, %f742;
	sub.f32 	%f744, %f742, %f743;
	mul.f32 	%f745, %f741, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f746, %f745;
	sub.f32 	%f747, %f745, %f746;
	mul.f32 	%f748, %f741, 0f3DC74539;
	cvt.rmi.f32.f32	%f749, %f748;
	sub.f32 	%f750, %f748, %f749;
	add.f32 	%f751, %f747, 0f4199851F;
	add.f32 	%f752, %f750, 0f4199851F;
	add.f32 	%f753, %f744, 0f4199851F;
	mul.f32 	%f754, %f747, %f752;
	fma.rn.f32 	%f755, %f744, %f751, %f754;
	fma.rn.f32 	%f756, %f753, %f750, %f755;
	add.f32 	%f757, %f744, %f756;
	add.f32 	%f758, %f747, %f756;
	add.f32 	%f759, %f750, %f756;
	add.f32 	%f760, %f757, %f758;
	mul.f32 	%f761, %f759, %f760;
	cvt.rmi.f32.f32	%f762, %f761;
	sub.f32 	%f763, %f761, %f762;
	add.f32 	%f764, %f757, %f759;
	mul.f32 	%f765, %f758, %f764;
	cvt.rmi.f32.f32	%f766, %f765;
	sub.f32 	%f767, %f765, %f766;
	add.f32 	%f768, %f758, %f759;
	mul.f32 	%f769, %f757, %f768;
	cvt.rmi.f32.f32	%f770, %f769;
	sub.f32 	%f771, %f769, %f770;
	fma.rn.f32 	%f772, %f763, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f773, %f767, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f774, %f771, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f775, %f272, %f772, %f277;
	fma.rn.f32 	%f776, %f272, %f773, %f278;
	fma.rn.f32 	%f777, %f272, %f774, %f279;
	sub.f32 	%f778, %f775, %f7;
	sub.f32 	%f779, %f776, %f8;
	sub.f32 	%f780, %f777, %f9;
	mul.f32 	%f781, %f779, %f779;
	fma.rn.f32 	%f782, %f778, %f778, %f781;
	fma.rn.f32 	%f783, %f780, %f780, %f782;
	sqrt.rn.f32 	%f599, %f783;
	rcp.rn.f32 	%f784, %f599;
	mul.f32 	%f595, %f784, %f778;
	mul.f32 	%f596, %f784, %f779;
	mul.f32 	%f597, %f784, %f780;
	ld.global.u32 	%r113, [imageEnabled];
	and.b32  	%r114, %r113, 32;
	setp.eq.s32	%p53, %r114, 0;
	selp.f32	%f785, 0f3F800000, 0f41200000, %p53;
	mul.f32 	%f598, %f785, %f111;
	st.local.u32 	[%rd2], %r105;
	ld.global.u32 	%r100, [root];
	// inline asm
	call _rt_trace_64, (%r100, %f10, %f11, %f12, %f595, %f596, %f597, %r101, %f598, %f599, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f786, [%rd2];
	add.f32 	%f1182, %f740, %f786;
	add.s32 	%r196, %r196, 4;
	setp.lt.s32	%p54, %r196, %r8;
	@%p54 bra 	BB0_38;

BB0_39:
	cvt.rn.f32.s32	%f787, %r8;
	div.rn.f32 	%f1183, %f1182, %f787;
	shr.u32 	%r115, %r6, 31;
	cvt.u16.u32	%rs62, %r115;

BB0_40:
	fma.rn.f32 	%f1164, %f104, %f1183, %f1164;
	fma.rn.f32 	%f1163, %f105, %f1183, %f1163;
	fma.rn.f32 	%f1162, %f106, %f1183, %f1162;
	ld.global.u8 	%rs15, [imageEnabled];
	and.b16  	%rs16, %rs15, 64;
	setp.eq.s16	%p55, %rs16, 0;
	@%p55 bra 	BB0_42;

	mul.f32 	%f788, %f105, 0f3F372474;
	fma.rn.f32 	%f789, %f104, 0f3E59999A, %f788;
	fma.rn.f32 	%f790, %f106, 0f3D93A92A, %f789;
	fma.rn.f32 	%f20, %f107, %f790, %f20;
	fma.rn.f32 	%f19, %f108, %f790, %f19;
	fma.rn.f32 	%f18, %f790, %f109, %f18;

BB0_42:
	setp.eq.s16	%p56, %rs62, 0;
	@%p56 bra 	BB0_44;

	div.rn.f32 	%f791, %f104, %f268;
	div.rn.f32 	%f792, %f791, %f84;
	cvt.sat.f32.f32	%f793, %f792;
	mul.f32 	%f1183, %f1183, %f793;

BB0_44:
	add.f32 	%f1158, %f1158, %f1183;

BB0_45:
	add.s32 	%r192, %r192, 1;
	setp.lt.u32	%p57, %r192, %r4;
	@%p57 bra 	BB0_5;

BB0_46:
	ld.global.u32 	%r198, [imageEnabled];
	and.b32  	%r116, %r198, 8;
	setp.eq.s32	%p58, %r116, 0;
	@%p58 bra 	BB0_59;

	cvt.sat.f32.f32	%f149, %f1158;
	cvt.u64.u32	%rd46, %r3;
	cvt.u64.u32	%rd45, %r2;
	mov.u64 	%rd49, image_Mask;
	cvta.global.u64 	%rd44, %rd49;
	// inline asm
	call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
	// inline asm
	mov.f32 	%f796, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f797, %f796;
	fma.rn.f32 	%f798, %f797, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f150, %f798;
	abs.f32 	%f151, %f149;
	setp.lt.f32	%p59, %f151, 0f00800000;
	mul.f32 	%f799, %f151, 0f4B800000;
	selp.f32	%f800, 0fC3170000, 0fC2FE0000, %p59;
	selp.f32	%f801, %f799, %f151, %p59;
	mov.b32 	 %r119, %f801;
	and.b32  	%r120, %r119, 8388607;
	or.b32  	%r121, %r120, 1065353216;
	mov.b32 	 %f802, %r121;
	shr.u32 	%r122, %r119, 23;
	cvt.rn.f32.u32	%f803, %r122;
	add.f32 	%f804, %f800, %f803;
	setp.gt.f32	%p60, %f802, 0f3FB504F3;
	mul.f32 	%f805, %f802, 0f3F000000;
	add.f32 	%f806, %f804, 0f3F800000;
	selp.f32	%f807, %f805, %f802, %p60;
	selp.f32	%f808, %f806, %f804, %p60;
	add.f32 	%f809, %f807, 0fBF800000;
	add.f32 	%f795, %f807, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f794,%f795;
	// inline asm
	add.f32 	%f810, %f809, %f809;
	mul.f32 	%f811, %f794, %f810;
	mul.f32 	%f812, %f811, %f811;
	mov.f32 	%f813, 0f3C4CAF63;
	mov.f32 	%f814, 0f3B18F0FE;
	fma.rn.f32 	%f815, %f814, %f812, %f813;
	mov.f32 	%f816, 0f3DAAAABD;
	fma.rn.f32 	%f817, %f815, %f812, %f816;
	mul.rn.f32 	%f818, %f817, %f812;
	mul.rn.f32 	%f819, %f818, %f811;
	sub.f32 	%f820, %f809, %f811;
	neg.f32 	%f821, %f811;
	add.f32 	%f822, %f820, %f820;
	fma.rn.f32 	%f823, %f821, %f809, %f822;
	mul.rn.f32 	%f824, %f794, %f823;
	add.f32 	%f825, %f819, %f811;
	sub.f32 	%f826, %f811, %f825;
	add.f32 	%f827, %f819, %f826;
	add.f32 	%f828, %f824, %f827;
	add.f32 	%f829, %f825, %f828;
	sub.f32 	%f830, %f825, %f829;
	add.f32 	%f831, %f828, %f830;
	mov.f32 	%f832, 0f3F317200;
	mul.rn.f32 	%f833, %f808, %f832;
	mov.f32 	%f834, 0f35BFBE8E;
	mul.rn.f32 	%f835, %f808, %f834;
	add.f32 	%f836, %f833, %f829;
	sub.f32 	%f837, %f833, %f836;
	add.f32 	%f838, %f829, %f837;
	add.f32 	%f839, %f831, %f838;
	add.f32 	%f840, %f835, %f839;
	add.f32 	%f841, %f836, %f840;
	sub.f32 	%f842, %f836, %f841;
	add.f32 	%f843, %f840, %f842;
	mov.f32 	%f844, 0f3EE8BA2E;
	mul.rn.f32 	%f845, %f844, %f841;
	neg.f32 	%f846, %f845;
	fma.rn.f32 	%f847, %f844, %f841, %f846;
	fma.rn.f32 	%f848, %f844, %f843, %f847;
	mov.f32 	%f849, 0f00000000;
	fma.rn.f32 	%f850, %f849, %f841, %f848;
	add.rn.f32 	%f851, %f845, %f850;
	neg.f32 	%f852, %f851;
	add.rn.f32 	%f853, %f845, %f852;
	add.rn.f32 	%f854, %f853, %f850;
	mov.b32 	 %r123, %f851;
	setp.eq.s32	%p61, %r123, 1118925336;
	add.s32 	%r124, %r123, -1;
	mov.b32 	 %f855, %r124;
	add.f32 	%f856, %f854, 0f37000000;
	selp.f32	%f857, %f855, %f851, %p61;
	selp.f32	%f152, %f856, %f854, %p61;
	mul.f32 	%f858, %f857, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f859, %f858;
	mov.f32 	%f860, 0fBF317200;
	fma.rn.f32 	%f861, %f859, %f860, %f857;
	mov.f32 	%f862, 0fB5BFBE8E;
	fma.rn.f32 	%f863, %f859, %f862, %f861;
	mul.f32 	%f864, %f863, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f865, %f864;
	add.f32 	%f866, %f859, 0f00000000;
	ex2.approx.f32 	%f867, %f866;
	mul.f32 	%f868, %f865, %f867;
	setp.lt.f32	%p62, %f857, 0fC2D20000;
	selp.f32	%f869, 0f00000000, %f868, %p62;
	setp.gt.f32	%p63, %f857, 0f42D20000;
	selp.f32	%f1202, 0f7F800000, %f869, %p63;
	setp.eq.f32	%p64, %f1202, 0f7F800000;
	@%p64 bra 	BB0_49;

	fma.rn.f32 	%f1202, %f1202, %f152, %f1202;

BB0_49:
	setp.lt.f32	%p65, %f149, 0f00000000;
	setp.eq.f32	%p66, %f150, 0f3F800000;
	and.pred  	%p4, %p65, %p66;
	mov.b32 	 %r125, %f1202;
	xor.b32  	%r126, %r125, -2147483648;
	mov.b32 	 %f870, %r126;
	selp.f32	%f1204, %f870, %f1202, %p4;
	setp.eq.f32	%p67, %f149, 0f00000000;
	@%p67 bra 	BB0_52;
	bra.uni 	BB0_50;

BB0_52:
	add.f32 	%f873, %f149, %f149;
	selp.f32	%f1204, %f873, 0f00000000, %p66;
	bra.uni 	BB0_53;

BB0_107:
	mov.u64 	%rd117, image_HDR;
	cvta.global.u64 	%rd112, %rd117;
	mov.u32 	%r189, 8;
	// inline asm
	call (%rd111), _rt_buffer_get_64, (%rd112, %r28, %r189, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1154, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f1154;}

	// inline asm
	mov.u16 	%rs58, 0;
	st.v4.u16 	[%rd111], {%rs57, %rs57, %rs57, %rs58};

BB0_108:
	ld.global.u8 	%rs59, [imageEnabled];
	and.b16  	%rs60, %rs59, 64;
	setp.eq.s16	%p131, %rs60, 0;
	@%p131 bra 	BB0_110;

	cvt.u64.u32	%rd120, %r2;
	cvt.u64.u32	%rd121, %r3;
	mov.u64 	%rd124, image_Dir;
	cvta.global.u64 	%rd119, %rd124;
	// inline asm
	call (%rd118), _rt_buffer_get_64, (%rd119, %r28, %r29, %rd120, %rd121, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs61, 0;
	st.v4.u8 	[%rd118], {%rs61, %rs61, %rs61, %rs61};
	bra.uni 	BB0_110;

BB0_50:
	setp.geu.f32	%p68, %f149, 0f00000000;
	@%p68 bra 	BB0_53;

	cvt.rzi.f32.f32	%f872, %f844;
	setp.neu.f32	%p69, %f872, 0f3EE8BA2E;
	selp.f32	%f1204, 0f7FFFFFFF, %f1204, %p69;

BB0_53:
	add.f32 	%f874, %f151, 0f3EE8BA2E;
	mov.b32 	 %r127, %f874;
	setp.lt.s32	%p71, %r127, 2139095040;
	@%p71 bra 	BB0_58;

	setp.gtu.f32	%p72, %f151, 0f7F800000;
	@%p72 bra 	BB0_57;
	bra.uni 	BB0_55;

BB0_57:
	add.f32 	%f1204, %f149, 0f3EE8BA2E;
	bra.uni 	BB0_58;

BB0_55:
	setp.neu.f32	%p73, %f151, 0f7F800000;
	@%p73 bra 	BB0_58;

	selp.f32	%f1204, 0fFF800000, 0f7F800000, %p4;

BB0_58:
	mul.f32 	%f875, %f1204, 0f437F0000;
	setp.eq.f32	%p74, %f149, 0f3F800000;
	selp.f32	%f876, 0f437F0000, %f875, %p74;
	cvt.rzi.u32.f32	%r128, %f876;
	cvt.u16.u32	%rs17, %r128;
	mov.u16 	%rs18, 255;
	st.v2.u8 	[%rd43], {%rs17, %rs18};
	ld.global.u32 	%r198, [imageEnabled];

BB0_59:
	and.b32  	%r129, %r198, 1;
	setp.eq.b32	%p75, %r129, 1;
	@!%p75 bra 	BB0_94;
	bra.uni 	BB0_60;

BB0_60:
	mov.f32 	%f879, 0f3E666666;
	cvt.rzi.f32.f32	%f880, %f879;
	fma.rn.f32 	%f881, %f880, 0fC0000000, 0f3EE66666;
	abs.f32 	%f163, %f881;
	abs.f32 	%f164, %f1164;
	setp.lt.f32	%p76, %f164, 0f00800000;
	mul.f32 	%f882, %f164, 0f4B800000;
	selp.f32	%f883, 0fC3170000, 0fC2FE0000, %p76;
	selp.f32	%f884, %f882, %f164, %p76;
	mov.b32 	 %r130, %f884;
	and.b32  	%r131, %r130, 8388607;
	or.b32  	%r132, %r131, 1065353216;
	mov.b32 	 %f885, %r132;
	shr.u32 	%r133, %r130, 23;
	cvt.rn.f32.u32	%f886, %r133;
	add.f32 	%f887, %f883, %f886;
	setp.gt.f32	%p77, %f885, 0f3FB504F3;
	mul.f32 	%f888, %f885, 0f3F000000;
	add.f32 	%f889, %f887, 0f3F800000;
	selp.f32	%f890, %f888, %f885, %p77;
	selp.f32	%f891, %f889, %f887, %p77;
	add.f32 	%f892, %f890, 0fBF800000;
	add.f32 	%f878, %f890, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f877,%f878;
	// inline asm
	add.f32 	%f893, %f892, %f892;
	mul.f32 	%f894, %f877, %f893;
	mul.f32 	%f895, %f894, %f894;
	mov.f32 	%f896, 0f3C4CAF63;
	mov.f32 	%f897, 0f3B18F0FE;
	fma.rn.f32 	%f898, %f897, %f895, %f896;
	mov.f32 	%f899, 0f3DAAAABD;
	fma.rn.f32 	%f900, %f898, %f895, %f899;
	mul.rn.f32 	%f901, %f900, %f895;
	mul.rn.f32 	%f902, %f901, %f894;
	sub.f32 	%f903, %f892, %f894;
	neg.f32 	%f904, %f894;
	add.f32 	%f905, %f903, %f903;
	fma.rn.f32 	%f906, %f904, %f892, %f905;
	mul.rn.f32 	%f907, %f877, %f906;
	add.f32 	%f908, %f902, %f894;
	sub.f32 	%f909, %f894, %f908;
	add.f32 	%f910, %f902, %f909;
	add.f32 	%f911, %f907, %f910;
	add.f32 	%f912, %f908, %f911;
	sub.f32 	%f913, %f908, %f912;
	add.f32 	%f914, %f911, %f913;
	mov.f32 	%f915, 0f3F317200;
	mul.rn.f32 	%f916, %f891, %f915;
	mov.f32 	%f917, 0f35BFBE8E;
	mul.rn.f32 	%f918, %f891, %f917;
	add.f32 	%f919, %f916, %f912;
	sub.f32 	%f920, %f916, %f919;
	add.f32 	%f921, %f912, %f920;
	add.f32 	%f922, %f914, %f921;
	add.f32 	%f923, %f918, %f922;
	add.f32 	%f924, %f919, %f923;
	sub.f32 	%f925, %f919, %f924;
	add.f32 	%f926, %f923, %f925;
	mov.f32 	%f927, 0f3EE66666;
	mul.rn.f32 	%f928, %f927, %f924;
	neg.f32 	%f929, %f928;
	fma.rn.f32 	%f930, %f927, %f924, %f929;
	fma.rn.f32 	%f931, %f927, %f926, %f930;
	mov.f32 	%f932, 0f00000000;
	fma.rn.f32 	%f933, %f932, %f924, %f931;
	add.rn.f32 	%f934, %f928, %f933;
	neg.f32 	%f935, %f934;
	add.rn.f32 	%f936, %f928, %f935;
	add.rn.f32 	%f937, %f936, %f933;
	mov.b32 	 %r134, %f934;
	setp.eq.s32	%p78, %r134, 1118925336;
	add.s32 	%r135, %r134, -1;
	mov.b32 	 %f938, %r135;
	add.f32 	%f939, %f937, 0f37000000;
	selp.f32	%f940, %f938, %f934, %p78;
	selp.f32	%f165, %f939, %f937, %p78;
	mul.f32 	%f941, %f940, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f942, %f941;
	mov.f32 	%f943, 0fBF317200;
	fma.rn.f32 	%f944, %f942, %f943, %f940;
	mov.f32 	%f945, 0fB5BFBE8E;
	fma.rn.f32 	%f946, %f942, %f945, %f944;
	mul.f32 	%f947, %f946, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f948, %f947;
	add.f32 	%f949, %f942, 0f00000000;
	ex2.approx.f32 	%f950, %f949;
	mul.f32 	%f951, %f948, %f950;
	setp.lt.f32	%p79, %f940, 0fC2D20000;
	selp.f32	%f952, 0f00000000, %f951, %p79;
	setp.gt.f32	%p80, %f940, 0f42D20000;
	selp.f32	%f1205, 0f7F800000, %f952, %p80;
	setp.eq.f32	%p81, %f1205, 0f7F800000;
	@%p81 bra 	BB0_62;

	fma.rn.f32 	%f1205, %f1205, %f165, %f1205;

BB0_62:
	setp.lt.f32	%p82, %f1164, 0f00000000;
	setp.eq.f32	%p83, %f163, 0f3F800000;
	and.pred  	%p5, %p82, %p83;
	mov.b32 	 %r136, %f1205;
	xor.b32  	%r137, %r136, -2147483648;
	mov.b32 	 %f953, %r137;
	selp.f32	%f1207, %f953, %f1205, %p5;
	setp.eq.f32	%p84, %f1164, 0f00000000;
	@%p84 bra 	BB0_65;
	bra.uni 	BB0_63;

BB0_65:
	add.f32 	%f956, %f1164, %f1164;
	selp.f32	%f1207, %f956, 0f00000000, %p83;
	bra.uni 	BB0_66;

BB0_63:
	setp.geu.f32	%p85, %f1164, 0f00000000;
	@%p85 bra 	BB0_66;

	cvt.rzi.f32.f32	%f955, %f927;
	setp.neu.f32	%p86, %f955, 0f3EE66666;
	selp.f32	%f1207, 0f7FFFFFFF, %f1207, %p86;

BB0_66:
	add.f32 	%f957, %f164, 0f3EE66666;
	mov.b32 	 %r138, %f957;
	setp.lt.s32	%p88, %r138, 2139095040;
	@%p88 bra 	BB0_71;

	setp.gtu.f32	%p89, %f164, 0f7F800000;
	@%p89 bra 	BB0_70;
	bra.uni 	BB0_68;

BB0_70:
	add.f32 	%f1207, %f1164, 0f3EE66666;
	bra.uni 	BB0_71;

BB0_68:
	setp.neu.f32	%p90, %f164, 0f7F800000;
	@%p90 bra 	BB0_71;

	selp.f32	%f1207, 0fFF800000, 0f7F800000, %p5;

BB0_71:
	setp.eq.f32	%p91, %f1164, 0f3F800000;
	selp.f32	%f176, 0f3F800000, %f1207, %p91;
	abs.f32 	%f177, %f1163;
	setp.lt.f32	%p92, %f177, 0f00800000;
	mul.f32 	%f960, %f177, 0f4B800000;
	selp.f32	%f961, 0fC3170000, 0fC2FE0000, %p92;
	selp.f32	%f962, %f960, %f177, %p92;
	mov.b32 	 %r139, %f962;
	and.b32  	%r140, %r139, 8388607;
	or.b32  	%r141, %r140, 1065353216;
	mov.b32 	 %f963, %r141;
	shr.u32 	%r142, %r139, 23;
	cvt.rn.f32.u32	%f964, %r142;
	add.f32 	%f965, %f961, %f964;
	setp.gt.f32	%p93, %f963, 0f3FB504F3;
	mul.f32 	%f966, %f963, 0f3F000000;
	add.f32 	%f967, %f965, 0f3F800000;
	selp.f32	%f968, %f966, %f963, %p93;
	selp.f32	%f969, %f967, %f965, %p93;
	add.f32 	%f970, %f968, 0fBF800000;
	add.f32 	%f959, %f968, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f958,%f959;
	// inline asm
	add.f32 	%f971, %f970, %f970;
	mul.f32 	%f972, %f958, %f971;
	mul.f32 	%f973, %f972, %f972;
	fma.rn.f32 	%f976, %f897, %f973, %f896;
	fma.rn.f32 	%f978, %f976, %f973, %f899;
	mul.rn.f32 	%f979, %f978, %f973;
	mul.rn.f32 	%f980, %f979, %f972;
	sub.f32 	%f981, %f970, %f972;
	neg.f32 	%f982, %f972;
	add.f32 	%f983, %f981, %f981;
	fma.rn.f32 	%f984, %f982, %f970, %f983;
	mul.rn.f32 	%f985, %f958, %f984;
	add.f32 	%f986, %f980, %f972;
	sub.f32 	%f987, %f972, %f986;
	add.f32 	%f988, %f980, %f987;
	add.f32 	%f989, %f985, %f988;
	add.f32 	%f990, %f986, %f989;
	sub.f32 	%f991, %f986, %f990;
	add.f32 	%f992, %f989, %f991;
	mul.rn.f32 	%f994, %f969, %f915;
	mul.rn.f32 	%f996, %f969, %f917;
	add.f32 	%f997, %f994, %f990;
	sub.f32 	%f998, %f994, %f997;
	add.f32 	%f999, %f990, %f998;
	add.f32 	%f1000, %f992, %f999;
	add.f32 	%f1001, %f996, %f1000;
	add.f32 	%f1002, %f997, %f1001;
	sub.f32 	%f1003, %f997, %f1002;
	add.f32 	%f1004, %f1001, %f1003;
	mul.rn.f32 	%f1006, %f927, %f1002;
	neg.f32 	%f1007, %f1006;
	fma.rn.f32 	%f1008, %f927, %f1002, %f1007;
	fma.rn.f32 	%f1009, %f927, %f1004, %f1008;
	fma.rn.f32 	%f1011, %f932, %f1002, %f1009;
	add.rn.f32 	%f1012, %f1006, %f1011;
	neg.f32 	%f1013, %f1012;
	add.rn.f32 	%f1014, %f1006, %f1013;
	add.rn.f32 	%f1015, %f1014, %f1011;
	mov.b32 	 %r143, %f1012;
	setp.eq.s32	%p94, %r143, 1118925336;
	add.s32 	%r144, %r143, -1;
	mov.b32 	 %f1016, %r144;
	add.f32 	%f1017, %f1015, 0f37000000;
	selp.f32	%f1018, %f1016, %f1012, %p94;
	selp.f32	%f178, %f1017, %f1015, %p94;
	mul.f32 	%f1019, %f1018, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1020, %f1019;
	fma.rn.f32 	%f1022, %f1020, %f943, %f1018;
	fma.rn.f32 	%f1024, %f1020, %f945, %f1022;
	mul.f32 	%f1025, %f1024, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1026, %f1025;
	add.f32 	%f1027, %f1020, 0f00000000;
	ex2.approx.f32 	%f1028, %f1027;
	mul.f32 	%f1029, %f1026, %f1028;
	setp.lt.f32	%p95, %f1018, 0fC2D20000;
	selp.f32	%f1030, 0f00000000, %f1029, %p95;
	setp.gt.f32	%p96, %f1018, 0f42D20000;
	selp.f32	%f1208, 0f7F800000, %f1030, %p96;
	setp.eq.f32	%p97, %f1208, 0f7F800000;
	@%p97 bra 	BB0_73;

	fma.rn.f32 	%f1208, %f1208, %f178, %f1208;

BB0_73:
	setp.lt.f32	%p98, %f1163, 0f00000000;
	and.pred  	%p6, %p98, %p83;
	mov.b32 	 %r145, %f1208;
	xor.b32  	%r146, %r145, -2147483648;
	mov.b32 	 %f1031, %r146;
	selp.f32	%f1210, %f1031, %f1208, %p6;
	setp.eq.f32	%p100, %f1163, 0f00000000;
	@%p100 bra 	BB0_76;
	bra.uni 	BB0_74;

BB0_76:
	add.f32 	%f1034, %f1163, %f1163;
	selp.f32	%f1210, %f1034, 0f00000000, %p83;
	bra.uni 	BB0_77;

BB0_74:
	setp.geu.f32	%p101, %f1163, 0f00000000;
	@%p101 bra 	BB0_77;

	cvt.rzi.f32.f32	%f1033, %f927;
	setp.neu.f32	%p102, %f1033, 0f3EE66666;
	selp.f32	%f1210, 0f7FFFFFFF, %f1210, %p102;

BB0_77:
	add.f32 	%f1035, %f177, 0f3EE66666;
	mov.b32 	 %r147, %f1035;
	setp.lt.s32	%p104, %r147, 2139095040;
	@%p104 bra 	BB0_82;

	setp.gtu.f32	%p105, %f177, 0f7F800000;
	@%p105 bra 	BB0_81;
	bra.uni 	BB0_79;

BB0_81:
	add.f32 	%f1210, %f1163, 0f3EE66666;
	bra.uni 	BB0_82;

BB0_79:
	setp.neu.f32	%p106, %f177, 0f7F800000;
	@%p106 bra 	BB0_82;

	selp.f32	%f1210, 0fFF800000, 0f7F800000, %p6;

BB0_82:
	setp.eq.f32	%p107, %f1163, 0f3F800000;
	selp.f32	%f189, 0f3F800000, %f1210, %p107;
	abs.f32 	%f190, %f1162;
	setp.lt.f32	%p108, %f190, 0f00800000;
	mul.f32 	%f1038, %f190, 0f4B800000;
	selp.f32	%f1039, 0fC3170000, 0fC2FE0000, %p108;
	selp.f32	%f1040, %f1038, %f190, %p108;
	mov.b32 	 %r148, %f1040;
	and.b32  	%r149, %r148, 8388607;
	or.b32  	%r150, %r149, 1065353216;
	mov.b32 	 %f1041, %r150;
	shr.u32 	%r151, %r148, 23;
	cvt.rn.f32.u32	%f1042, %r151;
	add.f32 	%f1043, %f1039, %f1042;
	setp.gt.f32	%p109, %f1041, 0f3FB504F3;
	mul.f32 	%f1044, %f1041, 0f3F000000;
	add.f32 	%f1045, %f1043, 0f3F800000;
	selp.f32	%f1046, %f1044, %f1041, %p109;
	selp.f32	%f1047, %f1045, %f1043, %p109;
	add.f32 	%f1048, %f1046, 0fBF800000;
	add.f32 	%f1037, %f1046, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1036,%f1037;
	// inline asm
	add.f32 	%f1049, %f1048, %f1048;
	mul.f32 	%f1050, %f1036, %f1049;
	mul.f32 	%f1051, %f1050, %f1050;
	fma.rn.f32 	%f1054, %f897, %f1051, %f896;
	fma.rn.f32 	%f1056, %f1054, %f1051, %f899;
	mul.rn.f32 	%f1057, %f1056, %f1051;
	mul.rn.f32 	%f1058, %f1057, %f1050;
	sub.f32 	%f1059, %f1048, %f1050;
	neg.f32 	%f1060, %f1050;
	add.f32 	%f1061, %f1059, %f1059;
	fma.rn.f32 	%f1062, %f1060, %f1048, %f1061;
	mul.rn.f32 	%f1063, %f1036, %f1062;
	add.f32 	%f1064, %f1058, %f1050;
	sub.f32 	%f1065, %f1050, %f1064;
	add.f32 	%f1066, %f1058, %f1065;
	add.f32 	%f1067, %f1063, %f1066;
	add.f32 	%f1068, %f1064, %f1067;
	sub.f32 	%f1069, %f1064, %f1068;
	add.f32 	%f1070, %f1067, %f1069;
	mul.rn.f32 	%f1072, %f1047, %f915;
	mul.rn.f32 	%f1074, %f1047, %f917;
	add.f32 	%f1075, %f1072, %f1068;
	sub.f32 	%f1076, %f1072, %f1075;
	add.f32 	%f1077, %f1068, %f1076;
	add.f32 	%f1078, %f1070, %f1077;
	add.f32 	%f1079, %f1074, %f1078;
	add.f32 	%f1080, %f1075, %f1079;
	sub.f32 	%f1081, %f1075, %f1080;
	add.f32 	%f1082, %f1079, %f1081;
	mul.rn.f32 	%f1084, %f927, %f1080;
	neg.f32 	%f1085, %f1084;
	fma.rn.f32 	%f1086, %f927, %f1080, %f1085;
	fma.rn.f32 	%f1087, %f927, %f1082, %f1086;
	fma.rn.f32 	%f1089, %f932, %f1080, %f1087;
	add.rn.f32 	%f1090, %f1084, %f1089;
	neg.f32 	%f1091, %f1090;
	add.rn.f32 	%f1092, %f1084, %f1091;
	add.rn.f32 	%f1093, %f1092, %f1089;
	mov.b32 	 %r152, %f1090;
	setp.eq.s32	%p110, %r152, 1118925336;
	add.s32 	%r153, %r152, -1;
	mov.b32 	 %f1094, %r153;
	add.f32 	%f1095, %f1093, 0f37000000;
	selp.f32	%f1096, %f1094, %f1090, %p110;
	selp.f32	%f191, %f1095, %f1093, %p110;
	mul.f32 	%f1097, %f1096, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1098, %f1097;
	fma.rn.f32 	%f1100, %f1098, %f943, %f1096;
	fma.rn.f32 	%f1102, %f1098, %f945, %f1100;
	mul.f32 	%f1103, %f1102, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1104, %f1103;
	add.f32 	%f1105, %f1098, 0f00000000;
	ex2.approx.f32 	%f1106, %f1105;
	mul.f32 	%f1107, %f1104, %f1106;
	setp.lt.f32	%p111, %f1096, 0fC2D20000;
	selp.f32	%f1108, 0f00000000, %f1107, %p111;
	setp.gt.f32	%p112, %f1096, 0f42D20000;
	selp.f32	%f1211, 0f7F800000, %f1108, %p112;
	setp.eq.f32	%p113, %f1211, 0f7F800000;
	@%p113 bra 	BB0_84;

	fma.rn.f32 	%f1211, %f1211, %f191, %f1211;

BB0_84:
	setp.lt.f32	%p114, %f1162, 0f00000000;
	and.pred  	%p7, %p114, %p83;
	mov.b32 	 %r154, %f1211;
	xor.b32  	%r155, %r154, -2147483648;
	mov.b32 	 %f1109, %r155;
	selp.f32	%f1213, %f1109, %f1211, %p7;
	setp.eq.f32	%p116, %f1162, 0f00000000;
	@%p116 bra 	BB0_87;
	bra.uni 	BB0_85;

BB0_87:
	add.f32 	%f1112, %f1162, %f1162;
	selp.f32	%f1213, %f1112, 0f00000000, %p83;
	bra.uni 	BB0_88;

BB0_85:
	setp.geu.f32	%p117, %f1162, 0f00000000;
	@%p117 bra 	BB0_88;

	cvt.rzi.f32.f32	%f1111, %f927;
	setp.neu.f32	%p118, %f1111, 0f3EE66666;
	selp.f32	%f1213, 0f7FFFFFFF, %f1213, %p118;

BB0_88:
	add.f32 	%f1113, %f190, 0f3EE66666;
	mov.b32 	 %r156, %f1113;
	setp.lt.s32	%p120, %r156, 2139095040;
	@%p120 bra 	BB0_93;

	setp.gtu.f32	%p121, %f190, 0f7F800000;
	@%p121 bra 	BB0_92;
	bra.uni 	BB0_90;

BB0_92:
	add.f32 	%f1213, %f1162, 0f3EE66666;
	bra.uni 	BB0_93;

BB0_90:
	setp.neu.f32	%p122, %f190, 0f7F800000;
	@%p122 bra 	BB0_93;

	selp.f32	%f1213, 0fFF800000, 0f7F800000, %p7;

BB0_93:
	setp.eq.f32	%p123, %f1162, 0f3F800000;
	selp.f32	%f1114, 0f3F800000, %f1213, %p123;
	cvt.u64.u32	%rd53, %r3;
	cvt.u64.u32	%rd52, %r2;
	mov.u64 	%rd56, image;
	cvta.global.u64 	%rd51, %rd56;
	// inline asm
	call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13);
	// inline asm
	cvt.sat.f32.f32	%f1115, %f1114;
	mul.f32 	%f1116, %f1115, 0f437FFD71;
	cvt.rzi.u32.f32	%r159, %f1116;
	cvt.sat.f32.f32	%f1117, %f189;
	mul.f32 	%f1118, %f1117, 0f437FFD71;
	cvt.rzi.u32.f32	%r160, %f1118;
	cvt.sat.f32.f32	%f1119, %f176;
	mul.f32 	%f1120, %f1119, 0f437FFD71;
	cvt.rzi.u32.f32	%r161, %f1120;
	cvt.u16.u32	%rs19, %r159;
	cvt.u16.u32	%rs20, %r161;
	cvt.u16.u32	%rs21, %r160;
	mov.u16 	%rs22, 255;
	st.v4.u8 	[%rd50], {%rs19, %rs21, %rs20, %rs22};
	ld.global.u32 	%r198, [imageEnabled];

BB0_94:
	and.b32  	%r162, %r198, 4;
	setp.eq.s32	%p124, %r162, 0;
	@%p124 bra 	BB0_98;

	ld.global.u32 	%r163, [additive];
	setp.eq.s32	%p125, %r163, 0;
	cvt.u64.u32	%rd4, %r2;
	cvt.u64.u32	%rd5, %r3;
	mov.f32 	%f1121, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f1121;}

	// inline asm
	@%p125 bra 	BB0_97;

	mov.u64 	%rd69, image_HDR;
	cvta.global.u64 	%rd58, %rd69;
	mov.u32 	%r167, 8;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd57];
	// inline asm
	{  cvt.f32.f16 %f1122, %rs30;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1123, %rs31;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1124, %rs32;}

	// inline asm
	// inline asm
	call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1125, %f1164, %f1122;
	add.f32 	%f1126, %f1163, %f1123;
	add.f32 	%f1127, %f1162, %f1124;
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f1127;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f1126;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f1125;}

	// inline asm
	st.v4.u16 	[%rd63], {%rs27, %rs28, %rs29, %rs23};
	bra.uni 	BB0_98;

BB0_97:
	mov.u64 	%rd76, image_HDR;
	cvta.global.u64 	%rd71, %rd76;
	mov.u32 	%r169, 8;
	// inline asm
	call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r169, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f1162;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs35, %f1163;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f1164;}

	// inline asm
	st.v4.u16 	[%rd70], {%rs34, %rs35, %rs36, %rs23};

BB0_98:
	ld.global.u8 	%rs37, [imageEnabled];
	and.b16  	%rs38, %rs37, 64;
	setp.eq.s16	%p126, %rs38, 0;
	@%p126 bra 	BB0_110;

	mul.f32 	%f1131, %f19, %f19;
	fma.rn.f32 	%f1132, %f20, %f20, %f1131;
	fma.rn.f32 	%f1133, %f18, %f18, %f1132;
	sqrt.rn.f32 	%f1134, %f1133;
	rcp.rn.f32 	%f1135, %f1134;
	mul.f32 	%f1136, %f20, %f1135;
	mul.f32 	%f1137, %f19, %f1135;
	mul.f32 	%f1138, %f18, %f1135;
	cvt.u64.u32	%rd80, %r3;
	cvt.u64.u32	%rd79, %r2;
	mov.u64 	%rd83, image_Dir;
	cvta.global.u64 	%rd78, %rd83;
	// inline asm
	call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r29, %rd79, %rd80, %rd13, %rd13);
	// inline asm
	fma.rn.f32 	%f1139, %f1136, 0f3F000000, 0f3F000000;
	mul.f32 	%f1140, %f1139, 0f437F0000;
	cvt.rzi.u32.f32	%r172, %f1140;
	fma.rn.f32 	%f1141, %f1137, 0f3F000000, 0f3F000000;
	mul.f32 	%f1142, %f1141, 0f437F0000;
	cvt.rzi.u32.f32	%r173, %f1142;
	fma.rn.f32 	%f1143, %f1138, 0f3F000000, 0f3F000000;
	mul.f32 	%f1144, %f1143, 0f437F0000;
	cvt.rzi.u32.f32	%r174, %f1144;
	cvt.u16.u32	%rs39, %r174;
	cvt.u16.u32	%rs40, %r173;
	cvt.u16.u32	%rs41, %r172;
	mov.u16 	%rs42, 255;
	st.v4.u8 	[%rd77], {%rs41, %rs40, %rs39, %rs42};

BB0_110:
	ret;
}