//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .texref sky;
.global .align 4 .b8 skyColor[12];
.global .align 4 .u32 samples;
.global .align 4 .u32 hemispherical;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8skyColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo13hemisphericalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8skyColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename13hemisphericalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8skyColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum13hemisphericalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8skyColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic13hemisphericalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8skyColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation13hemisphericalE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[32];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<97>;
	.reg .b16 	%rs<42>;
	.reg .f32 	%f<569>;
	.reg .b32 	%r<302>;
	.reg .b64 	%rd<114>;


	mov.u64 	%rd113, __local_depot0;
	cvta.local.u64 	%SP, %rd113;
	ld.global.u32 	%r1, [samples];
	ld.global.v2.u32 	{%r93, %r94}, [pixelID];
	cvt.u64.u32	%rd21, %r93;
	cvt.u64.u32	%rd22, %r94;
	mov.u64 	%rd25, uvnormal;
	cvta.global.u64 	%rd20, %rd25;
	mov.u32 	%r91, 2;
	mov.u32 	%r92, 4;
	mov.u64 	%rd24, 0;
	// inline asm
	call (%rd19), _rt_buffer_get_64, (%rd20, %r91, %r92, %rd21, %rd22, %rd24, %rd24);
	// inline asm
	ld.u32 	%r2, [%rd19];
	shr.u32 	%r97, %r2, 16;
	cvt.u16.u32	%rs1, %r97;
	and.b16  	%rs3, %rs1, 255;
	cvt.u16.u32	%rs4, %r2;
	or.b16  	%rs5, %rs4, %rs3;
	setp.eq.s16	%p4, %rs5, 0;
	mov.f32 	%f541, 0f00000000;
	mov.f32 	%f542, %f541;
	mov.f32 	%f543, %f541;
	@%p4 bra 	BB0_2;

	ld.u8 	%rs6, [%rd19+1];
	and.b16  	%rs8, %rs4, 255;
	cvt.rn.f32.u16	%f111, %rs8;
	div.rn.f32 	%f112, %f111, 0f437F0000;
	fma.rn.f32 	%f113, %f112, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f114, %rs6;
	div.rn.f32 	%f115, %f114, 0f437F0000;
	fma.rn.f32 	%f116, %f115, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f117, %rs3;
	div.rn.f32 	%f118, %f117, 0f437F0000;
	fma.rn.f32 	%f119, %f118, 0f40000000, 0fBF800000;
	mul.f32 	%f120, %f116, %f116;
	fma.rn.f32 	%f121, %f113, %f113, %f120;
	fma.rn.f32 	%f122, %f119, %f119, %f121;
	sqrt.rn.f32 	%f123, %f122;
	rcp.rn.f32 	%f124, %f123;
	mul.f32 	%f541, %f113, %f124;
	mul.f32 	%f542, %f116, %f124;
	mul.f32 	%f543, %f119, %f124;

BB0_2:
	ld.global.v2.u32 	{%r98, %r99}, [pixelID];
	ld.global.v2.u32 	{%r101, %r102}, [tileInfo];
	add.s32 	%r3, %r98, %r101;
	add.s32 	%r4, %r99, %r102;
	setp.eq.f32	%p5, %f542, 0f00000000;
	setp.eq.f32	%p6, %f541, 0f00000000;
	and.pred  	%p7, %p6, %p5;
	setp.eq.f32	%p8, %f543, 0f00000000;
	and.pred  	%p9, %p7, %p8;
	@%p9 bra 	BB0_95;
	bra.uni 	BB0_3;

BB0_95:
	ld.global.u32 	%r301, [imageEnabled];
	and.b32  	%r261, %r301, 1;
	setp.eq.b32	%p94, %r261, 1;
	@!%p94 bra 	BB0_97;
	bra.uni 	BB0_96;

BB0_96:
	cvt.u64.u32	%rd81, %r3;
	cvt.u64.u32	%rd82, %r4;
	mov.u64 	%rd85, image;
	cvta.global.u64 	%rd80, %rd85;
	// inline asm
	call (%rd79), _rt_buffer_get_64, (%rd80, %r91, %r92, %rd81, %rd82, %rd24, %rd24);
	// inline asm
	mov.u16 	%rs28, 0;
	st.v4.u8 	[%rd79], {%rs28, %rs28, %rs28, %rs28};
	ld.global.u32 	%r301, [imageEnabled];

BB0_97:
	and.b32  	%r264, %r301, 4;
	setp.eq.s32	%p95, %r264, 0;
	@%p95 bra 	BB0_101;

	ld.global.u32 	%r265, [additive];
	setp.eq.s32	%p96, %r265, 0;
	cvt.u64.u32	%rd17, %r3;
	cvt.u64.u32	%rd18, %r4;
	@%p96 bra 	BB0_100;

	mov.u64 	%rd98, image_HDR;
	cvta.global.u64 	%rd87, %rd98;
	mov.u32 	%r269, 8;
	// inline asm
	call (%rd86), _rt_buffer_get_64, (%rd87, %r91, %r269, %rd17, %rd18, %rd24, %rd24);
	// inline asm
	ld.v4.u16 	{%rs35, %rs36, %rs37, %rs38}, [%rd86];
	// inline asm
	{  cvt.f32.f16 %f506, %rs35;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f507, %rs36;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f508, %rs37;}

	// inline asm
	// inline asm
	call (%rd92), _rt_buffer_get_64, (%rd87, %r91, %r269, %rd17, %rd18, %rd24, %rd24);
	// inline asm
	add.f32 	%f509, %f506, 0f00000000;
	add.f32 	%f510, %f507, 0f00000000;
	add.f32 	%f511, %f508, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f511;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs33, %f510;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs32, %f509;}

	// inline asm
	mov.u16 	%rs39, 0;
	st.v4.u16 	[%rd92], {%rs32, %rs33, %rs34, %rs39};
	bra.uni 	BB0_101;

BB0_3:
	ld.global.v2.u32 	{%r110, %r111}, [pixelID];
	cvt.u64.u32	%rd28, %r110;
	cvt.u64.u32	%rd29, %r111;
	mov.u64 	%rd38, uvpos;
	cvta.global.u64 	%rd27, %rd38;
	mov.u32 	%r107, 12;
	// inline asm
	call (%rd26), _rt_buffer_get_64, (%rd27, %r91, %r107, %rd28, %rd29, %rd24, %rd24);
	// inline asm
	ld.f32 	%f126, [%rd26+8];
	ld.f32 	%f127, [%rd26+4];
	ld.f32 	%f128, [%rd26];
	mul.f32 	%f129, %f128, 0f3456BF95;
	mul.f32 	%f130, %f127, 0f3456BF95;
	mul.f32 	%f131, %f126, 0f3456BF95;
	abs.f32 	%f132, %f541;
	div.rn.f32 	%f133, %f129, %f132;
	abs.f32 	%f134, %f542;
	div.rn.f32 	%f135, %f130, %f134;
	abs.f32 	%f136, %f543;
	div.rn.f32 	%f137, %f131, %f136;
	abs.f32 	%f138, %f133;
	abs.f32 	%f139, %f135;
	abs.f32 	%f140, %f137;
	mov.f32 	%f141, 0f38D1B717;
	max.f32 	%f142, %f138, %f141;
	max.f32 	%f143, %f139, %f141;
	max.f32 	%f144, %f140, %f141;
	fma.rn.f32 	%f7, %f541, %f142, %f128;
	fma.rn.f32 	%f8, %f542, %f143, %f127;
	fma.rn.f32 	%f9, %f543, %f144, %f126;
	ld.global.u32 	%r5, [hemispherical];
	setp.gt.f32	%p10, %f132, %f136;
	neg.f32 	%f145, %f542;
	selp.f32	%f146, %f145, 0f00000000, %p10;
	neg.f32 	%f147, %f543;
	selp.f32	%f148, %f541, %f147, %p10;
	selp.f32	%f149, 0f00000000, %f542, %p10;
	mul.f32 	%f150, %f148, %f148;
	fma.rn.f32 	%f151, %f146, %f146, %f150;
	fma.rn.f32 	%f152, %f149, %f149, %f151;
	sqrt.rn.f32 	%f153, %f152;
	rcp.rn.f32 	%f154, %f153;
	mul.f32 	%f10, %f146, %f154;
	mul.f32 	%f11, %f148, %f154;
	mul.f32 	%f12, %f149, %f154;
	ld.global.v2.u32 	{%r114, %r115}, [pixelID];
	cvt.u64.u32	%rd34, %r114;
	cvt.u64.u32	%rd35, %r115;
	mov.u64 	%rd39, rnd_seeds;
	cvta.global.u64 	%rd33, %rd39;
	// inline asm
	call (%rd32), _rt_buffer_get_64, (%rd33, %r91, %r92, %rd34, %rd35, %rd24, %rd24);
	// inline asm
	mov.f32 	%f558, 0f00000000;
	setp.lt.s32	%p11, %r1, 1;
	@%p11 bra 	BB0_56;

	cvt.rn.f32.s32	%f156, %r1;
	rcp.rn.f32 	%f13, %f156;
	ld.u32 	%r279, [%rd32];
	mul.f32 	%f14, %f7, 0f3456BF95;
	mul.f32 	%f15, %f8, 0f3456BF95;
	mul.f32 	%f16, %f9, 0f3456BF95;
	mul.f32 	%f157, %f541, %f11;
	mul.f32 	%f158, %f542, %f10;
	sub.f32 	%f17, %f158, %f157;
	mul.f32 	%f159, %f543, %f10;
	mul.f32 	%f160, %f541, %f12;
	sub.f32 	%f18, %f160, %f159;
	mul.f32 	%f161, %f542, %f12;
	mul.f32 	%f162, %f543, %f11;
	sub.f32 	%f19, %f162, %f161;
	mov.f32 	%f558, 0f00000000;
	mov.u32 	%r118, 0;
	abs.f32 	%f240, %f15;
	abs.f32 	%f241, %f14;
	max.f32 	%f242, %f241, %f240;
	abs.f32 	%f243, %f16;
	max.f32 	%f244, %f242, %f243;
	mov.u32 	%r276, %r118;

BB0_5:
	cvt.rn.f32.s32	%f21, %r276;
	mov.u32 	%r278, %r118;

BB0_6:
	mad.lo.s32 	%r120, %r279, 1664525, 1013904223;
	and.b32  	%r121, %r120, 16777215;
	cvt.rn.f32.u32	%f163, %r121;
	fma.rn.f32 	%f164, %f163, 0f33800000, %f21;
	mul.f32 	%f165, %f13, %f164;
	mad.lo.s32 	%r279, %r120, 1664525, 1013904223;
	and.b32  	%r122, %r279, 16777215;
	cvt.rn.f32.u32	%f166, %r122;
	cvt.rn.f32.s32	%f167, %r278;
	fma.rn.f32 	%f168, %f166, 0f33800000, %f167;
	mul.f32 	%f169, %f13, %f168;
	sqrt.rn.f32 	%f23, %f165;
	mul.f32 	%f552, %f169, 0f40C90FDB;
	abs.f32 	%f25, %f552;
	setp.neu.f32	%p12, %f25, 0f7F800000;
	mov.f32 	%f546, %f552;
	@%p12 bra 	BB0_8;

	mov.f32 	%f170, 0f00000000;
	mul.rn.f32 	%f546, %f552, %f170;

BB0_8:
	mul.f32 	%f171, %f546, 0f3F22F983;
	cvt.rni.s32.f32	%r289, %f171;
	cvt.rn.f32.s32	%f172, %r289;
	neg.f32 	%f173, %f172;
	mov.f32 	%f174, 0f3FC90FDA;
	fma.rn.f32 	%f175, %f173, %f174, %f546;
	mov.f32 	%f176, 0f33A22168;
	fma.rn.f32 	%f177, %f173, %f176, %f175;
	mov.f32 	%f178, 0f27C234C5;
	fma.rn.f32 	%f547, %f173, %f178, %f177;
	abs.f32 	%f179, %f546;
	setp.leu.f32	%p13, %f179, 0f47CE4780;
	@%p13 bra 	BB0_19;

	mov.b32 	 %r13, %f546;
	shr.u32 	%r14, %r13, 23;
	shl.b32 	%r125, %r13, 8;
	or.b32  	%r15, %r125, -2147483648;
	add.u64 	%rd41, %SP, 0;
	cvta.to.local.u64 	%rd110, %rd41;
	mov.u32 	%r281, 0;
	mov.u64 	%rd109, __cudart_i2opi_f;
	mov.u32 	%r280, -6;

BB0_10:
	.pragma "nounroll";
	ld.const.u32 	%r128, [%rd109];
	// inline asm
	{
	mad.lo.cc.u32   %r126, %r128, %r15, %r281;
	madc.hi.u32     %r281, %r128, %r15,  0;
	}
	// inline asm
	st.local.u32 	[%rd110], %r126;
	add.s64 	%rd110, %rd110, 4;
	add.s64 	%rd109, %rd109, 4;
	add.s32 	%r280, %r280, 1;
	setp.ne.s32	%p14, %r280, 0;
	@%p14 bra 	BB0_10;

	and.b32  	%r131, %r14, 255;
	add.s32 	%r132, %r131, -128;
	shr.u32 	%r133, %r132, 5;
	and.b32  	%r20, %r13, -2147483648;
	cvta.to.local.u64 	%rd43, %rd41;
	st.local.u32 	[%rd43+24], %r281;
	mov.u32 	%r134, 6;
	sub.s32 	%r135, %r134, %r133;
	mul.wide.s32 	%rd44, %r135, 4;
	add.s64 	%rd8, %rd43, %rd44;
	ld.local.u32 	%r282, [%rd8];
	ld.local.u32 	%r283, [%rd8+-4];
	and.b32  	%r23, %r14, 31;
	setp.eq.s32	%p15, %r23, 0;
	@%p15 bra 	BB0_13;

	mov.u32 	%r136, 32;
	sub.s32 	%r137, %r136, %r23;
	shr.u32 	%r138, %r283, %r137;
	shl.b32 	%r139, %r282, %r23;
	add.s32 	%r282, %r138, %r139;
	ld.local.u32 	%r140, [%rd8+-8];
	shr.u32 	%r141, %r140, %r137;
	shl.b32 	%r142, %r283, %r23;
	add.s32 	%r283, %r141, %r142;

BB0_13:
	shr.u32 	%r143, %r283, 30;
	shl.b32 	%r144, %r282, 2;
	add.s32 	%r284, %r143, %r144;
	shl.b32 	%r29, %r283, 2;
	shr.u32 	%r145, %r284, 31;
	shr.u32 	%r146, %r282, 30;
	add.s32 	%r30, %r145, %r146;
	setp.eq.s32	%p16, %r145, 0;
	@%p16 bra 	BB0_14;
	bra.uni 	BB0_15;

BB0_14:
	mov.u32 	%r285, %r20;
	mov.u32 	%r286, %r29;
	bra.uni 	BB0_16;

BB0_15:
	not.b32 	%r147, %r284;
	neg.s32 	%r286, %r29;
	setp.eq.s32	%p17, %r29, 0;
	selp.u32	%r148, 1, 0, %p17;
	add.s32 	%r284, %r148, %r147;
	xor.b32  	%r285, %r20, -2147483648;

BB0_16:
	clz.b32 	%r288, %r284;
	setp.eq.s32	%p18, %r288, 0;
	shl.b32 	%r149, %r284, %r288;
	mov.u32 	%r150, 32;
	sub.s32 	%r151, %r150, %r288;
	shr.u32 	%r152, %r286, %r151;
	add.s32 	%r153, %r152, %r149;
	selp.b32	%r38, %r284, %r153, %p18;
	mov.u32 	%r154, -921707870;
	mul.hi.u32 	%r287, %r38, %r154;
	setp.eq.s32	%p19, %r20, 0;
	neg.s32 	%r155, %r30;
	selp.b32	%r289, %r30, %r155, %p19;
	setp.lt.s32	%p20, %r287, 1;
	@%p20 bra 	BB0_18;

	mul.lo.s32 	%r156, %r38, -921707870;
	shr.u32 	%r157, %r156, 31;
	shl.b32 	%r158, %r287, 1;
	add.s32 	%r287, %r157, %r158;
	add.s32 	%r288, %r288, 1;

BB0_18:
	mov.u32 	%r159, 126;
	sub.s32 	%r160, %r159, %r288;
	shl.b32 	%r161, %r160, 23;
	add.s32 	%r162, %r287, 1;
	shr.u32 	%r163, %r162, 7;
	add.s32 	%r164, %r163, 1;
	shr.u32 	%r165, %r164, 1;
	add.s32 	%r166, %r165, %r161;
	or.b32  	%r167, %r166, %r285;
	mov.b32 	 %f547, %r167;

BB0_19:
	mul.rn.f32 	%f31, %f547, %f547;
	add.s32 	%r46, %r289, 1;
	and.b32  	%r47, %r46, 1;
	setp.eq.s32	%p21, %r47, 0;
	@%p21 bra 	BB0_21;
	bra.uni 	BB0_20;

BB0_21:
	mov.f32 	%f182, 0f3C08839E;
	mov.f32 	%f183, 0fB94CA1F9;
	fma.rn.f32 	%f548, %f183, %f31, %f182;
	bra.uni 	BB0_22;

BB0_20:
	mov.f32 	%f180, 0fBAB6061A;
	mov.f32 	%f181, 0f37CCF5CE;
	fma.rn.f32 	%f548, %f181, %f31, %f180;

BB0_22:
	@%p21 bra 	BB0_24;
	bra.uni 	BB0_23;

BB0_24:
	mov.f32 	%f187, 0fBE2AAAA3;
	fma.rn.f32 	%f188, %f548, %f31, %f187;
	mov.f32 	%f189, 0f00000000;
	fma.rn.f32 	%f549, %f188, %f31, %f189;
	bra.uni 	BB0_25;

BB0_23:
	mov.f32 	%f184, 0f3D2AAAA5;
	fma.rn.f32 	%f185, %f548, %f31, %f184;
	mov.f32 	%f186, 0fBF000000;
	fma.rn.f32 	%f549, %f185, %f31, %f186;

BB0_25:
	fma.rn.f32 	%f550, %f549, %f547, %f547;
	@%p21 bra 	BB0_27;

	mov.f32 	%f190, 0f3F800000;
	fma.rn.f32 	%f550, %f549, %f31, %f190;

BB0_27:
	and.b32  	%r168, %r46, 2;
	setp.eq.s32	%p24, %r168, 0;
	@%p24 bra 	BB0_29;

	mov.f32 	%f191, 0f00000000;
	mov.f32 	%f192, 0fBF800000;
	fma.rn.f32 	%f550, %f550, %f192, %f191;

BB0_29:
	@%p12 bra 	BB0_31;

	mov.f32 	%f193, 0f00000000;
	mul.rn.f32 	%f552, %f552, %f193;

BB0_31:
	mul.f32 	%f194, %f552, 0f3F22F983;
	cvt.rni.s32.f32	%r299, %f194;
	cvt.rn.f32.s32	%f195, %r299;
	neg.f32 	%f196, %f195;
	fma.rn.f32 	%f198, %f196, %f174, %f552;
	fma.rn.f32 	%f200, %f196, %f176, %f198;
	fma.rn.f32 	%f553, %f196, %f178, %f200;
	abs.f32 	%f202, %f552;
	setp.leu.f32	%p26, %f202, 0f47CE4780;
	@%p26 bra 	BB0_42;

	mov.b32 	 %r49, %f552;
	shr.u32 	%r50, %r49, 23;
	shl.b32 	%r171, %r49, 8;
	or.b32  	%r51, %r171, -2147483648;
	add.u64 	%rd46, %SP, 0;
	cvta.to.local.u64 	%rd112, %rd46;
	mov.u32 	%r291, 0;
	mov.u64 	%rd111, __cudart_i2opi_f;
	mov.u32 	%r290, -6;

BB0_33:
	.pragma "nounroll";
	ld.const.u32 	%r174, [%rd111];
	// inline asm
	{
	mad.lo.cc.u32   %r172, %r174, %r51, %r291;
	madc.hi.u32     %r291, %r174, %r51,  0;
	}
	// inline asm
	st.local.u32 	[%rd112], %r172;
	add.s64 	%rd112, %rd112, 4;
	add.s64 	%rd111, %rd111, 4;
	add.s32 	%r290, %r290, 1;
	setp.ne.s32	%p27, %r290, 0;
	@%p27 bra 	BB0_33;

	and.b32  	%r177, %r50, 255;
	add.s32 	%r178, %r177, -128;
	shr.u32 	%r179, %r178, 5;
	and.b32  	%r56, %r49, -2147483648;
	cvta.to.local.u64 	%rd48, %rd46;
	st.local.u32 	[%rd48+24], %r291;
	mov.u32 	%r180, 6;
	sub.s32 	%r181, %r180, %r179;
	mul.wide.s32 	%rd49, %r181, 4;
	add.s64 	%rd14, %rd48, %rd49;
	ld.local.u32 	%r292, [%rd14];
	ld.local.u32 	%r293, [%rd14+-4];
	and.b32  	%r59, %r50, 31;
	setp.eq.s32	%p28, %r59, 0;
	@%p28 bra 	BB0_36;

	mov.u32 	%r182, 32;
	sub.s32 	%r183, %r182, %r59;
	shr.u32 	%r184, %r293, %r183;
	shl.b32 	%r185, %r292, %r59;
	add.s32 	%r292, %r184, %r185;
	ld.local.u32 	%r186, [%rd14+-8];
	shr.u32 	%r187, %r186, %r183;
	shl.b32 	%r188, %r293, %r59;
	add.s32 	%r293, %r187, %r188;

BB0_36:
	shr.u32 	%r189, %r293, 30;
	shl.b32 	%r190, %r292, 2;
	add.s32 	%r294, %r189, %r190;
	shl.b32 	%r65, %r293, 2;
	shr.u32 	%r191, %r294, 31;
	shr.u32 	%r192, %r292, 30;
	add.s32 	%r66, %r191, %r192;
	setp.eq.s32	%p29, %r191, 0;
	@%p29 bra 	BB0_37;
	bra.uni 	BB0_38;

BB0_37:
	mov.u32 	%r295, %r56;
	mov.u32 	%r296, %r65;
	bra.uni 	BB0_39;

BB0_38:
	not.b32 	%r193, %r294;
	neg.s32 	%r296, %r65;
	setp.eq.s32	%p30, %r65, 0;
	selp.u32	%r194, 1, 0, %p30;
	add.s32 	%r294, %r194, %r193;
	xor.b32  	%r295, %r56, -2147483648;

BB0_39:
	clz.b32 	%r298, %r294;
	setp.eq.s32	%p31, %r298, 0;
	shl.b32 	%r195, %r294, %r298;
	mov.u32 	%r196, 32;
	sub.s32 	%r197, %r196, %r298;
	shr.u32 	%r198, %r296, %r197;
	add.s32 	%r199, %r198, %r195;
	selp.b32	%r74, %r294, %r199, %p31;
	mov.u32 	%r200, -921707870;
	mul.hi.u32 	%r297, %r74, %r200;
	setp.eq.s32	%p32, %r56, 0;
	neg.s32 	%r201, %r66;
	selp.b32	%r299, %r66, %r201, %p32;
	setp.lt.s32	%p33, %r297, 1;
	@%p33 bra 	BB0_41;

	mul.lo.s32 	%r202, %r74, -921707870;
	shr.u32 	%r203, %r202, 31;
	shl.b32 	%r204, %r297, 1;
	add.s32 	%r297, %r203, %r204;
	add.s32 	%r298, %r298, 1;

BB0_41:
	mov.u32 	%r205, 126;
	sub.s32 	%r206, %r205, %r298;
	shl.b32 	%r207, %r206, 23;
	add.s32 	%r208, %r297, 1;
	shr.u32 	%r209, %r208, 7;
	add.s32 	%r210, %r209, 1;
	shr.u32 	%r211, %r210, 1;
	add.s32 	%r212, %r211, %r207;
	or.b32  	%r213, %r212, %r295;
	mov.b32 	 %f553, %r213;

BB0_42:
	mul.rn.f32 	%f48, %f553, %f553;
	and.b32  	%r82, %r299, 1;
	setp.eq.s32	%p34, %r82, 0;
	@%p34 bra 	BB0_44;
	bra.uni 	BB0_43;

BB0_44:
	mov.f32 	%f205, 0f3C08839E;
	mov.f32 	%f206, 0fB94CA1F9;
	fma.rn.f32 	%f554, %f206, %f48, %f205;
	bra.uni 	BB0_45;

BB0_43:
	mov.f32 	%f203, 0fBAB6061A;
	mov.f32 	%f204, 0f37CCF5CE;
	fma.rn.f32 	%f554, %f204, %f48, %f203;

BB0_45:
	@%p34 bra 	BB0_47;
	bra.uni 	BB0_46;

BB0_47:
	mov.f32 	%f210, 0fBE2AAAA3;
	fma.rn.f32 	%f211, %f554, %f48, %f210;
	mov.f32 	%f212, 0f00000000;
	fma.rn.f32 	%f555, %f211, %f48, %f212;
	bra.uni 	BB0_48;

BB0_46:
	mov.f32 	%f207, 0f3D2AAAA5;
	fma.rn.f32 	%f208, %f554, %f48, %f207;
	mov.f32 	%f209, 0fBF000000;
	fma.rn.f32 	%f555, %f208, %f48, %f209;

BB0_48:
	fma.rn.f32 	%f556, %f555, %f553, %f553;
	@%p34 bra 	BB0_50;

	mov.f32 	%f213, 0f3F800000;
	fma.rn.f32 	%f556, %f555, %f48, %f213;

BB0_50:
	and.b32  	%r214, %r299, 2;
	setp.eq.s32	%p37, %r214, 0;
	@%p37 bra 	BB0_52;

	mov.f32 	%f214, 0f00000000;
	mov.f32 	%f215, 0fBF800000;
	fma.rn.f32 	%f556, %f556, %f215, %f214;

BB0_52:
	mul.f32 	%f216, %f23, %f550;
	mul.f32 	%f217, %f216, %f216;
	mov.f32 	%f218, 0f3F800000;
	sub.f32 	%f219, %f218, %f217;
	mul.f32 	%f220, %f23, %f556;
	mul.f32 	%f221, %f220, %f220;
	sub.f32 	%f222, %f219, %f221;
	mov.f32 	%f223, 0f00000000;
	max.f32 	%f224, %f223, %f222;
	sqrt.rn.f32 	%f225, %f224;
	mul.f32 	%f226, %f10, %f220;
	mul.f32 	%f227, %f11, %f220;
	mul.f32 	%f228, %f12, %f220;
	fma.rn.f32 	%f229, %f19, %f216, %f226;
	fma.rn.f32 	%f230, %f18, %f216, %f227;
	fma.rn.f32 	%f231, %f17, %f216, %f228;
	fma.rn.f32 	%f60, %f541, %f225, %f229;
	fma.rn.f32 	%f61, %f542, %f225, %f230;
	fma.rn.f32 	%f62, %f543, %f225, %f231;
	setp.gt.f32	%p38, %f61, 0f00000000;
	setp.eq.s32	%p39, %r5, 0;
	or.pred  	%p40, %p39, %p38;
	@!%p40 bra 	BB0_54;
	bra.uni 	BB0_53;

BB0_53:
	add.u64 	%rd50, %SP, 28;
	cvta.to.local.u64 	%rd51, %rd50;
	max.f32 	%f238, %f244, %f141;
	mov.u32 	%r218, 1065353216;
	st.local.u32 	[%rd51], %r218;
	ld.global.u32 	%r215, [root];
	mov.u32 	%r216, 1;
	mov.f32 	%f239, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r215, %f7, %f8, %f9, %f60, %f61, %f62, %r216, %f238, %f239, %rd50, %r92);
	// inline asm
	ld.local.f32 	%f246, [%rd51];
	add.f32 	%f558, %f558, %f246;

BB0_54:
	add.s32 	%r278, %r278, 1;
	setp.lt.s32	%p41, %r278, %r1;
	@%p41 bra 	BB0_6;

	add.s32 	%r276, %r276, 1;
	setp.lt.s32	%p42, %r276, %r1;
	@%p42 bra 	BB0_5;

BB0_56:
	mul.lo.s32 	%r219, %r1, %r1;
	cvt.rn.f32.s32	%f247, %r219;
	div.rn.f32 	%f248, %f558, %f247;
	ld.global.f32 	%f249, [skyColor];
	mul.f32 	%f66, %f248, %f249;
	ld.global.f32 	%f250, [skyColor+4];
	mul.f32 	%f67, %f248, %f250;
	ld.global.f32 	%f251, [skyColor+8];
	mul.f32 	%f68, %f248, %f251;
	ld.global.u32 	%r300, [imageEnabled];
	and.b32  	%r220, %r300, 1;
	setp.eq.b32	%p43, %r220, 1;
	@!%p43 bra 	BB0_91;
	bra.uni 	BB0_57;

BB0_57:
	mov.f32 	%f254, 0f3E666666;
	cvt.rzi.f32.f32	%f255, %f254;
	fma.rn.f32 	%f256, %f255, 0fC0000000, 0f3EE66666;
	abs.f32 	%f69, %f256;
	abs.f32 	%f70, %f66;
	setp.lt.f32	%p44, %f70, 0f00800000;
	mul.f32 	%f257, %f70, 0f4B800000;
	selp.f32	%f258, 0fC3170000, 0fC2FE0000, %p44;
	selp.f32	%f259, %f257, %f70, %p44;
	mov.b32 	 %r221, %f259;
	and.b32  	%r222, %r221, 8388607;
	or.b32  	%r223, %r222, 1065353216;
	mov.b32 	 %f260, %r223;
	shr.u32 	%r224, %r221, 23;
	cvt.rn.f32.u32	%f261, %r224;
	add.f32 	%f262, %f258, %f261;
	setp.gt.f32	%p45, %f260, 0f3FB504F3;
	mul.f32 	%f263, %f260, 0f3F000000;
	add.f32 	%f264, %f262, 0f3F800000;
	selp.f32	%f265, %f263, %f260, %p45;
	selp.f32	%f266, %f264, %f262, %p45;
	add.f32 	%f267, %f265, 0fBF800000;
	add.f32 	%f253, %f265, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f252,%f253;
	// inline asm
	add.f32 	%f268, %f267, %f267;
	mul.f32 	%f269, %f252, %f268;
	mul.f32 	%f270, %f269, %f269;
	mov.f32 	%f271, 0f3C4CAF63;
	mov.f32 	%f272, 0f3B18F0FE;
	fma.rn.f32 	%f273, %f272, %f270, %f271;
	mov.f32 	%f274, 0f3DAAAABD;
	fma.rn.f32 	%f275, %f273, %f270, %f274;
	mul.rn.f32 	%f276, %f275, %f270;
	mul.rn.f32 	%f277, %f276, %f269;
	sub.f32 	%f278, %f267, %f269;
	neg.f32 	%f279, %f269;
	add.f32 	%f280, %f278, %f278;
	fma.rn.f32 	%f281, %f279, %f267, %f280;
	mul.rn.f32 	%f282, %f252, %f281;
	add.f32 	%f283, %f277, %f269;
	sub.f32 	%f284, %f269, %f283;
	add.f32 	%f285, %f277, %f284;
	add.f32 	%f286, %f282, %f285;
	add.f32 	%f287, %f283, %f286;
	sub.f32 	%f288, %f283, %f287;
	add.f32 	%f289, %f286, %f288;
	mov.f32 	%f290, 0f3F317200;
	mul.rn.f32 	%f291, %f266, %f290;
	mov.f32 	%f292, 0f35BFBE8E;
	mul.rn.f32 	%f293, %f266, %f292;
	add.f32 	%f294, %f291, %f287;
	sub.f32 	%f295, %f291, %f294;
	add.f32 	%f296, %f287, %f295;
	add.f32 	%f297, %f289, %f296;
	add.f32 	%f298, %f293, %f297;
	add.f32 	%f299, %f294, %f298;
	sub.f32 	%f300, %f294, %f299;
	add.f32 	%f301, %f298, %f300;
	mov.f32 	%f302, 0f3EE66666;
	mul.rn.f32 	%f303, %f302, %f299;
	neg.f32 	%f304, %f303;
	fma.rn.f32 	%f305, %f302, %f299, %f304;
	fma.rn.f32 	%f306, %f302, %f301, %f305;
	mov.f32 	%f307, 0f00000000;
	fma.rn.f32 	%f308, %f307, %f299, %f306;
	add.rn.f32 	%f309, %f303, %f308;
	neg.f32 	%f310, %f309;
	add.rn.f32 	%f311, %f303, %f310;
	add.rn.f32 	%f312, %f311, %f308;
	mov.b32 	 %r225, %f309;
	setp.eq.s32	%p46, %r225, 1118925336;
	add.s32 	%r226, %r225, -1;
	mov.b32 	 %f313, %r226;
	add.f32 	%f314, %f312, 0f37000000;
	selp.f32	%f315, %f313, %f309, %p46;
	selp.f32	%f71, %f314, %f312, %p46;
	mul.f32 	%f316, %f315, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f317, %f316;
	mov.f32 	%f318, 0fBF317200;
	fma.rn.f32 	%f319, %f317, %f318, %f315;
	mov.f32 	%f320, 0fB5BFBE8E;
	fma.rn.f32 	%f321, %f317, %f320, %f319;
	mul.f32 	%f322, %f321, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f323, %f322;
	add.f32 	%f324, %f317, 0f00000000;
	ex2.approx.f32 	%f325, %f324;
	mul.f32 	%f326, %f323, %f325;
	setp.lt.f32	%p47, %f315, 0fC2D20000;
	selp.f32	%f327, 0f00000000, %f326, %p47;
	setp.gt.f32	%p48, %f315, 0f42D20000;
	selp.f32	%f560, 0f7F800000, %f327, %p48;
	setp.eq.f32	%p49, %f560, 0f7F800000;
	@%p49 bra 	BB0_59;

	fma.rn.f32 	%f560, %f560, %f71, %f560;

BB0_59:
	setp.lt.f32	%p50, %f66, 0f00000000;
	setp.eq.f32	%p51, %f69, 0f3F800000;
	and.pred  	%p1, %p50, %p51;
	mov.b32 	 %r227, %f560;
	xor.b32  	%r228, %r227, -2147483648;
	mov.b32 	 %f328, %r228;
	selp.f32	%f562, %f328, %f560, %p1;
	setp.eq.f32	%p52, %f66, 0f00000000;
	@%p52 bra 	BB0_62;
	bra.uni 	BB0_60;

BB0_62:
	add.f32 	%f331, %f66, %f66;
	selp.f32	%f562, %f331, 0f00000000, %p51;
	bra.uni 	BB0_63;

BB0_100:
	mov.u64 	%rd105, image_HDR;
	cvta.global.u64 	%rd100, %rd105;
	mov.u32 	%r271, 8;
	// inline asm
	call (%rd99), _rt_buffer_get_64, (%rd100, %r91, %r271, %rd17, %rd18, %rd24, %rd24);
	// inline asm
	mov.f32 	%f512, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs40, %f512;}

	// inline asm
	mov.u16 	%rs41, 0;
	st.v4.u16 	[%rd99], {%rs40, %rs40, %rs40, %rs41};
	bra.uni 	BB0_101;

BB0_60:
	setp.geu.f32	%p53, %f66, 0f00000000;
	@%p53 bra 	BB0_63;

	cvt.rzi.f32.f32	%f330, %f302;
	setp.neu.f32	%p54, %f330, 0f3EE66666;
	selp.f32	%f562, 0f7FFFFFFF, %f562, %p54;

BB0_63:
	abs.f32 	%f513, %f66;
	add.f32 	%f332, %f513, 0f3EE66666;
	mov.b32 	 %r229, %f332;
	setp.lt.s32	%p56, %r229, 2139095040;
	@%p56 bra 	BB0_68;

	abs.f32 	%f530, %f66;
	setp.gtu.f32	%p57, %f530, 0f7F800000;
	@%p57 bra 	BB0_67;
	bra.uni 	BB0_65;

BB0_67:
	add.f32 	%f562, %f66, 0f3EE66666;
	bra.uni 	BB0_68;

BB0_65:
	abs.f32 	%f531, %f66;
	setp.neu.f32	%p58, %f531, 0f7F800000;
	@%p58 bra 	BB0_68;

	selp.f32	%f562, 0fFF800000, 0f7F800000, %p1;

BB0_68:
	mov.f32 	%f521, 0fB5BFBE8E;
	mov.f32 	%f520, 0fBF317200;
	mov.f32 	%f519, 0f00000000;
	mov.f32 	%f518, 0f35BFBE8E;
	mov.f32 	%f517, 0f3F317200;
	mov.f32 	%f516, 0f3DAAAABD;
	mov.f32 	%f515, 0f3C4CAF63;
	mov.f32 	%f514, 0f3B18F0FE;
	setp.eq.f32	%p59, %f66, 0f3F800000;
	selp.f32	%f82, 0f3F800000, %f562, %p59;
	abs.f32 	%f83, %f67;
	setp.lt.f32	%p60, %f83, 0f00800000;
	mul.f32 	%f335, %f83, 0f4B800000;
	selp.f32	%f336, 0fC3170000, 0fC2FE0000, %p60;
	selp.f32	%f337, %f335, %f83, %p60;
	mov.b32 	 %r230, %f337;
	and.b32  	%r231, %r230, 8388607;
	or.b32  	%r232, %r231, 1065353216;
	mov.b32 	 %f338, %r232;
	shr.u32 	%r233, %r230, 23;
	cvt.rn.f32.u32	%f339, %r233;
	add.f32 	%f340, %f336, %f339;
	setp.gt.f32	%p61, %f338, 0f3FB504F3;
	mul.f32 	%f341, %f338, 0f3F000000;
	add.f32 	%f342, %f340, 0f3F800000;
	selp.f32	%f343, %f341, %f338, %p61;
	selp.f32	%f344, %f342, %f340, %p61;
	add.f32 	%f345, %f343, 0fBF800000;
	add.f32 	%f334, %f343, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f333,%f334;
	// inline asm
	add.f32 	%f346, %f345, %f345;
	mul.f32 	%f347, %f333, %f346;
	mul.f32 	%f348, %f347, %f347;
	fma.rn.f32 	%f351, %f514, %f348, %f515;
	fma.rn.f32 	%f353, %f351, %f348, %f516;
	mul.rn.f32 	%f354, %f353, %f348;
	mul.rn.f32 	%f355, %f354, %f347;
	sub.f32 	%f356, %f345, %f347;
	neg.f32 	%f357, %f347;
	add.f32 	%f358, %f356, %f356;
	fma.rn.f32 	%f359, %f357, %f345, %f358;
	mul.rn.f32 	%f360, %f333, %f359;
	add.f32 	%f361, %f355, %f347;
	sub.f32 	%f362, %f347, %f361;
	add.f32 	%f363, %f355, %f362;
	add.f32 	%f364, %f360, %f363;
	add.f32 	%f365, %f361, %f364;
	sub.f32 	%f366, %f361, %f365;
	add.f32 	%f367, %f364, %f366;
	mul.rn.f32 	%f369, %f344, %f517;
	mul.rn.f32 	%f371, %f344, %f518;
	add.f32 	%f372, %f369, %f365;
	sub.f32 	%f373, %f369, %f372;
	add.f32 	%f374, %f365, %f373;
	add.f32 	%f375, %f367, %f374;
	add.f32 	%f376, %f371, %f375;
	add.f32 	%f377, %f372, %f376;
	sub.f32 	%f378, %f372, %f377;
	add.f32 	%f379, %f376, %f378;
	mul.rn.f32 	%f381, %f302, %f377;
	neg.f32 	%f382, %f381;
	fma.rn.f32 	%f383, %f302, %f377, %f382;
	fma.rn.f32 	%f384, %f302, %f379, %f383;
	fma.rn.f32 	%f386, %f519, %f377, %f384;
	add.rn.f32 	%f387, %f381, %f386;
	neg.f32 	%f388, %f387;
	add.rn.f32 	%f389, %f381, %f388;
	add.rn.f32 	%f390, %f389, %f386;
	mov.b32 	 %r234, %f387;
	setp.eq.s32	%p62, %r234, 1118925336;
	add.s32 	%r235, %r234, -1;
	mov.b32 	 %f391, %r235;
	add.f32 	%f392, %f390, 0f37000000;
	selp.f32	%f393, %f391, %f387, %p62;
	selp.f32	%f84, %f392, %f390, %p62;
	mul.f32 	%f394, %f393, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f395, %f394;
	fma.rn.f32 	%f397, %f395, %f520, %f393;
	fma.rn.f32 	%f399, %f395, %f521, %f397;
	mul.f32 	%f400, %f399, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f401, %f400;
	add.f32 	%f402, %f395, 0f00000000;
	ex2.approx.f32 	%f403, %f402;
	mul.f32 	%f404, %f401, %f403;
	setp.lt.f32	%p63, %f393, 0fC2D20000;
	selp.f32	%f405, 0f00000000, %f404, %p63;
	setp.gt.f32	%p64, %f393, 0f42D20000;
	selp.f32	%f563, 0f7F800000, %f405, %p64;
	setp.eq.f32	%p65, %f563, 0f7F800000;
	@%p65 bra 	BB0_70;

	fma.rn.f32 	%f563, %f563, %f84, %f563;

BB0_70:
	setp.lt.f32	%p66, %f67, 0f00000000;
	and.pred  	%p2, %p66, %p51;
	mov.b32 	 %r236, %f563;
	xor.b32  	%r237, %r236, -2147483648;
	mov.b32 	 %f406, %r237;
	selp.f32	%f565, %f406, %f563, %p2;
	setp.eq.f32	%p68, %f67, 0f00000000;
	@%p68 bra 	BB0_73;
	bra.uni 	BB0_71;

BB0_73:
	add.f32 	%f409, %f67, %f67;
	selp.f32	%f565, %f409, 0f00000000, %p51;
	bra.uni 	BB0_74;

BB0_71:
	setp.geu.f32	%p69, %f67, 0f00000000;
	@%p69 bra 	BB0_74;

	mov.f32 	%f537, 0f3EE66666;
	cvt.rzi.f32.f32	%f408, %f537;
	setp.neu.f32	%p70, %f408, 0f3EE66666;
	selp.f32	%f565, 0f7FFFFFFF, %f565, %p70;

BB0_74:
	abs.f32 	%f532, %f67;
	add.f32 	%f410, %f532, 0f3EE66666;
	mov.b32 	 %r238, %f410;
	setp.lt.s32	%p72, %r238, 2139095040;
	@%p72 bra 	BB0_79;

	abs.f32 	%f535, %f67;
	setp.gtu.f32	%p73, %f535, 0f7F800000;
	@%p73 bra 	BB0_78;
	bra.uni 	BB0_76;

BB0_78:
	add.f32 	%f565, %f67, 0f3EE66666;
	bra.uni 	BB0_79;

BB0_76:
	abs.f32 	%f536, %f67;
	setp.neu.f32	%p74, %f536, 0f7F800000;
	@%p74 bra 	BB0_79;

	selp.f32	%f565, 0fFF800000, 0f7F800000, %p2;

BB0_79:
	mov.f32 	%f533, 0f3EE66666;
	mov.f32 	%f529, 0fB5BFBE8E;
	mov.f32 	%f528, 0fBF317200;
	mov.f32 	%f527, 0f00000000;
	mov.f32 	%f526, 0f35BFBE8E;
	mov.f32 	%f525, 0f3F317200;
	mov.f32 	%f524, 0f3DAAAABD;
	mov.f32 	%f523, 0f3C4CAF63;
	mov.f32 	%f522, 0f3B18F0FE;
	setp.eq.f32	%p75, %f67, 0f3F800000;
	selp.f32	%f95, 0f3F800000, %f565, %p75;
	abs.f32 	%f96, %f68;
	setp.lt.f32	%p76, %f96, 0f00800000;
	mul.f32 	%f413, %f96, 0f4B800000;
	selp.f32	%f414, 0fC3170000, 0fC2FE0000, %p76;
	selp.f32	%f415, %f413, %f96, %p76;
	mov.b32 	 %r239, %f415;
	and.b32  	%r240, %r239, 8388607;
	or.b32  	%r241, %r240, 1065353216;
	mov.b32 	 %f416, %r241;
	shr.u32 	%r242, %r239, 23;
	cvt.rn.f32.u32	%f417, %r242;
	add.f32 	%f418, %f414, %f417;
	setp.gt.f32	%p77, %f416, 0f3FB504F3;
	mul.f32 	%f419, %f416, 0f3F000000;
	add.f32 	%f420, %f418, 0f3F800000;
	selp.f32	%f421, %f419, %f416, %p77;
	selp.f32	%f422, %f420, %f418, %p77;
	add.f32 	%f423, %f421, 0fBF800000;
	add.f32 	%f412, %f421, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f411,%f412;
	// inline asm
	add.f32 	%f424, %f423, %f423;
	mul.f32 	%f425, %f411, %f424;
	mul.f32 	%f426, %f425, %f425;
	fma.rn.f32 	%f429, %f522, %f426, %f523;
	fma.rn.f32 	%f431, %f429, %f426, %f524;
	mul.rn.f32 	%f432, %f431, %f426;
	mul.rn.f32 	%f433, %f432, %f425;
	sub.f32 	%f434, %f423, %f425;
	neg.f32 	%f435, %f425;
	add.f32 	%f436, %f434, %f434;
	fma.rn.f32 	%f437, %f435, %f423, %f436;
	mul.rn.f32 	%f438, %f411, %f437;
	add.f32 	%f439, %f433, %f425;
	sub.f32 	%f440, %f425, %f439;
	add.f32 	%f441, %f433, %f440;
	add.f32 	%f442, %f438, %f441;
	add.f32 	%f443, %f439, %f442;
	sub.f32 	%f444, %f439, %f443;
	add.f32 	%f445, %f442, %f444;
	mul.rn.f32 	%f447, %f422, %f525;
	mul.rn.f32 	%f449, %f422, %f526;
	add.f32 	%f450, %f447, %f443;
	sub.f32 	%f451, %f447, %f450;
	add.f32 	%f452, %f443, %f451;
	add.f32 	%f453, %f445, %f452;
	add.f32 	%f454, %f449, %f453;
	add.f32 	%f455, %f450, %f454;
	sub.f32 	%f456, %f450, %f455;
	add.f32 	%f457, %f454, %f456;
	mul.rn.f32 	%f459, %f533, %f455;
	neg.f32 	%f460, %f459;
	fma.rn.f32 	%f461, %f533, %f455, %f460;
	fma.rn.f32 	%f462, %f533, %f457, %f461;
	fma.rn.f32 	%f464, %f527, %f455, %f462;
	add.rn.f32 	%f465, %f459, %f464;
	neg.f32 	%f466, %f465;
	add.rn.f32 	%f467, %f459, %f466;
	add.rn.f32 	%f468, %f467, %f464;
	mov.b32 	 %r243, %f465;
	setp.eq.s32	%p78, %r243, 1118925336;
	add.s32 	%r244, %r243, -1;
	mov.b32 	 %f469, %r244;
	add.f32 	%f470, %f468, 0f37000000;
	selp.f32	%f471, %f469, %f465, %p78;
	selp.f32	%f97, %f470, %f468, %p78;
	mul.f32 	%f472, %f471, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f473, %f472;
	fma.rn.f32 	%f475, %f473, %f528, %f471;
	fma.rn.f32 	%f477, %f473, %f529, %f475;
	mul.f32 	%f478, %f477, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f479, %f478;
	add.f32 	%f480, %f473, 0f00000000;
	ex2.approx.f32 	%f481, %f480;
	mul.f32 	%f482, %f479, %f481;
	setp.lt.f32	%p79, %f471, 0fC2D20000;
	selp.f32	%f483, 0f00000000, %f482, %p79;
	setp.gt.f32	%p80, %f471, 0f42D20000;
	selp.f32	%f566, 0f7F800000, %f483, %p80;
	setp.eq.f32	%p81, %f566, 0f7F800000;
	@%p81 bra 	BB0_81;

	fma.rn.f32 	%f566, %f566, %f97, %f566;

BB0_81:
	setp.lt.f32	%p82, %f68, 0f00000000;
	and.pred  	%p3, %p82, %p51;
	mov.b32 	 %r245, %f566;
	xor.b32  	%r246, %r245, -2147483648;
	mov.b32 	 %f484, %r246;
	selp.f32	%f568, %f484, %f566, %p3;
	setp.eq.f32	%p84, %f68, 0f00000000;
	@%p84 bra 	BB0_84;
	bra.uni 	BB0_82;

BB0_84:
	add.f32 	%f487, %f68, %f68;
	selp.f32	%f568, %f487, 0f00000000, %p51;
	bra.uni 	BB0_85;

BB0_82:
	setp.geu.f32	%p85, %f68, 0f00000000;
	@%p85 bra 	BB0_85;

	mov.f32 	%f534, 0f3EE66666;
	cvt.rzi.f32.f32	%f486, %f534;
	setp.neu.f32	%p86, %f486, 0f3EE66666;
	selp.f32	%f568, 0f7FFFFFFF, %f568, %p86;

BB0_85:
	abs.f32 	%f538, %f68;
	add.f32 	%f488, %f538, 0f3EE66666;
	mov.b32 	 %r247, %f488;
	setp.lt.s32	%p88, %r247, 2139095040;
	@%p88 bra 	BB0_90;

	abs.f32 	%f539, %f68;
	setp.gtu.f32	%p89, %f539, 0f7F800000;
	@%p89 bra 	BB0_89;
	bra.uni 	BB0_87;

BB0_89:
	add.f32 	%f568, %f68, 0f3EE66666;
	bra.uni 	BB0_90;

BB0_87:
	abs.f32 	%f540, %f68;
	setp.neu.f32	%p90, %f540, 0f7F800000;
	@%p90 bra 	BB0_90;

	selp.f32	%f568, 0fFF800000, 0f7F800000, %p3;

BB0_90:
	mov.u32 	%r273, 4;
	mov.u64 	%rd106, 0;
	mov.u32 	%r272, 2;
	setp.eq.f32	%p91, %f68, 0f3F800000;
	selp.f32	%f489, 0f3F800000, %f568, %p91;
	cvt.u64.u32	%rd55, %r4;
	cvt.u64.u32	%rd54, %r3;
	mov.u64 	%rd58, image;
	cvta.global.u64 	%rd53, %rd58;
	// inline asm
	call (%rd52), _rt_buffer_get_64, (%rd53, %r272, %r273, %rd54, %rd55, %rd106, %rd106);
	// inline asm
	cvt.sat.f32.f32	%f490, %f489;
	mul.f32 	%f491, %f490, 0f437FFD71;
	cvt.rzi.u32.f32	%r250, %f491;
	cvt.sat.f32.f32	%f492, %f95;
	mul.f32 	%f493, %f492, 0f437FFD71;
	cvt.rzi.u32.f32	%r251, %f493;
	cvt.sat.f32.f32	%f494, %f82;
	mul.f32 	%f495, %f494, 0f437FFD71;
	cvt.rzi.u32.f32	%r252, %f495;
	cvt.u16.u32	%rs10, %r250;
	cvt.u16.u32	%rs11, %r252;
	cvt.u16.u32	%rs12, %r251;
	mov.u16 	%rs13, 255;
	st.v4.u8 	[%rd52], {%rs10, %rs12, %rs11, %rs13};
	ld.global.u32 	%r300, [imageEnabled];

BB0_91:
	and.b32  	%r253, %r300, 4;
	setp.eq.s32	%p92, %r253, 0;
	@%p92 bra 	BB0_101;

	ld.global.u32 	%r254, [additive];
	setp.eq.s32	%p93, %r254, 0;
	cvt.u64.u32	%rd15, %r3;
	cvt.u64.u32	%rd16, %r4;
	mov.f32 	%f496, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs14, %f496;}

	// inline asm
	@%p93 bra 	BB0_94;

	mov.u64 	%rd107, 0;
	mov.u32 	%r274, 2;
	mov.u64 	%rd71, image_HDR;
	cvta.global.u64 	%rd60, %rd71;
	mov.u32 	%r258, 8;
	// inline asm
	call (%rd59), _rt_buffer_get_64, (%rd60, %r274, %r258, %rd15, %rd16, %rd107, %rd107);
	// inline asm
	ld.v4.u16 	{%rs21, %rs22, %rs23, %rs24}, [%rd59];
	// inline asm
	{  cvt.f32.f16 %f497, %rs21;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f498, %rs22;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f499, %rs23;}

	// inline asm
	// inline asm
	call (%rd65), _rt_buffer_get_64, (%rd60, %r274, %r258, %rd15, %rd16, %rd107, %rd107);
	// inline asm
	add.f32 	%f500, %f66, %f497;
	add.f32 	%f501, %f67, %f498;
	add.f32 	%f502, %f68, %f499;
	// inline asm
	{  cvt.rn.f16.f32 %rs20, %f502;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs19, %f501;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs18, %f500;}

	// inline asm
	st.v4.u16 	[%rd65], {%rs18, %rs19, %rs20, %rs14};
	bra.uni 	BB0_101;

BB0_94:
	mov.u64 	%rd108, 0;
	mov.u32 	%r275, 2;
	mov.u64 	%rd78, image_HDR;
	cvta.global.u64 	%rd73, %rd78;
	mov.u32 	%r260, 8;
	// inline asm
	call (%rd72), _rt_buffer_get_64, (%rd73, %r275, %r260, %rd15, %rd16, %rd108, %rd108);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f68;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs26, %f67;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f66;}

	// inline asm
	st.v4.u16 	[%rd72], {%rs25, %rs26, %rs27, %rs14};

BB0_101:
	ret;
}