//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .texref sky;
.global .align 4 .b8 skyColor[12];
.global .align 4 .u32 samples;
.global .align 4 .u32 hemispherical;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8skyColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo13hemisphericalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8skyColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename13hemisphericalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8skyColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum13hemisphericalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8skyColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic13hemisphericalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8skyColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation13hemisphericalE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[40];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<109>;
	.reg .b16 	%rs<42>;
	.reg .f32 	%f<662>;
	.reg .b32 	%r<326>;
	.reg .b64 	%rd<126>;


	mov.u64 	%rd125, __local_depot0;
	cvta.local.u64 	%SP, %rd125;
	ld.global.v2.u32 	{%r102, %r103}, [pixelID];
	cvt.u64.u32	%rd22, %r102;
	cvt.u64.u32	%rd23, %r103;
	mov.u64 	%rd26, uvnormal;
	cvta.global.u64 	%rd21, %rd26;
	mov.u32 	%r100, 2;
	mov.u32 	%r101, 4;
	mov.u64 	%rd25, 0;
	// inline asm
	call (%rd20), _rt_buffer_get_64, (%rd21, %r100, %r101, %rd22, %rd23, %rd25, %rd25);
	// inline asm
	ld.u32 	%r1, [%rd20];
	shr.u32 	%r106, %r1, 16;
	cvt.u16.u32	%rs1, %r106;
	and.b16  	%rs3, %rs1, 255;
	cvt.u16.u32	%rs4, %r1;
	or.b16  	%rs5, %rs4, %rs3;
	setp.eq.s16	%p4, %rs5, 0;
	mov.f32 	%f622, 0f00000000;
	mov.f32 	%f623, %f622;
	mov.f32 	%f624, %f622;
	@%p4 bra 	BB0_2;

	ld.u8 	%rs6, [%rd20+1];
	and.b16  	%rs8, %rs4, 255;
	cvt.rn.f32.u16	%f131, %rs8;
	div.rn.f32 	%f132, %f131, 0f437F0000;
	fma.rn.f32 	%f133, %f132, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f134, %rs6;
	div.rn.f32 	%f135, %f134, 0f437F0000;
	fma.rn.f32 	%f136, %f135, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f137, %rs3;
	div.rn.f32 	%f138, %f137, 0f437F0000;
	fma.rn.f32 	%f139, %f138, 0f40000000, 0fBF800000;
	mul.f32 	%f140, %f136, %f136;
	fma.rn.f32 	%f141, %f133, %f133, %f140;
	fma.rn.f32 	%f142, %f139, %f139, %f141;
	sqrt.rn.f32 	%f143, %f142;
	rcp.rn.f32 	%f144, %f143;
	mul.f32 	%f622, %f133, %f144;
	mul.f32 	%f623, %f136, %f144;
	mul.f32 	%f624, %f139, %f144;

BB0_2:
	ld.global.v2.u32 	{%r107, %r108}, [pixelID];
	ld.global.v2.u32 	{%r110, %r111}, [tileInfo];
	add.s32 	%r2, %r107, %r110;
	add.s32 	%r3, %r108, %r111;
	setp.eq.f32	%p5, %f623, 0f00000000;
	setp.eq.f32	%p6, %f622, 0f00000000;
	and.pred  	%p7, %p6, %p5;
	setp.eq.f32	%p8, %f624, 0f00000000;
	and.pred  	%p9, %p7, %p8;
	@%p9 bra 	BB0_102;
	bra.uni 	BB0_3;

BB0_102:
	ld.global.u32 	%r325, [imageEnabled];
	and.b32  	%r279, %r325, 1;
	setp.eq.b32	%p106, %r279, 1;
	@!%p106 bra 	BB0_104;
	bra.uni 	BB0_103;

BB0_103:
	cvt.u64.u32	%rd93, %r2;
	cvt.u64.u32	%rd94, %r3;
	mov.u64 	%rd97, image;
	cvta.global.u64 	%rd92, %rd97;
	mov.u64 	%rd96, 0;
	// inline asm
	call (%rd91), _rt_buffer_get_64, (%rd92, %r100, %r101, %rd93, %rd94, %rd96, %rd96);
	// inline asm
	mov.u16 	%rs28, 0;
	st.v4.u8 	[%rd91], {%rs28, %rs28, %rs28, %rs28};
	ld.global.u32 	%r325, [imageEnabled];

BB0_104:
	and.b32  	%r282, %r325, 4;
	setp.eq.s32	%p107, %r282, 0;
	@%p107 bra 	BB0_108;

	ld.global.u32 	%r283, [additive];
	setp.eq.s32	%p108, %r283, 0;
	cvt.u64.u32	%rd18, %r2;
	cvt.u64.u32	%rd19, %r3;
	@%p108 bra 	BB0_107;

	mov.u64 	%rd110, image_HDR;
	cvta.global.u64 	%rd99, %rd110;
	mov.u32 	%r287, 8;
	mov.u64 	%rd109, 0;
	// inline asm
	call (%rd98), _rt_buffer_get_64, (%rd99, %r100, %r287, %rd18, %rd19, %rd109, %rd109);
	// inline asm
	ld.v4.u16 	{%rs35, %rs36, %rs37, %rs38}, [%rd98];
	// inline asm
	{  cvt.f32.f16 %f594, %rs35;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f595, %rs36;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f596, %rs37;}

	// inline asm
	// inline asm
	call (%rd104), _rt_buffer_get_64, (%rd99, %r100, %r287, %rd18, %rd19, %rd109, %rd109);
	// inline asm
	add.f32 	%f597, %f594, 0f00000000;
	add.f32 	%f598, %f595, 0f00000000;
	add.f32 	%f599, %f596, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f599;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs33, %f598;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs32, %f597;}

	// inline asm
	mov.u16 	%rs39, 0;
	st.v4.u16 	[%rd104], {%rs32, %rs33, %rs34, %rs39};
	bra.uni 	BB0_108;

BB0_3:
	ld.global.v2.u32 	{%r119, %r120}, [pixelID];
	cvt.u64.u32	%rd29, %r119;
	cvt.u64.u32	%rd30, %r120;
	mov.u64 	%rd39, uvpos;
	cvta.global.u64 	%rd28, %rd39;
	mov.u32 	%r116, 12;
	// inline asm
	call (%rd27), _rt_buffer_get_64, (%rd28, %r100, %r116, %rd29, %rd30, %rd25, %rd25);
	// inline asm
	ld.f32 	%f148, [%rd27+8];
	ld.f32 	%f149, [%rd27+4];
	ld.f32 	%f150, [%rd27];
	mul.f32 	%f151, %f150, 0f3456BF95;
	mul.f32 	%f152, %f149, 0f3456BF95;
	mul.f32 	%f153, %f148, 0f3456BF95;
	abs.f32 	%f154, %f622;
	div.rn.f32 	%f155, %f151, %f154;
	abs.f32 	%f156, %f623;
	div.rn.f32 	%f157, %f152, %f156;
	abs.f32 	%f158, %f624;
	div.rn.f32 	%f159, %f153, %f158;
	abs.f32 	%f160, %f155;
	abs.f32 	%f161, %f157;
	abs.f32 	%f162, %f159;
	mov.f32 	%f163, 0f38D1B717;
	max.f32 	%f164, %f160, %f163;
	max.f32 	%f165, %f161, %f163;
	max.f32 	%f166, %f162, %f163;
	fma.rn.f32 	%f7, %f622, %f164, %f150;
	fma.rn.f32 	%f8, %f623, %f165, %f149;
	fma.rn.f32 	%f9, %f624, %f166, %f148;
	ld.global.u32 	%r4, [hemispherical];
	setp.gt.f32	%p10, %f154, %f158;
	neg.f32 	%f167, %f623;
	selp.f32	%f168, %f167, 0f00000000, %p10;
	neg.f32 	%f169, %f624;
	selp.f32	%f170, %f622, %f169, %p10;
	selp.f32	%f171, 0f00000000, %f623, %p10;
	mul.f32 	%f172, %f170, %f170;
	fma.rn.f32 	%f173, %f168, %f168, %f172;
	fma.rn.f32 	%f174, %f171, %f171, %f173;
	sqrt.rn.f32 	%f175, %f174;
	rcp.rn.f32 	%f176, %f175;
	mul.f32 	%f10, %f168, %f176;
	mul.f32 	%f11, %f170, %f176;
	mul.f32 	%f12, %f171, %f176;
	ld.global.v2.u32 	{%r123, %r124}, [pixelID];
	cvt.u64.u32	%rd35, %r123;
	cvt.u64.u32	%rd36, %r124;
	mov.u64 	%rd40, rnd_seeds;
	cvta.global.u64 	%rd34, %rd40;
	// inline asm
	call (%rd33), _rt_buffer_get_64, (%rd34, %r100, %r101, %rd35, %rd36, %rd25, %rd25);
	// inline asm
	ld.global.u32 	%r320, [samples];
	mov.f32 	%f646, 0f00000000;
	setp.lt.s32	%p11, %r320, 1;
	@%p11 bra 	BB0_4;

	cvt.rn.f32.s32	%f180, %r320;
	rcp.rn.f32 	%f13, %f180;
	ld.u32 	%r322, [%rd33];
	mul.f32 	%f14, %f7, 0f3456BF95;
	mul.f32 	%f15, %f8, 0f3456BF95;
	mul.f32 	%f16, %f9, 0f3456BF95;
	mul.f32 	%f181, %f622, %f11;
	mul.f32 	%f182, %f623, %f10;
	sub.f32 	%f17, %f182, %f181;
	mul.f32 	%f183, %f624, %f10;
	mul.f32 	%f184, %f622, %f12;
	sub.f32 	%f18, %f184, %f183;
	mul.f32 	%f185, %f623, %f12;
	mul.f32 	%f186, %f624, %f11;
	sub.f32 	%f19, %f186, %f185;
	mov.f32 	%f646, 0f00000000;
	mov.u32 	%r295, 0;
	abs.f32 	%f256, %f14;
	abs.f32 	%f257, %f15;
	max.f32 	%f258, %f256, %f257;
	abs.f32 	%f259, %f16;
	max.f32 	%f260, %f258, %f259;
	mov.f32 	%f645, %f646;
	mov.f32 	%f644, %f646;

BB0_6:
	setp.lt.s32	%p12, %r320, 1;
	@%p12 bra 	BB0_62;

	cvt.rn.f32.s32	%f23, %r295;
	mov.u32 	%r298, 0;

BB0_8:
	mad.lo.s32 	%r129, %r322, 1664525, 1013904223;
	and.b32  	%r130, %r129, 16777215;
	cvt.rn.f32.u32	%f187, %r130;
	fma.rn.f32 	%f188, %f187, 0f33800000, %f23;
	mul.f32 	%f189, %f13, %f188;
	mad.lo.s32 	%r322, %r129, 1664525, 1013904223;
	and.b32  	%r131, %r322, 16777215;
	cvt.rn.f32.u32	%f190, %r131;
	cvt.rn.f32.s32	%f191, %r298;
	fma.rn.f32 	%f192, %f190, 0f33800000, %f191;
	mul.f32 	%f193, %f13, %f192;
	sqrt.rn.f32 	%f27, %f189;
	mul.f32 	%f637, %f193, 0f40C90FDB;
	abs.f32 	%f29, %f637;
	setp.neu.f32	%p13, %f29, 0f7F800000;
	mov.f32 	%f631, %f637;
	@%p13 bra 	BB0_10;

	mov.f32 	%f194, 0f00000000;
	mul.rn.f32 	%f631, %f637, %f194;

BB0_10:
	mul.f32 	%f195, %f631, 0f3F22F983;
	cvt.rni.s32.f32	%r309, %f195;
	cvt.rn.f32.s32	%f196, %r309;
	neg.f32 	%f197, %f196;
	mov.f32 	%f198, 0f3FC90FDA;
	fma.rn.f32 	%f199, %f197, %f198, %f631;
	mov.f32 	%f200, 0f33A22168;
	fma.rn.f32 	%f201, %f197, %f200, %f199;
	mov.f32 	%f202, 0f27C234C5;
	fma.rn.f32 	%f632, %f197, %f202, %f201;
	abs.f32 	%f203, %f631;
	setp.leu.f32	%p14, %f203, 0f47CE4780;
	@%p14 bra 	BB0_21;

	add.u64 	%rd42, %SP, 0;
	cvta.to.local.u64 	%rd3, %rd42;
	mov.b32 	 %r15, %f631;
	shr.u32 	%r16, %r15, 23;
	shl.b32 	%r134, %r15, 8;
	or.b32  	%r17, %r134, -2147483648;
	mov.u32 	%r300, 0;
	mov.u64 	%rd122, 0;
	mov.u64 	%rd121, %rd3;
	mov.u32 	%r301, %r300;

BB0_12:
	.pragma "nounroll";
	shl.b64 	%rd43, %rd122, 2;
	mov.u64 	%rd44, __cudart_i2opi_f;
	add.s64 	%rd45, %rd44, %rd43;
	ld.const.u32 	%r137, [%rd45];
	// inline asm
	{
	mad.lo.cc.u32   %r135, %r137, %r17, %r301;
	madc.hi.u32     %r301, %r137, %r17,  0;
	}
	// inline asm
	st.local.u32 	[%rd121], %r135;
	add.s32 	%r300, %r300, 1;
	cvt.s64.s32	%rd122, %r300;
	mul.wide.s32 	%rd48, %r300, 4;
	add.s64 	%rd121, %rd3, %rd48;
	setp.ne.s32	%p15, %r300, 6;
	@%p15 bra 	BB0_12;

	and.b32  	%r140, %r16, 255;
	add.s32 	%r141, %r140, -128;
	shr.u32 	%r142, %r141, 5;
	and.b32  	%r22, %r15, -2147483648;
	cvta.to.local.u64 	%rd50, %rd42;
	st.local.u32 	[%rd50+24], %r301;
	mov.u32 	%r143, 6;
	sub.s32 	%r144, %r143, %r142;
	mul.wide.s32 	%rd51, %r144, 4;
	add.s64 	%rd8, %rd50, %rd51;
	ld.local.u32 	%r302, [%rd8];
	ld.local.u32 	%r303, [%rd8+-4];
	and.b32  	%r25, %r16, 31;
	setp.eq.s32	%p16, %r25, 0;
	@%p16 bra 	BB0_15;

	mov.u32 	%r145, 32;
	sub.s32 	%r146, %r145, %r25;
	shr.u32 	%r147, %r303, %r146;
	shl.b32 	%r148, %r302, %r25;
	add.s32 	%r302, %r147, %r148;
	ld.local.u32 	%r149, [%rd8+-8];
	shr.u32 	%r150, %r149, %r146;
	shl.b32 	%r151, %r303, %r25;
	add.s32 	%r303, %r150, %r151;

BB0_15:
	shr.u32 	%r152, %r303, 30;
	shl.b32 	%r153, %r302, 2;
	add.s32 	%r304, %r152, %r153;
	shl.b32 	%r31, %r303, 2;
	shr.u32 	%r154, %r304, 31;
	shr.u32 	%r155, %r302, 30;
	add.s32 	%r32, %r154, %r155;
	setp.eq.s32	%p17, %r154, 0;
	@%p17 bra 	BB0_16;
	bra.uni 	BB0_17;

BB0_16:
	mov.u32 	%r305, %r22;
	mov.u32 	%r306, %r31;
	bra.uni 	BB0_18;

BB0_17:
	not.b32 	%r156, %r304;
	neg.s32 	%r306, %r31;
	setp.eq.s32	%p18, %r31, 0;
	selp.u32	%r157, 1, 0, %p18;
	add.s32 	%r304, %r157, %r156;
	xor.b32  	%r305, %r22, -2147483648;

BB0_18:
	clz.b32 	%r308, %r304;
	setp.eq.s32	%p19, %r308, 0;
	shl.b32 	%r158, %r304, %r308;
	mov.u32 	%r159, 32;
	sub.s32 	%r160, %r159, %r308;
	shr.u32 	%r161, %r306, %r160;
	add.s32 	%r162, %r161, %r158;
	selp.b32	%r40, %r304, %r162, %p19;
	mov.u32 	%r163, -921707870;
	mul.hi.u32 	%r307, %r40, %r163;
	setp.eq.s32	%p20, %r22, 0;
	neg.s32 	%r164, %r32;
	selp.b32	%r309, %r32, %r164, %p20;
	setp.lt.s32	%p21, %r307, 1;
	@%p21 bra 	BB0_20;

	mul.lo.s32 	%r165, %r40, -921707870;
	shr.u32 	%r166, %r165, 31;
	shl.b32 	%r167, %r307, 1;
	add.s32 	%r307, %r166, %r167;
	add.s32 	%r308, %r308, 1;

BB0_20:
	mov.u32 	%r168, 126;
	sub.s32 	%r169, %r168, %r308;
	shl.b32 	%r170, %r169, 23;
	add.s32 	%r171, %r307, 1;
	shr.u32 	%r172, %r171, 7;
	add.s32 	%r173, %r172, 1;
	shr.u32 	%r174, %r173, 1;
	add.s32 	%r175, %r174, %r170;
	or.b32  	%r176, %r175, %r305;
	mov.b32 	 %f632, %r176;

BB0_21:
	mul.rn.f32 	%f35, %f632, %f632;
	add.s32 	%r48, %r309, 1;
	and.b32  	%r49, %r48, 1;
	setp.eq.s32	%p22, %r49, 0;
	@%p22 bra 	BB0_23;
	bra.uni 	BB0_22;

BB0_23:
	mov.f32 	%f206, 0f3C08839E;
	mov.f32 	%f207, 0fB94CA1F9;
	fma.rn.f32 	%f633, %f207, %f35, %f206;
	bra.uni 	BB0_24;

BB0_22:
	mov.f32 	%f204, 0fBAB6061A;
	mov.f32 	%f205, 0f37CCF5CE;
	fma.rn.f32 	%f633, %f205, %f35, %f204;

BB0_24:
	@%p22 bra 	BB0_26;
	bra.uni 	BB0_25;

BB0_26:
	mov.f32 	%f211, 0fBE2AAAA3;
	fma.rn.f32 	%f212, %f633, %f35, %f211;
	mov.f32 	%f213, 0f00000000;
	fma.rn.f32 	%f634, %f212, %f35, %f213;
	bra.uni 	BB0_27;

BB0_25:
	mov.f32 	%f208, 0f3D2AAAA5;
	fma.rn.f32 	%f209, %f633, %f35, %f208;
	mov.f32 	%f210, 0fBF000000;
	fma.rn.f32 	%f634, %f209, %f35, %f210;

BB0_27:
	fma.rn.f32 	%f635, %f634, %f632, %f632;
	@%p22 bra 	BB0_29;

	mov.f32 	%f214, 0f3F800000;
	fma.rn.f32 	%f635, %f634, %f35, %f214;

BB0_29:
	and.b32  	%r177, %r48, 2;
	setp.eq.s32	%p25, %r177, 0;
	@%p25 bra 	BB0_31;

	mov.f32 	%f215, 0f00000000;
	mov.f32 	%f216, 0fBF800000;
	fma.rn.f32 	%f635, %f635, %f216, %f215;

BB0_31:
	@%p13 bra 	BB0_33;

	mov.f32 	%f217, 0f00000000;
	mul.rn.f32 	%f637, %f637, %f217;

BB0_33:
	mul.f32 	%f218, %f637, 0f3F22F983;
	cvt.rni.s32.f32	%r319, %f218;
	cvt.rn.f32.s32	%f219, %r319;
	neg.f32 	%f220, %f219;
	fma.rn.f32 	%f222, %f220, %f198, %f637;
	fma.rn.f32 	%f224, %f220, %f200, %f222;
	fma.rn.f32 	%f638, %f220, %f202, %f224;
	abs.f32 	%f226, %f637;
	setp.leu.f32	%p27, %f226, 0f47CE4780;
	@%p27 bra 	BB0_44;

	add.u64 	%rd53, %SP, 0;
	cvta.to.local.u64 	%rd9, %rd53;
	mov.b32 	 %r51, %f637;
	shr.u32 	%r52, %r51, 23;
	shl.b32 	%r180, %r51, 8;
	or.b32  	%r53, %r180, -2147483648;
	mov.u32 	%r310, 0;
	mov.u64 	%rd123, %rd9;
	mov.u64 	%rd124, %rd25;
	mov.u32 	%r311, %r310;

BB0_35:
	.pragma "nounroll";
	shl.b64 	%rd54, %rd124, 2;
	mov.u64 	%rd55, __cudart_i2opi_f;
	add.s64 	%rd56, %rd55, %rd54;
	ld.const.u32 	%r183, [%rd56];
	// inline asm
	{
	mad.lo.cc.u32   %r181, %r183, %r53, %r311;
	madc.hi.u32     %r311, %r183, %r53,  0;
	}
	// inline asm
	st.local.u32 	[%rd123], %r181;
	add.s32 	%r310, %r310, 1;
	cvt.s64.s32	%rd124, %r310;
	mul.wide.s32 	%rd57, %r310, 4;
	add.s64 	%rd123, %rd9, %rd57;
	setp.ne.s32	%p28, %r310, 6;
	@%p28 bra 	BB0_35;

	and.b32  	%r186, %r52, 255;
	add.s32 	%r187, %r186, -128;
	shr.u32 	%r188, %r187, 5;
	and.b32  	%r58, %r51, -2147483648;
	cvta.to.local.u64 	%rd59, %rd53;
	st.local.u32 	[%rd59+24], %r311;
	mov.u32 	%r189, 6;
	sub.s32 	%r190, %r189, %r188;
	mul.wide.s32 	%rd60, %r190, 4;
	add.s64 	%rd15, %rd59, %rd60;
	ld.local.u32 	%r312, [%rd15];
	ld.local.u32 	%r313, [%rd15+-4];
	and.b32  	%r61, %r52, 31;
	setp.eq.s32	%p29, %r61, 0;
	@%p29 bra 	BB0_38;

	mov.u32 	%r191, 32;
	sub.s32 	%r192, %r191, %r61;
	shr.u32 	%r193, %r313, %r192;
	shl.b32 	%r194, %r312, %r61;
	add.s32 	%r312, %r193, %r194;
	ld.local.u32 	%r195, [%rd15+-8];
	shr.u32 	%r196, %r195, %r192;
	shl.b32 	%r197, %r313, %r61;
	add.s32 	%r313, %r196, %r197;

BB0_38:
	shr.u32 	%r198, %r313, 30;
	shl.b32 	%r199, %r312, 2;
	add.s32 	%r314, %r198, %r199;
	shl.b32 	%r67, %r313, 2;
	shr.u32 	%r200, %r314, 31;
	shr.u32 	%r201, %r312, 30;
	add.s32 	%r68, %r200, %r201;
	setp.eq.s32	%p30, %r200, 0;
	@%p30 bra 	BB0_39;
	bra.uni 	BB0_40;

BB0_39:
	mov.u32 	%r315, %r58;
	mov.u32 	%r316, %r67;
	bra.uni 	BB0_41;

BB0_40:
	not.b32 	%r202, %r314;
	neg.s32 	%r316, %r67;
	setp.eq.s32	%p31, %r67, 0;
	selp.u32	%r203, 1, 0, %p31;
	add.s32 	%r314, %r203, %r202;
	xor.b32  	%r315, %r58, -2147483648;

BB0_41:
	clz.b32 	%r318, %r314;
	setp.eq.s32	%p32, %r318, 0;
	shl.b32 	%r204, %r314, %r318;
	mov.u32 	%r205, 32;
	sub.s32 	%r206, %r205, %r318;
	shr.u32 	%r207, %r316, %r206;
	add.s32 	%r208, %r207, %r204;
	selp.b32	%r76, %r314, %r208, %p32;
	mov.u32 	%r209, -921707870;
	mul.hi.u32 	%r317, %r76, %r209;
	setp.eq.s32	%p33, %r58, 0;
	neg.s32 	%r210, %r68;
	selp.b32	%r319, %r68, %r210, %p33;
	setp.lt.s32	%p34, %r317, 1;
	@%p34 bra 	BB0_43;

	mul.lo.s32 	%r211, %r76, -921707870;
	shr.u32 	%r212, %r211, 31;
	shl.b32 	%r213, %r317, 1;
	add.s32 	%r317, %r212, %r213;
	add.s32 	%r318, %r318, 1;

BB0_43:
	mov.u32 	%r214, 126;
	sub.s32 	%r215, %r214, %r318;
	shl.b32 	%r216, %r215, 23;
	add.s32 	%r217, %r317, 1;
	shr.u32 	%r218, %r217, 7;
	add.s32 	%r219, %r218, 1;
	shr.u32 	%r220, %r219, 1;
	add.s32 	%r221, %r220, %r216;
	or.b32  	%r222, %r221, %r315;
	mov.b32 	 %f638, %r222;

BB0_44:
	mul.rn.f32 	%f52, %f638, %f638;
	and.b32  	%r84, %r319, 1;
	setp.eq.s32	%p35, %r84, 0;
	@%p35 bra 	BB0_46;
	bra.uni 	BB0_45;

BB0_46:
	mov.f32 	%f229, 0f3C08839E;
	mov.f32 	%f230, 0fB94CA1F9;
	fma.rn.f32 	%f639, %f230, %f52, %f229;
	bra.uni 	BB0_47;

BB0_45:
	mov.f32 	%f227, 0fBAB6061A;
	mov.f32 	%f228, 0f37CCF5CE;
	fma.rn.f32 	%f639, %f228, %f52, %f227;

BB0_47:
	@%p35 bra 	BB0_49;
	bra.uni 	BB0_48;

BB0_49:
	mov.f32 	%f234, 0fBE2AAAA3;
	fma.rn.f32 	%f235, %f639, %f52, %f234;
	mov.f32 	%f236, 0f00000000;
	fma.rn.f32 	%f640, %f235, %f52, %f236;
	bra.uni 	BB0_50;

BB0_48:
	mov.f32 	%f231, 0f3D2AAAA5;
	fma.rn.f32 	%f232, %f639, %f52, %f231;
	mov.f32 	%f233, 0fBF000000;
	fma.rn.f32 	%f640, %f232, %f52, %f233;

BB0_50:
	fma.rn.f32 	%f641, %f640, %f638, %f638;
	@%p35 bra 	BB0_52;

	mov.f32 	%f237, 0f3F800000;
	fma.rn.f32 	%f641, %f640, %f52, %f237;

BB0_52:
	and.b32  	%r223, %r319, 2;
	setp.eq.s32	%p38, %r223, 0;
	@%p38 bra 	BB0_54;

	mov.f32 	%f238, 0f00000000;
	mov.f32 	%f239, 0fBF800000;
	fma.rn.f32 	%f641, %f641, %f239, %f238;

BB0_54:
	mul.f32 	%f240, %f27, %f635;
	mul.f32 	%f241, %f240, %f240;
	mov.f32 	%f242, 0f3F800000;
	sub.f32 	%f243, %f242, %f241;
	mul.f32 	%f244, %f27, %f641;
	mul.f32 	%f245, %f244, %f244;
	sub.f32 	%f246, %f243, %f245;
	mov.f32 	%f247, 0f00000000;
	max.f32 	%f248, %f247, %f246;
	sqrt.rn.f32 	%f249, %f248;
	mul.f32 	%f250, %f10, %f244;
	mul.f32 	%f251, %f11, %f244;
	mul.f32 	%f252, %f12, %f244;
	fma.rn.f32 	%f253, %f19, %f240, %f250;
	fma.rn.f32 	%f254, %f18, %f240, %f251;
	fma.rn.f32 	%f255, %f17, %f240, %f252;
	fma.rn.f32 	%f64, %f622, %f249, %f253;
	fma.rn.f32 	%f65, %f623, %f249, %f254;
	fma.rn.f32 	%f66, %f624, %f249, %f255;
	setp.gt.f32	%p39, %f65, 0f00000000;
	setp.eq.s32	%p40, %r4, 0;
	or.pred  	%p41, %p40, %p39;
	@!%p41 bra 	BB0_61;
	bra.uni 	BB0_55;

BB0_55:
	max.f32 	%f67, %f260, %f163;
	abs.f32 	%f68, %f66;
	setp.eq.f32	%p42, %f68, 0f00000000;
	abs.f32 	%f69, %f64;
	setp.eq.f32	%p43, %f69, 0f00000000;
	and.pred  	%p44, %p42, %p43;
	mov.b32 	 %r85, %f66;
	mov.b32 	 %r224, %f64;
	and.b32  	%r86, %r224, -2147483648;
	@%p44 bra 	BB0_59;
	bra.uni 	BB0_56;

BB0_59:
	shr.s32 	%r231, %r85, 31;
	and.b32  	%r232, %r231, 1078530011;
	or.b32  	%r233, %r232, %r86;
	mov.b32 	 %f643, %r233;
	bra.uni 	BB0_60;

BB0_56:
	setp.eq.f32	%p45, %f68, 0f7F800000;
	setp.eq.f32	%p46, %f69, 0f7F800000;
	and.pred  	%p47, %p45, %p46;
	@%p47 bra 	BB0_58;
	bra.uni 	BB0_57;

BB0_58:
	shr.s32 	%r227, %r85, 31;
	and.b32  	%r228, %r227, 13483017;
	add.s32 	%r229, %r228, 1061752795;
	or.b32  	%r230, %r229, %r86;
	mov.b32 	 %f643, %r230;
	bra.uni 	BB0_60;

BB0_57:
	max.f32 	%f262, %f69, %f68;
	min.f32 	%f263, %f69, %f68;
	div.rn.f32 	%f264, %f263, %f262;
	mul.rn.f32 	%f265, %f264, %f264;
	mov.f32 	%f266, 0fC0B59883;
	mov.f32 	%f267, 0fBF52C7EA;
	fma.rn.f32 	%f268, %f265, %f267, %f266;
	mov.f32 	%f269, 0fC0D21907;
	fma.rn.f32 	%f270, %f268, %f265, %f269;
	mul.f32 	%f271, %f265, %f270;
	mul.f32 	%f272, %f264, %f271;
	add.f32 	%f273, %f265, 0f41355DC0;
	mov.f32 	%f274, 0f41E6BD60;
	fma.rn.f32 	%f275, %f273, %f265, %f274;
	mov.f32 	%f276, 0f419D92C8;
	fma.rn.f32 	%f277, %f275, %f265, %f276;
	rcp.rn.f32 	%f278, %f277;
	fma.rn.f32 	%f279, %f272, %f278, %f264;
	mov.f32 	%f280, 0f3FC90FDB;
	sub.f32 	%f281, %f280, %f279;
	setp.gt.f32	%p48, %f69, %f68;
	selp.f32	%f282, %f281, %f279, %p48;
	mov.f32 	%f283, 0f40490FDB;
	sub.f32 	%f284, %f283, %f282;
	setp.lt.s32	%p49, %r85, 0;
	selp.f32	%f285, %f284, %f282, %p49;
	mov.b32 	 %r225, %f285;
	or.b32  	%r226, %r225, %r86;
	mov.b32 	 %f286, %r226;
	add.f32 	%f287, %f68, %f69;
	setp.gtu.f32	%p50, %f287, 0f7F800000;
	selp.f32	%f643, %f287, %f286, %p50;

BB0_60:
	add.u64 	%rd61, %SP, 28;
	cvta.to.local.u64 	%rd62, %rd61;
	add.f32 	%f296, %f643, 0f40490FDB;
	mul.f32 	%f297, %f296, 0f3E22F983;
	neg.f32 	%f298, %f65;
	abs.f32 	%f299, %f298;
	sub.f32 	%f301, %f242, %f299;
	mul.f32 	%f302, %f301, 0f3F000000;
	sqrt.rn.f32 	%f303, %f302;
	setp.gt.f32	%p51, %f299, 0f3F11EB85;
	selp.f32	%f304, %f303, %f299, %p51;
	mul.f32 	%f305, %f304, %f304;
	mov.f32 	%f306, 0f3C94D2E9;
	mov.f32 	%f307, 0f3D53F941;
	fma.rn.f32 	%f308, %f307, %f305, %f306;
	mov.f32 	%f309, 0f3D3F841F;
	fma.rn.f32 	%f310, %f308, %f305, %f309;
	mov.f32 	%f311, 0f3D994929;
	fma.rn.f32 	%f312, %f310, %f305, %f311;
	mov.f32 	%f313, 0f3E2AAB94;
	fma.rn.f32 	%f314, %f312, %f305, %f313;
	mul.f32 	%f315, %f305, %f314;
	fma.rn.f32 	%f316, %f315, %f304, %f304;
	mov.f32 	%f317, 0f3FC90FDB;
	sub.f32 	%f318, %f317, %f316;
	add.f32 	%f319, %f316, %f316;
	selp.f32	%f320, %f319, %f318, %p51;
	mov.f32 	%f321, 0f40490FDB;
	sub.f32 	%f322, %f321, %f320;
	setp.gt.f32	%p52, %f65, 0f80000000;
	selp.f32	%f323, %f322, %f320, %p52;
	fma.rn.f32 	%f324, %f323, 0fBEA2F983, 0f3F800000;
	tex.2d.v4.f32.f32	{%f325, %f326, %f327, %f328}, [sky, {%f297, %f324}];
	st.local.f32 	[%rd62], %f325;
	st.local.f32 	[%rd62+4], %f326;
	st.local.f32 	[%rd62+8], %f327;
	ld.global.u32 	%r234, [root];
	mov.u32 	%r235, 1;
	mov.f32 	%f295, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r234, %f7, %f8, %f9, %f64, %f65, %f66, %r235, %f67, %f295, %rd61, %r116);
	// inline asm
	ld.local.f32 	%f329, [%rd62];
	add.f32 	%f644, %f644, %f329;
	ld.local.f32 	%f330, [%rd62+4];
	add.f32 	%f645, %f645, %f330;
	ld.local.f32 	%f331, [%rd62+8];
	add.f32 	%f646, %f646, %f331;
	ld.global.u32 	%r320, [samples];

BB0_61:
	add.s32 	%r298, %r298, 1;
	setp.lt.s32	%p53, %r298, %r320;
	@%p53 bra 	BB0_8;

BB0_62:
	add.s32 	%r295, %r295, 1;
	setp.lt.s32	%p54, %r295, %r320;
	@%p54 bra 	BB0_6;
	bra.uni 	BB0_63;

BB0_4:
	mov.f32 	%f645, %f646;
	mov.f32 	%f644, %f646;

BB0_63:
	mul.lo.s32 	%r237, %r320, %r320;
	cvt.rn.f32.s32	%f332, %r237;
	rcp.rn.f32 	%f333, %f332;
	mul.f32 	%f334, %f644, %f333;
	mul.f32 	%f335, %f645, %f333;
	mul.f32 	%f336, %f646, %f333;
	ld.global.f32 	%f337, [skyColor];
	mul.f32 	%f86, %f334, %f337;
	ld.global.f32 	%f338, [skyColor+4];
	mul.f32 	%f87, %f335, %f338;
	ld.global.f32 	%f339, [skyColor+8];
	mul.f32 	%f88, %f336, %f339;
	ld.global.u32 	%r324, [imageEnabled];
	and.b32  	%r238, %r324, 1;
	setp.eq.b32	%p55, %r238, 1;
	@!%p55 bra 	BB0_98;
	bra.uni 	BB0_64;

BB0_64:
	mov.f32 	%f342, 0f3E666666;
	cvt.rzi.f32.f32	%f343, %f342;
	fma.rn.f32 	%f344, %f343, 0fC0000000, 0f3EE66666;
	abs.f32 	%f89, %f344;
	abs.f32 	%f90, %f86;
	setp.lt.f32	%p56, %f90, 0f00800000;
	mul.f32 	%f345, %f90, 0f4B800000;
	selp.f32	%f346, 0fC3170000, 0fC2FE0000, %p56;
	selp.f32	%f347, %f345, %f90, %p56;
	mov.b32 	 %r239, %f347;
	and.b32  	%r240, %r239, 8388607;
	or.b32  	%r241, %r240, 1065353216;
	mov.b32 	 %f348, %r241;
	shr.u32 	%r242, %r239, 23;
	cvt.rn.f32.u32	%f349, %r242;
	add.f32 	%f350, %f346, %f349;
	setp.gt.f32	%p57, %f348, 0f3FB504F3;
	mul.f32 	%f351, %f348, 0f3F000000;
	add.f32 	%f352, %f350, 0f3F800000;
	selp.f32	%f353, %f351, %f348, %p57;
	selp.f32	%f354, %f352, %f350, %p57;
	add.f32 	%f355, %f353, 0fBF800000;
	add.f32 	%f341, %f353, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f340,%f341;
	// inline asm
	add.f32 	%f356, %f355, %f355;
	mul.f32 	%f357, %f340, %f356;
	mul.f32 	%f358, %f357, %f357;
	mov.f32 	%f359, 0f3C4CAF63;
	mov.f32 	%f360, 0f3B18F0FE;
	fma.rn.f32 	%f361, %f360, %f358, %f359;
	mov.f32 	%f362, 0f3DAAAABD;
	fma.rn.f32 	%f363, %f361, %f358, %f362;
	mul.rn.f32 	%f364, %f363, %f358;
	mul.rn.f32 	%f365, %f364, %f357;
	sub.f32 	%f366, %f355, %f357;
	neg.f32 	%f367, %f357;
	add.f32 	%f368, %f366, %f366;
	fma.rn.f32 	%f369, %f367, %f355, %f368;
	mul.rn.f32 	%f370, %f340, %f369;
	add.f32 	%f371, %f365, %f357;
	sub.f32 	%f372, %f357, %f371;
	add.f32 	%f373, %f365, %f372;
	add.f32 	%f374, %f370, %f373;
	add.f32 	%f375, %f371, %f374;
	sub.f32 	%f376, %f371, %f375;
	add.f32 	%f377, %f374, %f376;
	mov.f32 	%f378, 0f3F317200;
	mul.rn.f32 	%f379, %f354, %f378;
	mov.f32 	%f380, 0f35BFBE8E;
	mul.rn.f32 	%f381, %f354, %f380;
	add.f32 	%f382, %f379, %f375;
	sub.f32 	%f383, %f379, %f382;
	add.f32 	%f384, %f375, %f383;
	add.f32 	%f385, %f377, %f384;
	add.f32 	%f386, %f381, %f385;
	add.f32 	%f387, %f382, %f386;
	sub.f32 	%f388, %f382, %f387;
	add.f32 	%f389, %f386, %f388;
	mov.f32 	%f390, 0f3EE66666;
	mul.rn.f32 	%f391, %f390, %f387;
	neg.f32 	%f392, %f391;
	fma.rn.f32 	%f393, %f390, %f387, %f392;
	fma.rn.f32 	%f394, %f390, %f389, %f393;
	mov.f32 	%f395, 0f00000000;
	fma.rn.f32 	%f396, %f395, %f387, %f394;
	add.rn.f32 	%f397, %f391, %f396;
	neg.f32 	%f398, %f397;
	add.rn.f32 	%f399, %f391, %f398;
	add.rn.f32 	%f400, %f399, %f396;
	mov.b32 	 %r243, %f397;
	setp.eq.s32	%p58, %r243, 1118925336;
	add.s32 	%r244, %r243, -1;
	mov.b32 	 %f401, %r244;
	add.f32 	%f402, %f400, 0f37000000;
	selp.f32	%f403, %f401, %f397, %p58;
	selp.f32	%f91, %f402, %f400, %p58;
	mul.f32 	%f404, %f403, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f405, %f404;
	mov.f32 	%f406, 0fBF317200;
	fma.rn.f32 	%f407, %f405, %f406, %f403;
	mov.f32 	%f408, 0fB5BFBE8E;
	fma.rn.f32 	%f409, %f405, %f408, %f407;
	mul.f32 	%f410, %f409, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f411, %f410;
	add.f32 	%f412, %f405, 0f00000000;
	ex2.approx.f32 	%f413, %f412;
	mul.f32 	%f414, %f411, %f413;
	setp.lt.f32	%p59, %f403, 0fC2D20000;
	selp.f32	%f415, 0f00000000, %f414, %p59;
	setp.gt.f32	%p60, %f403, 0f42D20000;
	selp.f32	%f653, 0f7F800000, %f415, %p60;
	setp.eq.f32	%p61, %f653, 0f7F800000;
	@%p61 bra 	BB0_66;

	fma.rn.f32 	%f653, %f653, %f91, %f653;

BB0_66:
	setp.lt.f32	%p62, %f86, 0f00000000;
	setp.eq.f32	%p63, %f89, 0f3F800000;
	and.pred  	%p1, %p62, %p63;
	mov.b32 	 %r245, %f653;
	xor.b32  	%r246, %r245, -2147483648;
	mov.b32 	 %f416, %r246;
	selp.f32	%f655, %f416, %f653, %p1;
	setp.eq.f32	%p64, %f86, 0f00000000;
	@%p64 bra 	BB0_69;
	bra.uni 	BB0_67;

BB0_69:
	add.f32 	%f419, %f86, %f86;
	selp.f32	%f655, %f419, 0f00000000, %p63;
	bra.uni 	BB0_70;

BB0_107:
	mov.u64 	%rd117, image_HDR;
	cvta.global.u64 	%rd112, %rd117;
	mov.u32 	%r289, 8;
	mov.u64 	%rd116, 0;
	// inline asm
	call (%rd111), _rt_buffer_get_64, (%rd112, %r100, %r289, %rd18, %rd19, %rd116, %rd116);
	// inline asm
	mov.f32 	%f600, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs40, %f600;}

	// inline asm
	mov.u16 	%rs41, 0;
	st.v4.u16 	[%rd111], {%rs40, %rs40, %rs40, %rs41};
	bra.uni 	BB0_108;

BB0_67:
	setp.geu.f32	%p65, %f86, 0f00000000;
	@%p65 bra 	BB0_70;

	mov.f32 	%f621, 0f3EE66666;
	cvt.rzi.f32.f32	%f418, %f621;
	setp.neu.f32	%p66, %f418, 0f3EE66666;
	selp.f32	%f655, 0f7FFFFFFF, %f655, %p66;

BB0_70:
	add.f32 	%f420, %f90, 0f3EE66666;
	mov.b32 	 %r247, %f420;
	setp.lt.s32	%p68, %r247, 2139095040;
	@%p68 bra 	BB0_75;

	setp.gtu.f32	%p69, %f90, 0f7F800000;
	@%p69 bra 	BB0_74;
	bra.uni 	BB0_72;

BB0_74:
	add.f32 	%f655, %f86, 0f3EE66666;
	bra.uni 	BB0_75;

BB0_72:
	setp.neu.f32	%p70, %f90, 0f7F800000;
	@%p70 bra 	BB0_75;

	selp.f32	%f655, 0fFF800000, 0f7F800000, %p1;

BB0_75:
	mov.f32 	%f609, 0fB5BFBE8E;
	mov.f32 	%f608, 0fBF317200;
	mov.f32 	%f607, 0f00000000;
	mov.f32 	%f606, 0f35BFBE8E;
	mov.f32 	%f605, 0f3F317200;
	mov.f32 	%f604, 0f3DAAAABD;
	mov.f32 	%f603, 0f3C4CAF63;
	mov.f32 	%f602, 0f3B18F0FE;
	mov.f32 	%f601, 0f3EE66666;
	setp.eq.f32	%p71, %f86, 0f3F800000;
	selp.f32	%f102, 0f3F800000, %f655, %p71;
	abs.f32 	%f103, %f87;
	setp.lt.f32	%p72, %f103, 0f00800000;
	mul.f32 	%f423, %f103, 0f4B800000;
	selp.f32	%f424, 0fC3170000, 0fC2FE0000, %p72;
	selp.f32	%f425, %f423, %f103, %p72;
	mov.b32 	 %r248, %f425;
	and.b32  	%r249, %r248, 8388607;
	or.b32  	%r250, %r249, 1065353216;
	mov.b32 	 %f426, %r250;
	shr.u32 	%r251, %r248, 23;
	cvt.rn.f32.u32	%f427, %r251;
	add.f32 	%f428, %f424, %f427;
	setp.gt.f32	%p73, %f426, 0f3FB504F3;
	mul.f32 	%f429, %f426, 0f3F000000;
	add.f32 	%f430, %f428, 0f3F800000;
	selp.f32	%f431, %f429, %f426, %p73;
	selp.f32	%f432, %f430, %f428, %p73;
	add.f32 	%f433, %f431, 0fBF800000;
	add.f32 	%f422, %f431, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f421,%f422;
	// inline asm
	add.f32 	%f434, %f433, %f433;
	mul.f32 	%f435, %f421, %f434;
	mul.f32 	%f436, %f435, %f435;
	fma.rn.f32 	%f439, %f602, %f436, %f603;
	fma.rn.f32 	%f441, %f439, %f436, %f604;
	mul.rn.f32 	%f442, %f441, %f436;
	mul.rn.f32 	%f443, %f442, %f435;
	sub.f32 	%f444, %f433, %f435;
	neg.f32 	%f445, %f435;
	add.f32 	%f446, %f444, %f444;
	fma.rn.f32 	%f447, %f445, %f433, %f446;
	mul.rn.f32 	%f448, %f421, %f447;
	add.f32 	%f449, %f443, %f435;
	sub.f32 	%f450, %f435, %f449;
	add.f32 	%f451, %f443, %f450;
	add.f32 	%f452, %f448, %f451;
	add.f32 	%f453, %f449, %f452;
	sub.f32 	%f454, %f449, %f453;
	add.f32 	%f455, %f452, %f454;
	mul.rn.f32 	%f457, %f432, %f605;
	mul.rn.f32 	%f459, %f432, %f606;
	add.f32 	%f460, %f457, %f453;
	sub.f32 	%f461, %f457, %f460;
	add.f32 	%f462, %f453, %f461;
	add.f32 	%f463, %f455, %f462;
	add.f32 	%f464, %f459, %f463;
	add.f32 	%f465, %f460, %f464;
	sub.f32 	%f466, %f460, %f465;
	add.f32 	%f467, %f464, %f466;
	mul.rn.f32 	%f469, %f601, %f465;
	neg.f32 	%f470, %f469;
	fma.rn.f32 	%f471, %f601, %f465, %f470;
	fma.rn.f32 	%f472, %f601, %f467, %f471;
	fma.rn.f32 	%f474, %f607, %f465, %f472;
	add.rn.f32 	%f475, %f469, %f474;
	neg.f32 	%f476, %f475;
	add.rn.f32 	%f477, %f469, %f476;
	add.rn.f32 	%f478, %f477, %f474;
	mov.b32 	 %r252, %f475;
	setp.eq.s32	%p74, %r252, 1118925336;
	add.s32 	%r253, %r252, -1;
	mov.b32 	 %f479, %r253;
	add.f32 	%f480, %f478, 0f37000000;
	selp.f32	%f481, %f479, %f475, %p74;
	selp.f32	%f104, %f480, %f478, %p74;
	mul.f32 	%f482, %f481, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f483, %f482;
	fma.rn.f32 	%f485, %f483, %f608, %f481;
	fma.rn.f32 	%f487, %f483, %f609, %f485;
	mul.f32 	%f488, %f487, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f489, %f488;
	add.f32 	%f490, %f483, 0f00000000;
	ex2.approx.f32 	%f491, %f490;
	mul.f32 	%f492, %f489, %f491;
	setp.lt.f32	%p75, %f481, 0fC2D20000;
	selp.f32	%f493, 0f00000000, %f492, %p75;
	setp.gt.f32	%p76, %f481, 0f42D20000;
	selp.f32	%f656, 0f7F800000, %f493, %p76;
	setp.eq.f32	%p77, %f656, 0f7F800000;
	@%p77 bra 	BB0_77;

	fma.rn.f32 	%f656, %f656, %f104, %f656;

BB0_77:
	setp.lt.f32	%p78, %f87, 0f00000000;
	and.pred  	%p2, %p78, %p63;
	mov.b32 	 %r254, %f656;
	xor.b32  	%r255, %r254, -2147483648;
	mov.b32 	 %f494, %r255;
	selp.f32	%f658, %f494, %f656, %p2;
	setp.eq.f32	%p80, %f87, 0f00000000;
	@%p80 bra 	BB0_80;
	bra.uni 	BB0_78;

BB0_80:
	add.f32 	%f497, %f87, %f87;
	selp.f32	%f658, %f497, 0f00000000, %p63;
	bra.uni 	BB0_81;

BB0_78:
	setp.geu.f32	%p81, %f87, 0f00000000;
	@%p81 bra 	BB0_81;

	mov.f32 	%f620, 0f3EE66666;
	cvt.rzi.f32.f32	%f496, %f620;
	setp.neu.f32	%p82, %f496, 0f3EE66666;
	selp.f32	%f658, 0f7FFFFFFF, %f658, %p82;

BB0_81:
	add.f32 	%f498, %f103, 0f3EE66666;
	mov.b32 	 %r256, %f498;
	setp.lt.s32	%p84, %r256, 2139095040;
	@%p84 bra 	BB0_86;

	setp.gtu.f32	%p85, %f103, 0f7F800000;
	@%p85 bra 	BB0_85;
	bra.uni 	BB0_83;

BB0_85:
	add.f32 	%f658, %f87, 0f3EE66666;
	bra.uni 	BB0_86;

BB0_83:
	setp.neu.f32	%p86, %f103, 0f7F800000;
	@%p86 bra 	BB0_86;

	selp.f32	%f658, 0fFF800000, 0f7F800000, %p2;

BB0_86:
	mov.f32 	%f618, 0fB5BFBE8E;
	mov.f32 	%f617, 0fBF317200;
	mov.f32 	%f616, 0f00000000;
	mov.f32 	%f615, 0f35BFBE8E;
	mov.f32 	%f614, 0f3F317200;
	mov.f32 	%f613, 0f3DAAAABD;
	mov.f32 	%f612, 0f3C4CAF63;
	mov.f32 	%f611, 0f3B18F0FE;
	mov.f32 	%f610, 0f3EE66666;
	setp.eq.f32	%p87, %f87, 0f3F800000;
	selp.f32	%f115, 0f3F800000, %f658, %p87;
	abs.f32 	%f116, %f88;
	setp.lt.f32	%p88, %f116, 0f00800000;
	mul.f32 	%f501, %f116, 0f4B800000;
	selp.f32	%f502, 0fC3170000, 0fC2FE0000, %p88;
	selp.f32	%f503, %f501, %f116, %p88;
	mov.b32 	 %r257, %f503;
	and.b32  	%r258, %r257, 8388607;
	or.b32  	%r259, %r258, 1065353216;
	mov.b32 	 %f504, %r259;
	shr.u32 	%r260, %r257, 23;
	cvt.rn.f32.u32	%f505, %r260;
	add.f32 	%f506, %f502, %f505;
	setp.gt.f32	%p89, %f504, 0f3FB504F3;
	mul.f32 	%f507, %f504, 0f3F000000;
	add.f32 	%f508, %f506, 0f3F800000;
	selp.f32	%f509, %f507, %f504, %p89;
	selp.f32	%f510, %f508, %f506, %p89;
	add.f32 	%f511, %f509, 0fBF800000;
	add.f32 	%f500, %f509, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f499,%f500;
	// inline asm
	add.f32 	%f512, %f511, %f511;
	mul.f32 	%f513, %f499, %f512;
	mul.f32 	%f514, %f513, %f513;
	fma.rn.f32 	%f517, %f611, %f514, %f612;
	fma.rn.f32 	%f519, %f517, %f514, %f613;
	mul.rn.f32 	%f520, %f519, %f514;
	mul.rn.f32 	%f521, %f520, %f513;
	sub.f32 	%f522, %f511, %f513;
	neg.f32 	%f523, %f513;
	add.f32 	%f524, %f522, %f522;
	fma.rn.f32 	%f525, %f523, %f511, %f524;
	mul.rn.f32 	%f526, %f499, %f525;
	add.f32 	%f527, %f521, %f513;
	sub.f32 	%f528, %f513, %f527;
	add.f32 	%f529, %f521, %f528;
	add.f32 	%f530, %f526, %f529;
	add.f32 	%f531, %f527, %f530;
	sub.f32 	%f532, %f527, %f531;
	add.f32 	%f533, %f530, %f532;
	mul.rn.f32 	%f535, %f510, %f614;
	mul.rn.f32 	%f537, %f510, %f615;
	add.f32 	%f538, %f535, %f531;
	sub.f32 	%f539, %f535, %f538;
	add.f32 	%f540, %f531, %f539;
	add.f32 	%f541, %f533, %f540;
	add.f32 	%f542, %f537, %f541;
	add.f32 	%f543, %f538, %f542;
	sub.f32 	%f544, %f538, %f543;
	add.f32 	%f545, %f542, %f544;
	mul.rn.f32 	%f547, %f610, %f543;
	neg.f32 	%f548, %f547;
	fma.rn.f32 	%f549, %f610, %f543, %f548;
	fma.rn.f32 	%f550, %f610, %f545, %f549;
	fma.rn.f32 	%f552, %f616, %f543, %f550;
	add.rn.f32 	%f553, %f547, %f552;
	neg.f32 	%f554, %f553;
	add.rn.f32 	%f555, %f547, %f554;
	add.rn.f32 	%f556, %f555, %f552;
	mov.b32 	 %r261, %f553;
	setp.eq.s32	%p90, %r261, 1118925336;
	add.s32 	%r262, %r261, -1;
	mov.b32 	 %f557, %r262;
	add.f32 	%f558, %f556, 0f37000000;
	selp.f32	%f559, %f557, %f553, %p90;
	selp.f32	%f117, %f558, %f556, %p90;
	mul.f32 	%f560, %f559, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f561, %f560;
	fma.rn.f32 	%f563, %f561, %f617, %f559;
	fma.rn.f32 	%f565, %f561, %f618, %f563;
	mul.f32 	%f566, %f565, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f567, %f566;
	add.f32 	%f568, %f561, 0f00000000;
	ex2.approx.f32 	%f569, %f568;
	mul.f32 	%f570, %f567, %f569;
	setp.lt.f32	%p91, %f559, 0fC2D20000;
	selp.f32	%f571, 0f00000000, %f570, %p91;
	setp.gt.f32	%p92, %f559, 0f42D20000;
	selp.f32	%f659, 0f7F800000, %f571, %p92;
	setp.eq.f32	%p93, %f659, 0f7F800000;
	@%p93 bra 	BB0_88;

	fma.rn.f32 	%f659, %f659, %f117, %f659;

BB0_88:
	setp.lt.f32	%p94, %f88, 0f00000000;
	and.pred  	%p3, %p94, %p63;
	mov.b32 	 %r263, %f659;
	xor.b32  	%r264, %r263, -2147483648;
	mov.b32 	 %f572, %r264;
	selp.f32	%f661, %f572, %f659, %p3;
	setp.eq.f32	%p96, %f88, 0f00000000;
	@%p96 bra 	BB0_91;
	bra.uni 	BB0_89;

BB0_91:
	add.f32 	%f575, %f88, %f88;
	selp.f32	%f661, %f575, 0f00000000, %p63;
	bra.uni 	BB0_92;

BB0_89:
	setp.geu.f32	%p97, %f88, 0f00000000;
	@%p97 bra 	BB0_92;

	mov.f32 	%f619, 0f3EE66666;
	cvt.rzi.f32.f32	%f574, %f619;
	setp.neu.f32	%p98, %f574, 0f3EE66666;
	selp.f32	%f661, 0f7FFFFFFF, %f661, %p98;

BB0_92:
	add.f32 	%f576, %f116, 0f3EE66666;
	mov.b32 	 %r265, %f576;
	setp.lt.s32	%p100, %r265, 2139095040;
	@%p100 bra 	BB0_97;

	setp.gtu.f32	%p101, %f116, 0f7F800000;
	@%p101 bra 	BB0_96;
	bra.uni 	BB0_94;

BB0_96:
	add.f32 	%f661, %f88, 0f3EE66666;
	bra.uni 	BB0_97;

BB0_94:
	setp.neu.f32	%p102, %f116, 0f7F800000;
	@%p102 bra 	BB0_97;

	selp.f32	%f661, 0fFF800000, 0f7F800000, %p3;

BB0_97:
	mov.u32 	%r291, 4;
	mov.u64 	%rd118, 0;
	mov.u32 	%r290, 2;
	setp.eq.f32	%p103, %f88, 0f3F800000;
	selp.f32	%f577, 0f3F800000, %f661, %p103;
	cvt.u64.u32	%rd67, %r3;
	cvt.u64.u32	%rd66, %r2;
	mov.u64 	%rd70, image;
	cvta.global.u64 	%rd65, %rd70;
	// inline asm
	call (%rd64), _rt_buffer_get_64, (%rd65, %r290, %r291, %rd66, %rd67, %rd118, %rd118);
	// inline asm
	cvt.sat.f32.f32	%f578, %f577;
	mul.f32 	%f579, %f578, 0f437FFD71;
	cvt.rzi.u32.f32	%r268, %f579;
	cvt.sat.f32.f32	%f580, %f115;
	mul.f32 	%f581, %f580, 0f437FFD71;
	cvt.rzi.u32.f32	%r269, %f581;
	cvt.sat.f32.f32	%f582, %f102;
	mul.f32 	%f583, %f582, 0f437FFD71;
	cvt.rzi.u32.f32	%r270, %f583;
	cvt.u16.u32	%rs10, %r268;
	cvt.u16.u32	%rs11, %r270;
	cvt.u16.u32	%rs12, %r269;
	mov.u16 	%rs13, 255;
	st.v4.u8 	[%rd64], {%rs10, %rs12, %rs11, %rs13};
	ld.global.u32 	%r324, [imageEnabled];

BB0_98:
	and.b32  	%r271, %r324, 4;
	setp.eq.s32	%p104, %r271, 0;
	@%p104 bra 	BB0_108;

	ld.global.u32 	%r272, [additive];
	setp.eq.s32	%p105, %r272, 0;
	cvt.u64.u32	%rd16, %r2;
	cvt.u64.u32	%rd17, %r3;
	mov.f32 	%f584, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs14, %f584;}

	// inline asm
	@%p105 bra 	BB0_101;

	mov.u64 	%rd119, 0;
	mov.u32 	%r292, 2;
	mov.u64 	%rd83, image_HDR;
	cvta.global.u64 	%rd72, %rd83;
	mov.u32 	%r276, 8;
	// inline asm
	call (%rd71), _rt_buffer_get_64, (%rd72, %r292, %r276, %rd16, %rd17, %rd119, %rd119);
	// inline asm
	ld.v4.u16 	{%rs21, %rs22, %rs23, %rs24}, [%rd71];
	// inline asm
	{  cvt.f32.f16 %f585, %rs21;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f586, %rs22;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f587, %rs23;}

	// inline asm
	// inline asm
	call (%rd77), _rt_buffer_get_64, (%rd72, %r292, %r276, %rd16, %rd17, %rd119, %rd119);
	// inline asm
	add.f32 	%f588, %f86, %f585;
	add.f32 	%f589, %f87, %f586;
	add.f32 	%f590, %f88, %f587;
	// inline asm
	{  cvt.rn.f16.f32 %rs20, %f590;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs19, %f589;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs18, %f588;}

	// inline asm
	st.v4.u16 	[%rd77], {%rs18, %rs19, %rs20, %rs14};
	bra.uni 	BB0_108;

BB0_101:
	mov.u64 	%rd120, 0;
	mov.u32 	%r293, 2;
	mov.u64 	%rd90, image_HDR;
	cvta.global.u64 	%rd85, %rd90;
	mov.u32 	%r278, 8;
	// inline asm
	call (%rd84), _rt_buffer_get_64, (%rd85, %r293, %r278, %rd16, %rd17, %rd120, %rd120);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f88;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs26, %f87;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f86;}

	// inline asm
	st.v4.u16 	[%rd84], {%rs25, %rs26, %rs27, %rs14};

BB0_108:
	ret;
}