//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .texref albedoTex;
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[40];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<103>;
	.reg .b16 	%rs<145>;
	.reg .f32 	%f<850>;
	.reg .b32 	%r<398>;
	.reg .b64 	%rd<284>;


	mov.u64 	%rd283, __local_depot0;
	cvta.local.u64 	%SP, %rd283;
	ld.global.u32 	%r1, [samples];
	shl.b32 	%r2, %r1, 1;
	ld.global.v2.u32 	{%r97, %r98}, [pixelID];
	cvt.u64.u32	%rd22, %r97;
	cvt.u64.u32	%rd23, %r98;
	mov.u64 	%rd26, uvnormal;
	cvta.global.u64 	%rd21, %rd26;
	mov.u32 	%r95, 2;
	mov.u32 	%r96, 4;
	mov.u64 	%rd25, 0;
	// inline asm
	call (%rd20), _rt_buffer_get_64, (%rd21, %r95, %r96, %rd22, %rd23, %rd25, %rd25);
	// inline asm
	ld.u32 	%r3, [%rd20];
	shr.u32 	%r101, %r3, 16;
	cvt.u16.u32	%rs1, %r101;
	and.b16  	%rs6, %rs1, 255;
	cvt.u16.u32	%rs7, %r3;
	or.b16  	%rs8, %rs7, %rs6;
	setp.eq.s16	%p4, %rs8, 0;
	mov.f32 	%f781, 0f00000000;
	mov.f32 	%f782, %f781;
	mov.f32 	%f783, %f781;
	@%p4 bra 	BB0_2;

	ld.u8 	%rs9, [%rd20+1];
	and.b16  	%rs11, %rs7, 255;
	cvt.rn.f32.u16	%f195, %rs11;
	div.rn.f32 	%f196, %f195, 0f437F0000;
	fma.rn.f32 	%f197, %f196, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f198, %rs9;
	div.rn.f32 	%f199, %f198, 0f437F0000;
	fma.rn.f32 	%f200, %f199, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f201, %rs6;
	div.rn.f32 	%f202, %f201, 0f437F0000;
	fma.rn.f32 	%f203, %f202, 0f40000000, 0fBF800000;
	mul.f32 	%f204, %f200, %f200;
	fma.rn.f32 	%f205, %f197, %f197, %f204;
	fma.rn.f32 	%f206, %f203, %f203, %f205;
	sqrt.rn.f32 	%f207, %f206;
	rcp.rn.f32 	%f208, %f207;
	mul.f32 	%f781, %f197, %f208;
	mul.f32 	%f782, %f200, %f208;
	mul.f32 	%f783, %f203, %f208;

BB0_2:
	ld.global.v2.u32 	{%r102, %r103}, [pixelID];
	ld.global.v2.u32 	{%r105, %r106}, [tileInfo];
	add.s32 	%r4, %r102, %r105;
	add.s32 	%r5, %r103, %r106;
	setp.eq.f32	%p5, %f782, 0f00000000;
	setp.eq.f32	%p6, %f781, 0f00000000;
	and.pred  	%p7, %p6, %p5;
	setp.eq.f32	%p8, %f783, 0f00000000;
	and.pred  	%p9, %p7, %p8;
	@%p9 bra 	BB0_105;
	bra.uni 	BB0_3;

BB0_105:
	ld.global.u32 	%r397, [imageEnabled];
	and.b32  	%r296, %r397, 1;
	setp.eq.b32	%p95, %r296, 1;
	@!%p95 bra 	BB0_107;
	bra.uni 	BB0_106;

BB0_106:
	cvt.u64.u32	%rd174, %r4;
	cvt.u64.u32	%rd175, %r5;
	mov.u64 	%rd178, image;
	cvta.global.u64 	%rd173, %rd178;
	mov.u64 	%rd177, 0;
	// inline asm
	call (%rd172), _rt_buffer_get_64, (%rd173, %r95, %r96, %rd174, %rd175, %rd177, %rd177);
	// inline asm
	mov.u16 	%rs88, 0;
	st.v4.u8 	[%rd172], {%rs88, %rs88, %rs88, %rs88};
	ld.global.u32 	%r397, [imageEnabled];

BB0_107:
	and.b32  	%r299, %r397, 4;
	setp.eq.s32	%p96, %r299, 0;
	@%p96 bra 	BB0_109;

	cvt.u64.u32	%rd181, %r4;
	cvt.u64.u32	%rd182, %r5;
	mov.u64 	%rd185, image_HDR;
	cvta.global.u64 	%rd180, %rd185;
	mov.u32 	%r301, 8;
	mov.u64 	%rd184, 0;
	// inline asm
	call (%rd179), _rt_buffer_get_64, (%rd180, %r95, %r301, %rd181, %rd182, %rd184, %rd184);
	// inline asm
	mov.f32 	%f693, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs89, %f693;}

	// inline asm
	mov.u16 	%rs90, 0;
	st.v4.u16 	[%rd179], {%rs89, %rs89, %rs89, %rs90};
	ld.global.u32 	%r397, [imageEnabled];

BB0_109:
	and.b32  	%r302, %r397, 16;
	setp.eq.s32	%p97, %r302, 0;
	@%p97 bra 	BB0_111;

	cvt.u64.u32	%rd189, %r5;
	cvt.u64.u32	%rd188, %r4;
	mov.u64 	%rd192, image_HDR2;
	cvta.global.u64 	%rd187, %rd192;
	mov.u32 	%r304, 8;
	mov.u64 	%rd191, 0;
	// inline asm
	call (%rd186), _rt_buffer_get_64, (%rd187, %r95, %r304, %rd188, %rd189, %rd191, %rd191);
	// inline asm
	mov.f32 	%f694, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs91, %f694;}

	// inline asm
	mov.u16 	%rs92, 0;
	st.v4.u16 	[%rd186], {%rs91, %rs91, %rs91, %rs92};

BB0_111:
	cvt.u64.u32	%rd18, %r4;
	cvt.u64.u32	%rd19, %r5;
	ld.global.u32 	%r305, [additive];
	setp.eq.s32	%p98, %r305, 0;
	@%p98 bra 	BB0_113;

	mov.u64 	%rd205, image_RNM0;
	cvta.global.u64 	%rd194, %rd205;
	mov.u32 	%r309, 8;
	mov.u64 	%rd204, 0;
	// inline asm
	call (%rd193), _rt_buffer_get_64, (%rd194, %r95, %r309, %rd18, %rd19, %rd204, %rd204);
	// inline asm
	ld.v4.u16 	{%rs99, %rs100, %rs101, %rs102}, [%rd193];
	// inline asm
	{  cvt.f32.f16 %f695, %rs99;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f696, %rs100;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f697, %rs101;}

	// inline asm
	// inline asm
	call (%rd199), _rt_buffer_get_64, (%rd194, %r95, %r309, %rd18, %rd19, %rd204, %rd204);
	// inline asm
	add.f32 	%f698, %f695, 0f00000000;
	add.f32 	%f699, %f696, 0f00000000;
	add.f32 	%f700, %f697, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs98, %f700;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs97, %f699;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs96, %f698;}

	// inline asm
	mov.u16 	%rs103, 0;
	st.v4.u16 	[%rd199], {%rs96, %rs97, %rs98, %rs103};
	bra.uni 	BB0_114;

BB0_3:
	ld.global.v2.u32 	{%r116, %r117}, [pixelID];
	cvt.u64.u32	%rd29, %r116;
	cvt.u64.u32	%rd30, %r117;
	mov.u64 	%rd45, lightmapDirect;
	cvta.global.u64 	%rd28, %rd45;
	mov.u32 	%r111, 8;
	// inline asm
	call (%rd27), _rt_buffer_get_64, (%rd28, %r95, %r111, %rd29, %rd30, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs16, %rs17, %rs18, %rs19}, [%rd27];
	// inline asm
	{  cvt.f32.f16 %f209, %rs16;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f210, %rs17;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f211, %rs18;}

	// inline asm
	ld.global.v2.u32 	{%r120, %r121}, [pixelID];
	cvt.u64.u32	%rd35, %r120;
	cvt.u64.u32	%rd36, %r121;
	mov.u64 	%rd46, uvpos;
	cvta.global.u64 	%rd34, %rd46;
	mov.u32 	%r113, 12;
	// inline asm
	call (%rd33), _rt_buffer_get_64, (%rd34, %r95, %r113, %rd35, %rd36, %rd25, %rd25);
	// inline asm
	ld.f32 	%f227, [%rd33+8];
	ld.f32 	%f228, [%rd33+4];
	ld.f32 	%f229, [%rd33];
	mul.f32 	%f230, %f229, 0f3456BF95;
	mul.f32 	%f231, %f228, 0f3456BF95;
	mul.f32 	%f232, %f227, 0f3456BF95;
	abs.f32 	%f233, %f781;
	div.rn.f32 	%f234, %f230, %f233;
	abs.f32 	%f235, %f782;
	div.rn.f32 	%f236, %f231, %f235;
	abs.f32 	%f237, %f783;
	div.rn.f32 	%f238, %f232, %f237;
	abs.f32 	%f239, %f234;
	abs.f32 	%f240, %f236;
	abs.f32 	%f241, %f238;
	mov.f32 	%f242, 0f38D1B717;
	max.f32 	%f243, %f239, %f242;
	max.f32 	%f244, %f240, %f242;
	max.f32 	%f245, %f241, %f242;
	fma.rn.f32 	%f10, %f781, %f243, %f229;
	fma.rn.f32 	%f11, %f782, %f244, %f228;
	fma.rn.f32 	%f12, %f783, %f245, %f227;
	setp.gt.f32	%p10, %f233, %f237;
	neg.f32 	%f246, %f782;
	selp.f32	%f247, %f246, 0f00000000, %p10;
	neg.f32 	%f248, %f783;
	selp.f32	%f249, %f781, %f248, %p10;
	selp.f32	%f250, 0f00000000, %f782, %p10;
	mul.f32 	%f251, %f249, %f249;
	fma.rn.f32 	%f252, %f247, %f247, %f251;
	fma.rn.f32 	%f253, %f250, %f250, %f252;
	sqrt.rn.f32 	%f254, %f253;
	rcp.rn.f32 	%f255, %f254;
	mul.f32 	%f13, %f247, %f255;
	mul.f32 	%f14, %f249, %f255;
	mul.f32 	%f15, %f250, %f255;
	ld.global.v2.u32 	{%r124, %r125}, [pixelID];
	cvt.u64.u32	%rd41, %r124;
	cvt.u64.u32	%rd42, %r125;
	mov.u64 	%rd47, rnd_seeds;
	cvta.global.u64 	%rd40, %rd47;
	// inline asm
	call (%rd39), _rt_buffer_get_64, (%rd40, %r95, %r96, %rd41, %rd42, %rd25, %rd25);
	// inline asm
	mov.f32 	%f799, 0f00000000;
	setp.lt.s32	%p11, %r1, 1;
	mov.f32 	%f800, %f799;
	mov.f32 	%f801, %f799;
	mov.f32 	%f802, %f799;
	mov.f32 	%f803, %f799;
	mov.f32 	%f804, %f799;
	mov.f32 	%f805, %f799;
	mov.f32 	%f806, %f799;
	mov.f32 	%f807, %f799;
	mov.f32 	%f808, %f799;
	mov.f32 	%f809, %f799;
	mov.f32 	%f810, %f799;
	mov.f32 	%f811, %f799;
	mov.f32 	%f812, %f799;
	mov.f32 	%f813, %f799;
	@%p11 bra 	BB0_54;

	cvt.rn.f32.s32	%f271, %r2;
	rcp.rn.f32 	%f16, %f271;
	ld.u32 	%r373, [%rd39];
	mul.f32 	%f17, %f10, 0f3456BF95;
	mul.f32 	%f18, %f11, 0f3456BF95;
	mul.f32 	%f19, %f12, 0f3456BF95;
	mul.f32 	%f272, %f781, %f14;
	mul.f32 	%f273, %f782, %f13;
	sub.f32 	%f20, %f273, %f272;
	mul.f32 	%f274, %f783, %f13;
	mul.f32 	%f275, %f781, %f15;
	sub.f32 	%f21, %f275, %f274;
	mul.f32 	%f276, %f782, %f15;
	mul.f32 	%f277, %f783, %f14;
	sub.f32 	%f22, %f277, %f276;
	mov.f32 	%f799, 0f00000000;
	mov.u32 	%r128, 0;
	abs.f32 	%f278, %f18;
	abs.f32 	%f279, %f17;
	max.f32 	%f280, %f279, %f278;
	abs.f32 	%f281, %f19;
	max.f32 	%f282, %f280, %f281;
	mov.u32 	%r370, %r128;
	mov.f32 	%f800, %f799;
	mov.f32 	%f801, %f799;
	mov.f32 	%f802, %f799;
	mov.f32 	%f803, %f799;
	mov.f32 	%f804, %f799;
	mov.f32 	%f805, %f799;
	mov.f32 	%f806, %f799;
	mov.f32 	%f807, %f799;
	mov.f32 	%f808, %f799;
	mov.f32 	%f809, %f799;
	mov.f32 	%f810, %f799;
	mov.f32 	%f811, %f799;
	mov.f32 	%f812, %f799;
	mov.f32 	%f813, %f799;

BB0_5:
	mov.u32 	%r372, %r128;

BB0_6:
	mov.u32 	%r10, %r373;
	cvt.rn.f32.s32	%f763, %r370;
	mad.lo.s32 	%r130, %r10, 1664525, 1013904223;
	and.b32  	%r131, %r130, 16777215;
	cvt.rn.f32.u32	%f284, %r131;
	fma.rn.f32 	%f285, %f284, 0f33800000, %f763;
	mul.f32 	%f286, %f16, %f285;
	mad.lo.s32 	%r11, %r130, 1664525, 1013904223;
	and.b32  	%r132, %r11, 16777215;
	cvt.rn.f32.u32	%f287, %r132;
	cvt.rn.f32.s32	%f288, %r372;
	fma.rn.f32 	%f289, %f287, 0f33800000, %f288;
	mul.f32 	%f290, %f16, %f289;
	fma.rn.f32 	%f55, %f286, 0fC0000000, 0f3F800000;
	mul.f32 	%f291, %f55, %f55;
	mov.f32 	%f292, 0f3F800000;
	sub.f32 	%f293, %f292, %f291;
	mov.f32 	%f294, 0f00000000;
	max.f32 	%f295, %f294, %f293;
	sqrt.rn.f32 	%f56, %f295;
	mul.f32 	%f820, %f290, 0f40C90FDB;
	abs.f32 	%f58, %f820;
	setp.neu.f32	%p12, %f58, 0f7F800000;
	mov.f32 	%f814, %f820;
	@%p12 bra 	BB0_8;

	mov.f32 	%f764, 0f00000000;
	mul.rn.f32 	%f814, %f820, %f764;

BB0_8:
	mul.f32 	%f297, %f814, 0f3F22F983;
	cvt.rni.s32.f32	%r383, %f297;
	cvt.rn.f32.s32	%f298, %r383;
	neg.f32 	%f299, %f298;
	mov.f32 	%f300, 0f3FC90FDA;
	fma.rn.f32 	%f301, %f299, %f300, %f814;
	mov.f32 	%f302, 0f33A22168;
	fma.rn.f32 	%f303, %f299, %f302, %f301;
	mov.f32 	%f304, 0f27C234C5;
	fma.rn.f32 	%f815, %f299, %f304, %f303;
	abs.f32 	%f305, %f814;
	setp.leu.f32	%p13, %f305, 0f47CE4780;
	@%p13 bra 	BB0_19;

	add.u64 	%rd49, %SP, 12;
	cvta.to.local.u64 	%rd279, %rd49;
	mov.u32 	%r374, 0;
	mov.u64 	%rd280, 0;
	mov.u32 	%r375, %r374;

BB0_10:
	.pragma "nounroll";
	mov.b32 	 %r350, %f814;
	shl.b32 	%r349, %r350, 8;
	or.b32  	%r348, %r349, -2147483648;
	add.u64 	%rd275, %SP, 12;
	cvta.to.local.u64 	%rd274, %rd275;
	shl.b64 	%rd50, %rd280, 2;
	mov.u64 	%rd51, __cudart_i2opi_f;
	add.s64 	%rd52, %rd51, %rd50;
	ld.const.u32 	%r138, [%rd52];
	// inline asm
	{
	mad.lo.cc.u32   %r136, %r138, %r348, %r375;
	madc.hi.u32     %r375, %r138, %r348,  0;
	}
	// inline asm
	st.local.u32 	[%rd279], %r136;
	add.s32 	%r374, %r374, 1;
	cvt.s64.s32	%rd280, %r374;
	mul.wide.s32 	%rd55, %r374, 4;
	add.s64 	%rd279, %rd274, %rd55;
	setp.ne.s32	%p14, %r374, 6;
	@%p14 bra 	BB0_10;

	mov.b32 	 %r352, %f814;
	shr.u32 	%r351, %r352, 23;
	add.u64 	%rd273, %SP, 12;
	and.b32  	%r141, %r351, 255;
	add.s32 	%r142, %r141, -128;
	shr.u32 	%r143, %r142, 5;
	cvta.to.local.u64 	%rd57, %rd273;
	st.local.u32 	[%rd57+24], %r375;
	mov.u32 	%r144, 6;
	sub.s32 	%r145, %r144, %r143;
	mul.wide.s32 	%rd58, %r145, 4;
	add.s64 	%rd8, %rd57, %rd58;
	ld.local.u32 	%r376, [%rd8];
	ld.local.u32 	%r377, [%rd8+-4];
	and.b32  	%r23, %r351, 31;
	setp.eq.s32	%p15, %r23, 0;
	@%p15 bra 	BB0_13;

	mov.u32 	%r146, 32;
	sub.s32 	%r147, %r146, %r23;
	shr.u32 	%r148, %r377, %r147;
	shl.b32 	%r149, %r376, %r23;
	add.s32 	%r376, %r148, %r149;
	ld.local.u32 	%r150, [%rd8+-8];
	shr.u32 	%r151, %r150, %r147;
	shl.b32 	%r152, %r377, %r23;
	add.s32 	%r377, %r151, %r152;

BB0_13:
	mov.b32 	 %r355, %f814;
	and.b32  	%r379, %r355, -2147483648;
	shr.u32 	%r153, %r377, 30;
	shl.b32 	%r154, %r376, 2;
	add.s32 	%r378, %r153, %r154;
	shl.b32 	%r29, %r377, 2;
	shr.u32 	%r155, %r378, 31;
	shr.u32 	%r156, %r376, 30;
	add.s32 	%r30, %r155, %r156;
	setp.eq.s32	%p16, %r155, 0;
	@%p16 bra 	BB0_14;
	bra.uni 	BB0_15;

BB0_14:
	mov.u32 	%r380, %r29;
	bra.uni 	BB0_16;

BB0_15:
	mov.b32 	 %r357, %f814;
	and.b32  	%r356, %r357, -2147483648;
	not.b32 	%r157, %r378;
	neg.s32 	%r380, %r29;
	setp.eq.s32	%p17, %r29, 0;
	selp.u32	%r158, 1, 0, %p17;
	add.s32 	%r378, %r158, %r157;
	xor.b32  	%r379, %r356, -2147483648;

BB0_16:
	mov.b32 	 %r359, %f814;
	and.b32  	%r358, %r359, -2147483648;
	clz.b32 	%r382, %r378;
	setp.eq.s32	%p18, %r382, 0;
	shl.b32 	%r159, %r378, %r382;
	mov.u32 	%r160, 32;
	sub.s32 	%r161, %r160, %r382;
	shr.u32 	%r162, %r380, %r161;
	add.s32 	%r163, %r162, %r159;
	selp.b32	%r38, %r378, %r163, %p18;
	mov.u32 	%r164, -921707870;
	mul.hi.u32 	%r381, %r38, %r164;
	setp.eq.s32	%p19, %r358, 0;
	neg.s32 	%r165, %r30;
	selp.b32	%r383, %r30, %r165, %p19;
	setp.lt.s32	%p20, %r381, 1;
	@%p20 bra 	BB0_18;

	mul.lo.s32 	%r166, %r38, -921707870;
	shr.u32 	%r167, %r166, 31;
	shl.b32 	%r168, %r381, 1;
	add.s32 	%r381, %r167, %r168;
	add.s32 	%r382, %r382, 1;

BB0_18:
	mov.u32 	%r169, 126;
	sub.s32 	%r170, %r169, %r382;
	shl.b32 	%r171, %r170, 23;
	add.s32 	%r172, %r381, 1;
	shr.u32 	%r173, %r172, 7;
	add.s32 	%r174, %r173, 1;
	shr.u32 	%r175, %r174, 1;
	add.s32 	%r176, %r175, %r171;
	or.b32  	%r177, %r176, %r379;
	mov.b32 	 %f815, %r177;

BB0_19:
	add.s32 	%r46, %r383, 1;
	and.b32  	%r47, %r46, 1;
	setp.eq.s32	%p21, %r47, 0;
	@%p21 bra 	BB0_21;
	bra.uni 	BB0_20;

BB0_21:
	mul.rn.f32 	%f772, %f815, %f815;
	mov.f32 	%f308, 0f3C08839E;
	mov.f32 	%f309, 0fB94CA1F9;
	fma.rn.f32 	%f816, %f309, %f772, %f308;
	bra.uni 	BB0_22;

BB0_20:
	mul.rn.f32 	%f768, %f815, %f815;
	mov.f32 	%f306, 0fBAB6061A;
	mov.f32 	%f307, 0f37CCF5CE;
	fma.rn.f32 	%f816, %f307, %f768, %f306;

BB0_22:
	@%p21 bra 	BB0_24;
	bra.uni 	BB0_23;

BB0_24:
	mul.rn.f32 	%f771, %f815, %f815;
	mov.f32 	%f767, 0f00000000;
	mov.f32 	%f313, 0fBE2AAAA3;
	fma.rn.f32 	%f314, %f816, %f771, %f313;
	fma.rn.f32 	%f817, %f314, %f771, %f767;
	bra.uni 	BB0_25;

BB0_23:
	mul.rn.f32 	%f769, %f815, %f815;
	mov.f32 	%f310, 0f3D2AAAA5;
	fma.rn.f32 	%f311, %f816, %f769, %f310;
	mov.f32 	%f312, 0fBF000000;
	fma.rn.f32 	%f817, %f311, %f769, %f312;

BB0_25:
	fma.rn.f32 	%f818, %f817, %f815, %f815;
	@%p21 bra 	BB0_27;

	mul.rn.f32 	%f770, %f815, %f815;
	mov.f32 	%f754, 0f3F800000;
	fma.rn.f32 	%f818, %f817, %f770, %f754;

BB0_27:
	add.s32 	%r360, %r383, 1;
	and.b32  	%r178, %r360, 2;
	setp.eq.s32	%p24, %r178, 0;
	@%p24 bra 	BB0_29;

	mov.f32 	%f755, 0f00000000;
	mov.f32 	%f318, 0fBF800000;
	fma.rn.f32 	%f818, %f818, %f318, %f755;

BB0_29:
	abs.f32 	%f756, %f820;
	setp.neu.f32	%p102, %f756, 0f7F800000;
	@%p102 bra 	BB0_31;

	mov.f32 	%f766, 0f00000000;
	mul.rn.f32 	%f820, %f820, %f766;

BB0_31:
	mov.f32 	%f759, 0f27C234C5;
	mov.f32 	%f758, 0f33A22168;
	mov.f32 	%f757, 0f3FC90FDA;
	mul.f32 	%f320, %f820, 0f3F22F983;
	cvt.rni.s32.f32	%r393, %f320;
	cvt.rn.f32.s32	%f321, %r393;
	neg.f32 	%f322, %f321;
	fma.rn.f32 	%f324, %f322, %f757, %f820;
	fma.rn.f32 	%f326, %f322, %f758, %f324;
	fma.rn.f32 	%f821, %f322, %f759, %f326;
	abs.f32 	%f328, %f820;
	setp.leu.f32	%p26, %f328, 0f47CE4780;
	@%p26 bra 	BB0_42;

	add.u64 	%rd60, %SP, 12;
	cvta.to.local.u64 	%rd281, %rd60;
	mov.b32 	 %r49, %f820;
	shl.b32 	%r181, %r49, 8;
	or.b32  	%r51, %r181, -2147483648;
	mov.u32 	%r384, 0;
	mov.u64 	%rd282, %rd25;
	mov.u32 	%r385, %r384;

BB0_33:
	.pragma "nounroll";
	add.u64 	%rd277, %SP, 12;
	cvta.to.local.u64 	%rd276, %rd277;
	shl.b64 	%rd61, %rd282, 2;
	mov.u64 	%rd62, __cudart_i2opi_f;
	add.s64 	%rd63, %rd62, %rd61;
	ld.const.u32 	%r184, [%rd63];
	// inline asm
	{
	mad.lo.cc.u32   %r182, %r184, %r51, %r385;
	madc.hi.u32     %r385, %r184, %r51,  0;
	}
	// inline asm
	st.local.u32 	[%rd281], %r182;
	add.s32 	%r384, %r384, 1;
	cvt.s64.s32	%rd282, %r384;
	mul.wide.s32 	%rd64, %r384, 4;
	add.s64 	%rd281, %rd276, %rd64;
	setp.ne.s32	%p27, %r384, 6;
	@%p27 bra 	BB0_33;

	mov.b32 	 %r362, %f820;
	shr.u32 	%r361, %r362, 23;
	add.u64 	%rd278, %SP, 12;
	and.b32  	%r187, %r361, 255;
	add.s32 	%r188, %r187, -128;
	shr.u32 	%r189, %r188, 5;
	cvta.to.local.u64 	%rd66, %rd278;
	st.local.u32 	[%rd66+24], %r385;
	mov.u32 	%r190, 6;
	sub.s32 	%r191, %r190, %r189;
	mul.wide.s32 	%rd67, %r191, 4;
	add.s64 	%rd15, %rd66, %rd67;
	ld.local.u32 	%r386, [%rd15];
	ld.local.u32 	%r387, [%rd15+-4];
	and.b32  	%r59, %r361, 31;
	setp.eq.s32	%p28, %r59, 0;
	@%p28 bra 	BB0_36;

	mov.u32 	%r192, 32;
	sub.s32 	%r193, %r192, %r59;
	shr.u32 	%r194, %r387, %r193;
	shl.b32 	%r195, %r386, %r59;
	add.s32 	%r386, %r194, %r195;
	ld.local.u32 	%r196, [%rd15+-8];
	shr.u32 	%r197, %r196, %r193;
	shl.b32 	%r198, %r387, %r59;
	add.s32 	%r387, %r197, %r198;

BB0_36:
	mov.b32 	 %r365, %f820;
	and.b32  	%r389, %r365, -2147483648;
	shr.u32 	%r199, %r387, 30;
	shl.b32 	%r200, %r386, 2;
	add.s32 	%r388, %r199, %r200;
	shl.b32 	%r65, %r387, 2;
	shr.u32 	%r201, %r388, 31;
	shr.u32 	%r202, %r386, 30;
	add.s32 	%r66, %r201, %r202;
	setp.eq.s32	%p29, %r201, 0;
	@%p29 bra 	BB0_37;
	bra.uni 	BB0_38;

BB0_37:
	mov.u32 	%r390, %r65;
	bra.uni 	BB0_39;

BB0_38:
	mov.b32 	 %r367, %f820;
	and.b32  	%r366, %r367, -2147483648;
	not.b32 	%r203, %r388;
	neg.s32 	%r390, %r65;
	setp.eq.s32	%p30, %r65, 0;
	selp.u32	%r204, 1, 0, %p30;
	add.s32 	%r388, %r204, %r203;
	xor.b32  	%r389, %r366, -2147483648;

BB0_39:
	mov.b32 	 %r369, %f820;
	and.b32  	%r368, %r369, -2147483648;
	clz.b32 	%r392, %r388;
	setp.eq.s32	%p31, %r392, 0;
	shl.b32 	%r205, %r388, %r392;
	mov.u32 	%r206, 32;
	sub.s32 	%r207, %r206, %r392;
	shr.u32 	%r208, %r390, %r207;
	add.s32 	%r209, %r208, %r205;
	selp.b32	%r74, %r388, %r209, %p31;
	mov.u32 	%r210, -921707870;
	mul.hi.u32 	%r391, %r74, %r210;
	setp.eq.s32	%p32, %r368, 0;
	neg.s32 	%r211, %r66;
	selp.b32	%r393, %r66, %r211, %p32;
	setp.lt.s32	%p33, %r391, 1;
	@%p33 bra 	BB0_41;

	mul.lo.s32 	%r212, %r74, -921707870;
	shr.u32 	%r213, %r212, 31;
	shl.b32 	%r214, %r391, 1;
	add.s32 	%r391, %r213, %r214;
	add.s32 	%r392, %r392, 1;

BB0_41:
	mov.u32 	%r215, 126;
	sub.s32 	%r216, %r215, %r392;
	shl.b32 	%r217, %r216, 23;
	add.s32 	%r218, %r391, 1;
	shr.u32 	%r219, %r218, 7;
	add.s32 	%r220, %r219, 1;
	shr.u32 	%r221, %r220, 1;
	add.s32 	%r222, %r221, %r217;
	or.b32  	%r223, %r222, %r389;
	mov.b32 	 %f821, %r223;

BB0_42:
	and.b32  	%r82, %r393, 1;
	setp.eq.s32	%p34, %r82, 0;
	@%p34 bra 	BB0_44;
	bra.uni 	BB0_43;

BB0_44:
	mul.rn.f32 	%f780, %f821, %f821;
	mov.f32 	%f331, 0f3C08839E;
	mov.f32 	%f332, 0fB94CA1F9;
	fma.rn.f32 	%f822, %f332, %f780, %f331;
	bra.uni 	BB0_45;

BB0_43:
	mul.rn.f32 	%f776, %f821, %f821;
	mov.f32 	%f329, 0fBAB6061A;
	mov.f32 	%f330, 0f37CCF5CE;
	fma.rn.f32 	%f822, %f330, %f776, %f329;

BB0_45:
	@%p34 bra 	BB0_47;
	bra.uni 	BB0_46;

BB0_47:
	mul.rn.f32 	%f779, %f821, %f821;
	mov.f32 	%f765, 0f00000000;
	mov.f32 	%f336, 0fBE2AAAA3;
	fma.rn.f32 	%f337, %f822, %f779, %f336;
	fma.rn.f32 	%f823, %f337, %f779, %f765;
	bra.uni 	BB0_48;

BB0_46:
	mul.rn.f32 	%f777, %f821, %f821;
	mov.f32 	%f333, 0f3D2AAAA5;
	fma.rn.f32 	%f334, %f822, %f777, %f333;
	mov.f32 	%f335, 0fBF000000;
	fma.rn.f32 	%f823, %f334, %f777, %f335;

BB0_48:
	fma.rn.f32 	%f824, %f823, %f821, %f821;
	@%p34 bra 	BB0_50;

	mul.rn.f32 	%f778, %f821, %f821;
	mov.f32 	%f760, 0f3F800000;
	fma.rn.f32 	%f824, %f823, %f778, %f760;

BB0_50:
	and.b32  	%r224, %r393, 2;
	setp.eq.s32	%p37, %r224, 0;
	@%p37 bra 	BB0_52;

	mov.f32 	%f761, 0f00000000;
	mov.f32 	%f341, 0fBF800000;
	fma.rn.f32 	%f824, %f824, %f341, %f761;

BB0_52:
	mad.lo.s32 	%r345, %r10, 1664525, 1013904223;
	mad.lo.s32 	%r373, %r345, 1664525, 1013904223;
	max.f32 	%f762, %f282, %f242;
	mul.f32 	%f350, %f56, %f818;
	add.u64 	%rd68, %SP, 0;
	cvta.to.local.u64 	%rd69, %rd68;
	mul.f32 	%f351, %f56, %f824;
	mul.f32 	%f352, %f13, %f351;
	mul.f32 	%f353, %f14, %f351;
	mul.f32 	%f354, %f15, %f351;
	fma.rn.f32 	%f355, %f22, %f350, %f352;
	fma.rn.f32 	%f356, %f21, %f350, %f353;
	fma.rn.f32 	%f357, %f20, %f350, %f354;
	fma.rn.f32 	%f345, %f781, %f55, %f355;
	fma.rn.f32 	%f346, %f782, %f55, %f356;
	fma.rn.f32 	%f347, %f783, %f55, %f357;
	mov.u32 	%r226, 0;
	st.local.u32 	[%rd69+8], %r226;
	st.local.u32 	[%rd69+4], %r226;
	st.local.u32 	[%rd69], %r226;
	ld.global.u32 	%r225, [root];
	mov.f32 	%f349, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r225, %f10, %f11, %f12, %f345, %f346, %f347, %r226, %f762, %f349, %rd68, %r113);
	// inline asm
	mul.f32 	%f358, %f782, %f346;
	fma.rn.f32 	%f359, %f781, %f345, %f358;
	fma.rn.f32 	%f360, %f783, %f347, %f359;
	ld.local.f32 	%f361, [%rd69+8];
	ld.local.f32 	%f362, [%rd69+4];
	ld.local.f32 	%f363, [%rd69];
	fma.rn.f32 	%f807, %f345, %f363, %f807;
	fma.rn.f32 	%f806, %f345, %f362, %f806;
	fma.rn.f32 	%f805, %f345, %f361, %f805;
	fma.rn.f32 	%f810, %f346, %f363, %f810;
	fma.rn.f32 	%f809, %f346, %f362, %f809;
	fma.rn.f32 	%f808, %f346, %f361, %f808;
	fma.rn.f32 	%f813, %f347, %f363, %f813;
	fma.rn.f32 	%f812, %f347, %f362, %f812;
	fma.rn.f32 	%f811, %f347, %f361, %f811;
	add.f32 	%f804, %f804, %f363;
	add.f32 	%f803, %f803, %f362;
	add.f32 	%f802, %f802, %f361;
	cvt.sat.f32.f32	%f364, %f360;
	fma.rn.f32 	%f801, %f364, %f363, %f801;
	fma.rn.f32 	%f800, %f364, %f362, %f800;
	fma.rn.f32 	%f799, %f364, %f361, %f799;
	add.s32 	%r372, %r372, 1;
	setp.lt.s32	%p38, %r372, %r2;
	@%p38 bra 	BB0_6;

	mad.lo.s32 	%r347, %r10, 1664525, 1013904223;
	mad.lo.s32 	%r373, %r347, 1664525, 1013904223;
	add.s32 	%r370, %r370, 1;
	setp.lt.s32	%p39, %r370, %r2;
	@%p39 bra 	BB0_5;

BB0_54:
	mul.lo.s32 	%r228, %r2, %r2;
	cvt.rn.f32.s32	%f365, %r228;
	rcp.rn.f32 	%f366, %f365;
	cvt.rn.f32.u32	%f367, %r5;
	cvt.rn.f32.u32	%f368, %r4;
	tex.2d.v4.f32.f32	{%f369, %f370, %f371, %f372}, [albedoTex, {%f368, %f367}];
	mul.f32 	%f123, %f804, %f366;
	mul.f32 	%f124, %f803, %f366;
	mul.f32 	%f125, %f802, %f366;
	mul.f32 	%f126, %f807, %f366;
	mul.f32 	%f127, %f806, %f366;
	mul.f32 	%f128, %f805, %f366;
	mul.f32 	%f129, %f810, %f366;
	mul.f32 	%f130, %f809, %f366;
	mul.f32 	%f131, %f808, %f366;
	mul.f32 	%f132, %f813, %f366;
	mul.f32 	%f133, %f812, %f366;
	mul.f32 	%f134, %f811, %f366;
	mul.f32 	%f373, %f801, %f366;
	mul.f32 	%f374, %f800, %f366;
	mul.f32 	%f375, %f799, %f366;
	fma.rn.f32 	%f376, %f801, %f366, %f373;
	fma.rn.f32 	%f377, %f800, %f366, %f374;
	fma.rn.f32 	%f378, %f799, %f366, %f375;
	mul.f32 	%f135, %f376, %f369;
	mul.f32 	%f136, %f377, %f370;
	mul.f32 	%f137, %f378, %f371;
	add.f32 	%f138, %f209, %f135;
	add.f32 	%f139, %f210, %f136;
	add.f32 	%f140, %f211, %f137;
	ld.global.u32 	%r395, [imageEnabled];
	and.b32  	%r229, %r395, 1;
	setp.eq.b32	%p40, %r229, 1;
	@!%p40 bra 	BB0_89;
	bra.uni 	BB0_55;

BB0_55:
	abs.f32 	%f142, %f138;
	setp.lt.f32	%p41, %f142, 0f00800000;
	mul.f32 	%f384, %f142, 0f4B800000;
	selp.f32	%f385, 0fC3170000, 0fC2FE0000, %p41;
	selp.f32	%f386, %f384, %f142, %p41;
	mov.b32 	 %r230, %f386;
	and.b32  	%r231, %r230, 8388607;
	or.b32  	%r232, %r231, 1065353216;
	mov.b32 	 %f387, %r232;
	shr.u32 	%r233, %r230, 23;
	cvt.rn.f32.u32	%f388, %r233;
	add.f32 	%f389, %f385, %f388;
	setp.gt.f32	%p42, %f387, 0f3FB504F3;
	mul.f32 	%f390, %f387, 0f3F000000;
	add.f32 	%f391, %f389, 0f3F800000;
	selp.f32	%f392, %f390, %f387, %p42;
	selp.f32	%f393, %f391, %f389, %p42;
	add.f32 	%f394, %f392, 0fBF800000;
	add.f32 	%f380, %f392, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f379,%f380;
	// inline asm
	add.f32 	%f395, %f394, %f394;
	mul.f32 	%f396, %f379, %f395;
	mul.f32 	%f397, %f396, %f396;
	mov.f32 	%f398, 0f3C4CAF63;
	mov.f32 	%f399, 0f3B18F0FE;
	fma.rn.f32 	%f400, %f399, %f397, %f398;
	mov.f32 	%f401, 0f3DAAAABD;
	fma.rn.f32 	%f402, %f400, %f397, %f401;
	mul.rn.f32 	%f403, %f402, %f397;
	mul.rn.f32 	%f404, %f403, %f396;
	sub.f32 	%f405, %f394, %f396;
	neg.f32 	%f406, %f396;
	add.f32 	%f407, %f405, %f405;
	fma.rn.f32 	%f408, %f406, %f394, %f407;
	mul.rn.f32 	%f409, %f379, %f408;
	add.f32 	%f410, %f404, %f396;
	sub.f32 	%f411, %f396, %f410;
	add.f32 	%f412, %f404, %f411;
	add.f32 	%f413, %f409, %f412;
	add.f32 	%f414, %f410, %f413;
	sub.f32 	%f415, %f410, %f414;
	add.f32 	%f416, %f413, %f415;
	mov.f32 	%f417, 0f3F317200;
	mul.rn.f32 	%f418, %f393, %f417;
	mov.f32 	%f419, 0f35BFBE8E;
	mul.rn.f32 	%f420, %f393, %f419;
	add.f32 	%f421, %f418, %f414;
	sub.f32 	%f422, %f418, %f421;
	add.f32 	%f423, %f414, %f422;
	add.f32 	%f424, %f416, %f423;
	add.f32 	%f425, %f420, %f424;
	add.f32 	%f426, %f421, %f425;
	sub.f32 	%f427, %f421, %f426;
	add.f32 	%f428, %f425, %f427;
	mov.f32 	%f429, 0f3EE66666;
	mul.rn.f32 	%f430, %f429, %f426;
	neg.f32 	%f431, %f430;
	fma.rn.f32 	%f432, %f429, %f426, %f431;
	fma.rn.f32 	%f433, %f429, %f428, %f432;
	mov.f32 	%f434, 0f00000000;
	fma.rn.f32 	%f435, %f434, %f426, %f433;
	add.rn.f32 	%f436, %f430, %f435;
	neg.f32 	%f437, %f436;
	add.rn.f32 	%f438, %f430, %f437;
	add.rn.f32 	%f439, %f438, %f435;
	mov.b32 	 %r234, %f436;
	setp.eq.s32	%p43, %r234, 1118925336;
	add.s32 	%r235, %r234, -1;
	mov.b32 	 %f440, %r235;
	add.f32 	%f441, %f439, 0f37000000;
	selp.f32	%f442, %f440, %f436, %p43;
	selp.f32	%f143, %f441, %f439, %p43;
	mul.f32 	%f443, %f442, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f444, %f443;
	mov.f32 	%f445, 0fBF317200;
	fma.rn.f32 	%f446, %f444, %f445, %f442;
	mov.f32 	%f447, 0fB5BFBE8E;
	fma.rn.f32 	%f448, %f444, %f447, %f446;
	mul.f32 	%f449, %f448, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f450, %f449;
	add.f32 	%f451, %f444, 0f00000000;
	ex2.approx.f32 	%f452, %f451;
	mul.f32 	%f453, %f450, %f452;
	setp.lt.f32	%p44, %f442, 0fC2D20000;
	selp.f32	%f454, 0f00000000, %f453, %p44;
	setp.gt.f32	%p45, %f442, 0f42D20000;
	selp.f32	%f841, 0f7F800000, %f454, %p45;
	setp.eq.f32	%p46, %f841, 0f7F800000;
	@%p46 bra 	BB0_57;

	fma.rn.f32 	%f841, %f841, %f143, %f841;

BB0_57:
	mov.f32 	%f726, 0f3E666666;
	cvt.rzi.f32.f32	%f725, %f726;
	fma.rn.f32 	%f724, %f725, 0fC0000000, 0f3EE66666;
	abs.f32 	%f723, %f724;
	setp.lt.f32	%p47, %f138, 0f00000000;
	setp.eq.f32	%p48, %f723, 0f3F800000;
	and.pred  	%p1, %p47, %p48;
	mov.b32 	 %r236, %f841;
	xor.b32  	%r237, %r236, -2147483648;
	mov.b32 	 %f455, %r237;
	selp.f32	%f843, %f455, %f841, %p1;
	setp.eq.f32	%p49, %f138, 0f00000000;
	@%p49 bra 	BB0_60;
	bra.uni 	BB0_58;

BB0_60:
	add.f32 	%f458, %f138, %f138;
	selp.f32	%f843, %f458, 0f00000000, %p48;
	bra.uni 	BB0_61;

BB0_113:
	mov.u64 	%rd212, image_RNM0;
	cvta.global.u64 	%rd207, %rd212;
	mov.u32 	%r311, 8;
	mov.u64 	%rd211, 0;
	// inline asm
	call (%rd206), _rt_buffer_get_64, (%rd207, %r95, %r311, %rd18, %rd19, %rd211, %rd211);
	// inline asm
	mov.f32 	%f701, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs104, %f701;}

	// inline asm
	mov.u16 	%rs105, 0;
	st.v4.u16 	[%rd206], {%rs104, %rs104, %rs104, %rs105};

BB0_114:
	ld.global.u32 	%r312, [additive];
	setp.eq.s32	%p99, %r312, 0;
	@%p99 bra 	BB0_116;

	mov.u64 	%rd225, image_RNM1;
	cvta.global.u64 	%rd214, %rd225;
	mov.u32 	%r316, 8;
	mov.u64 	%rd224, 0;
	// inline asm
	call (%rd213), _rt_buffer_get_64, (%rd214, %r95, %r316, %rd18, %rd19, %rd224, %rd224);
	// inline asm
	ld.v4.u16 	{%rs112, %rs113, %rs114, %rs115}, [%rd213];
	// inline asm
	{  cvt.f32.f16 %f702, %rs112;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f703, %rs113;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f704, %rs114;}

	// inline asm
	// inline asm
	call (%rd219), _rt_buffer_get_64, (%rd214, %r95, %r316, %rd18, %rd19, %rd224, %rd224);
	// inline asm
	add.f32 	%f705, %f702, 0f00000000;
	add.f32 	%f706, %f703, 0f00000000;
	add.f32 	%f707, %f704, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs111, %f707;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs110, %f706;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs109, %f705;}

	// inline asm
	mov.u16 	%rs116, 0;
	st.v4.u16 	[%rd219], {%rs109, %rs110, %rs111, %rs116};
	bra.uni 	BB0_117;

BB0_116:
	mov.u64 	%rd232, image_RNM1;
	cvta.global.u64 	%rd227, %rd232;
	mov.u32 	%r318, 8;
	mov.u64 	%rd231, 0;
	// inline asm
	call (%rd226), _rt_buffer_get_64, (%rd227, %r95, %r318, %rd18, %rd19, %rd231, %rd231);
	// inline asm
	mov.f32 	%f708, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs117, %f708;}

	// inline asm
	mov.u16 	%rs118, 0;
	st.v4.u16 	[%rd226], {%rs117, %rs117, %rs117, %rs118};

BB0_117:
	ld.global.u32 	%r319, [additive];
	setp.eq.s32	%p100, %r319, 0;
	@%p100 bra 	BB0_119;

	mov.u64 	%rd245, image_RNM2;
	cvta.global.u64 	%rd234, %rd245;
	mov.u32 	%r323, 8;
	mov.u64 	%rd244, 0;
	// inline asm
	call (%rd233), _rt_buffer_get_64, (%rd234, %r95, %r323, %rd18, %rd19, %rd244, %rd244);
	// inline asm
	ld.v4.u16 	{%rs125, %rs126, %rs127, %rs128}, [%rd233];
	// inline asm
	{  cvt.f32.f16 %f709, %rs125;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f710, %rs126;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f711, %rs127;}

	// inline asm
	// inline asm
	call (%rd239), _rt_buffer_get_64, (%rd234, %r95, %r323, %rd18, %rd19, %rd244, %rd244);
	// inline asm
	add.f32 	%f712, %f709, 0f00000000;
	add.f32 	%f713, %f710, 0f00000000;
	add.f32 	%f714, %f711, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs124, %f714;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs123, %f713;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs122, %f712;}

	// inline asm
	mov.u16 	%rs129, 0;
	st.v4.u16 	[%rd239], {%rs122, %rs123, %rs124, %rs129};
	bra.uni 	BB0_120;

BB0_119:
	mov.u64 	%rd252, image_RNM2;
	cvta.global.u64 	%rd247, %rd252;
	mov.u32 	%r325, 8;
	mov.u64 	%rd251, 0;
	// inline asm
	call (%rd246), _rt_buffer_get_64, (%rd247, %r95, %r325, %rd18, %rd19, %rd251, %rd251);
	// inline asm
	mov.f32 	%f715, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs130, %f715;}

	// inline asm
	mov.u16 	%rs131, 0;
	st.v4.u16 	[%rd246], {%rs130, %rs130, %rs130, %rs131};

BB0_120:
	ld.global.u32 	%r326, [additive];
	setp.eq.s32	%p101, %r326, 0;
	@%p101 bra 	BB0_122;

	mov.u64 	%rd265, image_RNM3;
	cvta.global.u64 	%rd254, %rd265;
	mov.u32 	%r330, 8;
	mov.u64 	%rd264, 0;
	// inline asm
	call (%rd253), _rt_buffer_get_64, (%rd254, %r95, %r330, %rd18, %rd19, %rd264, %rd264);
	// inline asm
	ld.v4.u16 	{%rs138, %rs139, %rs140, %rs141}, [%rd253];
	// inline asm
	{  cvt.f32.f16 %f716, %rs138;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f717, %rs139;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f718, %rs140;}

	// inline asm
	// inline asm
	call (%rd259), _rt_buffer_get_64, (%rd254, %r95, %r330, %rd18, %rd19, %rd264, %rd264);
	// inline asm
	add.f32 	%f719, %f716, 0f00000000;
	add.f32 	%f720, %f717, 0f00000000;
	add.f32 	%f721, %f718, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs137, %f721;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs136, %f720;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs135, %f719;}

	// inline asm
	mov.u16 	%rs142, 0;
	st.v4.u16 	[%rd259], {%rs135, %rs136, %rs137, %rs142};
	bra.uni 	BB0_123;

BB0_122:
	mov.u64 	%rd272, image_RNM3;
	cvta.global.u64 	%rd267, %rd272;
	mov.u32 	%r332, 8;
	mov.u64 	%rd271, 0;
	// inline asm
	call (%rd266), _rt_buffer_get_64, (%rd267, %r95, %r332, %rd18, %rd19, %rd271, %rd271);
	// inline asm
	mov.f32 	%f722, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs143, %f722;}

	// inline asm
	mov.u16 	%rs144, 0;
	st.v4.u16 	[%rd266], {%rs143, %rs143, %rs143, %rs144};
	bra.uni 	BB0_123;

BB0_58:
	setp.geu.f32	%p50, %f138, 0f00000000;
	@%p50 bra 	BB0_61;

	mov.f32 	%f750, 0f3EE66666;
	cvt.rzi.f32.f32	%f457, %f750;
	setp.neu.f32	%p51, %f457, 0f3EE66666;
	selp.f32	%f843, 0f7FFFFFFF, %f843, %p51;

BB0_61:
	abs.f32 	%f727, %f138;
	add.f32 	%f459, %f727, 0f3EE66666;
	mov.b32 	 %r238, %f459;
	setp.lt.s32	%p53, %r238, 2139095040;
	@%p53 bra 	BB0_66;

	abs.f32 	%f748, %f138;
	setp.gtu.f32	%p54, %f748, 0f7F800000;
	@%p54 bra 	BB0_65;
	bra.uni 	BB0_63;

BB0_65:
	add.f32 	%f843, %f138, 0f3EE66666;
	bra.uni 	BB0_66;

BB0_63:
	abs.f32 	%f749, %f138;
	setp.neu.f32	%p55, %f749, 0f7F800000;
	@%p55 bra 	BB0_66;

	selp.f32	%f843, 0fFF800000, 0f7F800000, %p1;

BB0_66:
	mov.f32 	%f736, 0fB5BFBE8E;
	mov.f32 	%f735, 0fBF317200;
	mov.f32 	%f734, 0f00000000;
	mov.f32 	%f733, 0f35BFBE8E;
	mov.f32 	%f732, 0f3F317200;
	mov.f32 	%f731, 0f3DAAAABD;
	mov.f32 	%f730, 0f3C4CAF63;
	mov.f32 	%f729, 0f3B18F0FE;
	mov.f32 	%f728, 0f3EE66666;
	setp.eq.f32	%p56, %f138, 0f3F800000;
	selp.f32	%f154, 0f3F800000, %f843, %p56;
	abs.f32 	%f155, %f139;
	setp.lt.f32	%p57, %f155, 0f00800000;
	mul.f32 	%f462, %f155, 0f4B800000;
	selp.f32	%f463, 0fC3170000, 0fC2FE0000, %p57;
	selp.f32	%f464, %f462, %f155, %p57;
	mov.b32 	 %r239, %f464;
	and.b32  	%r240, %r239, 8388607;
	or.b32  	%r241, %r240, 1065353216;
	mov.b32 	 %f465, %r241;
	shr.u32 	%r242, %r239, 23;
	cvt.rn.f32.u32	%f466, %r242;
	add.f32 	%f467, %f463, %f466;
	setp.gt.f32	%p58, %f465, 0f3FB504F3;
	mul.f32 	%f468, %f465, 0f3F000000;
	add.f32 	%f469, %f467, 0f3F800000;
	selp.f32	%f470, %f468, %f465, %p58;
	selp.f32	%f471, %f469, %f467, %p58;
	add.f32 	%f472, %f470, 0fBF800000;
	add.f32 	%f461, %f470, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f460,%f461;
	// inline asm
	add.f32 	%f473, %f472, %f472;
	mul.f32 	%f474, %f460, %f473;
	mul.f32 	%f475, %f474, %f474;
	fma.rn.f32 	%f478, %f729, %f475, %f730;
	fma.rn.f32 	%f480, %f478, %f475, %f731;
	mul.rn.f32 	%f481, %f480, %f475;
	mul.rn.f32 	%f482, %f481, %f474;
	sub.f32 	%f483, %f472, %f474;
	neg.f32 	%f484, %f474;
	add.f32 	%f485, %f483, %f483;
	fma.rn.f32 	%f486, %f484, %f472, %f485;
	mul.rn.f32 	%f487, %f460, %f486;
	add.f32 	%f488, %f482, %f474;
	sub.f32 	%f489, %f474, %f488;
	add.f32 	%f490, %f482, %f489;
	add.f32 	%f491, %f487, %f490;
	add.f32 	%f492, %f488, %f491;
	sub.f32 	%f493, %f488, %f492;
	add.f32 	%f494, %f491, %f493;
	mul.rn.f32 	%f496, %f471, %f732;
	mul.rn.f32 	%f498, %f471, %f733;
	add.f32 	%f499, %f496, %f492;
	sub.f32 	%f500, %f496, %f499;
	add.f32 	%f501, %f492, %f500;
	add.f32 	%f502, %f494, %f501;
	add.f32 	%f503, %f498, %f502;
	add.f32 	%f504, %f499, %f503;
	sub.f32 	%f505, %f499, %f504;
	add.f32 	%f506, %f503, %f505;
	mul.rn.f32 	%f508, %f728, %f504;
	neg.f32 	%f509, %f508;
	fma.rn.f32 	%f510, %f728, %f504, %f509;
	fma.rn.f32 	%f511, %f728, %f506, %f510;
	fma.rn.f32 	%f513, %f734, %f504, %f511;
	add.rn.f32 	%f514, %f508, %f513;
	neg.f32 	%f515, %f514;
	add.rn.f32 	%f516, %f508, %f515;
	add.rn.f32 	%f517, %f516, %f513;
	mov.b32 	 %r243, %f514;
	setp.eq.s32	%p59, %r243, 1118925336;
	add.s32 	%r244, %r243, -1;
	mov.b32 	 %f518, %r244;
	add.f32 	%f519, %f517, 0f37000000;
	selp.f32	%f520, %f518, %f514, %p59;
	selp.f32	%f156, %f519, %f517, %p59;
	mul.f32 	%f521, %f520, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f522, %f521;
	fma.rn.f32 	%f524, %f522, %f735, %f520;
	fma.rn.f32 	%f526, %f522, %f736, %f524;
	mul.f32 	%f527, %f526, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f528, %f527;
	add.f32 	%f529, %f522, 0f00000000;
	ex2.approx.f32 	%f530, %f529;
	mul.f32 	%f531, %f528, %f530;
	setp.lt.f32	%p60, %f520, 0fC2D20000;
	selp.f32	%f532, 0f00000000, %f531, %p60;
	setp.gt.f32	%p61, %f520, 0f42D20000;
	selp.f32	%f844, 0f7F800000, %f532, %p61;
	setp.eq.f32	%p62, %f844, 0f7F800000;
	@%p62 bra 	BB0_68;

	fma.rn.f32 	%f844, %f844, %f156, %f844;

BB0_68:
	setp.lt.f32	%p63, %f139, 0f00000000;
	and.pred  	%p2, %p63, %p48;
	mov.b32 	 %r245, %f844;
	xor.b32  	%r246, %r245, -2147483648;
	mov.b32 	 %f533, %r246;
	selp.f32	%f846, %f533, %f844, %p2;
	setp.eq.f32	%p65, %f139, 0f00000000;
	@%p65 bra 	BB0_71;
	bra.uni 	BB0_69;

BB0_71:
	add.f32 	%f536, %f139, %f139;
	selp.f32	%f846, %f536, 0f00000000, %p48;
	bra.uni 	BB0_72;

BB0_69:
	setp.geu.f32	%p66, %f139, 0f00000000;
	@%p66 bra 	BB0_72;

	mov.f32 	%f747, 0f3EE66666;
	cvt.rzi.f32.f32	%f535, %f747;
	setp.neu.f32	%p67, %f535, 0f3EE66666;
	selp.f32	%f846, 0f7FFFFFFF, %f846, %p67;

BB0_72:
	abs.f32 	%f751, %f139;
	add.f32 	%f537, %f751, 0f3EE66666;
	mov.b32 	 %r247, %f537;
	setp.lt.s32	%p69, %r247, 2139095040;
	@%p69 bra 	BB0_77;

	abs.f32 	%f752, %f139;
	setp.gtu.f32	%p70, %f752, 0f7F800000;
	@%p70 bra 	BB0_76;
	bra.uni 	BB0_74;

BB0_76:
	add.f32 	%f846, %f139, 0f3EE66666;
	bra.uni 	BB0_77;

BB0_74:
	abs.f32 	%f753, %f139;
	setp.neu.f32	%p71, %f753, 0f7F800000;
	@%p71 bra 	BB0_77;

	selp.f32	%f846, 0fFF800000, 0f7F800000, %p2;

BB0_77:
	mov.f32 	%f745, 0fB5BFBE8E;
	mov.f32 	%f744, 0fBF317200;
	mov.f32 	%f743, 0f00000000;
	mov.f32 	%f742, 0f35BFBE8E;
	mov.f32 	%f741, 0f3F317200;
	mov.f32 	%f740, 0f3DAAAABD;
	mov.f32 	%f739, 0f3C4CAF63;
	mov.f32 	%f738, 0f3B18F0FE;
	mov.f32 	%f737, 0f3EE66666;
	setp.eq.f32	%p72, %f139, 0f3F800000;
	selp.f32	%f167, 0f3F800000, %f846, %p72;
	abs.f32 	%f168, %f140;
	setp.lt.f32	%p73, %f168, 0f00800000;
	mul.f32 	%f540, %f168, 0f4B800000;
	selp.f32	%f541, 0fC3170000, 0fC2FE0000, %p73;
	selp.f32	%f542, %f540, %f168, %p73;
	mov.b32 	 %r248, %f542;
	and.b32  	%r249, %r248, 8388607;
	or.b32  	%r250, %r249, 1065353216;
	mov.b32 	 %f543, %r250;
	shr.u32 	%r251, %r248, 23;
	cvt.rn.f32.u32	%f544, %r251;
	add.f32 	%f545, %f541, %f544;
	setp.gt.f32	%p74, %f543, 0f3FB504F3;
	mul.f32 	%f546, %f543, 0f3F000000;
	add.f32 	%f547, %f545, 0f3F800000;
	selp.f32	%f548, %f546, %f543, %p74;
	selp.f32	%f549, %f547, %f545, %p74;
	add.f32 	%f550, %f548, 0fBF800000;
	add.f32 	%f539, %f548, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f538,%f539;
	// inline asm
	add.f32 	%f551, %f550, %f550;
	mul.f32 	%f552, %f538, %f551;
	mul.f32 	%f553, %f552, %f552;
	fma.rn.f32 	%f556, %f738, %f553, %f739;
	fma.rn.f32 	%f558, %f556, %f553, %f740;
	mul.rn.f32 	%f559, %f558, %f553;
	mul.rn.f32 	%f560, %f559, %f552;
	sub.f32 	%f561, %f550, %f552;
	neg.f32 	%f562, %f552;
	add.f32 	%f563, %f561, %f561;
	fma.rn.f32 	%f564, %f562, %f550, %f563;
	mul.rn.f32 	%f565, %f538, %f564;
	add.f32 	%f566, %f560, %f552;
	sub.f32 	%f567, %f552, %f566;
	add.f32 	%f568, %f560, %f567;
	add.f32 	%f569, %f565, %f568;
	add.f32 	%f570, %f566, %f569;
	sub.f32 	%f571, %f566, %f570;
	add.f32 	%f572, %f569, %f571;
	mul.rn.f32 	%f574, %f549, %f741;
	mul.rn.f32 	%f576, %f549, %f742;
	add.f32 	%f577, %f574, %f570;
	sub.f32 	%f578, %f574, %f577;
	add.f32 	%f579, %f570, %f578;
	add.f32 	%f580, %f572, %f579;
	add.f32 	%f581, %f576, %f580;
	add.f32 	%f582, %f577, %f581;
	sub.f32 	%f583, %f577, %f582;
	add.f32 	%f584, %f581, %f583;
	mul.rn.f32 	%f586, %f737, %f582;
	neg.f32 	%f587, %f586;
	fma.rn.f32 	%f588, %f737, %f582, %f587;
	fma.rn.f32 	%f589, %f737, %f584, %f588;
	fma.rn.f32 	%f591, %f743, %f582, %f589;
	add.rn.f32 	%f592, %f586, %f591;
	neg.f32 	%f593, %f592;
	add.rn.f32 	%f594, %f586, %f593;
	add.rn.f32 	%f595, %f594, %f591;
	mov.b32 	 %r252, %f592;
	setp.eq.s32	%p75, %r252, 1118925336;
	add.s32 	%r253, %r252, -1;
	mov.b32 	 %f596, %r253;
	add.f32 	%f597, %f595, 0f37000000;
	selp.f32	%f598, %f596, %f592, %p75;
	selp.f32	%f169, %f597, %f595, %p75;
	mul.f32 	%f599, %f598, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f600, %f599;
	fma.rn.f32 	%f602, %f600, %f744, %f598;
	fma.rn.f32 	%f604, %f600, %f745, %f602;
	mul.f32 	%f605, %f604, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f606, %f605;
	add.f32 	%f607, %f600, 0f00000000;
	ex2.approx.f32 	%f608, %f607;
	mul.f32 	%f609, %f606, %f608;
	setp.lt.f32	%p76, %f598, 0fC2D20000;
	selp.f32	%f610, 0f00000000, %f609, %p76;
	setp.gt.f32	%p77, %f598, 0f42D20000;
	selp.f32	%f847, 0f7F800000, %f610, %p77;
	setp.eq.f32	%p78, %f847, 0f7F800000;
	@%p78 bra 	BB0_79;

	fma.rn.f32 	%f847, %f847, %f169, %f847;

BB0_79:
	setp.lt.f32	%p79, %f140, 0f00000000;
	and.pred  	%p3, %p79, %p48;
	mov.b32 	 %r254, %f847;
	xor.b32  	%r255, %r254, -2147483648;
	mov.b32 	 %f611, %r255;
	selp.f32	%f849, %f611, %f847, %p3;
	setp.eq.f32	%p81, %f140, 0f00000000;
	@%p81 bra 	BB0_82;
	bra.uni 	BB0_80;

BB0_82:
	add.f32 	%f614, %f140, %f140;
	selp.f32	%f849, %f614, 0f00000000, %p48;
	bra.uni 	BB0_83;

BB0_80:
	setp.geu.f32	%p82, %f140, 0f00000000;
	@%p82 bra 	BB0_83;

	mov.f32 	%f746, 0f3EE66666;
	cvt.rzi.f32.f32	%f613, %f746;
	setp.neu.f32	%p83, %f613, 0f3EE66666;
	selp.f32	%f849, 0f7FFFFFFF, %f849, %p83;

BB0_83:
	abs.f32 	%f773, %f140;
	add.f32 	%f615, %f773, 0f3EE66666;
	mov.b32 	 %r256, %f615;
	setp.lt.s32	%p85, %r256, 2139095040;
	@%p85 bra 	BB0_88;

	abs.f32 	%f774, %f140;
	setp.gtu.f32	%p86, %f774, 0f7F800000;
	@%p86 bra 	BB0_87;
	bra.uni 	BB0_85;

BB0_87:
	add.f32 	%f849, %f140, 0f3EE66666;
	bra.uni 	BB0_88;

BB0_85:
	abs.f32 	%f775, %f140;
	setp.neu.f32	%p87, %f775, 0f7F800000;
	@%p87 bra 	BB0_88;

	selp.f32	%f849, 0fFF800000, 0f7F800000, %p3;

BB0_88:
	mov.u32 	%r333, 4;
	setp.eq.f32	%p88, %f140, 0f3F800000;
	selp.f32	%f616, 0f3F800000, %f849, %p88;
	cvt.u64.u32	%rd74, %r5;
	cvt.u64.u32	%rd73, %r4;
	mov.u64 	%rd77, image;
	cvta.global.u64 	%rd72, %rd77;
	// inline asm
	call (%rd71), _rt_buffer_get_64, (%rd72, %r95, %r333, %rd73, %rd74, %rd25, %rd25);
	// inline asm
	cvt.sat.f32.f32	%f617, %f616;
	mul.f32 	%f618, %f617, 0f437FFD71;
	cvt.rzi.u32.f32	%r259, %f618;
	cvt.sat.f32.f32	%f619, %f167;
	mul.f32 	%f620, %f619, 0f437FFD71;
	cvt.rzi.u32.f32	%r260, %f620;
	cvt.sat.f32.f32	%f621, %f154;
	mul.f32 	%f622, %f621, 0f437FFD71;
	cvt.rzi.u32.f32	%r261, %f622;
	cvt.u16.u32	%rs20, %r259;
	cvt.u16.u32	%rs21, %r261;
	cvt.u16.u32	%rs22, %r260;
	mov.u16 	%rs23, 255;
	st.v4.u8 	[%rd71], {%rs20, %rs22, %rs21, %rs23};
	ld.global.u32 	%r395, [imageEnabled];

BB0_89:
	and.b32  	%r262, %r395, 4;
	setp.eq.s32	%p89, %r262, 0;
	@%p89 bra 	BB0_91;

	mov.u32 	%r334, 8;
	cvt.u64.u32	%rd80, %r4;
	cvt.u64.u32	%rd81, %r5;
	mov.u64 	%rd84, image_HDR;
	cvta.global.u64 	%rd79, %rd84;
	// inline asm
	call (%rd78), _rt_buffer_get_64, (%rd79, %r95, %r334, %rd80, %rd81, %rd25, %rd25);
	// inline asm
	mov.f32 	%f626, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f626;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs26, %f140;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f139;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs24, %f138;}

	// inline asm
	st.v4.u16 	[%rd78], {%rs24, %rs25, %rs26, %rs27};
	ld.global.u32 	%r395, [imageEnabled];

BB0_91:
	and.b32  	%r265, %r395, 16;
	setp.eq.s32	%p90, %r265, 0;
	@%p90 bra 	BB0_93;

	mov.u32 	%r335, 8;
	cvt.u64.u32	%rd88, %r5;
	cvt.u64.u32	%rd87, %r4;
	mov.u64 	%rd91, image_HDR2;
	cvta.global.u64 	%rd86, %rd91;
	// inline asm
	call (%rd85), _rt_buffer_get_64, (%rd86, %r95, %r335, %rd87, %rd88, %rd25, %rd25);
	// inline asm
	mov.f32 	%f630, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs31, %f630;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs30, %f137;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f136;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f135;}

	// inline asm
	st.v4.u16 	[%rd85], {%rs28, %rs29, %rs30, %rs31};

BB0_93:
	cvt.u64.u32	%rd16, %r4;
	cvt.u64.u32	%rd17, %r5;
	mul.f32 	%f180, %f123, 0f3F000000;
	mul.f32 	%f181, %f124, 0f3F000000;
	mul.f32 	%f182, %f125, 0f3F000000;
	ld.global.u32 	%r268, [additive];
	setp.eq.s32	%p91, %r268, 0;
	mov.f32 	%f631, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs32, %f631;}

	// inline asm
	@%p91 bra 	BB0_95;

	mov.u32 	%r336, 8;
	mov.u64 	%rd104, image_RNM0;
	cvta.global.u64 	%rd93, %rd104;
	// inline asm
	call (%rd92), _rt_buffer_get_64, (%rd93, %r95, %r336, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs39, %rs40, %rs41, %rs42}, [%rd92];
	// inline asm
	{  cvt.f32.f16 %f632, %rs39;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f633, %rs40;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f634, %rs41;}

	// inline asm
	// inline asm
	call (%rd98), _rt_buffer_get_64, (%rd93, %r95, %r336, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f635, %f180, %f632;
	add.f32 	%f636, %f181, %f633;
	add.f32 	%f637, %f182, %f634;
	// inline asm
	{  cvt.rn.f16.f32 %rs38, %f637;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs37, %f636;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f635;}

	// inline asm
	st.v4.u16 	[%rd98], {%rs36, %rs37, %rs38, %rs32};
	bra.uni 	BB0_96;

BB0_95:
	mov.u32 	%r343, 8;
	mov.u64 	%rd111, image_RNM0;
	cvta.global.u64 	%rd106, %rd111;
	// inline asm
	call (%rd105), _rt_buffer_get_64, (%rd106, %r95, %r343, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs45, %f182;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs44, %f181;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs43, %f180;}

	// inline asm
	st.v4.u16 	[%rd105], {%rs43, %rs44, %rs45, %rs32};

BB0_96:
	mov.f32 	%f642, 0f34000000;
	max.f32 	%f643, %f180, %f642;
	mul.f32 	%f644, %f126, 0f3F000000;
	div.rn.f32 	%f645, %f644, %f643;
	max.f32 	%f646, %f181, %f642;
	mul.f32 	%f647, %f127, 0f3F000000;
	div.rn.f32 	%f648, %f647, %f646;
	max.f32 	%f649, %f182, %f642;
	mul.f32 	%f650, %f128, 0f3F000000;
	div.rn.f32 	%f651, %f650, %f649;
	fma.rn.f32 	%f183, %f645, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f184, %f648, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f185, %f651, 0f3F000000, 0f3F000000;
	mul.f32 	%f652, %f129, 0f3F000000;
	div.rn.f32 	%f653, %f652, %f643;
	mul.f32 	%f654, %f130, 0f3F000000;
	div.rn.f32 	%f655, %f654, %f646;
	mul.f32 	%f656, %f131, 0f3F000000;
	div.rn.f32 	%f657, %f656, %f649;
	fma.rn.f32 	%f186, %f653, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f187, %f655, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f188, %f657, 0f3F000000, 0f3F000000;
	mul.f32 	%f658, %f132, 0f3F000000;
	div.rn.f32 	%f659, %f658, %f643;
	mul.f32 	%f660, %f133, 0f3F000000;
	div.rn.f32 	%f661, %f660, %f646;
	mul.f32 	%f662, %f134, 0f3F000000;
	div.rn.f32 	%f663, %f662, %f649;
	fma.rn.f32 	%f189, %f659, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f190, %f661, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f191, %f663, 0f3F000000, 0f3F000000;
	ld.global.u32 	%r275, [additive];
	setp.eq.s32	%p92, %r275, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs46, %f631;}

	// inline asm
	@%p92 bra 	BB0_98;

	mov.u32 	%r337, 8;
	mov.u64 	%rd124, image_RNM1;
	cvta.global.u64 	%rd113, %rd124;
	// inline asm
	call (%rd112), _rt_buffer_get_64, (%rd113, %r95, %r337, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs53, %rs54, %rs55, %rs56}, [%rd112];
	// inline asm
	{  cvt.f32.f16 %f664, %rs53;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f665, %rs54;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f666, %rs55;}

	// inline asm
	// inline asm
	call (%rd118), _rt_buffer_get_64, (%rd113, %r95, %r337, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f667, %f183, %f664;
	add.f32 	%f668, %f184, %f665;
	add.f32 	%f669, %f185, %f666;
	// inline asm
	{  cvt.rn.f16.f32 %rs52, %f669;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f668;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f667;}

	// inline asm
	st.v4.u16 	[%rd118], {%rs50, %rs51, %rs52, %rs46};
	bra.uni 	BB0_99;

BB0_98:
	mov.u32 	%r342, 8;
	mov.u64 	%rd131, image_RNM1;
	cvta.global.u64 	%rd126, %rd131;
	// inline asm
	call (%rd125), _rt_buffer_get_64, (%rd126, %r95, %r342, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs59, %f185;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs58, %f184;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f183;}

	// inline asm
	st.v4.u16 	[%rd125], {%rs57, %rs58, %rs59, %rs46};

BB0_99:
	ld.global.u32 	%r282, [additive];
	setp.eq.s32	%p93, %r282, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs60, %f631;}

	// inline asm
	@%p93 bra 	BB0_101;

	mov.u32 	%r338, 8;
	mov.u64 	%rd144, image_RNM2;
	cvta.global.u64 	%rd133, %rd144;
	// inline asm
	call (%rd132), _rt_buffer_get_64, (%rd133, %r95, %r338, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs67, %rs68, %rs69, %rs70}, [%rd132];
	// inline asm
	{  cvt.f32.f16 %f674, %rs67;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f675, %rs68;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f676, %rs69;}

	// inline asm
	// inline asm
	call (%rd138), _rt_buffer_get_64, (%rd133, %r95, %r338, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f677, %f186, %f674;
	add.f32 	%f678, %f187, %f675;
	add.f32 	%f679, %f188, %f676;
	// inline asm
	{  cvt.rn.f16.f32 %rs66, %f679;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f678;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f677;}

	// inline asm
	st.v4.u16 	[%rd138], {%rs64, %rs65, %rs66, %rs60};
	bra.uni 	BB0_102;

BB0_101:
	mov.u32 	%r341, 8;
	mov.u64 	%rd151, image_RNM2;
	cvta.global.u64 	%rd146, %rd151;
	// inline asm
	call (%rd145), _rt_buffer_get_64, (%rd146, %r95, %r341, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs73, %f188;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs72, %f187;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f186;}

	// inline asm
	st.v4.u16 	[%rd145], {%rs71, %rs72, %rs73, %rs60};

BB0_102:
	ld.global.u32 	%r289, [additive];
	setp.eq.s32	%p94, %r289, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs74, %f631;}

	// inline asm
	@%p94 bra 	BB0_104;

	mov.u32 	%r339, 8;
	mov.u64 	%rd164, image_RNM3;
	cvta.global.u64 	%rd153, %rd164;
	// inline asm
	call (%rd152), _rt_buffer_get_64, (%rd153, %r95, %r339, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs81, %rs82, %rs83, %rs84}, [%rd152];
	// inline asm
	{  cvt.f32.f16 %f684, %rs81;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f685, %rs82;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f686, %rs83;}

	// inline asm
	// inline asm
	call (%rd158), _rt_buffer_get_64, (%rd153, %r95, %r339, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f687, %f189, %f684;
	add.f32 	%f688, %f190, %f685;
	add.f32 	%f689, %f191, %f686;
	// inline asm
	{  cvt.rn.f16.f32 %rs80, %f689;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs79, %f688;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs78, %f687;}

	// inline asm
	st.v4.u16 	[%rd158], {%rs78, %rs79, %rs80, %rs74};
	bra.uni 	BB0_123;

BB0_104:
	mov.u32 	%r340, 8;
	mov.u64 	%rd171, image_RNM3;
	cvta.global.u64 	%rd166, %rd171;
	// inline asm
	call (%rd165), _rt_buffer_get_64, (%rd166, %r95, %r340, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs87, %f191;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs86, %f190;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs85, %f189;}

	// inline asm
	st.v4.u16 	[%rd165], {%rs85, %rs86, %rs87, %rs74};

BB0_123:
	ret;
}