//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .align 4 .u32 samples;
.global .align 4 .u32 addToPrev;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9addToPrevE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename9addToPrevE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9addToPrevE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic9addToPrevE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9addToPrevE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[40];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<105>;
	.reg .b16 	%rs<139>;
	.reg .f32 	%f<813>;
	.reg .b32 	%r<373>;
	.reg .b64 	%rd<273>;


	mov.u64 	%rd272, __local_depot0;
	cvta.local.u64 	%SP, %rd272;
	ld.global.v2.u32 	{%r97, %r98}, [pixelID];
	cvt.u64.u32	%rd22, %r97;
	cvt.u64.u32	%rd23, %r98;
	mov.u64 	%rd26, uvnormal;
	cvta.global.u64 	%rd21, %rd26;
	mov.u32 	%r95, 2;
	mov.u32 	%r96, 4;
	mov.u64 	%rd25, 0;
	// inline asm
	call (%rd20), _rt_buffer_get_64, (%rd21, %r95, %r96, %rd22, %rd23, %rd25, %rd25);
	// inline asm
	ld.u32 	%r1, [%rd20];
	shr.u32 	%r101, %r1, 16;
	cvt.u16.u32	%rs1, %r101;
	and.b16  	%rs6, %rs1, 255;
	cvt.u16.u32	%rs7, %r1;
	or.b16  	%rs8, %rs7, %rs6;
	setp.eq.s16	%p4, %rs8, 0;
	mov.f32 	%f753, 0f00000000;
	mov.f32 	%f754, %f753;
	mov.f32 	%f755, %f753;
	@%p4 bra 	BB0_2;

	ld.u8 	%rs9, [%rd20+1];
	and.b16  	%rs11, %rs7, 255;
	cvt.rn.f32.u16	%f173, %rs11;
	div.rn.f32 	%f174, %f173, 0f437F0000;
	fma.rn.f32 	%f175, %f174, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f176, %rs9;
	div.rn.f32 	%f177, %f176, 0f437F0000;
	fma.rn.f32 	%f178, %f177, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f179, %rs6;
	div.rn.f32 	%f180, %f179, 0f437F0000;
	fma.rn.f32 	%f181, %f180, 0f40000000, 0fBF800000;
	mul.f32 	%f182, %f178, %f178;
	fma.rn.f32 	%f183, %f175, %f175, %f182;
	fma.rn.f32 	%f184, %f181, %f181, %f183;
	sqrt.rn.f32 	%f185, %f184;
	rcp.rn.f32 	%f186, %f185;
	mul.f32 	%f753, %f175, %f186;
	mul.f32 	%f754, %f178, %f186;
	mul.f32 	%f755, %f181, %f186;

BB0_2:
	ld.global.v2.u32 	{%r102, %r103}, [pixelID];
	ld.global.v2.u32 	{%r105, %r106}, [tileInfo];
	add.s32 	%r2, %r102, %r105;
	add.s32 	%r3, %r103, %r106;
	setp.eq.f32	%p5, %f754, 0f00000000;
	setp.eq.f32	%p6, %f753, 0f00000000;
	and.pred  	%p7, %p6, %p5;
	setp.eq.f32	%p8, %f755, 0f00000000;
	and.pred  	%p9, %p7, %p8;
	@%p9 bra 	BB0_111;
	bra.uni 	BB0_3;

BB0_111:
	ld.global.u32 	%r372, [imageEnabled];
	and.b32  	%r298, %r372, 1;
	setp.eq.b32	%p98, %r298, 1;
	@!%p98 bra 	BB0_113;
	bra.uni 	BB0_112;

BB0_112:
	cvt.u64.u32	%rd170, %r2;
	cvt.u64.u32	%rd171, %r3;
	mov.u64 	%rd174, image;
	cvta.global.u64 	%rd169, %rd174;
	mov.u64 	%rd173, 0;
	// inline asm
	call (%rd168), _rt_buffer_get_64, (%rd169, %r95, %r96, %rd170, %rd171, %rd173, %rd173);
	// inline asm
	mov.u16 	%rs84, 0;
	st.v4.u8 	[%rd168], {%rs84, %rs84, %rs84, %rs84};
	ld.global.u32 	%r372, [imageEnabled];

BB0_113:
	and.b32  	%r301, %r372, 4;
	setp.eq.s32	%p99, %r301, 0;
	@%p99 bra 	BB0_115;

	cvt.u64.u32	%rd178, %r3;
	cvt.u64.u32	%rd177, %r2;
	mov.u64 	%rd181, image_HDR;
	cvta.global.u64 	%rd176, %rd181;
	mov.u32 	%r303, 8;
	mov.u64 	%rd180, 0;
	// inline asm
	call (%rd175), _rt_buffer_get_64, (%rd176, %r95, %r303, %rd177, %rd178, %rd180, %rd180);
	// inline asm
	mov.f32 	%f658, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs85, %f658;}

	// inline asm
	mov.u16 	%rs86, 0;
	st.v4.u16 	[%rd175], {%rs85, %rs85, %rs85, %rs86};

BB0_115:
	cvt.u64.u32	%rd18, %r2;
	cvt.u64.u32	%rd19, %r3;
	ld.global.u32 	%r304, [additive];
	setp.eq.s32	%p100, %r304, 0;
	@%p100 bra 	BB0_117;

	mov.u64 	%rd194, image_RNM0;
	cvta.global.u64 	%rd183, %rd194;
	mov.u32 	%r308, 8;
	mov.u64 	%rd193, 0;
	// inline asm
	call (%rd182), _rt_buffer_get_64, (%rd183, %r95, %r308, %rd18, %rd19, %rd193, %rd193);
	// inline asm
	ld.v4.u16 	{%rs93, %rs94, %rs95, %rs96}, [%rd182];
	// inline asm
	{  cvt.f32.f16 %f659, %rs93;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f660, %rs94;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f661, %rs95;}

	// inline asm
	// inline asm
	call (%rd188), _rt_buffer_get_64, (%rd183, %r95, %r308, %rd18, %rd19, %rd193, %rd193);
	// inline asm
	add.f32 	%f662, %f659, 0f00000000;
	add.f32 	%f663, %f660, 0f00000000;
	add.f32 	%f664, %f661, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs92, %f664;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs91, %f663;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs90, %f662;}

	// inline asm
	mov.u16 	%rs97, 0;
	st.v4.u16 	[%rd188], {%rs90, %rs91, %rs92, %rs97};
	bra.uni 	BB0_118;

BB0_3:
	ld.global.v2.u32 	{%r115, %r116}, [pixelID];
	cvt.u64.u32	%rd29, %r115;
	cvt.u64.u32	%rd30, %r116;
	mov.u64 	%rd34, uvpos;
	cvta.global.u64 	%rd28, %rd34;
	mov.u32 	%r114, 12;
	// inline asm
	call (%rd27), _rt_buffer_get_64, (%rd28, %r95, %r114, %rd29, %rd30, %rd25, %rd25);
	// inline asm
	ld.f32 	%f195, [%rd27+8];
	ld.f32 	%f196, [%rd27+4];
	ld.f32 	%f197, [%rd27];
	mul.f32 	%f198, %f197, 0f3456BF95;
	mul.f32 	%f199, %f196, 0f3456BF95;
	mul.f32 	%f200, %f195, 0f3456BF95;
	abs.f32 	%f201, %f753;
	div.rn.f32 	%f202, %f198, %f201;
	abs.f32 	%f203, %f754;
	div.rn.f32 	%f204, %f199, %f203;
	abs.f32 	%f205, %f755;
	div.rn.f32 	%f206, %f200, %f205;
	abs.f32 	%f207, %f202;
	abs.f32 	%f208, %f204;
	abs.f32 	%f209, %f206;
	mov.f32 	%f210, 0f38D1B717;
	max.f32 	%f211, %f207, %f210;
	max.f32 	%f212, %f208, %f210;
	max.f32 	%f213, %f209, %f210;
	fma.rn.f32 	%f756, %f753, %f211, %f197;
	fma.rn.f32 	%f757, %f754, %f212, %f196;
	fma.rn.f32 	%f758, %f755, %f213, %f195;
	add.u64 	%rd33, %SP, 0;
	cvta.to.local.u64 	%rd35, %rd33;
	mov.u32 	%r113, 0;
	st.local.u32 	[%rd35+8], %r113;
	st.local.u32 	[%rd35+4], %r113;
	st.local.u32 	[%rd35], %r113;
	ld.global.u32 	%r112, [root];
	neg.f32 	%f192, %f755;
	neg.f32 	%f191, %f754;
	neg.f32 	%f190, %f753;
	mov.f32 	%f765, 0f00000000;
	mov.f32 	%f194, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r112, %f756, %f757, %f758, %f190, %f191, %f192, %r113, %f765, %f194, %rd33, %r114);
	// inline asm
	ld.local.f32 	%f13, [%rd35];
	abs.f32 	%f14, %f190;
	abs.f32 	%f15, %f192;
	setp.geu.f32	%p10, %f13, 0f00000000;
	@%p10 bra 	BB0_5;

	neg.f32 	%f696, %f755;
	neg.f32 	%f695, %f753;
	neg.f32 	%f694, %f754;
	fma.rn.f32 	%f214, %f753, %f13, %f756;
	fma.rn.f32 	%f215, %f754, %f13, %f757;
	fma.rn.f32 	%f216, %f755, %f13, %f758;
	mul.f32 	%f217, %f214, 0f3456BF95;
	mul.f32 	%f218, %f215, 0f3456BF95;
	mul.f32 	%f219, %f216, 0f3456BF95;
	div.rn.f32 	%f220, %f217, %f14;
	abs.f32 	%f221, %f694;
	div.rn.f32 	%f222, %f218, %f221;
	div.rn.f32 	%f223, %f219, %f15;
	abs.f32 	%f224, %f220;
	abs.f32 	%f225, %f222;
	abs.f32 	%f226, %f223;
	max.f32 	%f228, %f224, %f210;
	max.f32 	%f229, %f225, %f210;
	max.f32 	%f230, %f226, %f210;
	fma.rn.f32 	%f756, %f228, %f695, %f214;
	fma.rn.f32 	%f757, %f229, %f694, %f215;
	fma.rn.f32 	%f758, %f230, %f696, %f216;

BB0_5:
	mov.u32 	%r333, 4;
	neg.f32 	%f690, %f753;
	neg.f32 	%f689, %f754;
	setp.gt.f32	%p11, %f14, %f15;
	selp.f32	%f237, %f754, 0f00000000, %p11;
	selp.f32	%f238, %f690, %f755, %p11;
	selp.f32	%f239, 0f00000000, %f689, %p11;
	mul.f32 	%f240, %f238, %f238;
	fma.rn.f32 	%f241, %f237, %f237, %f240;
	fma.rn.f32 	%f242, %f239, %f239, %f241;
	sqrt.rn.f32 	%f243, %f242;
	rcp.rn.f32 	%f244, %f243;
	mul.f32 	%f22, %f237, %f244;
	mul.f32 	%f23, %f238, %f244;
	mul.f32 	%f24, %f239, %f244;
	ld.global.v2.u32 	{%r121, %r122}, [pixelID];
	cvt.u64.u32	%rd38, %r121;
	cvt.u64.u32	%rd39, %r122;
	mov.u64 	%rd42, rnd_seeds;
	cvta.global.u64 	%rd37, %rd42;
	// inline asm
	call (%rd36), _rt_buffer_get_64, (%rd37, %r95, %r333, %rd38, %rd39, %rd25, %rd25);
	// inline asm
	ld.global.u32 	%r343, [samples];
	setp.lt.s32	%p12, %r343, 1;
	@%p12 bra 	BB0_6;

	mov.u32 	%r344, 0;
	neg.f32 	%f693, %f755;
	neg.f32 	%f692, %f753;
	neg.f32 	%f691, %f754;
	cvt.rn.f32.s32	%f251, %r343;
	rcp.rn.f32 	%f25, %f251;
	ld.u32 	%r369, [%rd36];
	mul.f32 	%f26, %f756, 0f3456BF95;
	mul.f32 	%f27, %f757, 0f3456BF95;
	mul.f32 	%f28, %f758, 0f3456BF95;
	mul.f32 	%f252, %f23, %f692;
	mul.f32 	%f253, %f22, %f691;
	sub.f32 	%f29, %f253, %f252;
	mul.f32 	%f254, %f22, %f693;
	mul.f32 	%f255, %f24, %f692;
	sub.f32 	%f30, %f255, %f254;
	mul.f32 	%f256, %f24, %f691;
	mul.f32 	%f257, %f23, %f693;
	sub.f32 	%f31, %f257, %f256;
	mov.f32 	%f765, 0f00000000;
	abs.f32 	%f258, %f27;
	abs.f32 	%f259, %f26;
	max.f32 	%f260, %f259, %f258;
	abs.f32 	%f261, %f28;
	max.f32 	%f262, %f260, %f261;
	mov.f32 	%f766, %f765;
	mov.f32 	%f767, %f765;
	mov.f32 	%f768, %f765;
	mov.f32 	%f769, %f765;
	mov.f32 	%f770, %f765;

BB0_8:
	setp.lt.s32	%p13, %r343, 1;
	@%p13 bra 	BB0_59;

	mov.u32 	%r346, 0;

BB0_10:
	cvt.rn.f32.s32	%f687, %r344;
	mad.lo.s32 	%r127, %r369, 1664525, 1013904223;
	and.b32  	%r128, %r127, 16777215;
	cvt.rn.f32.u32	%f264, %r128;
	fma.rn.f32 	%f265, %f264, 0f33800000, %f687;
	mul.f32 	%f46, %f25, %f265;
	mad.lo.s32 	%r11, %r127, 1664525, 1013904223;
	and.b32  	%r129, %r11, 16777215;
	cvt.rn.f32.u32	%f266, %r129;
	cvt.rn.f32.s32	%f267, %r346;
	fma.rn.f32 	%f268, %f266, 0f33800000, %f267;
	mul.f32 	%f269, %f25, %f268;
	mul.f32 	%f270, %f46, %f46;
	mov.f32 	%f271, 0f3F800000;
	sub.f32 	%f272, %f271, %f270;
	mov.f32 	%f273, 0f00000000;
	max.f32 	%f274, %f273, %f272;
	sqrt.rn.f32 	%f47, %f274;
	mul.f32 	%f777, %f269, 0f40C90FDB;
	abs.f32 	%f49, %f777;
	setp.neu.f32	%p14, %f49, 0f7F800000;
	mov.f32 	%f771, %f777;
	@%p14 bra 	BB0_12;

	mov.f32 	%f704, 0f00000000;
	mul.rn.f32 	%f771, %f777, %f704;

BB0_12:
	mul.f32 	%f276, %f771, 0f3F22F983;
	cvt.rni.s32.f32	%r357, %f276;
	cvt.rn.f32.s32	%f277, %r357;
	neg.f32 	%f278, %f277;
	mov.f32 	%f279, 0f3FC90FDA;
	fma.rn.f32 	%f280, %f278, %f279, %f771;
	mov.f32 	%f281, 0f33A22168;
	fma.rn.f32 	%f282, %f278, %f281, %f280;
	mov.f32 	%f283, 0f27C234C5;
	fma.rn.f32 	%f772, %f278, %f283, %f282;
	abs.f32 	%f284, %f771;
	setp.leu.f32	%p15, %f284, 0f47CE4780;
	@%p15 bra 	BB0_23;

	add.u64 	%rd44, %SP, 12;
	cvta.to.local.u64 	%rd268, %rd44;
	mov.b32 	 %r13, %f771;
	shr.u32 	%r14, %r13, 23;
	shl.b32 	%r132, %r13, 8;
	or.b32  	%r15, %r132, -2147483648;
	mov.u32 	%r348, 0;
	mov.u64 	%rd269, 0;
	mov.u32 	%r349, %r348;

BB0_14:
	.pragma "nounroll";
	add.u64 	%rd264, %SP, 12;
	cvta.to.local.u64 	%rd263, %rd264;
	shl.b64 	%rd45, %rd269, 2;
	mov.u64 	%rd46, __cudart_i2opi_f;
	add.s64 	%rd47, %rd46, %rd45;
	ld.const.u32 	%r135, [%rd47];
	// inline asm
	{
	mad.lo.cc.u32   %r133, %r135, %r15, %r349;
	madc.hi.u32     %r349, %r135, %r15,  0;
	}
	// inline asm
	st.local.u32 	[%rd268], %r133;
	add.s32 	%r348, %r348, 1;
	cvt.s64.s32	%rd269, %r348;
	mul.wide.s32 	%rd50, %r348, 4;
	add.s64 	%rd268, %rd263, %rd50;
	setp.ne.s32	%p16, %r348, 6;
	@%p16 bra 	BB0_14;

	add.u64 	%rd262, %SP, 12;
	and.b32  	%r138, %r14, 255;
	add.s32 	%r139, %r138, -128;
	shr.u32 	%r140, %r139, 5;
	cvta.to.local.u64 	%rd52, %rd262;
	st.local.u32 	[%rd52+24], %r349;
	mov.u32 	%r141, 6;
	sub.s32 	%r142, %r141, %r140;
	mul.wide.s32 	%rd53, %r142, 4;
	add.s64 	%rd8, %rd52, %rd53;
	ld.local.u32 	%r350, [%rd8];
	ld.local.u32 	%r351, [%rd8+-4];
	and.b32  	%r23, %r14, 31;
	setp.eq.s32	%p17, %r23, 0;
	@%p17 bra 	BB0_17;

	mov.u32 	%r143, 32;
	sub.s32 	%r144, %r143, %r23;
	shr.u32 	%r145, %r351, %r144;
	shl.b32 	%r146, %r350, %r23;
	add.s32 	%r350, %r145, %r146;
	ld.local.u32 	%r147, [%rd8+-8];
	shr.u32 	%r148, %r147, %r144;
	shl.b32 	%r149, %r351, %r23;
	add.s32 	%r351, %r148, %r149;

BB0_17:
	mov.b32 	 %r336, %f771;
	and.b32  	%r353, %r336, -2147483648;
	shr.u32 	%r150, %r351, 30;
	shl.b32 	%r151, %r350, 2;
	add.s32 	%r352, %r150, %r151;
	shl.b32 	%r29, %r351, 2;
	shr.u32 	%r152, %r352, 31;
	shr.u32 	%r153, %r350, 30;
	add.s32 	%r30, %r152, %r153;
	setp.eq.s32	%p18, %r152, 0;
	@%p18 bra 	BB0_18;
	bra.uni 	BB0_19;

BB0_18:
	mov.u32 	%r354, %r29;
	bra.uni 	BB0_20;

BB0_19:
	mov.b32 	 %r338, %f771;
	and.b32  	%r337, %r338, -2147483648;
	not.b32 	%r154, %r352;
	neg.s32 	%r354, %r29;
	setp.eq.s32	%p19, %r29, 0;
	selp.u32	%r155, 1, 0, %p19;
	add.s32 	%r352, %r155, %r154;
	xor.b32  	%r353, %r337, -2147483648;

BB0_20:
	mov.b32 	 %r340, %f771;
	and.b32  	%r339, %r340, -2147483648;
	clz.b32 	%r356, %r352;
	setp.eq.s32	%p20, %r356, 0;
	shl.b32 	%r156, %r352, %r356;
	mov.u32 	%r157, 32;
	sub.s32 	%r158, %r157, %r356;
	shr.u32 	%r159, %r354, %r158;
	add.s32 	%r160, %r159, %r156;
	selp.b32	%r38, %r352, %r160, %p20;
	mov.u32 	%r161, -921707870;
	mul.hi.u32 	%r355, %r38, %r161;
	setp.eq.s32	%p21, %r339, 0;
	neg.s32 	%r162, %r30;
	selp.b32	%r357, %r30, %r162, %p21;
	setp.lt.s32	%p22, %r355, 1;
	@%p22 bra 	BB0_22;

	mul.lo.s32 	%r163, %r38, -921707870;
	shr.u32 	%r164, %r163, 31;
	shl.b32 	%r165, %r355, 1;
	add.s32 	%r355, %r164, %r165;
	add.s32 	%r356, %r356, 1;

BB0_22:
	mov.u32 	%r166, 126;
	sub.s32 	%r167, %r166, %r356;
	shl.b32 	%r168, %r167, 23;
	add.s32 	%r169, %r355, 1;
	shr.u32 	%r170, %r169, 7;
	add.s32 	%r171, %r170, 1;
	shr.u32 	%r172, %r171, 1;
	add.s32 	%r173, %r172, %r168;
	or.b32  	%r174, %r173, %r353;
	mov.b32 	 %f772, %r174;

BB0_23:
	add.s32 	%r46, %r357, 1;
	and.b32  	%r47, %r46, 1;
	setp.eq.s32	%p23, %r47, 0;
	@%p23 bra 	BB0_25;
	bra.uni 	BB0_24;

BB0_25:
	mul.rn.f32 	%f713, %f772, %f772;
	mov.f32 	%f287, 0f3C08839E;
	mov.f32 	%f288, 0fB94CA1F9;
	fma.rn.f32 	%f773, %f288, %f713, %f287;
	bra.uni 	BB0_26;

BB0_24:
	mul.rn.f32 	%f709, %f772, %f772;
	mov.f32 	%f285, 0fBAB6061A;
	mov.f32 	%f286, 0f37CCF5CE;
	fma.rn.f32 	%f773, %f286, %f709, %f285;

BB0_26:
	@%p23 bra 	BB0_28;
	bra.uni 	BB0_27;

BB0_28:
	mul.rn.f32 	%f712, %f772, %f772;
	mov.f32 	%f703, 0f00000000;
	mov.f32 	%f292, 0fBE2AAAA3;
	fma.rn.f32 	%f293, %f773, %f712, %f292;
	fma.rn.f32 	%f774, %f293, %f712, %f703;
	bra.uni 	BB0_29;

BB0_27:
	mul.rn.f32 	%f710, %f772, %f772;
	mov.f32 	%f289, 0f3D2AAAA5;
	fma.rn.f32 	%f290, %f773, %f710, %f289;
	mov.f32 	%f291, 0fBF000000;
	fma.rn.f32 	%f774, %f290, %f710, %f291;

BB0_29:
	fma.rn.f32 	%f775, %f774, %f772, %f772;
	@%p23 bra 	BB0_31;

	mul.rn.f32 	%f711, %f772, %f772;
	mov.f32 	%f697, 0f3F800000;
	fma.rn.f32 	%f775, %f774, %f711, %f697;

BB0_31:
	and.b32  	%r175, %r46, 2;
	setp.eq.s32	%p26, %r175, 0;
	@%p26 bra 	BB0_33;

	mov.f32 	%f698, 0f00000000;
	mov.f32 	%f297, 0fBF800000;
	fma.rn.f32 	%f775, %f775, %f297, %f698;

BB0_33:
	abs.f32 	%f708, %f777;
	setp.neu.f32	%p104, %f708, 0f7F800000;
	@%p104 bra 	BB0_35;

	mov.f32 	%f702, 0f00000000;
	mul.rn.f32 	%f777, %f777, %f702;

BB0_35:
	mov.f32 	%f707, 0f27C234C5;
	mov.f32 	%f706, 0f33A22168;
	mov.f32 	%f705, 0f3FC90FDA;
	mul.f32 	%f299, %f777, 0f3F22F983;
	cvt.rni.s32.f32	%r367, %f299;
	cvt.rn.f32.s32	%f300, %r367;
	neg.f32 	%f301, %f300;
	fma.rn.f32 	%f303, %f301, %f705, %f777;
	fma.rn.f32 	%f305, %f301, %f706, %f303;
	fma.rn.f32 	%f778, %f301, %f707, %f305;
	abs.f32 	%f307, %f777;
	setp.leu.f32	%p28, %f307, 0f47CE4780;
	@%p28 bra 	BB0_46;

	add.u64 	%rd55, %SP, 12;
	cvta.to.local.u64 	%rd270, %rd55;
	mov.b32 	 %r49, %f777;
	shr.u32 	%r50, %r49, 23;
	shl.b32 	%r178, %r49, 8;
	or.b32  	%r51, %r178, -2147483648;
	mov.u32 	%r358, 0;
	mov.u64 	%rd271, %rd25;
	mov.u32 	%r359, %r358;

BB0_37:
	.pragma "nounroll";
	add.u64 	%rd267, %SP, 12;
	cvta.to.local.u64 	%rd266, %rd267;
	shl.b64 	%rd56, %rd271, 2;
	mov.u64 	%rd57, __cudart_i2opi_f;
	add.s64 	%rd58, %rd57, %rd56;
	ld.const.u32 	%r181, [%rd58];
	// inline asm
	{
	mad.lo.cc.u32   %r179, %r181, %r51, %r359;
	madc.hi.u32     %r359, %r181, %r51,  0;
	}
	// inline asm
	st.local.u32 	[%rd270], %r179;
	add.s32 	%r358, %r358, 1;
	cvt.s64.s32	%rd271, %r358;
	mul.wide.s32 	%rd59, %r358, 4;
	add.s64 	%rd270, %rd266, %rd59;
	setp.ne.s32	%p29, %r358, 6;
	@%p29 bra 	BB0_37;

	add.u64 	%rd265, %SP, 12;
	and.b32  	%r184, %r50, 255;
	add.s32 	%r185, %r184, -128;
	shr.u32 	%r186, %r185, 5;
	and.b32  	%r56, %r49, -2147483648;
	cvta.to.local.u64 	%rd61, %rd265;
	st.local.u32 	[%rd61+24], %r359;
	mov.u32 	%r187, 6;
	sub.s32 	%r188, %r187, %r186;
	mul.wide.s32 	%rd62, %r188, 4;
	add.s64 	%rd15, %rd61, %rd62;
	ld.local.u32 	%r360, [%rd15];
	ld.local.u32 	%r361, [%rd15+-4];
	and.b32  	%r59, %r50, 31;
	setp.eq.s32	%p30, %r59, 0;
	@%p30 bra 	BB0_40;

	mov.u32 	%r189, 32;
	sub.s32 	%r190, %r189, %r59;
	shr.u32 	%r191, %r361, %r190;
	shl.b32 	%r192, %r360, %r59;
	add.s32 	%r360, %r191, %r192;
	ld.local.u32 	%r193, [%rd15+-8];
	shr.u32 	%r194, %r193, %r190;
	shl.b32 	%r195, %r361, %r59;
	add.s32 	%r361, %r194, %r195;

BB0_40:
	shr.u32 	%r196, %r361, 30;
	shl.b32 	%r197, %r360, 2;
	add.s32 	%r362, %r196, %r197;
	shl.b32 	%r65, %r361, 2;
	shr.u32 	%r198, %r362, 31;
	shr.u32 	%r199, %r360, 30;
	add.s32 	%r66, %r198, %r199;
	setp.eq.s32	%p31, %r198, 0;
	@%p31 bra 	BB0_41;
	bra.uni 	BB0_42;

BB0_41:
	mov.u32 	%r363, %r56;
	mov.u32 	%r364, %r65;
	bra.uni 	BB0_43;

BB0_42:
	not.b32 	%r200, %r362;
	neg.s32 	%r364, %r65;
	setp.eq.s32	%p32, %r65, 0;
	selp.u32	%r201, 1, 0, %p32;
	add.s32 	%r362, %r201, %r200;
	xor.b32  	%r363, %r56, -2147483648;

BB0_43:
	clz.b32 	%r366, %r362;
	setp.eq.s32	%p33, %r366, 0;
	shl.b32 	%r202, %r362, %r366;
	mov.u32 	%r203, 32;
	sub.s32 	%r204, %r203, %r366;
	shr.u32 	%r205, %r364, %r204;
	add.s32 	%r206, %r205, %r202;
	selp.b32	%r74, %r362, %r206, %p33;
	mov.u32 	%r207, -921707870;
	mul.hi.u32 	%r365, %r74, %r207;
	setp.eq.s32	%p34, %r56, 0;
	neg.s32 	%r208, %r66;
	selp.b32	%r367, %r66, %r208, %p34;
	setp.lt.s32	%p35, %r365, 1;
	@%p35 bra 	BB0_45;

	mul.lo.s32 	%r209, %r74, -921707870;
	shr.u32 	%r210, %r209, 31;
	shl.b32 	%r211, %r365, 1;
	add.s32 	%r365, %r210, %r211;
	add.s32 	%r366, %r366, 1;

BB0_45:
	mov.u32 	%r212, 126;
	sub.s32 	%r213, %r212, %r366;
	shl.b32 	%r214, %r213, 23;
	add.s32 	%r215, %r365, 1;
	shr.u32 	%r216, %r215, 7;
	add.s32 	%r217, %r216, 1;
	shr.u32 	%r218, %r217, 1;
	add.s32 	%r219, %r218, %r214;
	or.b32  	%r220, %r219, %r363;
	mov.b32 	 %f778, %r220;

BB0_46:
	and.b32  	%r82, %r367, 1;
	setp.eq.s32	%p36, %r82, 0;
	@%p36 bra 	BB0_48;
	bra.uni 	BB0_47;

BB0_48:
	mul.rn.f32 	%f718, %f778, %f778;
	mov.f32 	%f310, 0f3C08839E;
	mov.f32 	%f311, 0fB94CA1F9;
	fma.rn.f32 	%f779, %f311, %f718, %f310;
	bra.uni 	BB0_49;

BB0_47:
	mul.rn.f32 	%f714, %f778, %f778;
	mov.f32 	%f308, 0fBAB6061A;
	mov.f32 	%f309, 0f37CCF5CE;
	fma.rn.f32 	%f779, %f309, %f714, %f308;

BB0_49:
	@%p36 bra 	BB0_51;
	bra.uni 	BB0_50;

BB0_51:
	mul.rn.f32 	%f717, %f778, %f778;
	mov.f32 	%f701, 0f00000000;
	mov.f32 	%f315, 0fBE2AAAA3;
	fma.rn.f32 	%f316, %f779, %f717, %f315;
	fma.rn.f32 	%f780, %f316, %f717, %f701;
	bra.uni 	BB0_52;

BB0_50:
	mul.rn.f32 	%f715, %f778, %f778;
	mov.f32 	%f312, 0f3D2AAAA5;
	fma.rn.f32 	%f313, %f779, %f715, %f312;
	mov.f32 	%f314, 0fBF000000;
	fma.rn.f32 	%f780, %f313, %f715, %f314;

BB0_52:
	fma.rn.f32 	%f781, %f780, %f778, %f778;
	@%p36 bra 	BB0_54;

	mul.rn.f32 	%f716, %f778, %f778;
	mov.f32 	%f699, 0f3F800000;
	fma.rn.f32 	%f781, %f780, %f716, %f699;

BB0_54:
	and.b32  	%r221, %r367, 2;
	setp.eq.s32	%p39, %r221, 0;
	@%p39 bra 	BB0_56;

	mov.f32 	%f700, 0f00000000;
	mov.f32 	%f320, 0fBF800000;
	fma.rn.f32 	%f781, %f781, %f320, %f700;

BB0_56:
	max.f32 	%f688, %f262, %f210;
	mul.f32 	%f329, %f47, %f775;
	mul.f32 	%f330, %f47, %f781;
	mul.f32 	%f331, %f22, %f330;
	mul.f32 	%f332, %f23, %f330;
	mul.f32 	%f333, %f24, %f330;
	fma.rn.f32 	%f334, %f31, %f329, %f331;
	fma.rn.f32 	%f335, %f30, %f329, %f332;
	fma.rn.f32 	%f336, %f29, %f329, %f333;
	mul.f32 	%f337, %f46, %f753;
	mul.f32 	%f338, %f46, %f754;
	mul.f32 	%f339, %f46, %f755;
	sub.f32 	%f84, %f334, %f337;
	sub.f32 	%f85, %f335, %f338;
	sub.f32 	%f86, %f336, %f339;
	mov.u32 	%r225, -1082130432;
	st.local.u32 	[%rd35+8], %r225;
	st.local.u32 	[%rd35+4], %r225;
	st.local.u32 	[%rd35], %r225;
	ld.global.u32 	%r222, [root];
	mov.u32 	%r223, 0;
	// inline asm
	call _rt_trace_64, (%r222, %f756, %f757, %f758, %f84, %f85, %f86, %r223, %f688, %f194, %rd33, %r114);
	// inline asm
	ld.local.f32 	%f87, [%rd35];
	setp.lt.f32	%p40, %f87, 0f00000000;
	@%p40 bra 	BB0_58;

	mul.f32 	%f340, %f753, %f84;
	mul.f32 	%f341, %f754, %f85;
	neg.f32 	%f342, %f341;
	sub.f32 	%f343, %f342, %f340;
	mul.f32 	%f344, %f755, %f86;
	sub.f32 	%f345, %f343, %f344;
	mul.f32 	%f346, %f345, 0f40800000;
	cvt.sat.f32.f32	%f347, %f346;
	ld.local.f32 	%f348, [%rd35+4];
	ld.local.f32 	%f349, [%rd35+8];
	fma.rn.f32 	%f767, %f347, %f87, %f767;
	fma.rn.f32 	%f766, %f347, %f348, %f766;
	fma.rn.f32 	%f765, %f347, %f349, %f765;
	cvt.sat.f32.f32	%f350, %f345;
	fma.rn.f32 	%f770, %f350, %f87, %f770;
	fma.rn.f32 	%f769, %f350, %f348, %f769;
	fma.rn.f32 	%f768, %f350, %f349, %f768;

BB0_58:
	mad.lo.s32 	%r342, %r369, 1664525, 1013904223;
	mad.lo.s32 	%r369, %r342, 1664525, 1013904223;
	ld.global.u32 	%r343, [samples];
	add.s32 	%r346, %r346, 1;
	setp.lt.s32	%p41, %r346, %r343;
	@%p41 bra 	BB0_10;

BB0_59:
	add.s32 	%r344, %r344, 1;
	setp.lt.s32	%p42, %r344, %r343;
	@%p42 bra 	BB0_8;
	bra.uni 	BB0_60;

BB0_117:
	mov.u64 	%rd201, image_RNM0;
	cvta.global.u64 	%rd196, %rd201;
	mov.u32 	%r310, 8;
	mov.u64 	%rd200, 0;
	// inline asm
	call (%rd195), _rt_buffer_get_64, (%rd196, %r95, %r310, %rd18, %rd19, %rd200, %rd200);
	// inline asm
	mov.f32 	%f665, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs98, %f665;}

	// inline asm
	mov.u16 	%rs99, 0;
	st.v4.u16 	[%rd195], {%rs98, %rs98, %rs98, %rs99};

BB0_118:
	ld.global.u32 	%r311, [additive];
	setp.eq.s32	%p101, %r311, 0;
	@%p101 bra 	BB0_120;

	mov.u64 	%rd214, image_RNM1;
	cvta.global.u64 	%rd203, %rd214;
	mov.u32 	%r315, 8;
	mov.u64 	%rd213, 0;
	// inline asm
	call (%rd202), _rt_buffer_get_64, (%rd203, %r95, %r315, %rd18, %rd19, %rd213, %rd213);
	// inline asm
	ld.v4.u16 	{%rs106, %rs107, %rs108, %rs109}, [%rd202];
	// inline asm
	{  cvt.f32.f16 %f666, %rs106;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f667, %rs107;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f668, %rs108;}

	// inline asm
	// inline asm
	call (%rd208), _rt_buffer_get_64, (%rd203, %r95, %r315, %rd18, %rd19, %rd213, %rd213);
	// inline asm
	add.f32 	%f669, %f666, 0f00000000;
	add.f32 	%f670, %f667, 0f00000000;
	add.f32 	%f671, %f668, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs105, %f671;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs104, %f670;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs103, %f669;}

	// inline asm
	mov.u16 	%rs110, 0;
	st.v4.u16 	[%rd208], {%rs103, %rs104, %rs105, %rs110};
	bra.uni 	BB0_121;

BB0_6:
	mov.f32 	%f766, %f765;
	mov.f32 	%f767, %f765;
	mov.f32 	%f768, %f765;
	mov.f32 	%f769, %f765;
	mov.f32 	%f770, %f765;

BB0_60:
	mul.lo.s32 	%r226, %r343, %r343;
	cvt.rn.f32.s32	%f351, %r226;
	rcp.rn.f32 	%f112, %f351;
	mul.f32 	%f352, %f770, %f112;
	mul.f32 	%f353, %f769, %f112;
	mul.f32 	%f354, %f768, %f112;
	fma.rn.f32 	%f113, %f770, %f112, %f352;
	fma.rn.f32 	%f114, %f769, %f112, %f353;
	fma.rn.f32 	%f115, %f768, %f112, %f354;
	ld.global.u32 	%r371, [imageEnabled];
	and.b32  	%r227, %r371, 1;
	setp.eq.b32	%p43, %r227, 1;
	@!%p43 bra 	BB0_95;
	bra.uni 	BB0_61;

BB0_61:
	abs.f32 	%f117, %f113;
	setp.lt.f32	%p44, %f117, 0f00800000;
	mul.f32 	%f360, %f117, 0f4B800000;
	selp.f32	%f361, 0fC3170000, 0fC2FE0000, %p44;
	selp.f32	%f362, %f360, %f117, %p44;
	mov.b32 	 %r228, %f362;
	and.b32  	%r229, %r228, 8388607;
	or.b32  	%r230, %r229, 1065353216;
	mov.b32 	 %f363, %r230;
	shr.u32 	%r231, %r228, 23;
	cvt.rn.f32.u32	%f364, %r231;
	add.f32 	%f365, %f361, %f364;
	setp.gt.f32	%p45, %f363, 0f3FB504F3;
	mul.f32 	%f366, %f363, 0f3F000000;
	add.f32 	%f367, %f365, 0f3F800000;
	selp.f32	%f368, %f366, %f363, %p45;
	selp.f32	%f369, %f367, %f365, %p45;
	add.f32 	%f370, %f368, 0fBF800000;
	add.f32 	%f356, %f368, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f355,%f356;
	// inline asm
	add.f32 	%f371, %f370, %f370;
	mul.f32 	%f372, %f355, %f371;
	mul.f32 	%f373, %f372, %f372;
	mov.f32 	%f374, 0f3C4CAF63;
	mov.f32 	%f375, 0f3B18F0FE;
	fma.rn.f32 	%f376, %f375, %f373, %f374;
	mov.f32 	%f377, 0f3DAAAABD;
	fma.rn.f32 	%f378, %f376, %f373, %f377;
	mul.rn.f32 	%f379, %f378, %f373;
	mul.rn.f32 	%f380, %f379, %f372;
	sub.f32 	%f381, %f370, %f372;
	neg.f32 	%f382, %f372;
	add.f32 	%f383, %f381, %f381;
	fma.rn.f32 	%f384, %f382, %f370, %f383;
	mul.rn.f32 	%f385, %f355, %f384;
	add.f32 	%f386, %f380, %f372;
	sub.f32 	%f387, %f372, %f386;
	add.f32 	%f388, %f380, %f387;
	add.f32 	%f389, %f385, %f388;
	add.f32 	%f390, %f386, %f389;
	sub.f32 	%f391, %f386, %f390;
	add.f32 	%f392, %f389, %f391;
	mov.f32 	%f393, 0f3F317200;
	mul.rn.f32 	%f394, %f369, %f393;
	mov.f32 	%f395, 0f35BFBE8E;
	mul.rn.f32 	%f396, %f369, %f395;
	add.f32 	%f397, %f394, %f390;
	sub.f32 	%f398, %f394, %f397;
	add.f32 	%f399, %f390, %f398;
	add.f32 	%f400, %f392, %f399;
	add.f32 	%f401, %f396, %f400;
	add.f32 	%f402, %f397, %f401;
	sub.f32 	%f403, %f397, %f402;
	add.f32 	%f404, %f401, %f403;
	mov.f32 	%f405, 0f3EE66666;
	mul.rn.f32 	%f406, %f405, %f402;
	neg.f32 	%f407, %f406;
	fma.rn.f32 	%f408, %f405, %f402, %f407;
	fma.rn.f32 	%f409, %f405, %f404, %f408;
	mov.f32 	%f410, 0f00000000;
	fma.rn.f32 	%f411, %f410, %f402, %f409;
	add.rn.f32 	%f412, %f406, %f411;
	neg.f32 	%f413, %f412;
	add.rn.f32 	%f414, %f406, %f413;
	add.rn.f32 	%f415, %f414, %f411;
	mov.b32 	 %r232, %f412;
	setp.eq.s32	%p46, %r232, 1118925336;
	add.s32 	%r233, %r232, -1;
	mov.b32 	 %f416, %r233;
	add.f32 	%f417, %f415, 0f37000000;
	selp.f32	%f418, %f416, %f412, %p46;
	selp.f32	%f118, %f417, %f415, %p46;
	mul.f32 	%f419, %f418, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f420, %f419;
	mov.f32 	%f421, 0fBF317200;
	fma.rn.f32 	%f422, %f420, %f421, %f418;
	mov.f32 	%f423, 0fB5BFBE8E;
	fma.rn.f32 	%f424, %f420, %f423, %f422;
	mul.f32 	%f425, %f424, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f426, %f425;
	add.f32 	%f427, %f420, 0f00000000;
	ex2.approx.f32 	%f428, %f427;
	mul.f32 	%f429, %f426, %f428;
	setp.lt.f32	%p47, %f418, 0fC2D20000;
	selp.f32	%f430, 0f00000000, %f429, %p47;
	setp.gt.f32	%p48, %f418, 0f42D20000;
	selp.f32	%f801, 0f7F800000, %f430, %p48;
	setp.eq.f32	%p49, %f801, 0f7F800000;
	@%p49 bra 	BB0_63;

	fma.rn.f32 	%f801, %f801, %f118, %f801;

BB0_63:
	mov.f32 	%f722, 0f3E666666;
	cvt.rzi.f32.f32	%f721, %f722;
	fma.rn.f32 	%f720, %f721, 0fC0000000, 0f3EE66666;
	abs.f32 	%f719, %f720;
	setp.lt.f32	%p50, %f113, 0f00000000;
	setp.eq.f32	%p51, %f719, 0f3F800000;
	and.pred  	%p1, %p50, %p51;
	mov.b32 	 %r234, %f801;
	xor.b32  	%r235, %r234, -2147483648;
	mov.b32 	 %f431, %r235;
	selp.f32	%f803, %f431, %f801, %p1;
	setp.eq.f32	%p52, %f113, 0f00000000;
	@%p52 bra 	BB0_66;
	bra.uni 	BB0_64;

BB0_66:
	add.f32 	%f434, %f113, %f113;
	selp.f32	%f803, %f434, 0f00000000, %p51;
	bra.uni 	BB0_67;

BB0_120:
	mov.u64 	%rd221, image_RNM1;
	cvta.global.u64 	%rd216, %rd221;
	mov.u32 	%r317, 8;
	mov.u64 	%rd220, 0;
	// inline asm
	call (%rd215), _rt_buffer_get_64, (%rd216, %r95, %r317, %rd18, %rd19, %rd220, %rd220);
	// inline asm
	mov.f32 	%f672, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs111, %f672;}

	// inline asm
	mov.u16 	%rs112, 0;
	st.v4.u16 	[%rd215], {%rs111, %rs111, %rs111, %rs112};

BB0_121:
	ld.global.u32 	%r318, [additive];
	setp.eq.s32	%p102, %r318, 0;
	@%p102 bra 	BB0_123;

	mov.u64 	%rd234, image_RNM2;
	cvta.global.u64 	%rd223, %rd234;
	mov.u32 	%r322, 8;
	mov.u64 	%rd233, 0;
	// inline asm
	call (%rd222), _rt_buffer_get_64, (%rd223, %r95, %r322, %rd18, %rd19, %rd233, %rd233);
	// inline asm
	ld.v4.u16 	{%rs119, %rs120, %rs121, %rs122}, [%rd222];
	// inline asm
	{  cvt.f32.f16 %f673, %rs119;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f674, %rs120;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f675, %rs121;}

	// inline asm
	// inline asm
	call (%rd228), _rt_buffer_get_64, (%rd223, %r95, %r322, %rd18, %rd19, %rd233, %rd233);
	// inline asm
	add.f32 	%f676, %f673, 0f00000000;
	add.f32 	%f677, %f674, 0f00000000;
	add.f32 	%f678, %f675, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs118, %f678;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs117, %f677;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs116, %f676;}

	// inline asm
	mov.u16 	%rs123, 0;
	st.v4.u16 	[%rd228], {%rs116, %rs117, %rs118, %rs123};
	bra.uni 	BB0_124;

BB0_123:
	mov.u64 	%rd241, image_RNM2;
	cvta.global.u64 	%rd236, %rd241;
	mov.u32 	%r324, 8;
	mov.u64 	%rd240, 0;
	// inline asm
	call (%rd235), _rt_buffer_get_64, (%rd236, %r95, %r324, %rd18, %rd19, %rd240, %rd240);
	// inline asm
	mov.f32 	%f679, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs124, %f679;}

	// inline asm
	mov.u16 	%rs125, 0;
	st.v4.u16 	[%rd235], {%rs124, %rs124, %rs124, %rs125};

BB0_124:
	ld.global.u32 	%r325, [additive];
	setp.eq.s32	%p103, %r325, 0;
	@%p103 bra 	BB0_126;

	mov.u64 	%rd254, image_RNM3;
	cvta.global.u64 	%rd243, %rd254;
	mov.u32 	%r329, 8;
	mov.u64 	%rd253, 0;
	// inline asm
	call (%rd242), _rt_buffer_get_64, (%rd243, %r95, %r329, %rd18, %rd19, %rd253, %rd253);
	// inline asm
	ld.v4.u16 	{%rs132, %rs133, %rs134, %rs135}, [%rd242];
	// inline asm
	{  cvt.f32.f16 %f680, %rs132;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f681, %rs133;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f682, %rs134;}

	// inline asm
	// inline asm
	call (%rd248), _rt_buffer_get_64, (%rd243, %r95, %r329, %rd18, %rd19, %rd253, %rd253);
	// inline asm
	add.f32 	%f683, %f680, 0f00000000;
	add.f32 	%f684, %f681, 0f00000000;
	add.f32 	%f685, %f682, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs131, %f685;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs130, %f684;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs129, %f683;}

	// inline asm
	mov.u16 	%rs136, 0;
	st.v4.u16 	[%rd248], {%rs129, %rs130, %rs131, %rs136};
	bra.uni 	BB0_127;

BB0_126:
	mov.u64 	%rd261, image_RNM3;
	cvta.global.u64 	%rd256, %rd261;
	mov.u32 	%r331, 8;
	mov.u64 	%rd260, 0;
	// inline asm
	call (%rd255), _rt_buffer_get_64, (%rd256, %r95, %r331, %rd18, %rd19, %rd260, %rd260);
	// inline asm
	mov.f32 	%f686, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs137, %f686;}

	// inline asm
	mov.u16 	%rs138, 0;
	st.v4.u16 	[%rd255], {%rs137, %rs137, %rs137, %rs138};
	bra.uni 	BB0_127;

BB0_64:
	setp.geu.f32	%p53, %f113, 0f00000000;
	@%p53 bra 	BB0_67;

	mov.f32 	%f746, 0f3EE66666;
	cvt.rzi.f32.f32	%f433, %f746;
	setp.neu.f32	%p54, %f433, 0f3EE66666;
	selp.f32	%f803, 0f7FFFFFFF, %f803, %p54;

BB0_67:
	abs.f32 	%f723, %f113;
	add.f32 	%f435, %f723, 0f3EE66666;
	mov.b32 	 %r236, %f435;
	setp.lt.s32	%p56, %r236, 2139095040;
	@%p56 bra 	BB0_72;

	abs.f32 	%f744, %f113;
	setp.gtu.f32	%p57, %f744, 0f7F800000;
	@%p57 bra 	BB0_71;
	bra.uni 	BB0_69;

BB0_71:
	add.f32 	%f803, %f113, 0f3EE66666;
	bra.uni 	BB0_72;

BB0_69:
	abs.f32 	%f745, %f113;
	setp.neu.f32	%p58, %f745, 0f7F800000;
	@%p58 bra 	BB0_72;

	selp.f32	%f803, 0fFF800000, 0f7F800000, %p1;

BB0_72:
	mov.f32 	%f732, 0fB5BFBE8E;
	mov.f32 	%f731, 0fBF317200;
	mov.f32 	%f730, 0f00000000;
	mov.f32 	%f729, 0f35BFBE8E;
	mov.f32 	%f728, 0f3F317200;
	mov.f32 	%f727, 0f3DAAAABD;
	mov.f32 	%f726, 0f3C4CAF63;
	mov.f32 	%f725, 0f3B18F0FE;
	mov.f32 	%f724, 0f3EE66666;
	setp.eq.f32	%p59, %f113, 0f3F800000;
	selp.f32	%f129, 0f3F800000, %f803, %p59;
	abs.f32 	%f130, %f114;
	setp.lt.f32	%p60, %f130, 0f00800000;
	mul.f32 	%f438, %f130, 0f4B800000;
	selp.f32	%f439, 0fC3170000, 0fC2FE0000, %p60;
	selp.f32	%f440, %f438, %f130, %p60;
	mov.b32 	 %r237, %f440;
	and.b32  	%r238, %r237, 8388607;
	or.b32  	%r239, %r238, 1065353216;
	mov.b32 	 %f441, %r239;
	shr.u32 	%r240, %r237, 23;
	cvt.rn.f32.u32	%f442, %r240;
	add.f32 	%f443, %f439, %f442;
	setp.gt.f32	%p61, %f441, 0f3FB504F3;
	mul.f32 	%f444, %f441, 0f3F000000;
	add.f32 	%f445, %f443, 0f3F800000;
	selp.f32	%f446, %f444, %f441, %p61;
	selp.f32	%f447, %f445, %f443, %p61;
	add.f32 	%f448, %f446, 0fBF800000;
	add.f32 	%f437, %f446, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f436,%f437;
	// inline asm
	add.f32 	%f449, %f448, %f448;
	mul.f32 	%f450, %f436, %f449;
	mul.f32 	%f451, %f450, %f450;
	fma.rn.f32 	%f454, %f725, %f451, %f726;
	fma.rn.f32 	%f456, %f454, %f451, %f727;
	mul.rn.f32 	%f457, %f456, %f451;
	mul.rn.f32 	%f458, %f457, %f450;
	sub.f32 	%f459, %f448, %f450;
	neg.f32 	%f460, %f450;
	add.f32 	%f461, %f459, %f459;
	fma.rn.f32 	%f462, %f460, %f448, %f461;
	mul.rn.f32 	%f463, %f436, %f462;
	add.f32 	%f464, %f458, %f450;
	sub.f32 	%f465, %f450, %f464;
	add.f32 	%f466, %f458, %f465;
	add.f32 	%f467, %f463, %f466;
	add.f32 	%f468, %f464, %f467;
	sub.f32 	%f469, %f464, %f468;
	add.f32 	%f470, %f467, %f469;
	mul.rn.f32 	%f472, %f447, %f728;
	mul.rn.f32 	%f474, %f447, %f729;
	add.f32 	%f475, %f472, %f468;
	sub.f32 	%f476, %f472, %f475;
	add.f32 	%f477, %f468, %f476;
	add.f32 	%f478, %f470, %f477;
	add.f32 	%f479, %f474, %f478;
	add.f32 	%f480, %f475, %f479;
	sub.f32 	%f481, %f475, %f480;
	add.f32 	%f482, %f479, %f481;
	mul.rn.f32 	%f484, %f724, %f480;
	neg.f32 	%f485, %f484;
	fma.rn.f32 	%f486, %f724, %f480, %f485;
	fma.rn.f32 	%f487, %f724, %f482, %f486;
	fma.rn.f32 	%f489, %f730, %f480, %f487;
	add.rn.f32 	%f490, %f484, %f489;
	neg.f32 	%f491, %f490;
	add.rn.f32 	%f492, %f484, %f491;
	add.rn.f32 	%f493, %f492, %f489;
	mov.b32 	 %r241, %f490;
	setp.eq.s32	%p62, %r241, 1118925336;
	add.s32 	%r242, %r241, -1;
	mov.b32 	 %f494, %r242;
	add.f32 	%f495, %f493, 0f37000000;
	selp.f32	%f496, %f494, %f490, %p62;
	selp.f32	%f131, %f495, %f493, %p62;
	mul.f32 	%f497, %f496, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f498, %f497;
	fma.rn.f32 	%f500, %f498, %f731, %f496;
	fma.rn.f32 	%f502, %f498, %f732, %f500;
	mul.f32 	%f503, %f502, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f504, %f503;
	add.f32 	%f505, %f498, 0f00000000;
	ex2.approx.f32 	%f506, %f505;
	mul.f32 	%f507, %f504, %f506;
	setp.lt.f32	%p63, %f496, 0fC2D20000;
	selp.f32	%f508, 0f00000000, %f507, %p63;
	setp.gt.f32	%p64, %f496, 0f42D20000;
	selp.f32	%f804, 0f7F800000, %f508, %p64;
	setp.eq.f32	%p65, %f804, 0f7F800000;
	@%p65 bra 	BB0_74;

	fma.rn.f32 	%f804, %f804, %f131, %f804;

BB0_74:
	setp.lt.f32	%p66, %f114, 0f00000000;
	and.pred  	%p2, %p66, %p51;
	mov.b32 	 %r243, %f804;
	xor.b32  	%r244, %r243, -2147483648;
	mov.b32 	 %f509, %r244;
	selp.f32	%f806, %f509, %f804, %p2;
	setp.eq.f32	%p68, %f114, 0f00000000;
	@%p68 bra 	BB0_77;
	bra.uni 	BB0_75;

BB0_77:
	add.f32 	%f512, %f114, %f114;
	selp.f32	%f806, %f512, 0f00000000, %p51;
	bra.uni 	BB0_78;

BB0_75:
	setp.geu.f32	%p69, %f114, 0f00000000;
	@%p69 bra 	BB0_78;

	mov.f32 	%f743, 0f3EE66666;
	cvt.rzi.f32.f32	%f511, %f743;
	setp.neu.f32	%p70, %f511, 0f3EE66666;
	selp.f32	%f806, 0f7FFFFFFF, %f806, %p70;

BB0_78:
	abs.f32 	%f747, %f114;
	add.f32 	%f513, %f747, 0f3EE66666;
	mov.b32 	 %r245, %f513;
	setp.lt.s32	%p72, %r245, 2139095040;
	@%p72 bra 	BB0_83;

	abs.f32 	%f748, %f114;
	setp.gtu.f32	%p73, %f748, 0f7F800000;
	@%p73 bra 	BB0_82;
	bra.uni 	BB0_80;

BB0_82:
	add.f32 	%f806, %f114, 0f3EE66666;
	bra.uni 	BB0_83;

BB0_80:
	abs.f32 	%f749, %f114;
	setp.neu.f32	%p74, %f749, 0f7F800000;
	@%p74 bra 	BB0_83;

	selp.f32	%f806, 0fFF800000, 0f7F800000, %p2;

BB0_83:
	mov.f32 	%f741, 0fB5BFBE8E;
	mov.f32 	%f740, 0fBF317200;
	mov.f32 	%f739, 0f00000000;
	mov.f32 	%f738, 0f35BFBE8E;
	mov.f32 	%f737, 0f3F317200;
	mov.f32 	%f736, 0f3DAAAABD;
	mov.f32 	%f735, 0f3C4CAF63;
	mov.f32 	%f734, 0f3B18F0FE;
	mov.f32 	%f733, 0f3EE66666;
	setp.eq.f32	%p75, %f114, 0f3F800000;
	selp.f32	%f142, 0f3F800000, %f806, %p75;
	abs.f32 	%f143, %f115;
	setp.lt.f32	%p76, %f143, 0f00800000;
	mul.f32 	%f516, %f143, 0f4B800000;
	selp.f32	%f517, 0fC3170000, 0fC2FE0000, %p76;
	selp.f32	%f518, %f516, %f143, %p76;
	mov.b32 	 %r246, %f518;
	and.b32  	%r247, %r246, 8388607;
	or.b32  	%r248, %r247, 1065353216;
	mov.b32 	 %f519, %r248;
	shr.u32 	%r249, %r246, 23;
	cvt.rn.f32.u32	%f520, %r249;
	add.f32 	%f521, %f517, %f520;
	setp.gt.f32	%p77, %f519, 0f3FB504F3;
	mul.f32 	%f522, %f519, 0f3F000000;
	add.f32 	%f523, %f521, 0f3F800000;
	selp.f32	%f524, %f522, %f519, %p77;
	selp.f32	%f525, %f523, %f521, %p77;
	add.f32 	%f526, %f524, 0fBF800000;
	add.f32 	%f515, %f524, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f514,%f515;
	// inline asm
	add.f32 	%f527, %f526, %f526;
	mul.f32 	%f528, %f514, %f527;
	mul.f32 	%f529, %f528, %f528;
	fma.rn.f32 	%f532, %f734, %f529, %f735;
	fma.rn.f32 	%f534, %f532, %f529, %f736;
	mul.rn.f32 	%f535, %f534, %f529;
	mul.rn.f32 	%f536, %f535, %f528;
	sub.f32 	%f537, %f526, %f528;
	neg.f32 	%f538, %f528;
	add.f32 	%f539, %f537, %f537;
	fma.rn.f32 	%f540, %f538, %f526, %f539;
	mul.rn.f32 	%f541, %f514, %f540;
	add.f32 	%f542, %f536, %f528;
	sub.f32 	%f543, %f528, %f542;
	add.f32 	%f544, %f536, %f543;
	add.f32 	%f545, %f541, %f544;
	add.f32 	%f546, %f542, %f545;
	sub.f32 	%f547, %f542, %f546;
	add.f32 	%f548, %f545, %f547;
	mul.rn.f32 	%f550, %f525, %f737;
	mul.rn.f32 	%f552, %f525, %f738;
	add.f32 	%f553, %f550, %f546;
	sub.f32 	%f554, %f550, %f553;
	add.f32 	%f555, %f546, %f554;
	add.f32 	%f556, %f548, %f555;
	add.f32 	%f557, %f552, %f556;
	add.f32 	%f558, %f553, %f557;
	sub.f32 	%f559, %f553, %f558;
	add.f32 	%f560, %f557, %f559;
	mul.rn.f32 	%f562, %f733, %f558;
	neg.f32 	%f563, %f562;
	fma.rn.f32 	%f564, %f733, %f558, %f563;
	fma.rn.f32 	%f565, %f733, %f560, %f564;
	fma.rn.f32 	%f567, %f739, %f558, %f565;
	add.rn.f32 	%f568, %f562, %f567;
	neg.f32 	%f569, %f568;
	add.rn.f32 	%f570, %f562, %f569;
	add.rn.f32 	%f571, %f570, %f567;
	mov.b32 	 %r250, %f568;
	setp.eq.s32	%p78, %r250, 1118925336;
	add.s32 	%r251, %r250, -1;
	mov.b32 	 %f572, %r251;
	add.f32 	%f573, %f571, 0f37000000;
	selp.f32	%f574, %f572, %f568, %p78;
	selp.f32	%f144, %f573, %f571, %p78;
	mul.f32 	%f575, %f574, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f576, %f575;
	fma.rn.f32 	%f578, %f576, %f740, %f574;
	fma.rn.f32 	%f580, %f576, %f741, %f578;
	mul.f32 	%f581, %f580, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f582, %f581;
	add.f32 	%f583, %f576, 0f00000000;
	ex2.approx.f32 	%f584, %f583;
	mul.f32 	%f585, %f582, %f584;
	setp.lt.f32	%p79, %f574, 0fC2D20000;
	selp.f32	%f586, 0f00000000, %f585, %p79;
	setp.gt.f32	%p80, %f574, 0f42D20000;
	selp.f32	%f807, 0f7F800000, %f586, %p80;
	setp.eq.f32	%p81, %f807, 0f7F800000;
	@%p81 bra 	BB0_85;

	fma.rn.f32 	%f807, %f807, %f144, %f807;

BB0_85:
	setp.lt.f32	%p82, %f115, 0f00000000;
	and.pred  	%p3, %p82, %p51;
	mov.b32 	 %r252, %f807;
	xor.b32  	%r253, %r252, -2147483648;
	mov.b32 	 %f587, %r253;
	selp.f32	%f809, %f587, %f807, %p3;
	setp.eq.f32	%p84, %f115, 0f00000000;
	@%p84 bra 	BB0_88;
	bra.uni 	BB0_86;

BB0_88:
	add.f32 	%f590, %f115, %f115;
	selp.f32	%f809, %f590, 0f00000000, %p51;
	bra.uni 	BB0_89;

BB0_86:
	setp.geu.f32	%p85, %f115, 0f00000000;
	@%p85 bra 	BB0_89;

	mov.f32 	%f742, 0f3EE66666;
	cvt.rzi.f32.f32	%f589, %f742;
	setp.neu.f32	%p86, %f589, 0f3EE66666;
	selp.f32	%f809, 0f7FFFFFFF, %f809, %p86;

BB0_89:
	abs.f32 	%f750, %f115;
	add.f32 	%f591, %f750, 0f3EE66666;
	mov.b32 	 %r254, %f591;
	setp.lt.s32	%p88, %r254, 2139095040;
	@%p88 bra 	BB0_94;

	abs.f32 	%f751, %f115;
	setp.gtu.f32	%p89, %f751, 0f7F800000;
	@%p89 bra 	BB0_93;
	bra.uni 	BB0_91;

BB0_93:
	add.f32 	%f809, %f115, 0f3EE66666;
	bra.uni 	BB0_94;

BB0_91:
	abs.f32 	%f752, %f115;
	setp.neu.f32	%p90, %f752, 0f7F800000;
	@%p90 bra 	BB0_94;

	selp.f32	%f809, 0fFF800000, 0f7F800000, %p3;

BB0_94:
	mov.u32 	%r332, 4;
	setp.eq.f32	%p91, %f115, 0f3F800000;
	selp.f32	%f592, 0f3F800000, %f809, %p91;
	cvt.u64.u32	%rd70, %r3;
	cvt.u64.u32	%rd69, %r2;
	mov.u64 	%rd73, image;
	cvta.global.u64 	%rd68, %rd73;
	// inline asm
	call (%rd67), _rt_buffer_get_64, (%rd68, %r95, %r332, %rd69, %rd70, %rd25, %rd25);
	// inline asm
	cvt.sat.f32.f32	%f593, %f592;
	mul.f32 	%f594, %f593, 0f437FFD71;
	cvt.rzi.u32.f32	%r257, %f594;
	cvt.sat.f32.f32	%f595, %f142;
	mul.f32 	%f596, %f595, 0f437FFD71;
	cvt.rzi.u32.f32	%r258, %f596;
	cvt.sat.f32.f32	%f597, %f129;
	mul.f32 	%f598, %f597, 0f437FFD71;
	cvt.rzi.u32.f32	%r259, %f598;
	cvt.u16.u32	%rs13, %r257;
	cvt.u16.u32	%rs14, %r259;
	cvt.u16.u32	%rs15, %r258;
	mov.u16 	%rs16, 255;
	st.v4.u8 	[%rd67], {%rs13, %rs15, %rs14, %rs16};
	ld.global.u32 	%r371, [imageEnabled];

BB0_95:
	and.b32  	%r260, %r371, 4;
	setp.eq.s32	%p92, %r260, 0;
	mul.f32 	%f155, %f765, %f112;
	mul.f32 	%f156, %f766, %f112;
	mul.f32 	%f157, %f767, %f112;
	@%p92 bra 	BB0_99;

	ld.global.u32 	%r261, [addToPrev];
	setp.eq.s32	%p93, %r261, 0;
	mov.f32 	%f810, 0f00000000;
	mov.f32 	%f811, %f810;
	mov.f32 	%f812, %f810;
	@%p93 bra 	BB0_98;

	ld.global.v2.u32 	{%r264, %r265}, [pixelID];
	cvt.u64.u32	%rd76, %r264;
	cvt.u64.u32	%rd77, %r265;
	mov.u64 	%rd80, lightmapDirect;
	cvta.global.u64 	%rd75, %rd80;
	mov.u32 	%r263, 8;
	// inline asm
	call (%rd74), _rt_buffer_get_64, (%rd75, %r95, %r263, %rd76, %rd77, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs20, %rs21, %rs22, %rs23}, [%rd74];
	// inline asm
	{  cvt.f32.f16 %f812, %rs20;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f811, %rs21;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f810, %rs22;}

	// inline asm

BB0_98:
	cvt.u64.u32	%rd84, %r3;
	cvt.u64.u32	%rd83, %r2;
	mov.u64 	%rd87, image_HDR;
	cvta.global.u64 	%rd82, %rd87;
	mov.u32 	%r269, 8;
	// inline asm
	call (%rd81), _rt_buffer_get_64, (%rd82, %r95, %r269, %rd83, %rd84, %rd25, %rd25);
	// inline asm
	add.f32 	%f605, %f113, %f812;
	add.f32 	%f606, %f114, %f811;
	add.f32 	%f607, %f115, %f810;
	// inline asm
	{  cvt.rn.f16.f32 %rs26, %f607;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f606;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs24, %f605;}

	// inline asm
	mov.f32 	%f608, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f608;}

	// inline asm
	st.v4.u16 	[%rd81], {%rs24, %rs25, %rs26, %rs27};

BB0_99:
	cvt.u64.u32	%rd16, %r2;
	cvt.u64.u32	%rd17, %r3;
	mul.f32 	%f164, %f157, 0f3F000000;
	mul.f32 	%f165, %f156, 0f3F000000;
	mul.f32 	%f166, %f155, 0f3F000000;
	ld.global.u32 	%r270, [additive];
	setp.eq.s32	%p94, %r270, 0;
	mov.f32 	%f609, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f609;}

	// inline asm
	@%p94 bra 	BB0_101;

	mov.u64 	%rd100, image_RNM0;
	cvta.global.u64 	%rd89, %rd100;
	mov.u32 	%r274, 8;
	// inline asm
	call (%rd88), _rt_buffer_get_64, (%rd89, %r95, %r274, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs35, %rs36, %rs37, %rs38}, [%rd88];
	// inline asm
	{  cvt.f32.f16 %f610, %rs35;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f611, %rs36;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f612, %rs37;}

	// inline asm
	// inline asm
	call (%rd94), _rt_buffer_get_64, (%rd89, %r95, %r274, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f613, %f164, %f610;
	add.f32 	%f614, %f165, %f611;
	add.f32 	%f615, %f166, %f612;
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f615;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs33, %f614;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs32, %f613;}

	// inline asm
	st.v4.u16 	[%rd94], {%rs32, %rs33, %rs34, %rs28};
	bra.uni 	BB0_102;

BB0_101:
	mov.u64 	%rd107, image_RNM0;
	cvta.global.u64 	%rd102, %rd107;
	mov.u32 	%r276, 8;
	// inline asm
	call (%rd101), _rt_buffer_get_64, (%rd102, %r95, %r276, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs41, %f166;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs40, %f165;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs39, %f164;}

	// inline asm
	st.v4.u16 	[%rd101], {%rs39, %rs40, %rs41, %rs28};

BB0_102:
	mul.f32 	%f620, %f112, 0f00000000;
	mul.f32 	%f621, %f620, 0f3F000000;
	mov.f32 	%f622, 0f34000000;
	max.f32 	%f623, %f164, %f622;
	div.rn.f32 	%f624, %f621, %f623;
	max.f32 	%f625, %f165, %f622;
	div.rn.f32 	%f626, %f621, %f625;
	max.f32 	%f627, %f166, %f622;
	div.rn.f32 	%f628, %f621, %f627;
	fma.rn.f32 	%f167, %f624, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f168, %f626, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f169, %f628, 0f3F000000, 0f3F000000;
	ld.global.u32 	%r277, [additive];
	setp.eq.s32	%p95, %r277, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs42, %f609;}

	// inline asm
	@%p95 bra 	BB0_104;

	mov.u64 	%rd120, image_RNM1;
	cvta.global.u64 	%rd109, %rd120;
	mov.u32 	%r281, 8;
	// inline asm
	call (%rd108), _rt_buffer_get_64, (%rd109, %r95, %r281, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs49, %rs50, %rs51, %rs52}, [%rd108];
	// inline asm
	{  cvt.f32.f16 %f629, %rs49;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f630, %rs50;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f631, %rs51;}

	// inline asm
	// inline asm
	call (%rd114), _rt_buffer_get_64, (%rd109, %r95, %r281, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f632, %f167, %f629;
	add.f32 	%f633, %f168, %f630;
	add.f32 	%f634, %f169, %f631;
	// inline asm
	{  cvt.rn.f16.f32 %rs48, %f634;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs47, %f633;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs46, %f632;}

	// inline asm
	st.v4.u16 	[%rd114], {%rs46, %rs47, %rs48, %rs42};
	bra.uni 	BB0_105;

BB0_104:
	mov.u64 	%rd127, image_RNM1;
	cvta.global.u64 	%rd122, %rd127;
	mov.u32 	%r283, 8;
	// inline asm
	call (%rd121), _rt_buffer_get_64, (%rd122, %r95, %r283, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs55, %f169;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs54, %f168;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs53, %f167;}

	// inline asm
	st.v4.u16 	[%rd121], {%rs53, %rs54, %rs55, %rs42};

BB0_105:
	ld.global.u32 	%r284, [additive];
	setp.eq.s32	%p96, %r284, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs56, %f609;}

	// inline asm
	@%p96 bra 	BB0_107;

	mov.u64 	%rd140, image_RNM2;
	cvta.global.u64 	%rd129, %rd140;
	mov.u32 	%r288, 8;
	// inline asm
	call (%rd128), _rt_buffer_get_64, (%rd129, %r95, %r288, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs63, %rs64, %rs65, %rs66}, [%rd128];
	// inline asm
	{  cvt.f32.f16 %f639, %rs63;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f640, %rs64;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f641, %rs65;}

	// inline asm
	// inline asm
	call (%rd134), _rt_buffer_get_64, (%rd129, %r95, %r288, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f642, %f167, %f639;
	add.f32 	%f643, %f168, %f640;
	add.f32 	%f644, %f169, %f641;
	// inline asm
	{  cvt.rn.f16.f32 %rs62, %f644;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs61, %f643;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs60, %f642;}

	// inline asm
	st.v4.u16 	[%rd134], {%rs60, %rs61, %rs62, %rs56};
	bra.uni 	BB0_108;

BB0_107:
	mov.u64 	%rd147, image_RNM2;
	cvta.global.u64 	%rd142, %rd147;
	mov.u32 	%r290, 8;
	// inline asm
	call (%rd141), _rt_buffer_get_64, (%rd142, %r95, %r290, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs69, %f169;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs68, %f168;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs67, %f167;}

	// inline asm
	st.v4.u16 	[%rd141], {%rs67, %rs68, %rs69, %rs56};

BB0_108:
	ld.global.u32 	%r291, [additive];
	setp.eq.s32	%p97, %r291, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs70, %f609;}

	// inline asm
	@%p97 bra 	BB0_110;

	mov.u64 	%rd160, image_RNM3;
	cvta.global.u64 	%rd149, %rd160;
	mov.u32 	%r295, 8;
	// inline asm
	call (%rd148), _rt_buffer_get_64, (%rd149, %r95, %r295, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	ld.v4.u16 	{%rs77, %rs78, %rs79, %rs80}, [%rd148];
	// inline asm
	{  cvt.f32.f16 %f649, %rs77;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f650, %rs78;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f651, %rs79;}

	// inline asm
	// inline asm
	call (%rd154), _rt_buffer_get_64, (%rd149, %r95, %r295, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	add.f32 	%f652, %f167, %f649;
	add.f32 	%f653, %f168, %f650;
	add.f32 	%f654, %f169, %f651;
	// inline asm
	{  cvt.rn.f16.f32 %rs76, %f654;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs75, %f653;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs74, %f652;}

	// inline asm
	st.v4.u16 	[%rd154], {%rs74, %rs75, %rs76, %rs70};
	bra.uni 	BB0_127;

BB0_110:
	mov.u64 	%rd167, image_RNM3;
	cvta.global.u64 	%rd162, %rd167;
	mov.u32 	%r297, 8;
	// inline asm
	call (%rd161), _rt_buffer_get_64, (%rd162, %r95, %r297, %rd16, %rd17, %rd25, %rd25);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs83, %f169;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs82, %f168;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs81, %f167;}

	// inline asm
	st.v4.u16 	[%rd161], {%rs81, %rs82, %rs83, %rs70};

BB0_127:
	ret;
}