//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 uvtangent[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 lightMeshBuffer[1];
.global .align 4 .u32 lightMeshBufferSize;
.global .align 4 .f32 lightInvCutoff;
.global .align 4 .f32 lightPointSize;
.global .align 4 .b8 lightColor[12];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 rnd_seeds2[1];
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[36];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<156>;
	.reg .b16 	%rs<158>;
	.reg .f32 	%f<1168>;
	.reg .b32 	%r<428>;
	.reg .b64 	%rd<304>;


	mov.u64 	%rd303, __local_depot0;
	cvta.local.u64 	%SP, %rd303;
	ld.global.u32 	%r1, [lightMeshBufferSize];
	abs.s32 	%r2, %r1;
	ld.global.u32 	%r3, [samples];
	ld.global.v2.u32 	{%r111, %r112}, [pixelID];
	cvt.u64.u32	%rd27, %r111;
	cvt.u64.u32	%rd28, %r112;
	mov.u64 	%rd31, uvnormal;
	cvta.global.u64 	%rd26, %rd31;
	mov.u32 	%r109, 2;
	mov.u32 	%r110, 4;
	mov.u64 	%rd30, 0;
	// inline asm
	call (%rd25), _rt_buffer_get_64, (%rd26, %r109, %r110, %rd27, %rd28, %rd30, %rd30);
	// inline asm
	ld.u32 	%r4, [%rd25];
	shr.u32 	%r115, %r4, 16;
	cvt.u16.u32	%rs1, %r115;
	and.b16  	%rs6, %rs1, 255;
	cvt.u16.u32	%rs7, %r4;
	or.b16  	%rs8, %rs7, %rs6;
	setp.eq.s16	%p7, %rs8, 0;
	mov.f32 	%f1089, 0f00000000;
	mov.f32 	%f1090, %f1089;
	mov.f32 	%f1091, %f1089;
	@%p7 bra 	BB0_2;

	ld.u8 	%rs9, [%rd25+1];
	and.b16  	%rs11, %rs7, 255;
	cvt.rn.f32.u16	%f248, %rs11;
	div.rn.f32 	%f249, %f248, 0f437F0000;
	fma.rn.f32 	%f250, %f249, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f251, %rs9;
	div.rn.f32 	%f252, %f251, 0f437F0000;
	fma.rn.f32 	%f253, %f252, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f254, %rs6;
	div.rn.f32 	%f255, %f254, 0f437F0000;
	fma.rn.f32 	%f256, %f255, 0f40000000, 0fBF800000;
	mul.f32 	%f257, %f253, %f253;
	fma.rn.f32 	%f258, %f250, %f250, %f257;
	fma.rn.f32 	%f259, %f256, %f256, %f258;
	sqrt.rn.f32 	%f260, %f259;
	rcp.rn.f32 	%f261, %f260;
	mul.f32 	%f1089, %f250, %f261;
	mul.f32 	%f1090, %f253, %f261;
	mul.f32 	%f1091, %f256, %f261;

BB0_2:
	ld.global.v2.u32 	{%r116, %r117}, [pixelID];
	ld.global.v2.u32 	{%r119, %r120}, [tileInfo];
	add.s32 	%r5, %r116, %r119;
	add.s32 	%r6, %r117, %r120;
	setp.eq.f32	%p8, %f1090, 0f00000000;
	setp.eq.f32	%p9, %f1089, 0f00000000;
	and.pred  	%p10, %p9, %p8;
	setp.eq.f32	%p11, %f1091, 0f00000000;
	and.pred  	%p12, %p10, %p11;
	@%p12 bra 	BB0_145;
	bra.uni 	BB0_3;

BB0_145:
	ld.global.u32 	%r427, [imageEnabled];
	and.b32  	%r357, %r427, 1;
	setp.eq.b32	%p148, %r357, 1;
	@!%p148 bra 	BB0_147;
	bra.uni 	BB0_146;

BB0_146:
	cvt.u64.u32	%rd203, %r5;
	cvt.u64.u32	%rd204, %r6;
	mov.u64 	%rd207, image;
	cvta.global.u64 	%rd202, %rd207;
	mov.u64 	%rd206, 0;
	// inline asm
	call (%rd201), _rt_buffer_get_64, (%rd202, %r109, %r110, %rd203, %rd204, %rd206, %rd206);
	// inline asm
	mov.u16 	%rs103, 0;
	st.v4.u8 	[%rd201], {%rs103, %rs103, %rs103, %rs103};
	ld.global.u32 	%r427, [imageEnabled];

BB0_147:
	and.b32  	%r360, %r427, 8;
	setp.eq.s32	%p149, %r360, 0;
	@%p149 bra 	BB0_149;

	cvt.u64.u32	%rd211, %r6;
	cvt.u64.u32	%rd210, %r5;
	mov.u64 	%rd214, image_Mask;
	cvta.global.u64 	%rd209, %rd214;
	mov.u64 	%rd213, 0;
	// inline asm
	call (%rd208), _rt_buffer_get_64, (%rd209, %r109, %r109, %rd210, %rd211, %rd213, %rd213);
	// inline asm
	mov.f32 	%f1051, 0f00000000;
	cvt.rzi.u32.f32	%r363, %f1051;
	cvt.u16.u32	%rs104, %r363;
	mov.u16 	%rs105, 0;
	st.v2.u8 	[%rd208], {%rs104, %rs105};
	ld.global.u32 	%r427, [imageEnabled];

BB0_149:
	cvt.u64.u32	%rd23, %r5;
	cvt.u64.u32	%rd24, %r6;
	and.b32  	%r364, %r427, 4;
	setp.eq.s32	%p150, %r364, 0;
	@%p150 bra 	BB0_153;

	ld.global.u32 	%r365, [additive];
	setp.eq.s32	%p151, %r365, 0;
	@%p151 bra 	BB0_152;

	mov.u64 	%rd227, image_HDR;
	cvta.global.u64 	%rd216, %rd227;
	mov.u32 	%r369, 8;
	mov.u64 	%rd226, 0;
	// inline asm
	call (%rd215), _rt_buffer_get_64, (%rd216, %r109, %r369, %rd23, %rd24, %rd226, %rd226);
	// inline asm
	ld.v4.u16 	{%rs112, %rs113, %rs114, %rs115}, [%rd215];
	// inline asm
	{  cvt.f32.f16 %f1052, %rs112;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1053, %rs113;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1054, %rs114;}

	// inline asm
	// inline asm
	call (%rd221), _rt_buffer_get_64, (%rd216, %r109, %r369, %rd23, %rd24, %rd226, %rd226);
	// inline asm
	add.f32 	%f1055, %f1052, 0f00000000;
	add.f32 	%f1056, %f1053, 0f00000000;
	add.f32 	%f1057, %f1054, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs111, %f1057;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs110, %f1056;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs109, %f1055;}

	// inline asm
	mov.u16 	%rs116, 0;
	st.v4.u16 	[%rd221], {%rs109, %rs110, %rs111, %rs116};
	bra.uni 	BB0_153;

BB0_3:
	ld.global.v2.u32 	{%r128, %r129}, [pixelID];
	cvt.u64.u32	%rd34, %r128;
	cvt.u64.u32	%rd35, %r129;
	mov.u64 	%rd44, uvpos;
	cvta.global.u64 	%rd33, %rd44;
	mov.u32 	%r125, 12;
	// inline asm
	call (%rd32), _rt_buffer_get_64, (%rd33, %r109, %r125, %rd34, %rd35, %rd30, %rd30);
	// inline asm
	ld.f32 	%f9, [%rd32+8];
	ld.f32 	%f8, [%rd32+4];
	ld.f32 	%f7, [%rd32];
	mul.f32 	%f265, %f7, 0f3456BF95;
	mul.f32 	%f266, %f8, 0f3456BF95;
	mul.f32 	%f267, %f9, 0f3456BF95;
	abs.f32 	%f10, %f1089;
	div.rn.f32 	%f268, %f265, %f10;
	abs.f32 	%f269, %f1090;
	div.rn.f32 	%f270, %f266, %f269;
	abs.f32 	%f11, %f1091;
	div.rn.f32 	%f271, %f267, %f11;
	abs.f32 	%f272, %f268;
	abs.f32 	%f273, %f270;
	abs.f32 	%f274, %f271;
	mov.f32 	%f275, 0f38D1B717;
	max.f32 	%f276, %f272, %f275;
	max.f32 	%f277, %f273, %f275;
	max.f32 	%f278, %f274, %f275;
	fma.rn.f32 	%f12, %f1089, %f276, %f7;
	fma.rn.f32 	%f13, %f1090, %f277, %f8;
	fma.rn.f32 	%f14, %f1091, %f278, %f9;
	ld.global.v2.u32 	{%r132, %r133}, [pixelID];
	cvt.u64.u32	%rd40, %r132;
	cvt.u64.u32	%rd41, %r133;
	mov.u64 	%rd45, uvtangent;
	cvta.global.u64 	%rd39, %rd45;
	// inline asm
	call (%rd38), _rt_buffer_get_64, (%rd39, %r109, %r110, %rd40, %rd41, %rd30, %rd30);
	// inline asm
	ld.u32 	%r7, [%rd38];
	shr.u32 	%r8, %r7, 16;
	cvt.u16.u32	%rs13, %r8;
	and.b16  	%rs14, %rs13, 255;
	cvt.u16.u32	%rs15, %r7;
	or.b16  	%rs16, %rs15, %rs14;
	setp.eq.s16	%p13, %rs16, 0;
	mov.f32 	%f49, 0f00000000;
	mov.f32 	%f1092, %f49;
	mov.f32 	%f1093, %f49;
	mov.f32 	%f1094, %f49;
	@%p13 bra 	BB0_5;

	ld.u8 	%rs17, [%rd38+1];
	and.b16  	%rs19, %rs15, 255;
	cvt.rn.f32.u16	%f279, %rs19;
	div.rn.f32 	%f280, %f279, 0f437F0000;
	fma.rn.f32 	%f281, %f280, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f282, %rs17;
	div.rn.f32 	%f283, %f282, 0f437F0000;
	fma.rn.f32 	%f284, %f283, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f285, %rs14;
	div.rn.f32 	%f286, %f285, 0f437F0000;
	fma.rn.f32 	%f287, %f286, 0f40000000, 0fBF800000;
	mul.f32 	%f288, %f284, %f284;
	fma.rn.f32 	%f289, %f281, %f281, %f288;
	fma.rn.f32 	%f290, %f287, %f287, %f289;
	sqrt.rn.f32 	%f291, %f290;
	rcp.rn.f32 	%f292, %f291;
	mul.f32 	%f1092, %f281, %f292;
	mul.f32 	%f1093, %f284, %f292;
	mul.f32 	%f1094, %f287, %f292;

BB0_5:
	mul.f32 	%f296, %f1091, %f1093;
	mul.f32 	%f297, %f1090, %f1094;
	sub.f32 	%f298, %f297, %f296;
	mul.f32 	%f299, %f1089, %f1094;
	mul.f32 	%f300, %f1091, %f1092;
	sub.f32 	%f301, %f300, %f299;
	mul.f32 	%f302, %f1090, %f1092;
	mul.f32 	%f303, %f1089, %f1093;
	sub.f32 	%f304, %f303, %f302;
	setp.lt.u32	%p14, %r7, 16777216;
	selp.f32	%f305, 0fBF800000, 0f3F800000, %p14;
	mul.f32 	%f306, %f298, %f305;
	mul.f32 	%f307, %f301, %f305;
	mul.f32 	%f308, %f304, %f305;
	mul.f32 	%f309, %f306, 0f00000000;
	mul.f32 	%f310, %f307, 0f00000000;
	mul.f32 	%f311, %f308, 0f00000000;
	fma.rn.f32 	%f312, %f1092, 0f3F5105EC, %f309;
	fma.rn.f32 	%f313, %f1093, 0f3F5105EC, %f310;
	fma.rn.f32 	%f314, %f1094, 0f3F5105EC, %f311;
	mul.f32 	%f21, %f1089, 0f3F13CD3A;
	add.f32 	%f22, %f21, %f312;
	mul.f32 	%f23, %f1090, 0f3F13CD3A;
	add.f32 	%f24, %f23, %f313;
	mul.f32 	%f25, %f1091, 0f3F13CD3A;
	add.f32 	%f26, %f25, %f314;
	ld.global.v2.u32 	{%r138, %r139}, [pixelID];
	cvt.u64.u32	%rd48, %r138;
	cvt.u64.u32	%rd49, %r139;
	// inline asm
	call (%rd46), _rt_buffer_get_64, (%rd39, %r109, %r110, %rd48, %rd49, %rd30, %rd30);
	// inline asm
	ld.u32 	%r9, [%rd46];
	shr.u32 	%r10, %r9, 16;
	cvt.u16.u32	%rs22, %r10;
	and.b16  	%rs23, %rs22, 255;
	cvt.u16.u32	%rs24, %r9;
	or.b16  	%rs25, %rs24, %rs23;
	setp.eq.s16	%p15, %rs25, 0;
	mov.f32 	%f1095, %f49;
	mov.f32 	%f1096, %f49;
	mov.f32 	%f1097, %f49;
	@%p15 bra 	BB0_7;

	ld.u8 	%rs26, [%rd46+1];
	and.b16  	%rs28, %rs24, 255;
	cvt.rn.f32.u16	%f315, %rs28;
	div.rn.f32 	%f316, %f315, 0f437F0000;
	fma.rn.f32 	%f317, %f316, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f318, %rs26;
	div.rn.f32 	%f319, %f318, 0f437F0000;
	fma.rn.f32 	%f320, %f319, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f321, %rs23;
	div.rn.f32 	%f322, %f321, 0f437F0000;
	fma.rn.f32 	%f323, %f322, 0f40000000, 0fBF800000;
	mul.f32 	%f324, %f320, %f320;
	fma.rn.f32 	%f325, %f317, %f317, %f324;
	fma.rn.f32 	%f326, %f323, %f323, %f325;
	sqrt.rn.f32 	%f327, %f326;
	rcp.rn.f32 	%f328, %f327;
	mul.f32 	%f1095, %f317, %f328;
	mul.f32 	%f1096, %f320, %f328;
	mul.f32 	%f1097, %f323, %f328;

BB0_7:
	mul.f32 	%f332, %f1091, %f1096;
	mul.f32 	%f333, %f1090, %f1097;
	sub.f32 	%f334, %f333, %f332;
	mul.f32 	%f335, %f1089, %f1097;
	mul.f32 	%f336, %f1091, %f1095;
	sub.f32 	%f337, %f336, %f335;
	mul.f32 	%f338, %f1090, %f1095;
	mul.f32 	%f339, %f1089, %f1096;
	sub.f32 	%f340, %f339, %f338;
	setp.lt.u32	%p16, %r9, 16777216;
	selp.f32	%f341, 0fBF800000, 0f3F800000, %p16;
	mul.f32 	%f342, %f334, %f341;
	mul.f32 	%f343, %f337, %f341;
	mul.f32 	%f344, %f340, %f341;
	mul.f32 	%f345, %f342, 0f3F3504F3;
	mul.f32 	%f346, %f343, 0f3F3504F3;
	mul.f32 	%f347, %f344, 0f3F3504F3;
	fma.rn.f32 	%f348, %f1095, 0fBED105EC, %f345;
	fma.rn.f32 	%f349, %f1096, 0fBED105EC, %f346;
	fma.rn.f32 	%f350, %f1097, 0fBED105EC, %f347;
	add.f32 	%f33, %f21, %f348;
	add.f32 	%f34, %f23, %f349;
	add.f32 	%f35, %f25, %f350;
	ld.global.v2.u32 	{%r144, %r145}, [pixelID];
	cvt.u64.u32	%rd55, %r144;
	cvt.u64.u32	%rd56, %r145;
	// inline asm
	call (%rd53), _rt_buffer_get_64, (%rd39, %r109, %r110, %rd55, %rd56, %rd30, %rd30);
	// inline asm
	ld.u32 	%r11, [%rd53];
	shr.u32 	%r12, %r11, 16;
	cvt.u16.u32	%rs31, %r12;
	and.b16  	%rs32, %rs31, 255;
	cvt.u16.u32	%rs33, %r11;
	or.b16  	%rs34, %rs33, %rs32;
	setp.eq.s16	%p17, %rs34, 0;
	mov.f32 	%f1098, %f49;
	mov.f32 	%f1099, %f49;
	mov.f32 	%f1100, %f49;
	@%p17 bra 	BB0_9;

	ld.u8 	%rs35, [%rd53+1];
	and.b16  	%rs37, %rs33, 255;
	cvt.rn.f32.u16	%f351, %rs37;
	div.rn.f32 	%f352, %f351, 0f437F0000;
	fma.rn.f32 	%f353, %f352, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f354, %rs35;
	div.rn.f32 	%f355, %f354, 0f437F0000;
	fma.rn.f32 	%f356, %f355, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f357, %rs32;
	div.rn.f32 	%f358, %f357, 0f437F0000;
	fma.rn.f32 	%f359, %f358, 0f40000000, 0fBF800000;
	mul.f32 	%f360, %f356, %f356;
	fma.rn.f32 	%f361, %f353, %f353, %f360;
	fma.rn.f32 	%f362, %f359, %f359, %f361;
	sqrt.rn.f32 	%f363, %f362;
	rcp.rn.f32 	%f364, %f363;
	mul.f32 	%f1098, %f353, %f364;
	mul.f32 	%f1099, %f356, %f364;
	mul.f32 	%f1100, %f359, %f364;

BB0_9:
	mul.f32 	%f370, %f1091, %f1099;
	mul.f32 	%f371, %f1090, %f1100;
	sub.f32 	%f372, %f371, %f370;
	mul.f32 	%f373, %f1089, %f1100;
	mul.f32 	%f374, %f1091, %f1098;
	sub.f32 	%f375, %f374, %f373;
	mul.f32 	%f376, %f1090, %f1098;
	mul.f32 	%f377, %f1089, %f1099;
	sub.f32 	%f378, %f377, %f376;
	setp.lt.u32	%p19, %r11, 16777216;
	selp.f32	%f379, 0fBF800000, 0f3F800000, %p19;
	mul.f32 	%f380, %f372, %f379;
	mul.f32 	%f381, %f375, %f379;
	mul.f32 	%f382, %f378, %f379;
	mul.f32 	%f383, %f380, 0fBF3504F3;
	mul.f32 	%f384, %f381, 0fBF3504F3;
	mul.f32 	%f385, %f382, 0fBF3504F3;
	fma.rn.f32 	%f386, %f1098, 0fBED105EC, %f383;
	fma.rn.f32 	%f387, %f1099, 0fBED105EC, %f384;
	fma.rn.f32 	%f388, %f1100, 0fBED105EC, %f385;
	add.f32 	%f42, %f21, %f386;
	add.f32 	%f43, %f23, %f387;
	add.f32 	%f44, %f25, %f388;
	ld.global.v2.u32 	{%r151, %r152}, [pixelID];
	cvt.u64.u32	%rd62, %r151;
	cvt.u64.u32	%rd63, %r152;
	mov.u64 	%rd66, rnd_seeds;
	cvta.global.u64 	%rd61, %rd66;
	// inline asm
	call (%rd60), _rt_buffer_get_64, (%rd61, %r109, %r110, %rd62, %rd63, %rd30, %rd30);
	// inline asm
	ld.u32 	%r403, [%rd60];
	mov.pred 	%p18, 0;
	mov.u32 	%r15, 0;
	setp.lt.s32	%p20, %r2, 1;
	@%p20 bra 	BB0_10;

	ld.global.f32 	%f45, [lightPointSize];
	mul.f32 	%f46, %f12, 0f3456BF95;
	mul.f32 	%f47, %f13, 0f3456BF95;
	mul.f32 	%f48, %f14, 0f3456BF95;
	mov.f32 	%f49, 0f00000000;
	mov.u32 	%r396, 0;
	abs.f32 	%f516, %f47;
	abs.f32 	%f517, %f46;
	max.f32 	%f518, %f517, %f516;
	abs.f32 	%f519, %f48;
	max.f32 	%f520, %f518, %f519;
	mov.u32 	%r15, %r396;
	mov.f32 	%f50, %f49;
	mov.f32 	%f51, %f49;
	mov.f32 	%f52, %f49;
	mov.f32 	%f53, %f49;

BB0_12:
	shl.b32 	%r16, %r396, 1;
	cvt.s64.s32	%rd69, %r16;
	mov.u64 	%rd73, lightMeshBuffer;
	cvta.global.u64 	%rd68, %rd73;
	mov.u32 	%r157, 1;
	mov.u64 	%rd72, 0;
	// inline asm
	call (%rd67), _rt_buffer_get_64, (%rd68, %r157, %r125, %rd69, %rd72, %rd72, %rd72);
	// inline asm
	ld.f32 	%f394, [%rd67];
	sub.f32 	%f395, %f394, %f7;
	ld.f32 	%f396, [%rd67+4];
	sub.f32 	%f397, %f396, %f8;
	ld.f32 	%f398, [%rd67+8];
	sub.f32 	%f399, %f398, %f9;
	mul.f32 	%f400, %f397, %f397;
	fma.rn.f32 	%f401, %f395, %f395, %f400;
	fma.rn.f32 	%f402, %f399, %f399, %f401;
	sqrt.rn.f32 	%f54, %f402;
	rcp.rn.f32 	%f403, %f54;
	mul.f32 	%f55, %f395, %f403;
	mul.f32 	%f56, %f397, %f403;
	mul.f32 	%f57, %f399, %f403;
	mul.f32 	%f404, %f1090, %f56;
	fma.rn.f32 	%f405, %f1089, %f55, %f404;
	fma.rn.f32 	%f58, %f1091, %f57, %f405;
	setp.leu.f32	%p21, %f58, 0f00000000;
	@%p21 bra 	BB0_29;

	mov.u64 	%rd298, 0;
	setp.eq.s32	%p22, %r3, 0;
	mul.f32 	%f406, %f54, %f54;
	div.rn.f32 	%f59, %f45, %f406;
	ld.global.v2.u32 	{%r161, %r162}, [pixelID];
	cvt.u64.u32	%rd80, %r162;
	cvt.u64.u32	%rd81, %r161;
	and.b64  	%rd76, %rd81, 255;
	and.b64  	%rd77, %rd80, 255;
	mov.u64 	%rd82, rnd_seeds2;
	cvta.global.u64 	%rd75, %rd82;
	mov.u32 	%r160, 3;
	// inline asm
	call (%rd74), _rt_buffer_get_64, (%rd75, %r109, %r160, %rd76, %rd77, %rd298, %rd298);
	// inline asm
	@%p22 bra 	BB0_15;

	ld.u8 	%rs40, [%rd74];
	cvt.rn.f32.u16	%f407, %rs40;
	div.rn.f32 	%f408, %f407, 0fC37F0000;
	fma.rn.f32 	%f409, %f408, 0f3F333333, 0f3F800000;
	setp.gt.f32	%p24, %f59, %f409;
	mov.pred 	%p155, -1;
	@%p24 bra 	BB0_31;

BB0_15:
	ld.global.f32 	%f412, [lightInvCutoff];
	mul.f32 	%f60, %f54, %f412;
	mov.f32 	%f416, 0f40800000;
	abs.f32 	%f62, %f60;
	setp.lt.f32	%p25, %f62, 0f00800000;
	mul.f32 	%f418, %f62, 0f4B800000;
	selp.f32	%f419, 0fC3170000, 0fC2FE0000, %p25;
	selp.f32	%f420, %f418, %f62, %p25;
	mov.b32 	 %r165, %f420;
	and.b32  	%r166, %r165, 8388607;
	or.b32  	%r167, %r166, 1065353216;
	mov.b32 	 %f421, %r167;
	shr.u32 	%r168, %r165, 23;
	cvt.rn.f32.u32	%f422, %r168;
	add.f32 	%f423, %f419, %f422;
	setp.gt.f32	%p26, %f421, 0f3FB504F3;
	mul.f32 	%f424, %f421, 0f3F000000;
	add.f32 	%f425, %f423, 0f3F800000;
	selp.f32	%f426, %f424, %f421, %p26;
	selp.f32	%f427, %f425, %f423, %p26;
	add.f32 	%f428, %f426, 0fBF800000;
	add.f32 	%f411, %f426, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f410,%f411;
	// inline asm
	add.f32 	%f429, %f428, %f428;
	mul.f32 	%f430, %f410, %f429;
	mul.f32 	%f431, %f430, %f430;
	mov.f32 	%f432, 0f3C4CAF63;
	mov.f32 	%f433, 0f3B18F0FE;
	fma.rn.f32 	%f434, %f433, %f431, %f432;
	mov.f32 	%f435, 0f3DAAAABD;
	fma.rn.f32 	%f436, %f434, %f431, %f435;
	mul.rn.f32 	%f437, %f436, %f431;
	mul.rn.f32 	%f438, %f437, %f430;
	sub.f32 	%f439, %f428, %f430;
	neg.f32 	%f440, %f430;
	add.f32 	%f441, %f439, %f439;
	fma.rn.f32 	%f442, %f440, %f428, %f441;
	mul.rn.f32 	%f443, %f410, %f442;
	add.f32 	%f444, %f438, %f430;
	sub.f32 	%f445, %f430, %f444;
	add.f32 	%f446, %f438, %f445;
	add.f32 	%f447, %f443, %f446;
	add.f32 	%f448, %f444, %f447;
	sub.f32 	%f449, %f444, %f448;
	add.f32 	%f450, %f447, %f449;
	mov.f32 	%f451, 0f3F317200;
	mul.rn.f32 	%f452, %f427, %f451;
	mov.f32 	%f453, 0f35BFBE8E;
	mul.rn.f32 	%f454, %f427, %f453;
	add.f32 	%f455, %f452, %f448;
	sub.f32 	%f456, %f452, %f455;
	add.f32 	%f457, %f448, %f456;
	add.f32 	%f458, %f450, %f457;
	add.f32 	%f459, %f454, %f458;
	add.f32 	%f460, %f455, %f459;
	sub.f32 	%f461, %f455, %f460;
	add.f32 	%f462, %f459, %f461;
	mul.rn.f32 	%f463, %f416, %f460;
	neg.f32 	%f464, %f463;
	fma.rn.f32 	%f465, %f416, %f460, %f464;
	fma.rn.f32 	%f466, %f416, %f462, %f465;
	mov.f32 	%f467, 0f00000000;
	fma.rn.f32 	%f468, %f467, %f460, %f466;
	add.rn.f32 	%f469, %f463, %f468;
	neg.f32 	%f470, %f469;
	add.rn.f32 	%f471, %f463, %f470;
	add.rn.f32 	%f472, %f471, %f468;
	mov.b32 	 %r169, %f469;
	setp.eq.s32	%p27, %r169, 1118925336;
	add.s32 	%r170, %r169, -1;
	mov.b32 	 %f473, %r170;
	add.f32 	%f474, %f472, 0f37000000;
	selp.f32	%f475, %f473, %f469, %p27;
	selp.f32	%f63, %f474, %f472, %p27;
	mul.f32 	%f476, %f475, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f477, %f476;
	mov.f32 	%f478, 0fBF317200;
	fma.rn.f32 	%f479, %f477, %f478, %f475;
	mov.f32 	%f480, 0fB5BFBE8E;
	fma.rn.f32 	%f481, %f477, %f480, %f479;
	mul.f32 	%f482, %f481, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f483, %f482;
	add.f32 	%f484, %f477, 0f00000000;
	ex2.approx.f32 	%f485, %f484;
	mul.f32 	%f486, %f483, %f485;
	setp.lt.f32	%p28, %f475, 0fC2D20000;
	selp.f32	%f487, 0f00000000, %f486, %p28;
	setp.gt.f32	%p29, %f475, 0f42D20000;
	selp.f32	%f1106, 0f7F800000, %f487, %p29;
	setp.eq.f32	%p30, %f1106, 0f7F800000;
	@%p30 bra 	BB0_17;

	fma.rn.f32 	%f1106, %f1106, %f63, %f1106;

BB0_17:
	mov.f32 	%f1085, 0f40000000;
	cvt.rzi.f32.f32	%f1084, %f1085;
	add.f32 	%f1083, %f1084, %f1084;
	mov.f32 	%f1082, 0f40800000;
	sub.f32 	%f1081, %f1082, %f1083;
	abs.f32 	%f1080, %f1081;
	setp.lt.f32	%p31, %f60, 0f00000000;
	setp.eq.f32	%p32, %f1080, 0f3F800000;
	and.pred  	%p1, %p31, %p32;
	mov.b32 	 %r171, %f1106;
	xor.b32  	%r172, %r171, -2147483648;
	mov.b32 	 %f488, %r172;
	selp.f32	%f1108, %f488, %f1106, %p1;
	setp.eq.f32	%p33, %f60, 0f00000000;
	@%p33 bra 	BB0_20;
	bra.uni 	BB0_18;

BB0_20:
	add.f32 	%f491, %f60, %f60;
	selp.f32	%f1108, %f491, 0f00000000, %p32;
	bra.uni 	BB0_21;

BB0_18:
	setp.geu.f32	%p34, %f60, 0f00000000;
	@%p34 bra 	BB0_21;

	mov.f32 	%f1088, 0f40800000;
	cvt.rzi.f32.f32	%f490, %f1088;
	setp.neu.f32	%p35, %f490, 0f40800000;
	selp.f32	%f1108, 0f7FFFFFFF, %f1108, %p35;

BB0_21:
	add.f32 	%f492, %f62, 0f40800000;
	mov.b32 	 %r173, %f492;
	setp.lt.s32	%p37, %r173, 2139095040;
	@%p37 bra 	BB0_26;

	setp.gtu.f32	%p38, %f62, 0f7F800000;
	@%p38 bra 	BB0_25;
	bra.uni 	BB0_23;

BB0_25:
	add.f32 	%f1108, %f60, 0f40800000;
	bra.uni 	BB0_26;

BB0_23:
	setp.neu.f32	%p39, %f62, 0f7F800000;
	@%p39 bra 	BB0_26;

	selp.f32	%f1108, 0fFF800000, 0f7F800000, %p1;

BB0_26:
	mov.u32 	%r394, 1;
	mov.u64 	%rd297, lightMeshBuffer;
	cvta.global.u64 	%rd296, %rd297;
	shl.b32 	%r393, %r396, 1;
	mov.u64 	%rd295, 0;
	mov.f32 	%f493, 0f3F800000;
	sub.f32 	%f494, %f493, %f1108;
	setp.eq.f32	%p40, %f60, 0f3F800000;
	selp.f32	%f495, 0f00000000, %f494, %p40;
	cvt.sat.f32.f32	%f496, %f495;
	mul.f32 	%f497, %f59, %f496;
	add.s32 	%r176, %r393, 1;
	cvt.s64.s32	%rd85, %r176;
	// inline asm
	call (%rd83), _rt_buffer_get_64, (%rd296, %r394, %r125, %rd85, %rd295, %rd295, %rd295);
	// inline asm
	ld.f32 	%f498, [%rd83];
	mul.f32 	%f499, %f55, %f498;
	ld.f32 	%f500, [%rd83+4];
	mul.f32 	%f501, %f56, %f500;
	neg.f32 	%f502, %f501;
	sub.f32 	%f503, %f502, %f499;
	ld.f32 	%f504, [%rd83+8];
	mul.f32 	%f505, %f57, %f504;
	sub.f32 	%f506, %f503, %f505;
	cvt.sat.f32.f32	%f507, %f506;
	mul.f32 	%f74, %f497, %f507;
	setp.leu.f32	%p41, %f74, 0f3727C5AC;
	@%p41 bra 	BB0_28;

	mov.u32 	%r395, 1;
	add.u64 	%rd90, %SP, 4;
	cvta.to.local.u64 	%rd91, %rd90;
	max.f32 	%f514, %f520, %f275;
	sub.f32 	%f515, %f54, %f514;
	mov.u32 	%r180, 1065353216;
	st.local.u32 	[%rd91], %r180;
	ld.global.u32 	%r177, [root];
	// inline asm
	call _rt_trace_64, (%r177, %f12, %f13, %f14, %f55, %f56, %f57, %r395, %f514, %f515, %rd90, %r110);
	// inline asm
	ld.local.f32 	%f522, [%rd91];
	mul.f32 	%f523, %f74, 0f3EA2F983;
	mul.f32 	%f524, %f523, %f522;
	cvt.sat.f32.f32	%f525, %f58;
	fma.rn.f32 	%f53, %f525, %f524, %f53;
	mul.f32 	%f526, %f24, %f56;
	fma.rn.f32 	%f527, %f22, %f55, %f526;
	fma.rn.f32 	%f528, %f26, %f57, %f527;
	cvt.sat.f32.f32	%f529, %f528;
	fma.rn.f32 	%f52, %f529, %f524, %f52;
	mul.f32 	%f530, %f34, %f56;
	fma.rn.f32 	%f531, %f33, %f55, %f530;
	fma.rn.f32 	%f532, %f35, %f57, %f531;
	cvt.sat.f32.f32	%f533, %f532;
	fma.rn.f32 	%f51, %f524, %f533, %f51;
	mul.f32 	%f534, %f43, %f56;
	fma.rn.f32 	%f535, %f42, %f55, %f534;
	fma.rn.f32 	%f536, %f44, %f57, %f535;
	cvt.sat.f32.f32	%f537, %f536;
	fma.rn.f32 	%f50, %f524, %f537, %f50;
	add.f32 	%f49, %f49, %f522;

BB0_28:
	add.s32 	%r15, %r15, 1;

BB0_29:
	add.s32 	%r396, %r396, 1;
	setp.lt.s32	%p43, %r396, %r2;
	@%p43 bra 	BB0_12;
	bra.uni 	BB0_30;

BB0_10:
	mov.f32 	%f50, %f49;
	mov.f32 	%f51, %f49;
	mov.f32 	%f52, %f49;
	mov.f32 	%f53, %f49;

BB0_30:
	mov.pred 	%p155, %p18;

BB0_31:
	cvt.rn.f32.s32	%f538, %r15;
	mov.f32 	%f539, 0f3F800000;
	max.f32 	%f540, %f538, %f539;
	div.rn.f32 	%f1151, %f53, %f540;
	div.rn.f32 	%f1155, %f49, %f540;
	div.rn.f32 	%f1152, %f52, %f540;
	div.rn.f32 	%f1153, %f51, %f540;
	div.rn.f32 	%f1154, %f50, %f540;
	@!%p155 bra 	BB0_84;
	bra.uni 	BB0_32;

BB0_32:
	abs.f32 	%f1087, %f1091;
	abs.f32 	%f1086, %f1089;
	setp.gt.f32	%p44, %f1086, %f1087;
	neg.f32 	%f546, %f1090;
	selp.f32	%f547, %f546, 0f00000000, %p44;
	neg.f32 	%f548, %f1091;
	selp.f32	%f549, %f1089, %f548, %p44;
	selp.f32	%f550, 0f00000000, %f1090, %p44;
	mul.f32 	%f551, %f549, %f549;
	fma.rn.f32 	%f552, %f547, %f547, %f551;
	fma.rn.f32 	%f553, %f550, %f550, %f552;
	sqrt.rn.f32 	%f554, %f553;
	rcp.rn.f32 	%f555, %f554;
	mul.f32 	%f100, %f547, %f555;
	mul.f32 	%f101, %f549, %f555;
	mul.f32 	%f102, %f550, %f555;
	mov.f32 	%f1129, 0f00000000;
	setp.lt.s32	%p45, %r3, 1;
	mov.f32 	%f1130, %f1129;
	mov.f32 	%f1131, %f1129;
	mov.f32 	%f1132, %f1129;
	mov.f32 	%f1133, %f1129;
	@%p45 bra 	BB0_83;

	cvt.rn.f32.s32	%f561, %r3;
	rcp.rn.f32 	%f103, %f561;
	add.u64 	%rd92, %SP, 8;
	cvta.to.local.u64 	%rd6, %rd92;
	mul.f32 	%f104, %f12, 0f3456BF95;
	mul.f32 	%f105, %f13, 0f3456BF95;
	mul.f32 	%f106, %f14, 0f3456BF95;
	add.u64 	%rd93, %SP, 0;
	cvta.to.local.u64 	%rd7, %rd93;
	mul.f32 	%f562, %f1089, %f101;
	mul.f32 	%f563, %f1090, %f100;
	sub.f32 	%f107, %f563, %f562;
	mul.f32 	%f564, %f1091, %f100;
	mul.f32 	%f565, %f1089, %f102;
	sub.f32 	%f108, %f565, %f564;
	mul.f32 	%f566, %f1090, %f102;
	mul.f32 	%f567, %f1091, %f101;
	sub.f32 	%f109, %f567, %f566;
	mov.f32 	%f1129, 0f00000000;
	mov.u32 	%r181, 0;
	abs.f32 	%f568, %f105;
	abs.f32 	%f569, %f104;
	max.f32 	%f570, %f569, %f568;
	abs.f32 	%f571, %f106;
	max.f32 	%f572, %f570, %f571;
	mov.u32 	%r400, %r181;
	mov.f32 	%f1130, %f1129;
	mov.f32 	%f1131, %f1129;
	mov.f32 	%f1132, %f1129;
	mov.f32 	%f1133, %f1129;

BB0_34:
	cvt.rn.f32.s32	%f115, %r400;
	max.f32 	%f116, %f572, %f275;
	mov.u32 	%r402, %r181;

BB0_35:
	mad.lo.s32 	%r183, %r403, 1664525, 1013904223;
	and.b32  	%r184, %r183, 16777215;
	cvt.rn.f32.u32	%f574, %r184;
	fma.rn.f32 	%f575, %f574, 0f33800000, %f115;
	mul.f32 	%f122, %f103, %f575;
	mad.lo.s32 	%r403, %r183, 1664525, 1013904223;
	and.b32  	%r185, %r403, 16777215;
	cvt.rn.f32.u32	%f576, %r185;
	cvt.rn.f32.s32	%f577, %r402;
	fma.rn.f32 	%f578, %f576, 0f33800000, %f577;
	mul.f32 	%f579, %f103, %f578;
	mul.f32 	%f580, %f122, %f122;
	sub.f32 	%f582, %f539, %f580;
	mov.f32 	%f583, 0f00000000;
	max.f32 	%f584, %f583, %f582;
	sqrt.rn.f32 	%f123, %f584;
	mul.f32 	%f1140, %f579, 0f40C90FDB;
	abs.f32 	%f125, %f1140;
	setp.neu.f32	%p46, %f125, 0f7F800000;
	mov.f32 	%f1134, %f1140;
	@%p46 bra 	BB0_37;

	mul.rn.f32 	%f1134, %f1140, %f583;

BB0_37:
	mul.f32 	%f586, %f1134, 0f3F22F983;
	cvt.rni.s32.f32	%r413, %f586;
	cvt.rn.f32.s32	%f587, %r413;
	neg.f32 	%f588, %f587;
	mov.f32 	%f589, 0f3FC90FDA;
	fma.rn.f32 	%f590, %f588, %f589, %f1134;
	mov.f32 	%f591, 0f33A22168;
	fma.rn.f32 	%f592, %f588, %f591, %f590;
	mov.f32 	%f593, 0f27C234C5;
	fma.rn.f32 	%f1135, %f588, %f593, %f592;
	abs.f32 	%f594, %f1134;
	setp.leu.f32	%p47, %f594, 0f47CE4780;
	@%p47 bra 	BB0_48;

	mov.b32 	 %r27, %f1134;
	shr.u32 	%r28, %r27, 23;
	shl.b32 	%r188, %r27, 8;
	or.b32  	%r29, %r188, -2147483648;
	mov.u32 	%r404, 0;
	mov.u64 	%rd300, 0;
	mov.u64 	%rd299, %rd6;
	mov.u32 	%r405, %r404;

BB0_39:
	.pragma "nounroll";
	shl.b64 	%rd95, %rd300, 2;
	mov.u64 	%rd96, __cudart_i2opi_f;
	add.s64 	%rd97, %rd96, %rd95;
	ld.const.u32 	%r191, [%rd97];
	// inline asm
	{
	mad.lo.cc.u32   %r189, %r191, %r29, %r405;
	madc.hi.u32     %r405, %r191, %r29,  0;
	}
	// inline asm
	st.local.u32 	[%rd299], %r189;
	add.s32 	%r404, %r404, 1;
	cvt.s64.s32	%rd300, %r404;
	mul.wide.s32 	%rd98, %r404, 4;
	add.s64 	%rd299, %rd6, %rd98;
	setp.ne.s32	%p48, %r404, 6;
	@%p48 bra 	BB0_39;

	and.b32  	%r194, %r28, 255;
	add.s32 	%r195, %r194, -128;
	shr.u32 	%r196, %r195, 5;
	and.b32  	%r34, %r27, -2147483648;
	st.local.u32 	[%rd6+24], %r405;
	mov.u32 	%r197, 6;
	sub.s32 	%r198, %r197, %r196;
	mul.wide.s32 	%rd99, %r198, 4;
	add.s64 	%rd13, %rd6, %rd99;
	ld.local.u32 	%r406, [%rd13];
	ld.local.u32 	%r407, [%rd13+-4];
	and.b32  	%r37, %r28, 31;
	setp.eq.s32	%p49, %r37, 0;
	@%p49 bra 	BB0_42;

	mov.u32 	%r199, 32;
	sub.s32 	%r200, %r199, %r37;
	shr.u32 	%r201, %r407, %r200;
	shl.b32 	%r202, %r406, %r37;
	add.s32 	%r406, %r201, %r202;
	ld.local.u32 	%r203, [%rd13+-8];
	shr.u32 	%r204, %r203, %r200;
	shl.b32 	%r205, %r407, %r37;
	add.s32 	%r407, %r204, %r205;

BB0_42:
	shr.u32 	%r206, %r407, 30;
	shl.b32 	%r207, %r406, 2;
	add.s32 	%r408, %r206, %r207;
	shl.b32 	%r43, %r407, 2;
	shr.u32 	%r208, %r408, 31;
	shr.u32 	%r209, %r406, 30;
	add.s32 	%r44, %r208, %r209;
	setp.eq.s32	%p50, %r208, 0;
	@%p50 bra 	BB0_43;
	bra.uni 	BB0_44;

BB0_43:
	mov.u32 	%r409, %r34;
	mov.u32 	%r410, %r43;
	bra.uni 	BB0_45;

BB0_44:
	not.b32 	%r210, %r408;
	neg.s32 	%r410, %r43;
	setp.eq.s32	%p51, %r43, 0;
	selp.u32	%r211, 1, 0, %p51;
	add.s32 	%r408, %r211, %r210;
	xor.b32  	%r409, %r34, -2147483648;

BB0_45:
	clz.b32 	%r412, %r408;
	setp.eq.s32	%p52, %r412, 0;
	shl.b32 	%r212, %r408, %r412;
	mov.u32 	%r213, 32;
	sub.s32 	%r214, %r213, %r412;
	shr.u32 	%r215, %r410, %r214;
	add.s32 	%r216, %r215, %r212;
	selp.b32	%r52, %r408, %r216, %p52;
	mov.u32 	%r217, -921707870;
	mul.hi.u32 	%r411, %r52, %r217;
	setp.eq.s32	%p53, %r34, 0;
	neg.s32 	%r218, %r44;
	selp.b32	%r413, %r44, %r218, %p53;
	setp.lt.s32	%p54, %r411, 1;
	@%p54 bra 	BB0_47;

	mul.lo.s32 	%r219, %r52, -921707870;
	shr.u32 	%r220, %r219, 31;
	shl.b32 	%r221, %r411, 1;
	add.s32 	%r411, %r220, %r221;
	add.s32 	%r412, %r412, 1;

BB0_47:
	mov.u32 	%r222, 126;
	sub.s32 	%r223, %r222, %r412;
	shl.b32 	%r224, %r223, 23;
	add.s32 	%r225, %r411, 1;
	shr.u32 	%r226, %r225, 7;
	add.s32 	%r227, %r226, 1;
	shr.u32 	%r228, %r227, 1;
	add.s32 	%r229, %r228, %r224;
	or.b32  	%r230, %r229, %r409;
	mov.b32 	 %f1135, %r230;

BB0_48:
	mul.rn.f32 	%f131, %f1135, %f1135;
	add.s32 	%r60, %r413, 1;
	and.b32  	%r61, %r60, 1;
	setp.eq.s32	%p55, %r61, 0;
	@%p55 bra 	BB0_50;
	bra.uni 	BB0_49;

BB0_50:
	mov.f32 	%f597, 0f3C08839E;
	mov.f32 	%f598, 0fB94CA1F9;
	fma.rn.f32 	%f1136, %f598, %f131, %f597;
	bra.uni 	BB0_51;

BB0_49:
	mov.f32 	%f595, 0fBAB6061A;
	mov.f32 	%f596, 0f37CCF5CE;
	fma.rn.f32 	%f1136, %f596, %f131, %f595;

BB0_51:
	@%p55 bra 	BB0_53;
	bra.uni 	BB0_52;

BB0_53:
	mov.f32 	%f602, 0fBE2AAAA3;
	fma.rn.f32 	%f603, %f1136, %f131, %f602;
	fma.rn.f32 	%f1137, %f603, %f131, %f583;
	bra.uni 	BB0_54;

BB0_52:
	mov.f32 	%f599, 0f3D2AAAA5;
	fma.rn.f32 	%f600, %f1136, %f131, %f599;
	mov.f32 	%f601, 0fBF000000;
	fma.rn.f32 	%f1137, %f600, %f131, %f601;

BB0_54:
	fma.rn.f32 	%f1138, %f1137, %f1135, %f1135;
	@%p55 bra 	BB0_56;

	fma.rn.f32 	%f1138, %f1137, %f131, %f539;

BB0_56:
	and.b32  	%r231, %r60, 2;
	setp.eq.s32	%p58, %r231, 0;
	@%p58 bra 	BB0_58;

	mov.f32 	%f607, 0fBF800000;
	fma.rn.f32 	%f1138, %f1138, %f607, %f583;

BB0_58:
	@%p46 bra 	BB0_60;

	mul.rn.f32 	%f1140, %f1140, %f583;

BB0_60:
	mul.f32 	%f609, %f1140, 0f3F22F983;
	cvt.rni.s32.f32	%r423, %f609;
	cvt.rn.f32.s32	%f610, %r423;
	neg.f32 	%f611, %f610;
	fma.rn.f32 	%f613, %f611, %f589, %f1140;
	fma.rn.f32 	%f615, %f611, %f591, %f613;
	fma.rn.f32 	%f1141, %f611, %f593, %f615;
	abs.f32 	%f617, %f1140;
	setp.leu.f32	%p60, %f617, 0f47CE4780;
	@%p60 bra 	BB0_71;

	mov.b32 	 %r63, %f1140;
	shr.u32 	%r64, %r63, 23;
	shl.b32 	%r234, %r63, 8;
	or.b32  	%r65, %r234, -2147483648;
	mov.u32 	%r414, 0;
	mov.u64 	%rd301, %rd6;
	mov.u64 	%rd302, %rd30;
	mov.u32 	%r415, %r414;

BB0_62:
	.pragma "nounroll";
	shl.b64 	%rd101, %rd302, 2;
	mov.u64 	%rd102, __cudart_i2opi_f;
	add.s64 	%rd103, %rd102, %rd101;
	ld.const.u32 	%r237, [%rd103];
	// inline asm
	{
	mad.lo.cc.u32   %r235, %r237, %r65, %r415;
	madc.hi.u32     %r415, %r237, %r65,  0;
	}
	// inline asm
	st.local.u32 	[%rd301], %r235;
	add.s32 	%r414, %r414, 1;
	cvt.s64.s32	%rd302, %r414;
	mul.wide.s32 	%rd104, %r414, 4;
	add.s64 	%rd301, %rd6, %rd104;
	setp.ne.s32	%p61, %r414, 6;
	@%p61 bra 	BB0_62;

	and.b32  	%r240, %r64, 255;
	add.s32 	%r241, %r240, -128;
	shr.u32 	%r242, %r241, 5;
	and.b32  	%r70, %r63, -2147483648;
	st.local.u32 	[%rd6+24], %r415;
	mov.u32 	%r243, 6;
	sub.s32 	%r244, %r243, %r242;
	mul.wide.s32 	%rd105, %r244, 4;
	add.s64 	%rd19, %rd6, %rd105;
	ld.local.u32 	%r416, [%rd19];
	ld.local.u32 	%r417, [%rd19+-4];
	and.b32  	%r73, %r64, 31;
	setp.eq.s32	%p62, %r73, 0;
	@%p62 bra 	BB0_65;

	mov.u32 	%r245, 32;
	sub.s32 	%r246, %r245, %r73;
	shr.u32 	%r247, %r417, %r246;
	shl.b32 	%r248, %r416, %r73;
	add.s32 	%r416, %r247, %r248;
	ld.local.u32 	%r249, [%rd19+-8];
	shr.u32 	%r250, %r249, %r246;
	shl.b32 	%r251, %r417, %r73;
	add.s32 	%r417, %r250, %r251;

BB0_65:
	shr.u32 	%r252, %r417, 30;
	shl.b32 	%r253, %r416, 2;
	add.s32 	%r418, %r252, %r253;
	shl.b32 	%r79, %r417, 2;
	shr.u32 	%r254, %r418, 31;
	shr.u32 	%r255, %r416, 30;
	add.s32 	%r80, %r254, %r255;
	setp.eq.s32	%p63, %r254, 0;
	@%p63 bra 	BB0_66;
	bra.uni 	BB0_67;

BB0_66:
	mov.u32 	%r419, %r70;
	mov.u32 	%r420, %r79;
	bra.uni 	BB0_68;

BB0_67:
	not.b32 	%r256, %r418;
	neg.s32 	%r420, %r79;
	setp.eq.s32	%p64, %r79, 0;
	selp.u32	%r257, 1, 0, %p64;
	add.s32 	%r418, %r257, %r256;
	xor.b32  	%r419, %r70, -2147483648;

BB0_68:
	clz.b32 	%r422, %r418;
	setp.eq.s32	%p65, %r422, 0;
	shl.b32 	%r258, %r418, %r422;
	mov.u32 	%r259, 32;
	sub.s32 	%r260, %r259, %r422;
	shr.u32 	%r261, %r420, %r260;
	add.s32 	%r262, %r261, %r258;
	selp.b32	%r88, %r418, %r262, %p65;
	mov.u32 	%r263, -921707870;
	mul.hi.u32 	%r421, %r88, %r263;
	setp.eq.s32	%p66, %r70, 0;
	neg.s32 	%r264, %r80;
	selp.b32	%r423, %r80, %r264, %p66;
	setp.lt.s32	%p67, %r421, 1;
	@%p67 bra 	BB0_70;

	mul.lo.s32 	%r265, %r88, -921707870;
	shr.u32 	%r266, %r265, 31;
	shl.b32 	%r267, %r421, 1;
	add.s32 	%r421, %r266, %r267;
	add.s32 	%r422, %r422, 1;

BB0_70:
	mov.u32 	%r268, 126;
	sub.s32 	%r269, %r268, %r422;
	shl.b32 	%r270, %r269, 23;
	add.s32 	%r271, %r421, 1;
	shr.u32 	%r272, %r271, 7;
	add.s32 	%r273, %r272, 1;
	shr.u32 	%r274, %r273, 1;
	add.s32 	%r275, %r274, %r270;
	or.b32  	%r276, %r275, %r419;
	mov.b32 	 %f1141, %r276;

BB0_71:
	mul.rn.f32 	%f148, %f1141, %f1141;
	and.b32  	%r96, %r423, 1;
	setp.eq.s32	%p68, %r96, 0;
	@%p68 bra 	BB0_73;
	bra.uni 	BB0_72;

BB0_73:
	mov.f32 	%f620, 0f3C08839E;
	mov.f32 	%f621, 0fB94CA1F9;
	fma.rn.f32 	%f1142, %f621, %f148, %f620;
	bra.uni 	BB0_74;

BB0_72:
	mov.f32 	%f618, 0fBAB6061A;
	mov.f32 	%f619, 0f37CCF5CE;
	fma.rn.f32 	%f1142, %f619, %f148, %f618;

BB0_74:
	@%p68 bra 	BB0_76;
	bra.uni 	BB0_75;

BB0_76:
	mov.f32 	%f625, 0fBE2AAAA3;
	fma.rn.f32 	%f626, %f1142, %f148, %f625;
	fma.rn.f32 	%f1143, %f626, %f148, %f583;
	bra.uni 	BB0_77;

BB0_75:
	mov.f32 	%f622, 0f3D2AAAA5;
	fma.rn.f32 	%f623, %f1142, %f148, %f622;
	mov.f32 	%f624, 0fBF000000;
	fma.rn.f32 	%f1143, %f623, %f148, %f624;

BB0_77:
	fma.rn.f32 	%f1144, %f1143, %f1141, %f1141;
	@%p68 bra 	BB0_79;

	fma.rn.f32 	%f1144, %f1143, %f148, %f539;

BB0_79:
	and.b32  	%r277, %r423, 2;
	setp.eq.s32	%p71, %r277, 0;
	@%p71 bra 	BB0_81;

	mov.f32 	%f630, 0fBF800000;
	fma.rn.f32 	%f1144, %f1144, %f630, %f583;

BB0_81:
	mul.f32 	%f639, %f123, %f1138;
	mul.f32 	%f640, %f123, %f1144;
	mul.f32 	%f641, %f100, %f640;
	mul.f32 	%f642, %f101, %f640;
	mul.f32 	%f643, %f102, %f640;
	fma.rn.f32 	%f644, %f109, %f639, %f641;
	fma.rn.f32 	%f645, %f108, %f639, %f642;
	fma.rn.f32 	%f646, %f107, %f639, %f643;
	fma.rn.f32 	%f634, %f1089, %f122, %f644;
	fma.rn.f32 	%f635, %f1090, %f122, %f645;
	fma.rn.f32 	%f636, %f1091, %f122, %f646;
	mov.u32 	%r279, 0;
	st.local.u32 	[%rd7], %r279;
	ld.global.u32 	%r278, [root];
	mov.f32 	%f638, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r278, %f12, %f13, %f14, %f634, %f635, %f636, %r279, %f116, %f638, %rd93, %r110);
	// inline asm
	ld.local.f32 	%f647, [%rd7];
	setp.lt.f32	%p72, %f647, 0f00000000;
	selp.f32	%f648, 0f00000000, %f647, %p72;
	selp.f32	%f649, 0f00000000, 0f3F800000, %p72;
	add.f32 	%f1129, %f1129, %f649;
	mul.f32 	%f650, %f24, %f635;
	fma.rn.f32 	%f651, %f22, %f634, %f650;
	fma.rn.f32 	%f652, %f26, %f636, %f651;
	cvt.sat.f32.f32	%f653, %f652;
	fma.rn.f32 	%f1132, %f648, %f653, %f1132;
	mul.f32 	%f654, %f34, %f635;
	fma.rn.f32 	%f655, %f33, %f634, %f654;
	fma.rn.f32 	%f656, %f35, %f636, %f655;
	cvt.sat.f32.f32	%f657, %f656;
	fma.rn.f32 	%f1131, %f648, %f657, %f1131;
	mul.f32 	%f658, %f43, %f635;
	fma.rn.f32 	%f659, %f42, %f634, %f658;
	fma.rn.f32 	%f660, %f44, %f636, %f659;
	cvt.sat.f32.f32	%f661, %f660;
	fma.rn.f32 	%f1130, %f648, %f661, %f1130;
	mul.f32 	%f662, %f1090, %f635;
	fma.rn.f32 	%f663, %f1089, %f634, %f662;
	fma.rn.f32 	%f664, %f1091, %f636, %f663;
	cvt.sat.f32.f32	%f665, %f664;
	fma.rn.f32 	%f1133, %f648, %f665, %f1133;
	add.s32 	%r402, %r402, 1;
	setp.lt.s32	%p73, %r402, %r3;
	@%p73 bra 	BB0_35;

	add.s32 	%r400, %r400, 1;
	setp.lt.s32	%p74, %r400, %r3;
	@%p74 bra 	BB0_34;

BB0_83:
	mul.lo.s32 	%r281, %r3, %r3;
	cvt.rn.f32.s32	%f666, %r281;
	div.rn.f32 	%f667, %f1133, %f666;
	div.rn.f32 	%f1155, %f1129, %f666;
	div.rn.f32 	%f1152, %f1132, %f666;
	div.rn.f32 	%f1153, %f1131, %f666;
	div.rn.f32 	%f1154, %f1130, %f666;
	add.f32 	%f1151, %f667, %f667;

BB0_84:
	setp.gt.s32	%p75, %r1, -1;
	selp.f32	%f180, %f1155, %f1151, %p75;
	ld.global.u32 	%r425, [imageEnabled];
	and.b32  	%r282, %r425, 8;
	setp.eq.s32	%p76, %r282, 0;
	@%p76 bra 	BB0_97;

	cvt.u64.u32	%rd109, %r5;
	cvt.u64.u32	%rd110, %r6;
	mov.u64 	%rd113, image_Mask;
	cvta.global.u64 	%rd108, %rd113;
	// inline asm
	call (%rd107), _rt_buffer_get_64, (%rd108, %r109, %r109, %rd109, %rd110, %rd30, %rd30);
	// inline asm
	mov.f32 	%f670, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f671, %f670;
	fma.rn.f32 	%f672, %f671, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f181, %f672;
	abs.f32 	%f182, %f180;
	setp.lt.f32	%p77, %f182, 0f00800000;
	mul.f32 	%f673, %f182, 0f4B800000;
	selp.f32	%f674, 0fC3170000, 0fC2FE0000, %p77;
	selp.f32	%f675, %f673, %f182, %p77;
	mov.b32 	 %r285, %f675;
	and.b32  	%r286, %r285, 8388607;
	or.b32  	%r287, %r286, 1065353216;
	mov.b32 	 %f676, %r287;
	shr.u32 	%r288, %r285, 23;
	cvt.rn.f32.u32	%f677, %r288;
	add.f32 	%f678, %f674, %f677;
	setp.gt.f32	%p78, %f676, 0f3FB504F3;
	mul.f32 	%f679, %f676, 0f3F000000;
	add.f32 	%f680, %f678, 0f3F800000;
	selp.f32	%f681, %f679, %f676, %p78;
	selp.f32	%f682, %f680, %f678, %p78;
	add.f32 	%f683, %f681, 0fBF800000;
	add.f32 	%f669, %f681, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f668,%f669;
	// inline asm
	add.f32 	%f684, %f683, %f683;
	mul.f32 	%f685, %f668, %f684;
	mul.f32 	%f686, %f685, %f685;
	mov.f32 	%f687, 0f3C4CAF63;
	mov.f32 	%f688, 0f3B18F0FE;
	fma.rn.f32 	%f689, %f688, %f686, %f687;
	mov.f32 	%f690, 0f3DAAAABD;
	fma.rn.f32 	%f691, %f689, %f686, %f690;
	mul.rn.f32 	%f692, %f691, %f686;
	mul.rn.f32 	%f693, %f692, %f685;
	sub.f32 	%f694, %f683, %f685;
	neg.f32 	%f695, %f685;
	add.f32 	%f696, %f694, %f694;
	fma.rn.f32 	%f697, %f695, %f683, %f696;
	mul.rn.f32 	%f698, %f668, %f697;
	add.f32 	%f699, %f693, %f685;
	sub.f32 	%f700, %f685, %f699;
	add.f32 	%f701, %f693, %f700;
	add.f32 	%f702, %f698, %f701;
	add.f32 	%f703, %f699, %f702;
	sub.f32 	%f704, %f699, %f703;
	add.f32 	%f705, %f702, %f704;
	mov.f32 	%f706, 0f3F317200;
	mul.rn.f32 	%f707, %f682, %f706;
	mov.f32 	%f708, 0f35BFBE8E;
	mul.rn.f32 	%f709, %f682, %f708;
	add.f32 	%f710, %f707, %f703;
	sub.f32 	%f711, %f707, %f710;
	add.f32 	%f712, %f703, %f711;
	add.f32 	%f713, %f705, %f712;
	add.f32 	%f714, %f709, %f713;
	add.f32 	%f715, %f710, %f714;
	sub.f32 	%f716, %f710, %f715;
	add.f32 	%f717, %f714, %f716;
	mov.f32 	%f718, 0f3EE8BA2E;
	mul.rn.f32 	%f719, %f718, %f715;
	neg.f32 	%f720, %f719;
	fma.rn.f32 	%f721, %f718, %f715, %f720;
	fma.rn.f32 	%f722, %f718, %f717, %f721;
	mov.f32 	%f723, 0f00000000;
	fma.rn.f32 	%f724, %f723, %f715, %f722;
	add.rn.f32 	%f725, %f719, %f724;
	neg.f32 	%f726, %f725;
	add.rn.f32 	%f727, %f719, %f726;
	add.rn.f32 	%f728, %f727, %f724;
	mov.b32 	 %r289, %f725;
	setp.eq.s32	%p79, %r289, 1118925336;
	add.s32 	%r290, %r289, -1;
	mov.b32 	 %f729, %r290;
	add.f32 	%f730, %f728, 0f37000000;
	selp.f32	%f731, %f729, %f725, %p79;
	selp.f32	%f183, %f730, %f728, %p79;
	mul.f32 	%f732, %f731, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f733, %f732;
	mov.f32 	%f734, 0fBF317200;
	fma.rn.f32 	%f735, %f733, %f734, %f731;
	mov.f32 	%f736, 0fB5BFBE8E;
	fma.rn.f32 	%f737, %f733, %f736, %f735;
	mul.f32 	%f738, %f737, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f739, %f738;
	add.f32 	%f740, %f733, 0f00000000;
	ex2.approx.f32 	%f741, %f740;
	mul.f32 	%f742, %f739, %f741;
	setp.lt.f32	%p80, %f731, 0fC2D20000;
	selp.f32	%f743, 0f00000000, %f742, %p80;
	setp.gt.f32	%p81, %f731, 0f42D20000;
	selp.f32	%f1156, 0f7F800000, %f743, %p81;
	setp.eq.f32	%p82, %f1156, 0f7F800000;
	@%p82 bra 	BB0_87;

	fma.rn.f32 	%f1156, %f1156, %f183, %f1156;

BB0_87:
	setp.lt.f32	%p83, %f180, 0f00000000;
	setp.eq.f32	%p84, %f181, 0f3F800000;
	and.pred  	%p3, %p83, %p84;
	mov.b32 	 %r291, %f1156;
	xor.b32  	%r292, %r291, -2147483648;
	mov.b32 	 %f744, %r292;
	selp.f32	%f1158, %f744, %f1156, %p3;
	setp.eq.f32	%p85, %f180, 0f00000000;
	@%p85 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f747, %f180, %f180;
	selp.f32	%f1158, %f747, 0f00000000, %p84;
	bra.uni 	BB0_91;

BB0_152:
	mov.u64 	%rd234, image_HDR;
	cvta.global.u64 	%rd229, %rd234;
	mov.u32 	%r371, 8;
	mov.u64 	%rd233, 0;
	// inline asm
	call (%rd228), _rt_buffer_get_64, (%rd229, %r109, %r371, %rd23, %rd24, %rd233, %rd233);
	// inline asm
	mov.f32 	%f1058, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs117, %f1058;}

	// inline asm
	mov.u16 	%rs118, 0;
	st.v4.u16 	[%rd228], {%rs117, %rs117, %rs117, %rs118};

BB0_153:
	ld.global.u32 	%r372, [additive];
	setp.eq.s32	%p152, %r372, 0;
	@%p152 bra 	BB0_155;

	mov.u64 	%rd247, image_RNM0;
	cvta.global.u64 	%rd236, %rd247;
	mov.u32 	%r376, 8;
	mov.u64 	%rd246, 0;
	// inline asm
	call (%rd235), _rt_buffer_get_64, (%rd236, %r109, %r376, %rd23, %rd24, %rd246, %rd246);
	// inline asm
	ld.v4.u16 	{%rs125, %rs126, %rs127, %rs128}, [%rd235];
	// inline asm
	{  cvt.f32.f16 %f1059, %rs125;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1060, %rs126;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1061, %rs127;}

	// inline asm
	// inline asm
	call (%rd241), _rt_buffer_get_64, (%rd236, %r109, %r376, %rd23, %rd24, %rd246, %rd246);
	// inline asm
	add.f32 	%f1062, %f1059, 0f00000000;
	add.f32 	%f1063, %f1060, 0f00000000;
	add.f32 	%f1064, %f1061, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs124, %f1064;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs123, %f1063;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs122, %f1062;}

	// inline asm
	mov.u16 	%rs129, 0;
	st.v4.u16 	[%rd241], {%rs122, %rs123, %rs124, %rs129};
	bra.uni 	BB0_156;

BB0_155:
	mov.u64 	%rd254, image_RNM0;
	cvta.global.u64 	%rd249, %rd254;
	mov.u32 	%r378, 8;
	mov.u64 	%rd253, 0;
	// inline asm
	call (%rd248), _rt_buffer_get_64, (%rd249, %r109, %r378, %rd23, %rd24, %rd253, %rd253);
	// inline asm
	mov.f32 	%f1065, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs130, %f1065;}

	// inline asm
	mov.u16 	%rs131, 0;
	st.v4.u16 	[%rd248], {%rs130, %rs130, %rs130, %rs131};

BB0_156:
	ld.global.u32 	%r379, [additive];
	setp.eq.s32	%p153, %r379, 0;
	@%p153 bra 	BB0_158;

	mov.u64 	%rd267, image_RNM1;
	cvta.global.u64 	%rd256, %rd267;
	mov.u32 	%r383, 8;
	mov.u64 	%rd266, 0;
	// inline asm
	call (%rd255), _rt_buffer_get_64, (%rd256, %r109, %r383, %rd23, %rd24, %rd266, %rd266);
	// inline asm
	ld.v4.u16 	{%rs138, %rs139, %rs140, %rs141}, [%rd255];
	// inline asm
	{  cvt.f32.f16 %f1066, %rs138;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1067, %rs139;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1068, %rs140;}

	// inline asm
	// inline asm
	call (%rd261), _rt_buffer_get_64, (%rd256, %r109, %r383, %rd23, %rd24, %rd266, %rd266);
	// inline asm
	add.f32 	%f1069, %f1066, 0f00000000;
	add.f32 	%f1070, %f1067, 0f00000000;
	add.f32 	%f1071, %f1068, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs137, %f1071;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs136, %f1070;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs135, %f1069;}

	// inline asm
	mov.u16 	%rs142, 0;
	st.v4.u16 	[%rd261], {%rs135, %rs136, %rs137, %rs142};
	bra.uni 	BB0_159;

BB0_158:
	mov.u64 	%rd274, image_RNM1;
	cvta.global.u64 	%rd269, %rd274;
	mov.u32 	%r385, 8;
	mov.u64 	%rd273, 0;
	// inline asm
	call (%rd268), _rt_buffer_get_64, (%rd269, %r109, %r385, %rd23, %rd24, %rd273, %rd273);
	// inline asm
	mov.f32 	%f1072, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs143, %f1072;}

	// inline asm
	mov.u16 	%rs144, 0;
	st.v4.u16 	[%rd268], {%rs143, %rs143, %rs143, %rs144};

BB0_159:
	ld.global.u32 	%r386, [additive];
	setp.eq.s32	%p154, %r386, 0;
	@%p154 bra 	BB0_161;

	mov.u64 	%rd287, image_RNM2;
	cvta.global.u64 	%rd276, %rd287;
	mov.u32 	%r390, 8;
	mov.u64 	%rd286, 0;
	// inline asm
	call (%rd275), _rt_buffer_get_64, (%rd276, %r109, %r390, %rd23, %rd24, %rd286, %rd286);
	// inline asm
	ld.v4.u16 	{%rs151, %rs152, %rs153, %rs154}, [%rd275];
	// inline asm
	{  cvt.f32.f16 %f1073, %rs151;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1074, %rs152;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1075, %rs153;}

	// inline asm
	// inline asm
	call (%rd281), _rt_buffer_get_64, (%rd276, %r109, %r390, %rd23, %rd24, %rd286, %rd286);
	// inline asm
	add.f32 	%f1076, %f1073, 0f00000000;
	add.f32 	%f1077, %f1074, 0f00000000;
	add.f32 	%f1078, %f1075, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs150, %f1078;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs149, %f1077;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs148, %f1076;}

	// inline asm
	mov.u16 	%rs155, 0;
	st.v4.u16 	[%rd281], {%rs148, %rs149, %rs150, %rs155};
	bra.uni 	BB0_162;

BB0_161:
	mov.u64 	%rd294, image_RNM2;
	cvta.global.u64 	%rd289, %rd294;
	mov.u32 	%r392, 8;
	mov.u64 	%rd293, 0;
	// inline asm
	call (%rd288), _rt_buffer_get_64, (%rd289, %r109, %r392, %rd23, %rd24, %rd293, %rd293);
	// inline asm
	mov.f32 	%f1079, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs156, %f1079;}

	// inline asm
	mov.u16 	%rs157, 0;
	st.v4.u16 	[%rd288], {%rs156, %rs156, %rs156, %rs157};
	bra.uni 	BB0_162;

BB0_88:
	setp.geu.f32	%p86, %f180, 0f00000000;
	@%p86 bra 	BB0_91;

	cvt.rzi.f32.f32	%f746, %f718;
	setp.neu.f32	%p87, %f746, 0f3EE8BA2E;
	selp.f32	%f1158, 0f7FFFFFFF, %f1158, %p87;

BB0_91:
	add.f32 	%f748, %f182, 0f3EE8BA2E;
	mov.b32 	 %r293, %f748;
	setp.lt.s32	%p89, %r293, 2139095040;
	@%p89 bra 	BB0_96;

	setp.gtu.f32	%p90, %f182, 0f7F800000;
	@%p90 bra 	BB0_95;
	bra.uni 	BB0_93;

BB0_95:
	add.f32 	%f1158, %f180, 0f3EE8BA2E;
	bra.uni 	BB0_96;

BB0_93:
	setp.neu.f32	%p91, %f182, 0f7F800000;
	@%p91 bra 	BB0_96;

	selp.f32	%f1158, 0fFF800000, 0f7F800000, %p3;

BB0_96:
	mul.f32 	%f749, %f1158, 0f437F0000;
	setp.eq.f32	%p92, %f180, 0f3F800000;
	selp.f32	%f750, 0f437F0000, %f749, %p92;
	cvt.rzi.u32.f32	%r294, %f750;
	cvt.u16.u32	%rs41, %r294;
	mov.u16 	%rs42, 255;
	st.v2.u8 	[%rd107], {%rs41, %rs42};
	ld.global.u32 	%r425, [imageEnabled];

BB0_97:
	ld.global.f32 	%f751, [lightColor];
	mul.f32 	%f194, %f1151, %f751;
	ld.global.f32 	%f752, [lightColor+4];
	mul.f32 	%f195, %f1151, %f752;
	ld.global.f32 	%f753, [lightColor+8];
	mul.f32 	%f196, %f1151, %f753;
	and.b32  	%r295, %r425, 1;
	setp.eq.b32	%p93, %r295, 1;
	@!%p93 bra 	BB0_132;
	bra.uni 	BB0_98;

BB0_98:
	mov.f32 	%f756, 0f3E666666;
	cvt.rzi.f32.f32	%f757, %f756;
	fma.rn.f32 	%f758, %f757, 0fC0000000, 0f3EE66666;
	abs.f32 	%f197, %f758;
	abs.f32 	%f198, %f194;
	setp.lt.f32	%p94, %f198, 0f00800000;
	mul.f32 	%f759, %f198, 0f4B800000;
	selp.f32	%f760, 0fC3170000, 0fC2FE0000, %p94;
	selp.f32	%f761, %f759, %f198, %p94;
	mov.b32 	 %r296, %f761;
	and.b32  	%r297, %r296, 8388607;
	or.b32  	%r298, %r297, 1065353216;
	mov.b32 	 %f762, %r298;
	shr.u32 	%r299, %r296, 23;
	cvt.rn.f32.u32	%f763, %r299;
	add.f32 	%f764, %f760, %f763;
	setp.gt.f32	%p95, %f762, 0f3FB504F3;
	mul.f32 	%f765, %f762, 0f3F000000;
	add.f32 	%f766, %f764, 0f3F800000;
	selp.f32	%f767, %f765, %f762, %p95;
	selp.f32	%f768, %f766, %f764, %p95;
	add.f32 	%f769, %f767, 0fBF800000;
	add.f32 	%f755, %f767, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f754,%f755;
	// inline asm
	add.f32 	%f770, %f769, %f769;
	mul.f32 	%f771, %f754, %f770;
	mul.f32 	%f772, %f771, %f771;
	mov.f32 	%f773, 0f3C4CAF63;
	mov.f32 	%f774, 0f3B18F0FE;
	fma.rn.f32 	%f775, %f774, %f772, %f773;
	mov.f32 	%f776, 0f3DAAAABD;
	fma.rn.f32 	%f777, %f775, %f772, %f776;
	mul.rn.f32 	%f778, %f777, %f772;
	mul.rn.f32 	%f779, %f778, %f771;
	sub.f32 	%f780, %f769, %f771;
	neg.f32 	%f781, %f771;
	add.f32 	%f782, %f780, %f780;
	fma.rn.f32 	%f783, %f781, %f769, %f782;
	mul.rn.f32 	%f784, %f754, %f783;
	add.f32 	%f785, %f779, %f771;
	sub.f32 	%f786, %f771, %f785;
	add.f32 	%f787, %f779, %f786;
	add.f32 	%f788, %f784, %f787;
	add.f32 	%f789, %f785, %f788;
	sub.f32 	%f790, %f785, %f789;
	add.f32 	%f791, %f788, %f790;
	mov.f32 	%f792, 0f3F317200;
	mul.rn.f32 	%f793, %f768, %f792;
	mov.f32 	%f794, 0f35BFBE8E;
	mul.rn.f32 	%f795, %f768, %f794;
	add.f32 	%f796, %f793, %f789;
	sub.f32 	%f797, %f793, %f796;
	add.f32 	%f798, %f789, %f797;
	add.f32 	%f799, %f791, %f798;
	add.f32 	%f800, %f795, %f799;
	add.f32 	%f801, %f796, %f800;
	sub.f32 	%f802, %f796, %f801;
	add.f32 	%f803, %f800, %f802;
	mov.f32 	%f804, 0f3EE66666;
	mul.rn.f32 	%f805, %f804, %f801;
	neg.f32 	%f806, %f805;
	fma.rn.f32 	%f807, %f804, %f801, %f806;
	fma.rn.f32 	%f808, %f804, %f803, %f807;
	mov.f32 	%f809, 0f00000000;
	fma.rn.f32 	%f810, %f809, %f801, %f808;
	add.rn.f32 	%f811, %f805, %f810;
	neg.f32 	%f812, %f811;
	add.rn.f32 	%f813, %f805, %f812;
	add.rn.f32 	%f814, %f813, %f810;
	mov.b32 	 %r300, %f811;
	setp.eq.s32	%p96, %r300, 1118925336;
	add.s32 	%r301, %r300, -1;
	mov.b32 	 %f815, %r301;
	add.f32 	%f816, %f814, 0f37000000;
	selp.f32	%f817, %f815, %f811, %p96;
	selp.f32	%f199, %f816, %f814, %p96;
	mul.f32 	%f818, %f817, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f819, %f818;
	mov.f32 	%f820, 0fBF317200;
	fma.rn.f32 	%f821, %f819, %f820, %f817;
	mov.f32 	%f822, 0fB5BFBE8E;
	fma.rn.f32 	%f823, %f819, %f822, %f821;
	mul.f32 	%f824, %f823, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f825, %f824;
	add.f32 	%f826, %f819, 0f00000000;
	ex2.approx.f32 	%f827, %f826;
	mul.f32 	%f828, %f825, %f827;
	setp.lt.f32	%p97, %f817, 0fC2D20000;
	selp.f32	%f829, 0f00000000, %f828, %p97;
	setp.gt.f32	%p98, %f817, 0f42D20000;
	selp.f32	%f1159, 0f7F800000, %f829, %p98;
	setp.eq.f32	%p99, %f1159, 0f7F800000;
	@%p99 bra 	BB0_100;

	fma.rn.f32 	%f1159, %f1159, %f199, %f1159;

BB0_100:
	setp.lt.f32	%p100, %f194, 0f00000000;
	setp.eq.f32	%p101, %f197, 0f3F800000;
	and.pred  	%p4, %p100, %p101;
	mov.b32 	 %r302, %f1159;
	xor.b32  	%r303, %r302, -2147483648;
	mov.b32 	 %f830, %r303;
	selp.f32	%f1161, %f830, %f1159, %p4;
	setp.eq.f32	%p102, %f194, 0f00000000;
	@%p102 bra 	BB0_103;
	bra.uni 	BB0_101;

BB0_103:
	add.f32 	%f833, %f194, %f194;
	selp.f32	%f1161, %f833, 0f00000000, %p101;
	bra.uni 	BB0_104;

BB0_101:
	setp.geu.f32	%p103, %f194, 0f00000000;
	@%p103 bra 	BB0_104;

	cvt.rzi.f32.f32	%f832, %f804;
	setp.neu.f32	%p104, %f832, 0f3EE66666;
	selp.f32	%f1161, 0f7FFFFFFF, %f1161, %p104;

BB0_104:
	add.f32 	%f834, %f198, 0f3EE66666;
	mov.b32 	 %r304, %f834;
	setp.lt.s32	%p106, %r304, 2139095040;
	@%p106 bra 	BB0_109;

	setp.gtu.f32	%p107, %f198, 0f7F800000;
	@%p107 bra 	BB0_108;
	bra.uni 	BB0_106;

BB0_108:
	add.f32 	%f1161, %f194, 0f3EE66666;
	bra.uni 	BB0_109;

BB0_106:
	setp.neu.f32	%p108, %f198, 0f7F800000;
	@%p108 bra 	BB0_109;

	selp.f32	%f1161, 0fFF800000, 0f7F800000, %p4;

BB0_109:
	setp.eq.f32	%p109, %f194, 0f3F800000;
	selp.f32	%f210, 0f3F800000, %f1161, %p109;
	abs.f32 	%f211, %f195;
	setp.lt.f32	%p110, %f211, 0f00800000;
	mul.f32 	%f837, %f211, 0f4B800000;
	selp.f32	%f838, 0fC3170000, 0fC2FE0000, %p110;
	selp.f32	%f839, %f837, %f211, %p110;
	mov.b32 	 %r305, %f839;
	and.b32  	%r306, %r305, 8388607;
	or.b32  	%r307, %r306, 1065353216;
	mov.b32 	 %f840, %r307;
	shr.u32 	%r308, %r305, 23;
	cvt.rn.f32.u32	%f841, %r308;
	add.f32 	%f842, %f838, %f841;
	setp.gt.f32	%p111, %f840, 0f3FB504F3;
	mul.f32 	%f843, %f840, 0f3F000000;
	add.f32 	%f844, %f842, 0f3F800000;
	selp.f32	%f845, %f843, %f840, %p111;
	selp.f32	%f846, %f844, %f842, %p111;
	add.f32 	%f847, %f845, 0fBF800000;
	add.f32 	%f836, %f845, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f835,%f836;
	// inline asm
	add.f32 	%f848, %f847, %f847;
	mul.f32 	%f849, %f835, %f848;
	mul.f32 	%f850, %f849, %f849;
	fma.rn.f32 	%f853, %f774, %f850, %f773;
	fma.rn.f32 	%f855, %f853, %f850, %f776;
	mul.rn.f32 	%f856, %f855, %f850;
	mul.rn.f32 	%f857, %f856, %f849;
	sub.f32 	%f858, %f847, %f849;
	neg.f32 	%f859, %f849;
	add.f32 	%f860, %f858, %f858;
	fma.rn.f32 	%f861, %f859, %f847, %f860;
	mul.rn.f32 	%f862, %f835, %f861;
	add.f32 	%f863, %f857, %f849;
	sub.f32 	%f864, %f849, %f863;
	add.f32 	%f865, %f857, %f864;
	add.f32 	%f866, %f862, %f865;
	add.f32 	%f867, %f863, %f866;
	sub.f32 	%f868, %f863, %f867;
	add.f32 	%f869, %f866, %f868;
	mul.rn.f32 	%f871, %f846, %f792;
	mul.rn.f32 	%f873, %f846, %f794;
	add.f32 	%f874, %f871, %f867;
	sub.f32 	%f875, %f871, %f874;
	add.f32 	%f876, %f867, %f875;
	add.f32 	%f877, %f869, %f876;
	add.f32 	%f878, %f873, %f877;
	add.f32 	%f879, %f874, %f878;
	sub.f32 	%f880, %f874, %f879;
	add.f32 	%f881, %f878, %f880;
	mul.rn.f32 	%f883, %f804, %f879;
	neg.f32 	%f884, %f883;
	fma.rn.f32 	%f885, %f804, %f879, %f884;
	fma.rn.f32 	%f886, %f804, %f881, %f885;
	fma.rn.f32 	%f888, %f809, %f879, %f886;
	add.rn.f32 	%f889, %f883, %f888;
	neg.f32 	%f890, %f889;
	add.rn.f32 	%f891, %f883, %f890;
	add.rn.f32 	%f892, %f891, %f888;
	mov.b32 	 %r309, %f889;
	setp.eq.s32	%p112, %r309, 1118925336;
	add.s32 	%r310, %r309, -1;
	mov.b32 	 %f893, %r310;
	add.f32 	%f894, %f892, 0f37000000;
	selp.f32	%f895, %f893, %f889, %p112;
	selp.f32	%f212, %f894, %f892, %p112;
	mul.f32 	%f896, %f895, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f897, %f896;
	fma.rn.f32 	%f899, %f897, %f820, %f895;
	fma.rn.f32 	%f901, %f897, %f822, %f899;
	mul.f32 	%f902, %f901, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f903, %f902;
	add.f32 	%f904, %f897, 0f00000000;
	ex2.approx.f32 	%f905, %f904;
	mul.f32 	%f906, %f903, %f905;
	setp.lt.f32	%p113, %f895, 0fC2D20000;
	selp.f32	%f907, 0f00000000, %f906, %p113;
	setp.gt.f32	%p114, %f895, 0f42D20000;
	selp.f32	%f1162, 0f7F800000, %f907, %p114;
	setp.eq.f32	%p115, %f1162, 0f7F800000;
	@%p115 bra 	BB0_111;

	fma.rn.f32 	%f1162, %f1162, %f212, %f1162;

BB0_111:
	setp.lt.f32	%p116, %f195, 0f00000000;
	and.pred  	%p5, %p116, %p101;
	mov.b32 	 %r311, %f1162;
	xor.b32  	%r312, %r311, -2147483648;
	mov.b32 	 %f908, %r312;
	selp.f32	%f1164, %f908, %f1162, %p5;
	setp.eq.f32	%p118, %f195, 0f00000000;
	@%p118 bra 	BB0_114;
	bra.uni 	BB0_112;

BB0_114:
	add.f32 	%f911, %f195, %f195;
	selp.f32	%f1164, %f911, 0f00000000, %p101;
	bra.uni 	BB0_115;

BB0_112:
	setp.geu.f32	%p119, %f195, 0f00000000;
	@%p119 bra 	BB0_115;

	cvt.rzi.f32.f32	%f910, %f804;
	setp.neu.f32	%p120, %f910, 0f3EE66666;
	selp.f32	%f1164, 0f7FFFFFFF, %f1164, %p120;

BB0_115:
	add.f32 	%f912, %f211, 0f3EE66666;
	mov.b32 	 %r313, %f912;
	setp.lt.s32	%p122, %r313, 2139095040;
	@%p122 bra 	BB0_120;

	setp.gtu.f32	%p123, %f211, 0f7F800000;
	@%p123 bra 	BB0_119;
	bra.uni 	BB0_117;

BB0_119:
	add.f32 	%f1164, %f195, 0f3EE66666;
	bra.uni 	BB0_120;

BB0_117:
	setp.neu.f32	%p124, %f211, 0f7F800000;
	@%p124 bra 	BB0_120;

	selp.f32	%f1164, 0fFF800000, 0f7F800000, %p5;

BB0_120:
	setp.eq.f32	%p125, %f195, 0f3F800000;
	selp.f32	%f223, 0f3F800000, %f1164, %p125;
	abs.f32 	%f224, %f196;
	setp.lt.f32	%p126, %f224, 0f00800000;
	mul.f32 	%f915, %f224, 0f4B800000;
	selp.f32	%f916, 0fC3170000, 0fC2FE0000, %p126;
	selp.f32	%f917, %f915, %f224, %p126;
	mov.b32 	 %r314, %f917;
	and.b32  	%r315, %r314, 8388607;
	or.b32  	%r316, %r315, 1065353216;
	mov.b32 	 %f918, %r316;
	shr.u32 	%r317, %r314, 23;
	cvt.rn.f32.u32	%f919, %r317;
	add.f32 	%f920, %f916, %f919;
	setp.gt.f32	%p127, %f918, 0f3FB504F3;
	mul.f32 	%f921, %f918, 0f3F000000;
	add.f32 	%f922, %f920, 0f3F800000;
	selp.f32	%f923, %f921, %f918, %p127;
	selp.f32	%f924, %f922, %f920, %p127;
	add.f32 	%f925, %f923, 0fBF800000;
	add.f32 	%f914, %f923, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f913,%f914;
	// inline asm
	add.f32 	%f926, %f925, %f925;
	mul.f32 	%f927, %f913, %f926;
	mul.f32 	%f928, %f927, %f927;
	fma.rn.f32 	%f931, %f774, %f928, %f773;
	fma.rn.f32 	%f933, %f931, %f928, %f776;
	mul.rn.f32 	%f934, %f933, %f928;
	mul.rn.f32 	%f935, %f934, %f927;
	sub.f32 	%f936, %f925, %f927;
	neg.f32 	%f937, %f927;
	add.f32 	%f938, %f936, %f936;
	fma.rn.f32 	%f939, %f937, %f925, %f938;
	mul.rn.f32 	%f940, %f913, %f939;
	add.f32 	%f941, %f935, %f927;
	sub.f32 	%f942, %f927, %f941;
	add.f32 	%f943, %f935, %f942;
	add.f32 	%f944, %f940, %f943;
	add.f32 	%f945, %f941, %f944;
	sub.f32 	%f946, %f941, %f945;
	add.f32 	%f947, %f944, %f946;
	mul.rn.f32 	%f949, %f924, %f792;
	mul.rn.f32 	%f951, %f924, %f794;
	add.f32 	%f952, %f949, %f945;
	sub.f32 	%f953, %f949, %f952;
	add.f32 	%f954, %f945, %f953;
	add.f32 	%f955, %f947, %f954;
	add.f32 	%f956, %f951, %f955;
	add.f32 	%f957, %f952, %f956;
	sub.f32 	%f958, %f952, %f957;
	add.f32 	%f959, %f956, %f958;
	mul.rn.f32 	%f961, %f804, %f957;
	neg.f32 	%f962, %f961;
	fma.rn.f32 	%f963, %f804, %f957, %f962;
	fma.rn.f32 	%f964, %f804, %f959, %f963;
	fma.rn.f32 	%f966, %f809, %f957, %f964;
	add.rn.f32 	%f967, %f961, %f966;
	neg.f32 	%f968, %f967;
	add.rn.f32 	%f969, %f961, %f968;
	add.rn.f32 	%f970, %f969, %f966;
	mov.b32 	 %r318, %f967;
	setp.eq.s32	%p128, %r318, 1118925336;
	add.s32 	%r319, %r318, -1;
	mov.b32 	 %f971, %r319;
	add.f32 	%f972, %f970, 0f37000000;
	selp.f32	%f973, %f971, %f967, %p128;
	selp.f32	%f225, %f972, %f970, %p128;
	mul.f32 	%f974, %f973, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f975, %f974;
	fma.rn.f32 	%f977, %f975, %f820, %f973;
	fma.rn.f32 	%f979, %f975, %f822, %f977;
	mul.f32 	%f980, %f979, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f981, %f980;
	add.f32 	%f982, %f975, 0f00000000;
	ex2.approx.f32 	%f983, %f982;
	mul.f32 	%f984, %f981, %f983;
	setp.lt.f32	%p129, %f973, 0fC2D20000;
	selp.f32	%f985, 0f00000000, %f984, %p129;
	setp.gt.f32	%p130, %f973, 0f42D20000;
	selp.f32	%f1165, 0f7F800000, %f985, %p130;
	setp.eq.f32	%p131, %f1165, 0f7F800000;
	@%p131 bra 	BB0_122;

	fma.rn.f32 	%f1165, %f1165, %f225, %f1165;

BB0_122:
	setp.lt.f32	%p132, %f196, 0f00000000;
	and.pred  	%p6, %p132, %p101;
	mov.b32 	 %r320, %f1165;
	xor.b32  	%r321, %r320, -2147483648;
	mov.b32 	 %f986, %r321;
	selp.f32	%f1167, %f986, %f1165, %p6;
	setp.eq.f32	%p134, %f196, 0f00000000;
	@%p134 bra 	BB0_125;
	bra.uni 	BB0_123;

BB0_125:
	add.f32 	%f989, %f196, %f196;
	selp.f32	%f1167, %f989, 0f00000000, %p101;
	bra.uni 	BB0_126;

BB0_123:
	setp.geu.f32	%p135, %f196, 0f00000000;
	@%p135 bra 	BB0_126;

	cvt.rzi.f32.f32	%f988, %f804;
	setp.neu.f32	%p136, %f988, 0f3EE66666;
	selp.f32	%f1167, 0f7FFFFFFF, %f1167, %p136;

BB0_126:
	add.f32 	%f990, %f224, 0f3EE66666;
	mov.b32 	 %r322, %f990;
	setp.lt.s32	%p138, %r322, 2139095040;
	@%p138 bra 	BB0_131;

	setp.gtu.f32	%p139, %f224, 0f7F800000;
	@%p139 bra 	BB0_130;
	bra.uni 	BB0_128;

BB0_130:
	add.f32 	%f1167, %f196, 0f3EE66666;
	bra.uni 	BB0_131;

BB0_128:
	setp.neu.f32	%p140, %f224, 0f7F800000;
	@%p140 bra 	BB0_131;

	selp.f32	%f1167, 0fFF800000, 0f7F800000, %p6;

BB0_131:
	setp.eq.f32	%p141, %f196, 0f3F800000;
	selp.f32	%f991, 0f3F800000, %f1167, %p141;
	cvt.u64.u32	%rd117, %r6;
	cvt.u64.u32	%rd116, %r5;
	mov.u64 	%rd120, image;
	cvta.global.u64 	%rd115, %rd120;
	// inline asm
	call (%rd114), _rt_buffer_get_64, (%rd115, %r109, %r110, %rd116, %rd117, %rd30, %rd30);
	// inline asm
	cvt.sat.f32.f32	%f992, %f991;
	mul.f32 	%f993, %f992, 0f437FFD71;
	cvt.rzi.u32.f32	%r325, %f993;
	cvt.sat.f32.f32	%f994, %f223;
	mul.f32 	%f995, %f994, 0f437FFD71;
	cvt.rzi.u32.f32	%r326, %f995;
	cvt.sat.f32.f32	%f996, %f210;
	mul.f32 	%f997, %f996, 0f437FFD71;
	cvt.rzi.u32.f32	%r327, %f997;
	cvt.u16.u32	%rs43, %r325;
	cvt.u16.u32	%rs44, %r327;
	cvt.u16.u32	%rs45, %r326;
	mov.u16 	%rs46, 255;
	st.v4.u8 	[%rd114], {%rs43, %rs45, %rs44, %rs46};
	ld.global.u32 	%r425, [imageEnabled];

BB0_132:
	cvt.u64.u32	%rd21, %r5;
	cvt.u64.u32	%rd22, %r6;
	and.b32  	%r328, %r425, 4;
	setp.eq.s32	%p142, %r328, 0;
	@%p142 bra 	BB0_136;

	ld.global.u32 	%r329, [additive];
	setp.eq.s32	%p143, %r329, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs47, %f539;}

	// inline asm
	@%p143 bra 	BB0_135;

	mov.u64 	%rd133, image_HDR;
	cvta.global.u64 	%rd122, %rd133;
	mov.u32 	%r333, 8;
	// inline asm
	call (%rd121), _rt_buffer_get_64, (%rd122, %r109, %r333, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	ld.v4.u16 	{%rs54, %rs55, %rs56, %rs57}, [%rd121];
	// inline asm
	{  cvt.f32.f16 %f999, %rs54;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1000, %rs55;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1001, %rs56;}

	// inline asm
	// inline asm
	call (%rd127), _rt_buffer_get_64, (%rd122, %r109, %r333, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	add.f32 	%f1002, %f194, %f999;
	add.f32 	%f1003, %f195, %f1000;
	add.f32 	%f1004, %f196, %f1001;
	// inline asm
	{  cvt.rn.f16.f32 %rs53, %f1004;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs52, %f1003;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f1002;}

	// inline asm
	st.v4.u16 	[%rd127], {%rs51, %rs52, %rs53, %rs47};
	bra.uni 	BB0_136;

BB0_135:
	mov.u64 	%rd140, image_HDR;
	cvta.global.u64 	%rd135, %rd140;
	mov.u32 	%r335, 8;
	// inline asm
	call (%rd134), _rt_buffer_get_64, (%rd135, %r109, %r335, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs60, %f196;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs59, %f195;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs58, %f194;}

	// inline asm
	st.v4.u16 	[%rd134], {%rs58, %rs59, %rs60, %rs47};

BB0_136:
	add.f32 	%f1009, %f1152, %f1153;
	add.f32 	%f1010, %f1009, %f1154;
	mul.f32 	%f1011, %f1010, 0f3F13CD3A;
	div.rn.f32 	%f1012, %f1151, %f1011;
	setp.eq.f32	%p144, %f1151, 0f00000000;
	selp.f32	%f1013, 0f00000000, %f1012, %p144;
	mul.f32 	%f1014, %f1152, %f1013;
	mul.f32 	%f1015, %f1153, %f1013;
	mul.f32 	%f1016, %f1154, %f1013;
	ld.global.f32 	%f1017, [lightColor];
	mul.f32 	%f236, %f1017, %f1014;
	ld.global.f32 	%f1018, [lightColor+4];
	mul.f32 	%f237, %f1018, %f1014;
	ld.global.f32 	%f1019, [lightColor+8];
	mul.f32 	%f238, %f1014, %f1019;
	mul.f32 	%f239, %f1017, %f1015;
	mul.f32 	%f240, %f1018, %f1015;
	mul.f32 	%f241, %f1015, %f1019;
	mul.f32 	%f242, %f1016, %f1017;
	mul.f32 	%f243, %f1016, %f1018;
	mul.f32 	%f244, %f1016, %f1019;
	ld.global.u32 	%r336, [additive];
	setp.eq.s32	%p145, %r336, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs61, %f539;}

	// inline asm
	@%p145 bra 	BB0_138;

	mov.u64 	%rd153, image_RNM0;
	cvta.global.u64 	%rd142, %rd153;
	mov.u32 	%r340, 8;
	// inline asm
	call (%rd141), _rt_buffer_get_64, (%rd142, %r109, %r340, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	ld.v4.u16 	{%rs68, %rs69, %rs70, %rs71}, [%rd141];
	// inline asm
	{  cvt.f32.f16 %f1020, %rs68;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1021, %rs69;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1022, %rs70;}

	// inline asm
	// inline asm
	call (%rd147), _rt_buffer_get_64, (%rd142, %r109, %r340, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	add.f32 	%f1023, %f236, %f1020;
	add.f32 	%f1024, %f237, %f1021;
	add.f32 	%f1025, %f238, %f1022;
	// inline asm
	{  cvt.rn.f16.f32 %rs67, %f1025;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs66, %f1024;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f1023;}

	// inline asm
	st.v4.u16 	[%rd147], {%rs65, %rs66, %rs67, %rs61};
	bra.uni 	BB0_139;

BB0_138:
	mov.u64 	%rd160, image_RNM0;
	cvta.global.u64 	%rd155, %rd160;
	mov.u32 	%r342, 8;
	// inline asm
	call (%rd154), _rt_buffer_get_64, (%rd155, %r109, %r342, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs74, %f238;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs73, %f237;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs72, %f236;}

	// inline asm
	st.v4.u16 	[%rd154], {%rs72, %rs73, %rs74, %rs61};

BB0_139:
	ld.global.u32 	%r343, [additive];
	setp.eq.s32	%p146, %r343, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs75, %f539;}

	// inline asm
	@%p146 bra 	BB0_141;

	mov.u64 	%rd173, image_RNM1;
	cvta.global.u64 	%rd162, %rd173;
	mov.u32 	%r347, 8;
	// inline asm
	call (%rd161), _rt_buffer_get_64, (%rd162, %r109, %r347, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	ld.v4.u16 	{%rs82, %rs83, %rs84, %rs85}, [%rd161];
	// inline asm
	{  cvt.f32.f16 %f1030, %rs82;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1031, %rs83;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1032, %rs84;}

	// inline asm
	// inline asm
	call (%rd167), _rt_buffer_get_64, (%rd162, %r109, %r347, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	add.f32 	%f1033, %f239, %f1030;
	add.f32 	%f1034, %f240, %f1031;
	add.f32 	%f1035, %f241, %f1032;
	// inline asm
	{  cvt.rn.f16.f32 %rs81, %f1035;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs80, %f1034;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs79, %f1033;}

	// inline asm
	st.v4.u16 	[%rd167], {%rs79, %rs80, %rs81, %rs75};
	bra.uni 	BB0_142;

BB0_141:
	mov.u64 	%rd180, image_RNM1;
	cvta.global.u64 	%rd175, %rd180;
	mov.u32 	%r349, 8;
	// inline asm
	call (%rd174), _rt_buffer_get_64, (%rd175, %r109, %r349, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs88, %f241;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs87, %f240;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs86, %f239;}

	// inline asm
	st.v4.u16 	[%rd174], {%rs86, %rs87, %rs88, %rs75};

BB0_142:
	ld.global.u32 	%r350, [additive];
	setp.eq.s32	%p147, %r350, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs89, %f539;}

	// inline asm
	@%p147 bra 	BB0_144;

	mov.u64 	%rd193, image_RNM2;
	cvta.global.u64 	%rd182, %rd193;
	mov.u32 	%r354, 8;
	// inline asm
	call (%rd181), _rt_buffer_get_64, (%rd182, %r109, %r354, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	ld.v4.u16 	{%rs96, %rs97, %rs98, %rs99}, [%rd181];
	// inline asm
	{  cvt.f32.f16 %f1040, %rs96;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1041, %rs97;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1042, %rs98;}

	// inline asm
	// inline asm
	call (%rd187), _rt_buffer_get_64, (%rd182, %r109, %r354, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	add.f32 	%f1043, %f242, %f1040;
	add.f32 	%f1044, %f243, %f1041;
	add.f32 	%f1045, %f244, %f1042;
	// inline asm
	{  cvt.rn.f16.f32 %rs95, %f1045;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs94, %f1044;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs93, %f1043;}

	// inline asm
	st.v4.u16 	[%rd187], {%rs93, %rs94, %rs95, %rs89};
	bra.uni 	BB0_162;

BB0_144:
	mov.u64 	%rd200, image_RNM2;
	cvta.global.u64 	%rd195, %rd200;
	mov.u32 	%r356, 8;
	// inline asm
	call (%rd194), _rt_buffer_get_64, (%rd195, %r109, %r356, %rd21, %rd22, %rd30, %rd30);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs102, %f244;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs101, %f243;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs100, %f242;}

	// inline asm
	st.v4.u16 	[%rd194], {%rs100, %rs101, %rs102, %rs89};

BB0_162:
	ret;
}