//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 4 .u32 samples;
.global .align 4 .f32 lightInvCutoff;
.global .align 4 .f32 lightRadius;
.global .align 4 .b8 lightPos[12];
.global .align 4 .b8 lightColor[12];
.global .align 4 .u32 ignoreNormal;
.global .align 4 .b8 lightConeDir[12];
.global .align 8 .b8 lightCone[8];
.global .align 4 .f32 lightFalloffFakeDistanceMult;
.global .align 4 .f32 lightFalloffMinRadiusSq;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12lightConeDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9lightConeE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename12lightConeDirE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9lightConeE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12lightConeDirE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9lightConeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12lightConeDirE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic9lightConeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12lightConeDirE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9lightConeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[4];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<139>;
	.reg .b16 	%rs<221>;
	.reg .f32 	%f<984>;
	.reg .b32 	%r<251>;
	.reg .b64 	%rd<369>;


	mov.u64 	%rd368, __local_depot0;
	cvta.local.u64 	%SP, %rd368;
	ld.global.v2.u32 	{%r28, %r29}, [pixelID];
	cvt.u64.u32	%rd12, %r28;
	cvt.u64.u32	%rd13, %r29;
	mov.u64 	%rd16, uvnormal;
	cvta.global.u64 	%rd11, %rd16;
	mov.u32 	%r26, 2;
	mov.u32 	%r27, 4;
	mov.u64 	%rd15, 0;
	// inline asm
	call (%rd10), _rt_buffer_get_64, (%rd11, %r26, %r27, %rd12, %rd13, %rd15, %rd15);
	// inline asm
	ld.u32 	%r1, [%rd10];
	shr.u32 	%r32, %r1, 16;
	cvt.u16.u32	%rs1, %r32;
	and.b16  	%rs12, %rs1, 255;
	cvt.u16.u32	%rs13, %r1;
	or.b16  	%rs14, %rs13, %rs12;
	setp.eq.s16	%p7, %rs14, 0;
	mov.f32 	%f957, 0f00000000;
	mov.f32 	%f958, %f957;
	mov.f32 	%f959, %f957;
	@%p7 bra 	BB0_2;

	ld.u8 	%rs15, [%rd10+1];
	and.b16  	%rs17, %rs13, 255;
	cvt.rn.f32.u16	%f128, %rs17;
	div.rn.f32 	%f129, %f128, 0f437F0000;
	fma.rn.f32 	%f130, %f129, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f131, %rs15;
	div.rn.f32 	%f132, %f131, 0f437F0000;
	fma.rn.f32 	%f133, %f132, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f134, %rs12;
	div.rn.f32 	%f135, %f134, 0f437F0000;
	fma.rn.f32 	%f136, %f135, 0f40000000, 0fBF800000;
	mul.f32 	%f137, %f133, %f133;
	fma.rn.f32 	%f138, %f130, %f130, %f137;
	fma.rn.f32 	%f139, %f136, %f136, %f138;
	sqrt.rn.f32 	%f140, %f139;
	rcp.rn.f32 	%f141, %f140;
	mul.f32 	%f957, %f130, %f141;
	mul.f32 	%f958, %f133, %f141;
	mul.f32 	%f959, %f136, %f141;

BB0_2:
	ld.global.v2.u32 	{%r33, %r34}, [pixelID];
	ld.global.v2.u32 	{%r36, %r37}, [tileInfo];
	add.s32 	%r2, %r33, %r36;
	add.s32 	%r3, %r34, %r37;
	setp.eq.f32	%p8, %f958, 0f00000000;
	setp.eq.f32	%p9, %f957, 0f00000000;
	and.pred  	%p10, %p9, %p8;
	setp.eq.f32	%p11, %f959, 0f00000000;
	and.pred  	%p12, %p10, %p11;
	@%p12 bra 	BB0_116;
	bra.uni 	BB0_3;

BB0_116:
	ld.global.u32 	%r250, [imageEnabled];
	and.b32  	%r199, %r250, 1;
	setp.eq.b32	%p131, %r199, 1;
	@!%p131 bra 	BB0_118;
	bra.uni 	BB0_117;

BB0_117:
	cvt.u64.u32	%rd256, %r2;
	cvt.u64.u32	%rd257, %r3;
	mov.u64 	%rd260, image;
	cvta.global.u64 	%rd255, %rd260;
	// inline asm
	call (%rd254), _rt_buffer_get_64, (%rd255, %r26, %r27, %rd256, %rd257, %rd15, %rd15);
	// inline asm
	mov.u16 	%rs153, 0;
	st.v4.u8 	[%rd254], {%rs153, %rs153, %rs153, %rs153};
	ld.global.u32 	%r250, [imageEnabled];

BB0_118:
	and.b32  	%r202, %r250, 8;
	setp.eq.s32	%p132, %r202, 0;
	@%p132 bra 	BB0_120;

	cvt.u64.u32	%rd264, %r3;
	cvt.u64.u32	%rd263, %r2;
	mov.u64 	%rd267, image_Mask;
	cvta.global.u64 	%rd262, %rd267;
	// inline asm
	call (%rd261), _rt_buffer_get_64, (%rd262, %r26, %r26, %rd263, %rd264, %rd15, %rd15);
	// inline asm
	mov.f32 	%f866, 0f00000000;
	cvt.rzi.u32.f32	%r205, %f866;
	cvt.u16.u32	%rs154, %r205;
	mov.u16 	%rs155, 0;
	st.v2.u8 	[%rd261], {%rs154, %rs155};
	ld.global.u32 	%r250, [imageEnabled];

BB0_120:
	cvt.u64.u32	%rd8, %r2;
	cvt.u64.u32	%rd9, %r3;
	and.b32  	%r206, %r250, 4;
	setp.eq.s32	%p133, %r206, 0;
	@%p133 bra 	BB0_124;

	ld.global.u32 	%r207, [additive];
	setp.eq.s32	%p134, %r207, 0;
	@%p134 bra 	BB0_123;

	mov.u64 	%rd280, image_HDR;
	cvta.global.u64 	%rd269, %rd280;
	mov.u32 	%r211, 8;
	// inline asm
	call (%rd268), _rt_buffer_get_64, (%rd269, %r26, %r211, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs162, %rs163, %rs164, %rs165}, [%rd268];
	// inline asm
	{  cvt.f32.f16 %f867, %rs162;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f868, %rs163;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f869, %rs164;}

	// inline asm
	// inline asm
	call (%rd274), _rt_buffer_get_64, (%rd269, %r26, %r211, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	add.f32 	%f870, %f867, 0f00000000;
	add.f32 	%f871, %f868, 0f00000000;
	add.f32 	%f872, %f869, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs161, %f872;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs160, %f871;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs159, %f870;}

	// inline asm
	mov.u16 	%rs166, 0;
	st.v4.u16 	[%rd274], {%rs159, %rs160, %rs161, %rs166};
	bra.uni 	BB0_124;

BB0_3:
	ld.global.v2.u32 	{%r43, %r44}, [pixelID];
	cvt.u64.u32	%rd19, %r43;
	cvt.u64.u32	%rd20, %r44;
	mov.u64 	%rd23, uvpos;
	cvta.global.u64 	%rd18, %rd23;
	mov.u32 	%r42, 12;
	// inline asm
	call (%rd17), _rt_buffer_get_64, (%rd18, %r26, %r42, %rd19, %rd20, %rd15, %rd15);
	// inline asm
	ld.global.f32 	%f968, [lightPos];
	ld.f32 	%f12, [%rd17+8];
	ld.f32 	%f10, [%rd17+4];
	ld.f32 	%f8, [%rd17];
	sub.f32 	%f144, %f968, %f8;
	ld.global.f32 	%f967, [lightPos+4];
	sub.f32 	%f145, %f967, %f10;
	ld.global.f32 	%f966, [lightPos+8];
	sub.f32 	%f146, %f966, %f12;
	mul.f32 	%f147, %f145, %f145;
	fma.rn.f32 	%f148, %f144, %f144, %f147;
	fma.rn.f32 	%f149, %f146, %f146, %f148;
	sqrt.rn.f32 	%f150, %f149;
	rcp.rn.f32 	%f151, %f150;
	mul.f32 	%f13, %f144, %f151;
	mul.f32 	%f14, %f145, %f151;
	mul.f32 	%f15, %f146, %f151;
	ld.global.f32 	%f152, [lightFalloffFakeDistanceMult];
	mul.f32 	%f16, %f150, %f152;
	ld.global.f32 	%f153, [lightInvCutoff];
	mul.f32 	%f17, %f150, %f153;
	mov.f32 	%f157, 0f40800000;
	abs.f32 	%f19, %f17;
	setp.lt.f32	%p13, %f19, 0f00800000;
	mul.f32 	%f159, %f19, 0f4B800000;
	selp.f32	%f160, 0fC3170000, 0fC2FE0000, %p13;
	selp.f32	%f161, %f159, %f19, %p13;
	mov.b32 	 %r47, %f161;
	and.b32  	%r48, %r47, 8388607;
	or.b32  	%r49, %r48, 1065353216;
	mov.b32 	 %f162, %r49;
	shr.u32 	%r50, %r47, 23;
	cvt.rn.f32.u32	%f163, %r50;
	add.f32 	%f164, %f160, %f163;
	setp.gt.f32	%p14, %f162, 0f3FB504F3;
	mul.f32 	%f165, %f162, 0f3F000000;
	add.f32 	%f166, %f164, 0f3F800000;
	selp.f32	%f167, %f165, %f162, %p14;
	selp.f32	%f168, %f166, %f164, %p14;
	add.f32 	%f169, %f167, 0fBF800000;
	add.f32 	%f143, %f167, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f142,%f143;
	// inline asm
	add.f32 	%f170, %f169, %f169;
	mul.f32 	%f171, %f142, %f170;
	mul.f32 	%f172, %f171, %f171;
	mov.f32 	%f173, 0f3C4CAF63;
	mov.f32 	%f174, 0f3B18F0FE;
	fma.rn.f32 	%f175, %f174, %f172, %f173;
	mov.f32 	%f176, 0f3DAAAABD;
	fma.rn.f32 	%f177, %f175, %f172, %f176;
	mul.rn.f32 	%f178, %f177, %f172;
	mul.rn.f32 	%f179, %f178, %f171;
	sub.f32 	%f180, %f169, %f171;
	neg.f32 	%f181, %f171;
	add.f32 	%f182, %f180, %f180;
	fma.rn.f32 	%f183, %f181, %f169, %f182;
	mul.rn.f32 	%f184, %f142, %f183;
	add.f32 	%f185, %f179, %f171;
	sub.f32 	%f186, %f171, %f185;
	add.f32 	%f187, %f179, %f186;
	add.f32 	%f188, %f184, %f187;
	add.f32 	%f189, %f185, %f188;
	sub.f32 	%f190, %f185, %f189;
	add.f32 	%f191, %f188, %f190;
	mov.f32 	%f192, 0f3F317200;
	mul.rn.f32 	%f193, %f168, %f192;
	mov.f32 	%f194, 0f35BFBE8E;
	mul.rn.f32 	%f195, %f168, %f194;
	add.f32 	%f196, %f193, %f189;
	sub.f32 	%f197, %f193, %f196;
	add.f32 	%f198, %f189, %f197;
	add.f32 	%f199, %f191, %f198;
	add.f32 	%f200, %f195, %f199;
	add.f32 	%f201, %f196, %f200;
	sub.f32 	%f202, %f196, %f201;
	add.f32 	%f203, %f200, %f202;
	mul.rn.f32 	%f204, %f157, %f201;
	neg.f32 	%f205, %f204;
	fma.rn.f32 	%f206, %f157, %f201, %f205;
	fma.rn.f32 	%f207, %f157, %f203, %f206;
	mov.f32 	%f208, 0f00000000;
	fma.rn.f32 	%f209, %f208, %f201, %f207;
	add.rn.f32 	%f210, %f204, %f209;
	neg.f32 	%f211, %f210;
	add.rn.f32 	%f212, %f204, %f211;
	add.rn.f32 	%f213, %f212, %f209;
	mov.b32 	 %r51, %f210;
	setp.eq.s32	%p15, %r51, 1118925336;
	add.s32 	%r52, %r51, -1;
	mov.b32 	 %f214, %r52;
	add.f32 	%f215, %f213, 0f37000000;
	selp.f32	%f216, %f214, %f210, %p15;
	selp.f32	%f20, %f215, %f213, %p15;
	mul.f32 	%f217, %f216, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f218, %f217;
	mov.f32 	%f219, 0fBF317200;
	fma.rn.f32 	%f220, %f218, %f219, %f216;
	mov.f32 	%f221, 0fB5BFBE8E;
	fma.rn.f32 	%f222, %f218, %f221, %f220;
	mul.f32 	%f223, %f222, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f224, %f223;
	add.f32 	%f225, %f218, 0f00000000;
	ex2.approx.f32 	%f226, %f225;
	mul.f32 	%f227, %f224, %f226;
	setp.lt.f32	%p16, %f216, 0fC2D20000;
	selp.f32	%f228, 0f00000000, %f227, %p16;
	setp.gt.f32	%p17, %f216, 0f42D20000;
	selp.f32	%f960, 0f7F800000, %f228, %p17;
	setp.eq.f32	%p18, %f960, 0f7F800000;
	@%p18 bra 	BB0_5;

	fma.rn.f32 	%f960, %f960, %f20, %f960;

BB0_5:
	mov.f32 	%f907, 0f40000000;
	cvt.rzi.f32.f32	%f906, %f907;
	add.f32 	%f905, %f906, %f906;
	mov.f32 	%f904, 0f40800000;
	sub.f32 	%f903, %f904, %f905;
	abs.f32 	%f902, %f903;
	setp.lt.f32	%p19, %f17, 0f00000000;
	setp.eq.f32	%p20, %f902, 0f3F800000;
	and.pred  	%p1, %p19, %p20;
	mov.b32 	 %r53, %f960;
	xor.b32  	%r54, %r53, -2147483648;
	mov.b32 	 %f229, %r54;
	selp.f32	%f962, %f229, %f960, %p1;
	setp.eq.f32	%p21, %f17, 0f00000000;
	@%p21 bra 	BB0_8;
	bra.uni 	BB0_6;

BB0_8:
	add.f32 	%f232, %f17, %f17;
	selp.f32	%f962, %f232, 0f00000000, %p20;
	bra.uni 	BB0_9;

BB0_6:
	setp.geu.f32	%p22, %f17, 0f00000000;
	@%p22 bra 	BB0_9;

	mov.f32 	%f948, 0f40800000;
	cvt.rzi.f32.f32	%f231, %f948;
	setp.neu.f32	%p23, %f231, 0f40800000;
	selp.f32	%f962, 0f7FFFFFFF, %f962, %p23;

BB0_9:
	abs.f32 	%f908, %f17;
	add.f32 	%f233, %f908, 0f40800000;
	mov.b32 	 %r55, %f233;
	setp.lt.s32	%p25, %r55, 2139095040;
	@%p25 bra 	BB0_14;

	abs.f32 	%f946, %f17;
	setp.gtu.f32	%p26, %f946, 0f7F800000;
	@%p26 bra 	BB0_13;
	bra.uni 	BB0_11;

BB0_13:
	add.f32 	%f962, %f17, 0f40800000;
	bra.uni 	BB0_14;

BB0_11:
	abs.f32 	%f947, %f17;
	setp.neu.f32	%p27, %f947, 0f7F800000;
	@%p27 bra 	BB0_14;

	selp.f32	%f962, 0fFF800000, 0f7F800000, %p1;

BB0_14:
	mov.f32 	%f916, 0fB5BFBE8E;
	mov.f32 	%f915, 0fBF317200;
	mov.f32 	%f914, 0f00000000;
	mov.f32 	%f913, 0f35BFBE8E;
	mov.f32 	%f912, 0f3F317200;
	mov.f32 	%f911, 0f3DAAAABD;
	mov.f32 	%f910, 0f3C4CAF63;
	mov.f32 	%f909, 0f3B18F0FE;
	mov.f32 	%f236, 0f3F800000;
	sub.f32 	%f237, %f236, %f962;
	setp.eq.f32	%p28, %f17, 0f3F800000;
	selp.f32	%f238, 0f00000000, %f237, %p28;
	cvt.sat.f32.f32	%f239, %f238;
	ld.global.f32 	%f240, [lightFalloffMinRadiusSq];
	fma.rn.f32 	%f241, %f16, %f16, %f240;
	div.rn.f32 	%f31, %f239, %f241;
	mul.f32 	%f242, %f958, %f14;
	fma.rn.f32 	%f243, %f957, %f13, %f242;
	fma.rn.f32 	%f244, %f959, %f15, %f243;
	ld.global.u32 	%r248, [imageEnabled];
	and.b32  	%r56, %r248, 32;
	ld.global.u32 	%r57, [ignoreNormal];
	or.b32  	%r58, %r56, %r57;
	setp.eq.s32	%p29, %r58, 0;
	selp.f32	%f32, %f244, 0f3F800000, %p29;
	fma.rn.f32 	%f245, %f32, 0f3F000000, 0f3F000000;
	cvt.sat.f32.f32	%f246, %f245;
	add.f32 	%f33, %f246, %f246;
	mov.f32 	%f250, 0f41A00000;
	abs.f32 	%f35, %f33;
	setp.lt.f32	%p30, %f35, 0f00800000;
	mul.f32 	%f252, %f35, 0f4B800000;
	selp.f32	%f253, 0fC3170000, 0fC2FE0000, %p30;
	selp.f32	%f254, %f252, %f35, %p30;
	mov.b32 	 %r59, %f254;
	and.b32  	%r60, %r59, 8388607;
	or.b32  	%r61, %r60, 1065353216;
	mov.b32 	 %f255, %r61;
	shr.u32 	%r62, %r59, 23;
	cvt.rn.f32.u32	%f256, %r62;
	add.f32 	%f257, %f253, %f256;
	setp.gt.f32	%p31, %f255, 0f3FB504F3;
	mul.f32 	%f258, %f255, 0f3F000000;
	add.f32 	%f259, %f257, 0f3F800000;
	selp.f32	%f260, %f258, %f255, %p31;
	selp.f32	%f261, %f259, %f257, %p31;
	add.f32 	%f262, %f260, 0fBF800000;
	add.f32 	%f235, %f260, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f234,%f235;
	// inline asm
	add.f32 	%f263, %f262, %f262;
	mul.f32 	%f264, %f234, %f263;
	mul.f32 	%f265, %f264, %f264;
	fma.rn.f32 	%f268, %f909, %f265, %f910;
	fma.rn.f32 	%f270, %f268, %f265, %f911;
	mul.rn.f32 	%f271, %f270, %f265;
	mul.rn.f32 	%f272, %f271, %f264;
	sub.f32 	%f273, %f262, %f264;
	neg.f32 	%f274, %f264;
	add.f32 	%f275, %f273, %f273;
	fma.rn.f32 	%f276, %f274, %f262, %f275;
	mul.rn.f32 	%f277, %f234, %f276;
	add.f32 	%f278, %f272, %f264;
	sub.f32 	%f279, %f264, %f278;
	add.f32 	%f280, %f272, %f279;
	add.f32 	%f281, %f277, %f280;
	add.f32 	%f282, %f278, %f281;
	sub.f32 	%f283, %f278, %f282;
	add.f32 	%f284, %f281, %f283;
	mul.rn.f32 	%f286, %f261, %f912;
	mul.rn.f32 	%f288, %f261, %f913;
	add.f32 	%f289, %f286, %f282;
	sub.f32 	%f290, %f286, %f289;
	add.f32 	%f291, %f282, %f290;
	add.f32 	%f292, %f284, %f291;
	add.f32 	%f293, %f288, %f292;
	add.f32 	%f294, %f289, %f293;
	sub.f32 	%f295, %f289, %f294;
	add.f32 	%f296, %f293, %f295;
	mul.rn.f32 	%f297, %f250, %f294;
	neg.f32 	%f298, %f297;
	fma.rn.f32 	%f299, %f250, %f294, %f298;
	fma.rn.f32 	%f300, %f250, %f296, %f299;
	fma.rn.f32 	%f302, %f914, %f294, %f300;
	add.rn.f32 	%f303, %f297, %f302;
	neg.f32 	%f304, %f303;
	add.rn.f32 	%f305, %f297, %f304;
	add.rn.f32 	%f306, %f305, %f302;
	mov.b32 	 %r63, %f303;
	setp.eq.s32	%p32, %r63, 1118925336;
	add.s32 	%r64, %r63, -1;
	mov.b32 	 %f307, %r64;
	add.f32 	%f308, %f306, 0f37000000;
	selp.f32	%f309, %f307, %f303, %p32;
	selp.f32	%f36, %f308, %f306, %p32;
	mul.f32 	%f310, %f309, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f311, %f310;
	fma.rn.f32 	%f313, %f311, %f915, %f309;
	fma.rn.f32 	%f315, %f311, %f916, %f313;
	mul.f32 	%f316, %f315, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f317, %f316;
	add.f32 	%f318, %f311, 0f00000000;
	ex2.approx.f32 	%f319, %f318;
	mul.f32 	%f320, %f317, %f319;
	setp.lt.f32	%p33, %f309, 0fC2D20000;
	selp.f32	%f321, 0f00000000, %f320, %p33;
	setp.gt.f32	%p34, %f309, 0f42D20000;
	selp.f32	%f963, 0f7F800000, %f321, %p34;
	setp.eq.f32	%p35, %f963, 0f7F800000;
	@%p35 bra 	BB0_16;

	fma.rn.f32 	%f963, %f963, %f36, %f963;

BB0_16:
	mov.f32 	%f954, 0f41200000;
	cvt.rzi.f32.f32	%f953, %f954;
	add.f32 	%f952, %f953, %f953;
	mov.f32 	%f951, 0f41A00000;
	sub.f32 	%f950, %f951, %f952;
	abs.f32 	%f949, %f950;
	setp.lt.f32	%p36, %f33, 0f00000000;
	setp.eq.f32	%p37, %f949, 0f3F800000;
	and.pred  	%p2, %p36, %p37;
	mov.b32 	 %r65, %f963;
	xor.b32  	%r66, %r65, -2147483648;
	mov.b32 	 %f322, %r66;
	selp.f32	%f965, %f322, %f963, %p2;
	setp.eq.f32	%p38, %f33, 0f00000000;
	@%p38 bra 	BB0_19;
	bra.uni 	BB0_17;

BB0_19:
	add.f32 	%f325, %f33, %f33;
	selp.f32	%f965, %f325, 0f00000000, %p37;
	bra.uni 	BB0_20;

BB0_17:
	setp.geu.f32	%p39, %f33, 0f00000000;
	@%p39 bra 	BB0_20;

	mov.f32 	%f956, 0f41A00000;
	cvt.rzi.f32.f32	%f324, %f956;
	setp.neu.f32	%p40, %f324, 0f41A00000;
	selp.f32	%f965, 0f7FFFFFFF, %f965, %p40;

BB0_20:
	add.f32 	%f326, %f35, 0f41A00000;
	mov.b32 	 %r67, %f326;
	setp.lt.s32	%p42, %r67, 2139095040;
	@%p42 bra 	BB0_25;

	setp.gtu.f32	%p43, %f35, 0f7F800000;
	@%p43 bra 	BB0_24;
	bra.uni 	BB0_22;

BB0_24:
	add.f32 	%f965, %f33, 0f41A00000;
	bra.uni 	BB0_25;

BB0_22:
	setp.neu.f32	%p44, %f35, 0f7F800000;
	@%p44 bra 	BB0_25;

	selp.f32	%f965, 0fFF800000, 0f7F800000, %p2;

BB0_25:
	setp.eq.f32	%p45, %f33, 0f3F800000;
	selp.f32	%f327, 0f3F800000, %f965, %p45;
	cvt.sat.f32.f32	%f328, %f327;
	mul.f32 	%f329, %f31, %f328;
	mul.f32 	%f330, %f32, 0f40800000;
	cvt.sat.f32.f32	%f47, %f330;
	ld.global.f32 	%f331, [lightConeDir];
	mul.f32 	%f332, %f13, %f331;
	ld.global.f32 	%f333, [lightConeDir+4];
	mul.f32 	%f334, %f14, %f333;
	neg.f32 	%f335, %f334;
	sub.f32 	%f336, %f335, %f332;
	ld.global.f32 	%f337, [lightConeDir+8];
	mul.f32 	%f338, %f15, %f337;
	sub.f32 	%f339, %f336, %f338;
	ld.global.v2.f32 	{%f340, %f341}, [lightCone];
	fma.rn.f32 	%f344, %f340, %f339, %f341;
	cvt.sat.f32.f32	%f345, %f344;
	mul.f32 	%f346, %f345, %f345;
	mul.f32 	%f48, %f329, %f346;
	mul.f32 	%f347, %f47, %f48;
	ld.global.f32 	%f348, [lightColor+4];
	ld.global.f32 	%f349, [lightColor];
	max.f32 	%f350, %f349, %f348;
	ld.global.f32 	%f351, [lightColor+8];
	max.f32 	%f352, %f350, %f351;
	mul.f32 	%f353, %f347, %f352;
	setp.lt.f32	%p46, %f353, 0f3727C5AC;
	@%p46 bra 	BB0_96;
	bra.uni 	BB0_26;

BB0_96:
	and.b32  	%r156, %r248, 1;
	setp.eq.b32	%p123, %r156, 1;
	@!%p123 bra 	BB0_98;
	bra.uni 	BB0_97;

BB0_97:
	cvt.u64.u32	%rd142, %r2;
	cvt.u64.u32	%rd143, %r3;
	mov.u64 	%rd146, image;
	cvta.global.u64 	%rd141, %rd146;
	// inline asm
	call (%rd140), _rt_buffer_get_64, (%rd141, %r26, %r27, %rd142, %rd143, %rd15, %rd15);
	// inline asm
	mov.u16 	%rs89, 1;
	mov.u16 	%rs90, 0;
	st.v4.u8 	[%rd140], {%rs90, %rs90, %rs90, %rs89};
	ld.global.u32 	%r248, [imageEnabled];

BB0_98:
	and.b32  	%r159, %r248, 8;
	setp.eq.s32	%p124, %r159, 0;
	@%p124 bra 	BB0_100;

	cvt.u64.u32	%rd150, %r3;
	cvt.u64.u32	%rd149, %r2;
	mov.u64 	%rd153, image_Mask;
	cvta.global.u64 	%rd148, %rd153;
	// inline asm
	call (%rd147), _rt_buffer_get_64, (%rd148, %r26, %r26, %rd149, %rd150, %rd15, %rd15);
	// inline asm
	mov.f32 	%f823, 0f00000000;
	cvt.rzi.u32.f32	%r162, %f823;
	cvt.u16.u32	%rs91, %r162;
	mov.u16 	%rs92, 255;
	st.v2.u8 	[%rd147], {%rs91, %rs92};
	ld.global.u32 	%r248, [imageEnabled];

BB0_100:
	cvt.u64.u32	%rd6, %r2;
	cvt.u64.u32	%rd7, %r3;
	and.b32  	%r163, %r248, 4;
	setp.eq.s32	%p125, %r163, 0;
	@%p125 bra 	BB0_104;

	ld.global.u32 	%r164, [additive];
	setp.eq.s32	%p126, %r164, 0;
	mov.f32 	%f824, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs93, %f824;}

	// inline asm
	@%p126 bra 	BB0_103;

	mov.u64 	%rd166, image_HDR;
	cvta.global.u64 	%rd155, %rd166;
	mov.u32 	%r168, 8;
	// inline asm
	call (%rd154), _rt_buffer_get_64, (%rd155, %r26, %r168, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs100, %rs101, %rs102, %rs103}, [%rd154];
	// inline asm
	{  cvt.f32.f16 %f825, %rs100;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f826, %rs101;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f827, %rs102;}

	// inline asm
	// inline asm
	call (%rd160), _rt_buffer_get_64, (%rd155, %r26, %r168, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	add.f32 	%f828, %f825, 0f00000000;
	add.f32 	%f829, %f826, 0f00000000;
	add.f32 	%f830, %f827, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs99, %f830;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs98, %f829;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs97, %f828;}

	// inline asm
	st.v4.u16 	[%rd160], {%rs97, %rs98, %rs99, %rs93};
	bra.uni 	BB0_104;

BB0_26:
	mov.f32 	%f969, 0f00000000;
	mul.f32 	%f355, %f8, 0f3456BF95;
	abs.f32 	%f356, %f957;
	div.rn.f32 	%f357, %f355, %f356;
	abs.f32 	%f358, %f958;
	mul.f32 	%f359, %f10, 0f3456BF95;
	div.rn.f32 	%f360, %f359, %f358;
	abs.f32 	%f361, %f959;
	mul.f32 	%f362, %f12, 0f3456BF95;
	div.rn.f32 	%f363, %f362, %f361;
	abs.f32 	%f364, %f357;
	abs.f32 	%f365, %f360;
	abs.f32 	%f366, %f363;
	mov.f32 	%f367, 0f38D1B717;
	max.f32 	%f368, %f364, %f367;
	max.f32 	%f369, %f365, %f367;
	max.f32 	%f370, %f366, %f367;
	fma.rn.f32 	%f49, %f957, %f368, %f8;
	fma.rn.f32 	%f50, %f958, %f369, %f10;
	fma.rn.f32 	%f51, %f959, %f370, %f12;
	ld.global.u32 	%r244, [samples];
	setp.lt.s32	%p47, %r244, 1;
	@%p47 bra 	BB0_29;

	mul.f32 	%f372, %f49, 0f3456BF95;
	abs.f32 	%f373, %f372;
	mul.f32 	%f374, %f50, 0f3456BF95;
	abs.f32 	%f375, %f374;
	mul.f32 	%f376, %f51, 0f3456BF95;
	abs.f32 	%f377, %f376;
	max.f32 	%f378, %f373, %f375;
	max.f32 	%f379, %f378, %f377;
	max.f32 	%f52, %f379, %f367;
	add.u64 	%rd24, %SP, 0;
	cvta.to.local.u64 	%rd2, %rd24;
	mov.f32 	%f969, 0f00000000;
	mov.u32 	%r243, 0;
	bra.uni 	BB0_28;

BB0_95:
	ld.global.f32 	%f968, [lightPos];
	ld.global.f32 	%f967, [lightPos+4];
	ld.global.f32 	%f966, [lightPos+8];
	ld.global.u32 	%r248, [imageEnabled];

BB0_28:
	cvt.rn.f32.s32	%f389, %r243;
	mul.f32 	%f390, %f389, 0f3DD32618;
	cvt.rmi.f32.f32	%f391, %f390;
	sub.f32 	%f392, %f390, %f391;
	mul.f32 	%f393, %f389, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f394, %f393;
	sub.f32 	%f395, %f393, %f394;
	mul.f32 	%f396, %f389, 0f3DC74539;
	cvt.rmi.f32.f32	%f397, %f396;
	sub.f32 	%f398, %f396, %f397;
	add.f32 	%f399, %f395, 0f4199851F;
	add.f32 	%f400, %f398, 0f4199851F;
	add.f32 	%f401, %f392, 0f4199851F;
	mul.f32 	%f402, %f395, %f400;
	fma.rn.f32 	%f403, %f392, %f399, %f402;
	fma.rn.f32 	%f404, %f401, %f398, %f403;
	add.f32 	%f405, %f392, %f404;
	add.f32 	%f406, %f395, %f404;
	add.f32 	%f407, %f398, %f404;
	add.f32 	%f408, %f405, %f406;
	mul.f32 	%f409, %f407, %f408;
	cvt.rmi.f32.f32	%f410, %f409;
	sub.f32 	%f411, %f409, %f410;
	add.f32 	%f412, %f405, %f407;
	mul.f32 	%f413, %f406, %f412;
	cvt.rmi.f32.f32	%f414, %f413;
	sub.f32 	%f415, %f413, %f414;
	add.f32 	%f416, %f406, %f407;
	mul.f32 	%f417, %f405, %f416;
	cvt.rmi.f32.f32	%f418, %f417;
	sub.f32 	%f419, %f417, %f418;
	fma.rn.f32 	%f420, %f411, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f421, %f415, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f422, %f419, 0f40000000, 0fBF800000;
	ld.global.f32 	%f423, [lightRadius];
	fma.rn.f32 	%f424, %f423, %f420, %f968;
	fma.rn.f32 	%f425, %f423, %f421, %f967;
	fma.rn.f32 	%f426, %f423, %f422, %f966;
	sub.f32 	%f427, %f424, %f8;
	sub.f32 	%f428, %f425, %f10;
	sub.f32 	%f429, %f426, %f12;
	mul.f32 	%f430, %f428, %f428;
	fma.rn.f32 	%f431, %f427, %f427, %f430;
	fma.rn.f32 	%f432, %f429, %f429, %f431;
	sqrt.rn.f32 	%f388, %f432;
	rcp.rn.f32 	%f433, %f388;
	mul.f32 	%f384, %f433, %f427;
	mul.f32 	%f385, %f433, %f428;
	mul.f32 	%f386, %f433, %f429;
	and.b32  	%r72, %r248, 32;
	setp.eq.s32	%p48, %r72, 0;
	selp.f32	%f434, 0f3F800000, 0f41200000, %p48;
	mul.f32 	%f387, %f434, %f52;
	mov.u32 	%r73, 1065353216;
	st.local.u32 	[%rd2], %r73;
	ld.global.u32 	%r69, [root];
	mov.u32 	%r70, 1;
	// inline asm
	call _rt_trace_64, (%r69, %f49, %f50, %f51, %f384, %f385, %f386, %r70, %f387, %f388, %rd24, %r27);
	// inline asm
	ld.local.f32 	%f435, [%rd2];
	add.f32 	%f969, %f969, %f435;
	ld.global.u32 	%r244, [samples];
	add.s32 	%r243, %r243, 1;
	setp.lt.s32	%p49, %r243, %r244;
	@%p49 bra 	BB0_95;

BB0_29:
	mov.f32 	%f971, 0f3F800000;
	setp.eq.s32	%p50, %r244, 0;
	@%p50 bra 	BB0_31;

	cvt.rn.f32.s32	%f437, %r244;
	div.rn.f32 	%f971, %f969, %f437;

BB0_31:
	cvt.sat.f32.f32	%f438, %f32;
	mul.f32 	%f439, %f48, %f438;
	mul.f32 	%f440, %f971, %f439;
	ld.global.f32 	%f441, [lightColor];
	mul.f32 	%f61, %f441, %f440;
	ld.global.f32 	%f442, [lightColor+4];
	mul.f32 	%f62, %f442, %f440;
	ld.global.f32 	%f443, [lightColor+8];
	mul.f32 	%f63, %f440, %f443;
	ld.global.u32 	%r246, [imageEnabled];
	and.b32  	%r74, %r246, 8;
	setp.eq.s32	%p51, %r74, 0;
	@%p51 bra 	BB0_44;

	mov.f32 	%f924, 0fB5BFBE8E;
	mov.f32 	%f923, 0fBF317200;
	mov.f32 	%f922, 0f35BFBE8E;
	mov.f32 	%f921, 0f3F317200;
	mov.f32 	%f920, 0f3DAAAABD;
	mov.f32 	%f919, 0f3C4CAF63;
	mov.f32 	%f918, 0f3B18F0FE;
	cvt.u64.u32	%rd28, %r2;
	cvt.u64.u32	%rd29, %r3;
	mov.u64 	%rd32, image_Mask;
	cvta.global.u64 	%rd27, %rd32;
	// inline asm
	call (%rd26), _rt_buffer_get_64, (%rd27, %r26, %r26, %rd28, %rd29, %rd15, %rd15);
	// inline asm
	mov.f32 	%f446, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f447, %f446;
	fma.rn.f32 	%f448, %f447, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f64, %f448;
	abs.f32 	%f65, %f971;
	setp.lt.f32	%p52, %f65, 0f00800000;
	mul.f32 	%f449, %f65, 0f4B800000;
	selp.f32	%f450, 0fC3170000, 0fC2FE0000, %p52;
	selp.f32	%f451, %f449, %f65, %p52;
	mov.b32 	 %r77, %f451;
	and.b32  	%r78, %r77, 8388607;
	or.b32  	%r79, %r78, 1065353216;
	mov.b32 	 %f452, %r79;
	shr.u32 	%r80, %r77, 23;
	cvt.rn.f32.u32	%f453, %r80;
	add.f32 	%f454, %f450, %f453;
	setp.gt.f32	%p53, %f452, 0f3FB504F3;
	mul.f32 	%f455, %f452, 0f3F000000;
	add.f32 	%f456, %f454, 0f3F800000;
	selp.f32	%f457, %f455, %f452, %p53;
	selp.f32	%f458, %f456, %f454, %p53;
	add.f32 	%f459, %f457, 0fBF800000;
	add.f32 	%f445, %f457, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f444,%f445;
	// inline asm
	add.f32 	%f460, %f459, %f459;
	mul.f32 	%f461, %f444, %f460;
	mul.f32 	%f462, %f461, %f461;
	fma.rn.f32 	%f465, %f918, %f462, %f919;
	fma.rn.f32 	%f467, %f465, %f462, %f920;
	mul.rn.f32 	%f468, %f467, %f462;
	mul.rn.f32 	%f469, %f468, %f461;
	sub.f32 	%f470, %f459, %f461;
	neg.f32 	%f471, %f461;
	add.f32 	%f472, %f470, %f470;
	fma.rn.f32 	%f473, %f471, %f459, %f472;
	mul.rn.f32 	%f474, %f444, %f473;
	add.f32 	%f475, %f469, %f461;
	sub.f32 	%f476, %f461, %f475;
	add.f32 	%f477, %f469, %f476;
	add.f32 	%f478, %f474, %f477;
	add.f32 	%f479, %f475, %f478;
	sub.f32 	%f480, %f475, %f479;
	add.f32 	%f481, %f478, %f480;
	mul.rn.f32 	%f483, %f458, %f921;
	mul.rn.f32 	%f485, %f458, %f922;
	add.f32 	%f486, %f483, %f479;
	sub.f32 	%f487, %f483, %f486;
	add.f32 	%f488, %f479, %f487;
	add.f32 	%f489, %f481, %f488;
	add.f32 	%f490, %f485, %f489;
	add.f32 	%f491, %f486, %f490;
	sub.f32 	%f492, %f486, %f491;
	add.f32 	%f493, %f490, %f492;
	mov.f32 	%f494, 0f3EE8BA2E;
	mul.rn.f32 	%f495, %f494, %f491;
	neg.f32 	%f496, %f495;
	fma.rn.f32 	%f497, %f494, %f491, %f496;
	fma.rn.f32 	%f498, %f494, %f493, %f497;
	mov.f32 	%f499, 0f00000000;
	fma.rn.f32 	%f500, %f499, %f491, %f498;
	add.rn.f32 	%f501, %f495, %f500;
	neg.f32 	%f502, %f501;
	add.rn.f32 	%f503, %f495, %f502;
	add.rn.f32 	%f504, %f503, %f500;
	mov.b32 	 %r81, %f501;
	setp.eq.s32	%p54, %r81, 1118925336;
	add.s32 	%r82, %r81, -1;
	mov.b32 	 %f505, %r82;
	add.f32 	%f506, %f504, 0f37000000;
	selp.f32	%f507, %f505, %f501, %p54;
	selp.f32	%f66, %f506, %f504, %p54;
	mul.f32 	%f508, %f507, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f509, %f508;
	fma.rn.f32 	%f511, %f509, %f923, %f507;
	fma.rn.f32 	%f513, %f509, %f924, %f511;
	mul.f32 	%f514, %f513, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f515, %f514;
	add.f32 	%f516, %f509, 0f00000000;
	ex2.approx.f32 	%f517, %f516;
	mul.f32 	%f518, %f515, %f517;
	setp.lt.f32	%p55, %f507, 0fC2D20000;
	selp.f32	%f519, 0f00000000, %f518, %p55;
	setp.gt.f32	%p56, %f507, 0f42D20000;
	selp.f32	%f972, 0f7F800000, %f519, %p56;
	setp.eq.f32	%p57, %f972, 0f7F800000;
	@%p57 bra 	BB0_34;

	fma.rn.f32 	%f972, %f972, %f66, %f972;

BB0_34:
	setp.lt.f32	%p58, %f971, 0f00000000;
	setp.eq.f32	%p59, %f64, 0f3F800000;
	and.pred  	%p3, %p58, %p59;
	mov.b32 	 %r83, %f972;
	xor.b32  	%r84, %r83, -2147483648;
	mov.b32 	 %f520, %r84;
	selp.f32	%f974, %f520, %f972, %p3;
	setp.eq.f32	%p60, %f971, 0f00000000;
	@%p60 bra 	BB0_37;
	bra.uni 	BB0_35;

BB0_37:
	add.f32 	%f523, %f971, %f971;
	selp.f32	%f974, %f523, 0f00000000, %p59;
	bra.uni 	BB0_38;

BB0_123:
	mov.u64 	%rd287, image_HDR;
	cvta.global.u64 	%rd282, %rd287;
	mov.u32 	%r213, 8;
	// inline asm
	call (%rd281), _rt_buffer_get_64, (%rd282, %r26, %r213, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	mov.f32 	%f873, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs167, %f873;}

	// inline asm
	mov.u16 	%rs168, 0;
	st.v4.u16 	[%rd281], {%rs167, %rs167, %rs167, %rs168};

BB0_124:
	ld.global.u32 	%r214, [additive];
	setp.eq.s32	%p135, %r214, 0;
	@%p135 bra 	BB0_126;

	mov.u64 	%rd300, image_RNM0;
	cvta.global.u64 	%rd289, %rd300;
	mov.u32 	%r218, 8;
	// inline asm
	call (%rd288), _rt_buffer_get_64, (%rd289, %r26, %r218, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs175, %rs176, %rs177, %rs178}, [%rd288];
	// inline asm
	{  cvt.f32.f16 %f874, %rs175;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f875, %rs176;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f876, %rs177;}

	// inline asm
	// inline asm
	call (%rd294), _rt_buffer_get_64, (%rd289, %r26, %r218, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	add.f32 	%f877, %f874, 0f00000000;
	add.f32 	%f878, %f875, 0f00000000;
	add.f32 	%f879, %f876, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs174, %f879;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs173, %f878;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs172, %f877;}

	// inline asm
	mov.u16 	%rs179, 0;
	st.v4.u16 	[%rd294], {%rs172, %rs173, %rs174, %rs179};
	bra.uni 	BB0_127;

BB0_126:
	mov.u64 	%rd307, image_RNM0;
	cvta.global.u64 	%rd302, %rd307;
	mov.u32 	%r220, 8;
	// inline asm
	call (%rd301), _rt_buffer_get_64, (%rd302, %r26, %r220, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	mov.f32 	%f880, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs180, %f880;}

	// inline asm
	mov.u16 	%rs181, 0;
	st.v4.u16 	[%rd301], {%rs180, %rs180, %rs180, %rs181};

BB0_127:
	ld.global.u32 	%r221, [additive];
	setp.eq.s32	%p136, %r221, 0;
	@%p136 bra 	BB0_129;

	mov.u64 	%rd320, image_RNM1;
	cvta.global.u64 	%rd309, %rd320;
	mov.u32 	%r225, 8;
	// inline asm
	call (%rd308), _rt_buffer_get_64, (%rd309, %r26, %r225, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs188, %rs189, %rs190, %rs191}, [%rd308];
	// inline asm
	{  cvt.f32.f16 %f881, %rs188;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f882, %rs189;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f883, %rs190;}

	// inline asm
	// inline asm
	call (%rd314), _rt_buffer_get_64, (%rd309, %r26, %r225, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	add.f32 	%f884, %f881, 0f00000000;
	add.f32 	%f885, %f882, 0f00000000;
	add.f32 	%f886, %f883, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs187, %f886;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs186, %f885;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs185, %f884;}

	// inline asm
	mov.u16 	%rs192, 0;
	st.v4.u16 	[%rd314], {%rs185, %rs186, %rs187, %rs192};
	bra.uni 	BB0_130;

BB0_129:
	mov.u64 	%rd327, image_RNM1;
	cvta.global.u64 	%rd322, %rd327;
	mov.u32 	%r227, 8;
	// inline asm
	call (%rd321), _rt_buffer_get_64, (%rd322, %r26, %r227, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	mov.f32 	%f887, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs193, %f887;}

	// inline asm
	mov.u16 	%rs194, 0;
	st.v4.u16 	[%rd321], {%rs193, %rs193, %rs193, %rs194};

BB0_130:
	ld.global.u32 	%r228, [additive];
	setp.eq.s32	%p137, %r228, 0;
	@%p137 bra 	BB0_132;

	mov.u64 	%rd340, image_RNM2;
	cvta.global.u64 	%rd329, %rd340;
	mov.u32 	%r232, 8;
	// inline asm
	call (%rd328), _rt_buffer_get_64, (%rd329, %r26, %r232, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs201, %rs202, %rs203, %rs204}, [%rd328];
	// inline asm
	{  cvt.f32.f16 %f888, %rs201;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f889, %rs202;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f890, %rs203;}

	// inline asm
	// inline asm
	call (%rd334), _rt_buffer_get_64, (%rd329, %r26, %r232, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	add.f32 	%f891, %f888, 0f00000000;
	add.f32 	%f892, %f889, 0f00000000;
	add.f32 	%f893, %f890, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs200, %f893;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs199, %f892;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs198, %f891;}

	// inline asm
	mov.u16 	%rs205, 0;
	st.v4.u16 	[%rd334], {%rs198, %rs199, %rs200, %rs205};
	bra.uni 	BB0_133;

BB0_132:
	mov.u64 	%rd347, image_RNM2;
	cvta.global.u64 	%rd342, %rd347;
	mov.u32 	%r234, 8;
	// inline asm
	call (%rd341), _rt_buffer_get_64, (%rd342, %r26, %r234, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	mov.f32 	%f894, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs206, %f894;}

	// inline asm
	mov.u16 	%rs207, 0;
	st.v4.u16 	[%rd341], {%rs206, %rs206, %rs206, %rs207};

BB0_133:
	ld.global.u32 	%r235, [additive];
	setp.eq.s32	%p138, %r235, 0;
	@%p138 bra 	BB0_135;

	mov.u64 	%rd360, image_RNM3;
	cvta.global.u64 	%rd349, %rd360;
	mov.u32 	%r239, 8;
	// inline asm
	call (%rd348), _rt_buffer_get_64, (%rd349, %r26, %r239, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs214, %rs215, %rs216, %rs217}, [%rd348];
	// inline asm
	{  cvt.f32.f16 %f895, %rs214;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f896, %rs215;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f897, %rs216;}

	// inline asm
	// inline asm
	call (%rd354), _rt_buffer_get_64, (%rd349, %r26, %r239, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	add.f32 	%f898, %f895, 0f00000000;
	add.f32 	%f899, %f896, 0f00000000;
	add.f32 	%f900, %f897, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs213, %f900;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs212, %f899;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs211, %f898;}

	// inline asm
	mov.u16 	%rs218, 0;
	st.v4.u16 	[%rd354], {%rs211, %rs212, %rs213, %rs218};
	bra.uni 	BB0_136;

BB0_135:
	mov.u64 	%rd367, image_RNM3;
	cvta.global.u64 	%rd362, %rd367;
	mov.u32 	%r241, 8;
	// inline asm
	call (%rd361), _rt_buffer_get_64, (%rd362, %r26, %r241, %rd8, %rd9, %rd15, %rd15);
	// inline asm
	mov.f32 	%f901, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs219, %f901;}

	// inline asm
	mov.u16 	%rs220, 0;
	st.v4.u16 	[%rd361], {%rs219, %rs219, %rs219, %rs220};
	bra.uni 	BB0_136;

BB0_103:
	mov.u64 	%rd173, image_HDR;
	cvta.global.u64 	%rd168, %rd173;
	mov.u32 	%r170, 8;
	// inline asm
	call (%rd167), _rt_buffer_get_64, (%rd168, %r26, %r170, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	mov.f32 	%f831, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs104, %f831;}

	// inline asm
	st.v4.u16 	[%rd167], {%rs104, %rs104, %rs104, %rs93};

BB0_104:
	ld.global.u32 	%r171, [additive];
	setp.eq.s32	%p127, %r171, 0;
	mov.f32 	%f832, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs105, %f832;}

	// inline asm
	@%p127 bra 	BB0_106;

	mov.u64 	%rd186, image_RNM0;
	cvta.global.u64 	%rd175, %rd186;
	mov.u32 	%r175, 8;
	// inline asm
	call (%rd174), _rt_buffer_get_64, (%rd175, %r26, %r175, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs112, %rs113, %rs114, %rs115}, [%rd174];
	// inline asm
	{  cvt.f32.f16 %f833, %rs112;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f834, %rs113;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f835, %rs114;}

	// inline asm
	// inline asm
	call (%rd180), _rt_buffer_get_64, (%rd175, %r26, %r175, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	add.f32 	%f836, %f833, 0f00000000;
	add.f32 	%f837, %f834, 0f00000000;
	add.f32 	%f838, %f835, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs111, %f838;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs110, %f837;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs109, %f836;}

	// inline asm
	st.v4.u16 	[%rd180], {%rs109, %rs110, %rs111, %rs105};
	bra.uni 	BB0_107;

BB0_106:
	mov.u64 	%rd193, image_RNM0;
	cvta.global.u64 	%rd188, %rd193;
	mov.u32 	%r177, 8;
	// inline asm
	call (%rd187), _rt_buffer_get_64, (%rd188, %r26, %r177, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	mov.f32 	%f839, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs116, %f839;}

	// inline asm
	st.v4.u16 	[%rd187], {%rs116, %rs116, %rs116, %rs105};

BB0_107:
	ld.global.u32 	%r178, [additive];
	setp.eq.s32	%p128, %r178, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs117, %f832;}

	// inline asm
	@%p128 bra 	BB0_109;

	mov.u64 	%rd206, image_RNM1;
	cvta.global.u64 	%rd195, %rd206;
	mov.u32 	%r182, 8;
	// inline asm
	call (%rd194), _rt_buffer_get_64, (%rd195, %r26, %r182, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs124, %rs125, %rs126, %rs127}, [%rd194];
	// inline asm
	{  cvt.f32.f16 %f841, %rs124;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f842, %rs125;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f843, %rs126;}

	// inline asm
	// inline asm
	call (%rd200), _rt_buffer_get_64, (%rd195, %r26, %r182, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	add.f32 	%f844, %f841, 0f00000000;
	add.f32 	%f845, %f842, 0f00000000;
	add.f32 	%f846, %f843, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs123, %f846;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs122, %f845;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs121, %f844;}

	// inline asm
	st.v4.u16 	[%rd200], {%rs121, %rs122, %rs123, %rs117};
	bra.uni 	BB0_110;

BB0_109:
	mov.u64 	%rd213, image_RNM1;
	cvta.global.u64 	%rd208, %rd213;
	mov.u32 	%r184, 8;
	// inline asm
	call (%rd207), _rt_buffer_get_64, (%rd208, %r26, %r184, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	mov.f32 	%f847, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs128, %f847;}

	// inline asm
	st.v4.u16 	[%rd207], {%rs128, %rs128, %rs128, %rs117};

BB0_110:
	ld.global.u32 	%r185, [additive];
	setp.eq.s32	%p129, %r185, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs129, %f832;}

	// inline asm
	@%p129 bra 	BB0_112;

	mov.u64 	%rd226, image_RNM2;
	cvta.global.u64 	%rd215, %rd226;
	mov.u32 	%r189, 8;
	// inline asm
	call (%rd214), _rt_buffer_get_64, (%rd215, %r26, %r189, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs136, %rs137, %rs138, %rs139}, [%rd214];
	// inline asm
	{  cvt.f32.f16 %f849, %rs136;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f850, %rs137;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f851, %rs138;}

	// inline asm
	// inline asm
	call (%rd220), _rt_buffer_get_64, (%rd215, %r26, %r189, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	add.f32 	%f852, %f849, 0f00000000;
	add.f32 	%f853, %f850, 0f00000000;
	add.f32 	%f854, %f851, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs135, %f854;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs134, %f853;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs133, %f852;}

	// inline asm
	st.v4.u16 	[%rd220], {%rs133, %rs134, %rs135, %rs129};
	bra.uni 	BB0_113;

BB0_112:
	mov.u64 	%rd233, image_RNM2;
	cvta.global.u64 	%rd228, %rd233;
	mov.u32 	%r191, 8;
	// inline asm
	call (%rd227), _rt_buffer_get_64, (%rd228, %r26, %r191, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	mov.f32 	%f855, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs140, %f855;}

	// inline asm
	st.v4.u16 	[%rd227], {%rs140, %rs140, %rs140, %rs129};

BB0_113:
	ld.global.u32 	%r192, [additive];
	setp.eq.s32	%p130, %r192, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs141, %f832;}

	// inline asm
	@%p130 bra 	BB0_115;

	mov.u64 	%rd246, image_RNM3;
	cvta.global.u64 	%rd235, %rd246;
	mov.u32 	%r196, 8;
	// inline asm
	call (%rd234), _rt_buffer_get_64, (%rd235, %r26, %r196, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs148, %rs149, %rs150, %rs151}, [%rd234];
	// inline asm
	{  cvt.f32.f16 %f857, %rs148;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f858, %rs149;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f859, %rs150;}

	// inline asm
	// inline asm
	call (%rd240), _rt_buffer_get_64, (%rd235, %r26, %r196, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	add.f32 	%f860, %f857, 0f00000000;
	add.f32 	%f861, %f858, 0f00000000;
	add.f32 	%f862, %f859, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs147, %f862;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs146, %f861;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs145, %f860;}

	// inline asm
	st.v4.u16 	[%rd240], {%rs145, %rs146, %rs147, %rs141};
	bra.uni 	BB0_136;

BB0_115:
	mov.u64 	%rd253, image_RNM3;
	cvta.global.u64 	%rd248, %rd253;
	mov.u32 	%r198, 8;
	// inline asm
	call (%rd247), _rt_buffer_get_64, (%rd248, %r26, %r198, %rd6, %rd7, %rd15, %rd15);
	// inline asm
	mov.f32 	%f863, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs152, %f863;}

	// inline asm
	st.v4.u16 	[%rd247], {%rs152, %rs152, %rs152, %rs141};
	bra.uni 	BB0_136;

BB0_35:
	setp.geu.f32	%p61, %f971, 0f00000000;
	@%p61 bra 	BB0_38;

	cvt.rzi.f32.f32	%f522, %f494;
	setp.neu.f32	%p62, %f522, 0f3EE8BA2E;
	selp.f32	%f974, 0f7FFFFFFF, %f974, %p62;

BB0_38:
	add.f32 	%f524, %f65, 0f3EE8BA2E;
	mov.b32 	 %r85, %f524;
	setp.lt.s32	%p64, %r85, 2139095040;
	@%p64 bra 	BB0_43;

	setp.gtu.f32	%p65, %f65, 0f7F800000;
	@%p65 bra 	BB0_42;
	bra.uni 	BB0_40;

BB0_42:
	add.f32 	%f974, %f971, 0f3EE8BA2E;
	bra.uni 	BB0_43;

BB0_40:
	setp.neu.f32	%p66, %f65, 0f7F800000;
	@%p66 bra 	BB0_43;

	selp.f32	%f974, 0fFF800000, 0f7F800000, %p3;

BB0_43:
	mul.f32 	%f525, %f974, 0f437F0000;
	setp.eq.f32	%p67, %f971, 0f3F800000;
	selp.f32	%f526, 0f437F0000, %f525, %p67;
	cvt.rzi.u32.f32	%r86, %f526;
	cvt.u16.u32	%rs19, %r86;
	mov.u16 	%rs20, 255;
	st.v2.u8 	[%rd26], {%rs19, %rs20};
	ld.global.u32 	%r246, [imageEnabled];

BB0_44:
	and.b32  	%r87, %r246, 1;
	setp.eq.b32	%p68, %r87, 1;
	@!%p68 bra 	BB0_79;
	bra.uni 	BB0_45;

BB0_45:
	mov.f32 	%f931, 0fB5BFBE8E;
	mov.f32 	%f930, 0fBF317200;
	mov.f32 	%f929, 0f35BFBE8E;
	mov.f32 	%f928, 0f3F317200;
	mov.f32 	%f927, 0f3DAAAABD;
	mov.f32 	%f926, 0f3C4CAF63;
	mov.f32 	%f925, 0f3B18F0FE;
	mov.f32 	%f529, 0f3E666666;
	cvt.rzi.f32.f32	%f530, %f529;
	fma.rn.f32 	%f531, %f530, 0fC0000000, 0f3EE66666;
	abs.f32 	%f77, %f531;
	abs.f32 	%f78, %f61;
	setp.lt.f32	%p69, %f78, 0f00800000;
	mul.f32 	%f532, %f78, 0f4B800000;
	selp.f32	%f533, 0fC3170000, 0fC2FE0000, %p69;
	selp.f32	%f534, %f532, %f78, %p69;
	mov.b32 	 %r88, %f534;
	and.b32  	%r89, %r88, 8388607;
	or.b32  	%r90, %r89, 1065353216;
	mov.b32 	 %f535, %r90;
	shr.u32 	%r91, %r88, 23;
	cvt.rn.f32.u32	%f536, %r91;
	add.f32 	%f537, %f533, %f536;
	setp.gt.f32	%p70, %f535, 0f3FB504F3;
	mul.f32 	%f538, %f535, 0f3F000000;
	add.f32 	%f539, %f537, 0f3F800000;
	selp.f32	%f540, %f538, %f535, %p70;
	selp.f32	%f541, %f539, %f537, %p70;
	add.f32 	%f542, %f540, 0fBF800000;
	add.f32 	%f528, %f540, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f527,%f528;
	// inline asm
	add.f32 	%f543, %f542, %f542;
	mul.f32 	%f544, %f527, %f543;
	mul.f32 	%f545, %f544, %f544;
	fma.rn.f32 	%f548, %f925, %f545, %f926;
	fma.rn.f32 	%f550, %f548, %f545, %f927;
	mul.rn.f32 	%f551, %f550, %f545;
	mul.rn.f32 	%f552, %f551, %f544;
	sub.f32 	%f553, %f542, %f544;
	neg.f32 	%f554, %f544;
	add.f32 	%f555, %f553, %f553;
	fma.rn.f32 	%f556, %f554, %f542, %f555;
	mul.rn.f32 	%f557, %f527, %f556;
	add.f32 	%f558, %f552, %f544;
	sub.f32 	%f559, %f544, %f558;
	add.f32 	%f560, %f552, %f559;
	add.f32 	%f561, %f557, %f560;
	add.f32 	%f562, %f558, %f561;
	sub.f32 	%f563, %f558, %f562;
	add.f32 	%f564, %f561, %f563;
	mul.rn.f32 	%f566, %f541, %f928;
	mul.rn.f32 	%f568, %f541, %f929;
	add.f32 	%f569, %f566, %f562;
	sub.f32 	%f570, %f566, %f569;
	add.f32 	%f571, %f562, %f570;
	add.f32 	%f572, %f564, %f571;
	add.f32 	%f573, %f568, %f572;
	add.f32 	%f574, %f569, %f573;
	sub.f32 	%f575, %f569, %f574;
	add.f32 	%f576, %f573, %f575;
	mov.f32 	%f577, 0f3EE66666;
	mul.rn.f32 	%f578, %f577, %f574;
	neg.f32 	%f579, %f578;
	fma.rn.f32 	%f580, %f577, %f574, %f579;
	fma.rn.f32 	%f581, %f577, %f576, %f580;
	mov.f32 	%f582, 0f00000000;
	fma.rn.f32 	%f583, %f582, %f574, %f581;
	add.rn.f32 	%f584, %f578, %f583;
	neg.f32 	%f585, %f584;
	add.rn.f32 	%f586, %f578, %f585;
	add.rn.f32 	%f587, %f586, %f583;
	mov.b32 	 %r92, %f584;
	setp.eq.s32	%p71, %r92, 1118925336;
	add.s32 	%r93, %r92, -1;
	mov.b32 	 %f588, %r93;
	add.f32 	%f589, %f587, 0f37000000;
	selp.f32	%f590, %f588, %f584, %p71;
	selp.f32	%f79, %f589, %f587, %p71;
	mul.f32 	%f591, %f590, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f592, %f591;
	fma.rn.f32 	%f594, %f592, %f930, %f590;
	fma.rn.f32 	%f596, %f592, %f931, %f594;
	mul.f32 	%f597, %f596, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f598, %f597;
	add.f32 	%f599, %f592, 0f00000000;
	ex2.approx.f32 	%f600, %f599;
	mul.f32 	%f601, %f598, %f600;
	setp.lt.f32	%p72, %f590, 0fC2D20000;
	selp.f32	%f602, 0f00000000, %f601, %p72;
	setp.gt.f32	%p73, %f590, 0f42D20000;
	selp.f32	%f975, 0f7F800000, %f602, %p73;
	setp.eq.f32	%p74, %f975, 0f7F800000;
	@%p74 bra 	BB0_47;

	fma.rn.f32 	%f975, %f975, %f79, %f975;

BB0_47:
	setp.lt.f32	%p75, %f61, 0f00000000;
	setp.eq.f32	%p76, %f77, 0f3F800000;
	and.pred  	%p4, %p75, %p76;
	mov.b32 	 %r94, %f975;
	xor.b32  	%r95, %r94, -2147483648;
	mov.b32 	 %f603, %r95;
	selp.f32	%f977, %f603, %f975, %p4;
	setp.eq.f32	%p77, %f61, 0f00000000;
	@%p77 bra 	BB0_50;
	bra.uni 	BB0_48;

BB0_50:
	add.f32 	%f606, %f61, %f61;
	selp.f32	%f977, %f606, 0f00000000, %p76;
	bra.uni 	BB0_51;

BB0_48:
	setp.geu.f32	%p78, %f61, 0f00000000;
	@%p78 bra 	BB0_51;

	cvt.rzi.f32.f32	%f605, %f577;
	setp.neu.f32	%p79, %f605, 0f3EE66666;
	selp.f32	%f977, 0f7FFFFFFF, %f977, %p79;

BB0_51:
	add.f32 	%f607, %f78, 0f3EE66666;
	mov.b32 	 %r96, %f607;
	setp.lt.s32	%p81, %r96, 2139095040;
	@%p81 bra 	BB0_56;

	setp.gtu.f32	%p82, %f78, 0f7F800000;
	@%p82 bra 	BB0_55;
	bra.uni 	BB0_53;

BB0_55:
	add.f32 	%f977, %f61, 0f3EE66666;
	bra.uni 	BB0_56;

BB0_53:
	setp.neu.f32	%p83, %f78, 0f7F800000;
	@%p83 bra 	BB0_56;

	selp.f32	%f977, 0fFF800000, 0f7F800000, %p4;

BB0_56:
	mov.f32 	%f938, 0fB5BFBE8E;
	mov.f32 	%f937, 0fBF317200;
	mov.f32 	%f936, 0f35BFBE8E;
	mov.f32 	%f935, 0f3F317200;
	mov.f32 	%f934, 0f3DAAAABD;
	mov.f32 	%f933, 0f3C4CAF63;
	mov.f32 	%f932, 0f3B18F0FE;
	setp.eq.f32	%p84, %f61, 0f3F800000;
	selp.f32	%f90, 0f3F800000, %f977, %p84;
	abs.f32 	%f91, %f62;
	setp.lt.f32	%p85, %f91, 0f00800000;
	mul.f32 	%f610, %f91, 0f4B800000;
	selp.f32	%f611, 0fC3170000, 0fC2FE0000, %p85;
	selp.f32	%f612, %f610, %f91, %p85;
	mov.b32 	 %r97, %f612;
	and.b32  	%r98, %r97, 8388607;
	or.b32  	%r99, %r98, 1065353216;
	mov.b32 	 %f613, %r99;
	shr.u32 	%r100, %r97, 23;
	cvt.rn.f32.u32	%f614, %r100;
	add.f32 	%f615, %f611, %f614;
	setp.gt.f32	%p86, %f613, 0f3FB504F3;
	mul.f32 	%f616, %f613, 0f3F000000;
	add.f32 	%f617, %f615, 0f3F800000;
	selp.f32	%f618, %f616, %f613, %p86;
	selp.f32	%f619, %f617, %f615, %p86;
	add.f32 	%f620, %f618, 0fBF800000;
	add.f32 	%f609, %f618, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f608,%f609;
	// inline asm
	add.f32 	%f621, %f620, %f620;
	mul.f32 	%f622, %f608, %f621;
	mul.f32 	%f623, %f622, %f622;
	fma.rn.f32 	%f626, %f932, %f623, %f933;
	fma.rn.f32 	%f628, %f626, %f623, %f934;
	mul.rn.f32 	%f629, %f628, %f623;
	mul.rn.f32 	%f630, %f629, %f622;
	sub.f32 	%f631, %f620, %f622;
	neg.f32 	%f632, %f622;
	add.f32 	%f633, %f631, %f631;
	fma.rn.f32 	%f634, %f632, %f620, %f633;
	mul.rn.f32 	%f635, %f608, %f634;
	add.f32 	%f636, %f630, %f622;
	sub.f32 	%f637, %f622, %f636;
	add.f32 	%f638, %f630, %f637;
	add.f32 	%f639, %f635, %f638;
	add.f32 	%f640, %f636, %f639;
	sub.f32 	%f641, %f636, %f640;
	add.f32 	%f642, %f639, %f641;
	mul.rn.f32 	%f644, %f619, %f935;
	mul.rn.f32 	%f646, %f619, %f936;
	add.f32 	%f647, %f644, %f640;
	sub.f32 	%f648, %f644, %f647;
	add.f32 	%f649, %f640, %f648;
	add.f32 	%f650, %f642, %f649;
	add.f32 	%f651, %f646, %f650;
	add.f32 	%f652, %f647, %f651;
	sub.f32 	%f653, %f647, %f652;
	add.f32 	%f654, %f651, %f653;
	mul.rn.f32 	%f656, %f577, %f652;
	neg.f32 	%f657, %f656;
	fma.rn.f32 	%f658, %f577, %f652, %f657;
	fma.rn.f32 	%f659, %f577, %f654, %f658;
	fma.rn.f32 	%f661, %f582, %f652, %f659;
	add.rn.f32 	%f662, %f656, %f661;
	neg.f32 	%f663, %f662;
	add.rn.f32 	%f664, %f656, %f663;
	add.rn.f32 	%f665, %f664, %f661;
	mov.b32 	 %r101, %f662;
	setp.eq.s32	%p87, %r101, 1118925336;
	add.s32 	%r102, %r101, -1;
	mov.b32 	 %f666, %r102;
	add.f32 	%f667, %f665, 0f37000000;
	selp.f32	%f668, %f666, %f662, %p87;
	selp.f32	%f92, %f667, %f665, %p87;
	mul.f32 	%f669, %f668, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f670, %f669;
	fma.rn.f32 	%f672, %f670, %f937, %f668;
	fma.rn.f32 	%f674, %f670, %f938, %f672;
	mul.f32 	%f675, %f674, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f676, %f675;
	add.f32 	%f677, %f670, 0f00000000;
	ex2.approx.f32 	%f678, %f677;
	mul.f32 	%f679, %f676, %f678;
	setp.lt.f32	%p88, %f668, 0fC2D20000;
	selp.f32	%f680, 0f00000000, %f679, %p88;
	setp.gt.f32	%p89, %f668, 0f42D20000;
	selp.f32	%f978, 0f7F800000, %f680, %p89;
	setp.eq.f32	%p90, %f978, 0f7F800000;
	@%p90 bra 	BB0_58;

	fma.rn.f32 	%f978, %f978, %f92, %f978;

BB0_58:
	setp.lt.f32	%p91, %f62, 0f00000000;
	and.pred  	%p5, %p91, %p76;
	mov.b32 	 %r103, %f978;
	xor.b32  	%r104, %r103, -2147483648;
	mov.b32 	 %f681, %r104;
	selp.f32	%f980, %f681, %f978, %p5;
	setp.eq.f32	%p93, %f62, 0f00000000;
	@%p93 bra 	BB0_61;
	bra.uni 	BB0_59;

BB0_61:
	add.f32 	%f684, %f62, %f62;
	selp.f32	%f980, %f684, 0f00000000, %p76;
	bra.uni 	BB0_62;

BB0_59:
	setp.geu.f32	%p94, %f62, 0f00000000;
	@%p94 bra 	BB0_62;

	cvt.rzi.f32.f32	%f683, %f577;
	setp.neu.f32	%p95, %f683, 0f3EE66666;
	selp.f32	%f980, 0f7FFFFFFF, %f980, %p95;

BB0_62:
	add.f32 	%f685, %f91, 0f3EE66666;
	mov.b32 	 %r105, %f685;
	setp.lt.s32	%p97, %r105, 2139095040;
	@%p97 bra 	BB0_67;

	setp.gtu.f32	%p98, %f91, 0f7F800000;
	@%p98 bra 	BB0_66;
	bra.uni 	BB0_64;

BB0_66:
	add.f32 	%f980, %f62, 0f3EE66666;
	bra.uni 	BB0_67;

BB0_64:
	setp.neu.f32	%p99, %f91, 0f7F800000;
	@%p99 bra 	BB0_67;

	selp.f32	%f980, 0fFF800000, 0f7F800000, %p5;

BB0_67:
	mov.f32 	%f945, 0fB5BFBE8E;
	mov.f32 	%f944, 0fBF317200;
	mov.f32 	%f943, 0f35BFBE8E;
	mov.f32 	%f942, 0f3F317200;
	mov.f32 	%f941, 0f3DAAAABD;
	mov.f32 	%f940, 0f3C4CAF63;
	mov.f32 	%f939, 0f3B18F0FE;
	setp.eq.f32	%p100, %f62, 0f3F800000;
	selp.f32	%f103, 0f3F800000, %f980, %p100;
	abs.f32 	%f104, %f63;
	setp.lt.f32	%p101, %f104, 0f00800000;
	mul.f32 	%f688, %f104, 0f4B800000;
	selp.f32	%f689, 0fC3170000, 0fC2FE0000, %p101;
	selp.f32	%f690, %f688, %f104, %p101;
	mov.b32 	 %r106, %f690;
	and.b32  	%r107, %r106, 8388607;
	or.b32  	%r108, %r107, 1065353216;
	mov.b32 	 %f691, %r108;
	shr.u32 	%r109, %r106, 23;
	cvt.rn.f32.u32	%f692, %r109;
	add.f32 	%f693, %f689, %f692;
	setp.gt.f32	%p102, %f691, 0f3FB504F3;
	mul.f32 	%f694, %f691, 0f3F000000;
	add.f32 	%f695, %f693, 0f3F800000;
	selp.f32	%f696, %f694, %f691, %p102;
	selp.f32	%f697, %f695, %f693, %p102;
	add.f32 	%f698, %f696, 0fBF800000;
	add.f32 	%f687, %f696, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f686,%f687;
	// inline asm
	add.f32 	%f699, %f698, %f698;
	mul.f32 	%f700, %f686, %f699;
	mul.f32 	%f701, %f700, %f700;
	fma.rn.f32 	%f704, %f939, %f701, %f940;
	fma.rn.f32 	%f706, %f704, %f701, %f941;
	mul.rn.f32 	%f707, %f706, %f701;
	mul.rn.f32 	%f708, %f707, %f700;
	sub.f32 	%f709, %f698, %f700;
	neg.f32 	%f710, %f700;
	add.f32 	%f711, %f709, %f709;
	fma.rn.f32 	%f712, %f710, %f698, %f711;
	mul.rn.f32 	%f713, %f686, %f712;
	add.f32 	%f714, %f708, %f700;
	sub.f32 	%f715, %f700, %f714;
	add.f32 	%f716, %f708, %f715;
	add.f32 	%f717, %f713, %f716;
	add.f32 	%f718, %f714, %f717;
	sub.f32 	%f719, %f714, %f718;
	add.f32 	%f720, %f717, %f719;
	mul.rn.f32 	%f722, %f697, %f942;
	mul.rn.f32 	%f724, %f697, %f943;
	add.f32 	%f725, %f722, %f718;
	sub.f32 	%f726, %f722, %f725;
	add.f32 	%f727, %f718, %f726;
	add.f32 	%f728, %f720, %f727;
	add.f32 	%f729, %f724, %f728;
	add.f32 	%f730, %f725, %f729;
	sub.f32 	%f731, %f725, %f730;
	add.f32 	%f732, %f729, %f731;
	mul.rn.f32 	%f734, %f577, %f730;
	neg.f32 	%f735, %f734;
	fma.rn.f32 	%f736, %f577, %f730, %f735;
	fma.rn.f32 	%f737, %f577, %f732, %f736;
	fma.rn.f32 	%f739, %f582, %f730, %f737;
	add.rn.f32 	%f740, %f734, %f739;
	neg.f32 	%f741, %f740;
	add.rn.f32 	%f742, %f734, %f741;
	add.rn.f32 	%f743, %f742, %f739;
	mov.b32 	 %r110, %f740;
	setp.eq.s32	%p103, %r110, 1118925336;
	add.s32 	%r111, %r110, -1;
	mov.b32 	 %f744, %r111;
	add.f32 	%f745, %f743, 0f37000000;
	selp.f32	%f746, %f744, %f740, %p103;
	selp.f32	%f105, %f745, %f743, %p103;
	mul.f32 	%f747, %f746, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f748, %f747;
	fma.rn.f32 	%f750, %f748, %f944, %f746;
	fma.rn.f32 	%f752, %f748, %f945, %f750;
	mul.f32 	%f753, %f752, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f754, %f753;
	add.f32 	%f755, %f748, 0f00000000;
	ex2.approx.f32 	%f756, %f755;
	mul.f32 	%f757, %f754, %f756;
	setp.lt.f32	%p104, %f746, 0fC2D20000;
	selp.f32	%f758, 0f00000000, %f757, %p104;
	setp.gt.f32	%p105, %f746, 0f42D20000;
	selp.f32	%f981, 0f7F800000, %f758, %p105;
	setp.eq.f32	%p106, %f981, 0f7F800000;
	@%p106 bra 	BB0_69;

	fma.rn.f32 	%f981, %f981, %f105, %f981;

BB0_69:
	setp.lt.f32	%p107, %f63, 0f00000000;
	and.pred  	%p6, %p107, %p76;
	mov.b32 	 %r112, %f981;
	xor.b32  	%r113, %r112, -2147483648;
	mov.b32 	 %f759, %r113;
	selp.f32	%f983, %f759, %f981, %p6;
	setp.eq.f32	%p109, %f63, 0f00000000;
	@%p109 bra 	BB0_72;
	bra.uni 	BB0_70;

BB0_72:
	add.f32 	%f762, %f63, %f63;
	selp.f32	%f983, %f762, 0f00000000, %p76;
	bra.uni 	BB0_73;

BB0_70:
	setp.geu.f32	%p110, %f63, 0f00000000;
	@%p110 bra 	BB0_73;

	cvt.rzi.f32.f32	%f761, %f577;
	setp.neu.f32	%p111, %f761, 0f3EE66666;
	selp.f32	%f983, 0f7FFFFFFF, %f983, %p111;

BB0_73:
	add.f32 	%f763, %f104, 0f3EE66666;
	mov.b32 	 %r114, %f763;
	setp.lt.s32	%p113, %r114, 2139095040;
	@%p113 bra 	BB0_78;

	setp.gtu.f32	%p114, %f104, 0f7F800000;
	@%p114 bra 	BB0_77;
	bra.uni 	BB0_75;

BB0_77:
	add.f32 	%f983, %f63, 0f3EE66666;
	bra.uni 	BB0_78;

BB0_75:
	setp.neu.f32	%p115, %f104, 0f7F800000;
	@%p115 bra 	BB0_78;

	selp.f32	%f983, 0fFF800000, 0f7F800000, %p6;

BB0_78:
	setp.eq.f32	%p116, %f63, 0f3F800000;
	selp.f32	%f764, 0f3F800000, %f983, %p116;
	cvt.u64.u32	%rd36, %r3;
	cvt.u64.u32	%rd35, %r2;
	mov.u64 	%rd39, image;
	cvta.global.u64 	%rd34, %rd39;
	// inline asm
	call (%rd33), _rt_buffer_get_64, (%rd34, %r26, %r27, %rd35, %rd36, %rd15, %rd15);
	// inline asm
	cvt.sat.f32.f32	%f765, %f764;
	mul.f32 	%f766, %f765, 0f437FFD71;
	cvt.rzi.u32.f32	%r117, %f766;
	cvt.sat.f32.f32	%f767, %f103;
	mul.f32 	%f768, %f767, 0f437FFD71;
	cvt.rzi.u32.f32	%r118, %f768;
	cvt.sat.f32.f32	%f769, %f90;
	mul.f32 	%f770, %f769, 0f437FFD71;
	cvt.rzi.u32.f32	%r119, %f770;
	cvt.u16.u32	%rs21, %r117;
	cvt.u16.u32	%rs22, %r119;
	cvt.u16.u32	%rs23, %r118;
	mov.u16 	%rs24, 255;
	st.v4.u8 	[%rd33], {%rs21, %rs23, %rs22, %rs24};
	ld.global.u32 	%r246, [imageEnabled];

BB0_79:
	cvt.u64.u32	%rd4, %r2;
	cvt.u64.u32	%rd5, %r3;
	and.b32  	%r120, %r246, 4;
	setp.eq.s32	%p117, %r120, 0;
	@%p117 bra 	BB0_83;

	ld.global.u32 	%r121, [additive];
	setp.eq.s32	%p118, %r121, 0;
	mov.f32 	%f771, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f771;}

	// inline asm
	@%p118 bra 	BB0_82;

	mov.u64 	%rd52, image_HDR;
	cvta.global.u64 	%rd41, %rd52;
	mov.u32 	%r125, 8;
	// inline asm
	call (%rd40), _rt_buffer_get_64, (%rd41, %r26, %r125, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs32, %rs33, %rs34, %rs35}, [%rd40];
	// inline asm
	{  cvt.f32.f16 %f772, %rs32;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f773, %rs33;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f774, %rs34;}

	// inline asm
	// inline asm
	call (%rd46), _rt_buffer_get_64, (%rd41, %r26, %r125, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	add.f32 	%f775, %f61, %f772;
	add.f32 	%f776, %f62, %f773;
	add.f32 	%f777, %f63, %f774;
	// inline asm
	{  cvt.rn.f16.f32 %rs31, %f777;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs30, %f776;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f775;}

	// inline asm
	st.v4.u16 	[%rd46], {%rs29, %rs30, %rs31, %rs25};
	bra.uni 	BB0_83;

BB0_82:
	mov.u64 	%rd59, image_HDR;
	cvta.global.u64 	%rd54, %rd59;
	mov.u32 	%r127, 8;
	// inline asm
	call (%rd53), _rt_buffer_get_64, (%rd54, %r26, %r127, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs38, %f63;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs37, %f62;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f61;}

	// inline asm
	st.v4.u16 	[%rd53], {%rs36, %rs37, %rs38, %rs25};

BB0_83:
	mul.f32 	%f782, %f48, 0f3E800000;
	mul.f32 	%f783, %f782, %f971;
	mul.f32 	%f784, %f47, %f783;
	ld.global.f32 	%f785, [lightColor];
	mul.f32 	%f116, %f784, %f785;
	ld.global.f32 	%f786, [lightColor+4];
	mul.f32 	%f117, %f784, %f786;
	ld.global.f32 	%f787, [lightColor+8];
	mul.f32 	%f118, %f784, %f787;
	ld.global.u32 	%r128, [additive];
	setp.eq.s32	%p119, %r128, 0;
	mov.f32 	%f781, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs39, %f781;}

	// inline asm
	@%p119 bra 	BB0_85;

	mov.u64 	%rd72, image_RNM0;
	cvta.global.u64 	%rd61, %rd72;
	mov.u32 	%r132, 8;
	// inline asm
	call (%rd60), _rt_buffer_get_64, (%rd61, %r26, %r132, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs46, %rs47, %rs48, %rs49}, [%rd60];
	// inline asm
	{  cvt.f32.f16 %f788, %rs46;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f789, %rs47;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f790, %rs48;}

	// inline asm
	// inline asm
	call (%rd66), _rt_buffer_get_64, (%rd61, %r26, %r132, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	add.f32 	%f791, %f116, %f788;
	add.f32 	%f792, %f117, %f789;
	add.f32 	%f793, %f118, %f790;
	// inline asm
	{  cvt.rn.f16.f32 %rs45, %f793;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs44, %f792;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs43, %f791;}

	// inline asm
	st.v4.u16 	[%rd66], {%rs43, %rs44, %rs45, %rs39};
	bra.uni 	BB0_86;

BB0_85:
	mov.u64 	%rd79, image_RNM0;
	cvta.global.u64 	%rd74, %rd79;
	mov.u32 	%r134, 8;
	// inline asm
	call (%rd73), _rt_buffer_get_64, (%rd74, %r26, %r134, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs52, %f118;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f117;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f116;}

	// inline asm
	st.v4.u16 	[%rd73], {%rs50, %rs51, %rs52, %rs39};

BB0_86:
	fma.rn.f32 	%f119, %f13, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f120, %f14, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f121, %f15, 0f3F000000, 0f3F000000;
	ld.global.u32 	%r135, [additive];
	setp.eq.s32	%p120, %r135, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs53, %f781;}

	// inline asm
	@%p120 bra 	BB0_88;

	mov.u64 	%rd92, image_RNM1;
	cvta.global.u64 	%rd81, %rd92;
	mov.u32 	%r139, 8;
	// inline asm
	call (%rd80), _rt_buffer_get_64, (%rd81, %r26, %r139, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs60, %rs61, %rs62, %rs63}, [%rd80];
	// inline asm
	{  cvt.f32.f16 %f798, %rs60;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f799, %rs61;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f800, %rs62;}

	// inline asm
	// inline asm
	call (%rd86), _rt_buffer_get_64, (%rd81, %r26, %r139, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	add.f32 	%f801, %f119, %f798;
	add.f32 	%f802, %f119, %f799;
	add.f32 	%f803, %f119, %f800;
	// inline asm
	{  cvt.rn.f16.f32 %rs59, %f803;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs58, %f802;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f801;}

	// inline asm
	st.v4.u16 	[%rd86], {%rs57, %rs58, %rs59, %rs53};
	bra.uni 	BB0_89;

BB0_88:
	mov.u64 	%rd99, image_RNM1;
	cvta.global.u64 	%rd94, %rd99;
	mov.u32 	%r141, 8;
	// inline asm
	call (%rd93), _rt_buffer_get_64, (%rd94, %r26, %r141, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f119;}

	// inline asm
	st.v4.u16 	[%rd93], {%rs64, %rs64, %rs64, %rs53};

BB0_89:
	ld.global.u32 	%r142, [additive];
	setp.eq.s32	%p121, %r142, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f781;}

	// inline asm
	@%p121 bra 	BB0_91;

	mov.u64 	%rd112, image_RNM2;
	cvta.global.u64 	%rd101, %rd112;
	mov.u32 	%r146, 8;
	// inline asm
	call (%rd100), _rt_buffer_get_64, (%rd101, %r26, %r146, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs72, %rs73, %rs74, %rs75}, [%rd100];
	// inline asm
	{  cvt.f32.f16 %f806, %rs72;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f807, %rs73;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f808, %rs74;}

	// inline asm
	// inline asm
	call (%rd106), _rt_buffer_get_64, (%rd101, %r26, %r146, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	add.f32 	%f809, %f120, %f806;
	add.f32 	%f810, %f120, %f807;
	add.f32 	%f811, %f120, %f808;
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f811;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs70, %f810;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs69, %f809;}

	// inline asm
	st.v4.u16 	[%rd106], {%rs69, %rs70, %rs71, %rs65};
	bra.uni 	BB0_92;

BB0_91:
	mov.u64 	%rd119, image_RNM2;
	cvta.global.u64 	%rd114, %rd119;
	mov.u32 	%r148, 8;
	// inline asm
	call (%rd113), _rt_buffer_get_64, (%rd114, %r26, %r148, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs76, %f120;}

	// inline asm
	st.v4.u16 	[%rd113], {%rs76, %rs76, %rs76, %rs65};

BB0_92:
	ld.global.u32 	%r149, [additive];
	setp.eq.s32	%p122, %r149, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs77, %f781;}

	// inline asm
	@%p122 bra 	BB0_94;

	mov.u64 	%rd132, image_RNM3;
	cvta.global.u64 	%rd121, %rd132;
	mov.u32 	%r153, 8;
	// inline asm
	call (%rd120), _rt_buffer_get_64, (%rd121, %r26, %r153, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	ld.v4.u16 	{%rs84, %rs85, %rs86, %rs87}, [%rd120];
	// inline asm
	{  cvt.f32.f16 %f814, %rs84;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f815, %rs85;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f816, %rs86;}

	// inline asm
	// inline asm
	call (%rd126), _rt_buffer_get_64, (%rd121, %r26, %r153, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	add.f32 	%f817, %f121, %f814;
	add.f32 	%f818, %f121, %f815;
	add.f32 	%f819, %f121, %f816;
	// inline asm
	{  cvt.rn.f16.f32 %rs83, %f819;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs82, %f818;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs81, %f817;}

	// inline asm
	st.v4.u16 	[%rd126], {%rs81, %rs82, %rs83, %rs77};
	bra.uni 	BB0_136;

BB0_94:
	mov.u64 	%rd139, image_RNM3;
	cvta.global.u64 	%rd134, %rd139;
	mov.u32 	%r155, 8;
	// inline asm
	call (%rd133), _rt_buffer_get_64, (%rd134, %r26, %r155, %rd4, %rd5, %rd15, %rd15);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs88, %f121;}

	// inline asm
	st.v4.u16 	[%rd133], {%rs88, %rs88, %rs88, %rs77};

BB0_136:
	ret;
}