//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image2[1];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];

.visible .entry _Z6oxMainv(

)
{
	.reg .b16 	%rs<13>;
	.reg .f32 	%f<16>;
	.reg .b32 	%r<55>;
	.reg .b64 	%rd<57>;


	ld.global.v2.u32 	{%r19, %r20}, [pixelID];
	cvt.u64.u32	%rd3, %r19;
	cvt.u64.u32	%rd4, %r20;
	mov.u64 	%rd55, image;
	cvta.global.u64 	%rd2, %rd55;
	mov.u32 	%r17, 2;
	mov.u32 	%r18, 8;
	mov.u64 	%rd54, 0;
	// inline asm
	call (%rd1), _rt_buffer_get_64, (%rd2, %r17, %r18, %rd3, %rd4, %rd54, %rd54);
	// inline asm
	ld.u16 	%rs1, [%rd1+6];
	// inline asm
	{  cvt.f32.f16 %f1, %rs1;}

	// inline asm
	ld.global.v2.u32 	{%r23, %r24}, [pixelID];
	cvt.u64.u32	%rd9, %r23;
	cvt.u64.u32	%rd10, %r24;
	// inline asm
	call (%rd7), _rt_buffer_get_64, (%rd2, %r17, %r18, %rd9, %rd10, %rd54, %rd54);
	// inline asm
	ld.u16 	%rs2, [%rd7];
	// inline asm
	{  cvt.f32.f16 %f2, %rs2;}

	// inline asm
	ld.global.v2.u32 	{%r27, %r28}, [pixelID];
	cvt.u64.u32	%rd15, %r27;
	cvt.u64.u32	%rd16, %r28;
	// inline asm
	call (%rd13), _rt_buffer_get_64, (%rd2, %r17, %r18, %rd15, %rd16, %rd54, %rd54);
	// inline asm
	ld.u16 	%rs3, [%rd13+2];
	// inline asm
	{  cvt.f32.f16 %f3, %rs3;}

	// inline asm
	ld.global.v2.u32 	{%r31, %r32}, [pixelID];
	cvt.u64.u32	%rd21, %r31;
	cvt.u64.u32	%rd22, %r32;
	// inline asm
	call (%rd19), _rt_buffer_get_64, (%rd2, %r17, %r18, %rd21, %rd22, %rd54, %rd54);
	// inline asm
	ld.u16 	%rs4, [%rd19+4];
	// inline asm
	{  cvt.f32.f16 %f4, %rs4;}

	// inline asm
	ld.global.v2.u32 	{%r35, %r36}, [pixelID];
	cvt.u64.u32	%rd27, %r35;
	cvt.u64.u32	%rd28, %r36;
	mov.u64 	%rd56, image2;
	cvta.global.u64 	%rd26, %rd56;
	// inline asm
	call (%rd25), _rt_buffer_get_64, (%rd26, %r17, %r18, %rd27, %rd28, %rd54, %rd54);
	// inline asm
	ld.u16 	%rs5, [%rd25+6];
	// inline asm
	{  cvt.f32.f16 %f5, %rs5;}

	// inline asm
	ld.global.v2.u32 	{%r39, %r40}, [pixelID];
	cvt.u64.u32	%rd33, %r39;
	cvt.u64.u32	%rd34, %r40;
	// inline asm
	call (%rd31), _rt_buffer_get_64, (%rd26, %r17, %r18, %rd33, %rd34, %rd54, %rd54);
	// inline asm
	ld.u16 	%rs6, [%rd31];
	// inline asm
	{  cvt.f32.f16 %f6, %rs6;}

	// inline asm
	ld.global.v2.u32 	{%r43, %r44}, [pixelID];
	cvt.u64.u32	%rd39, %r43;
	cvt.u64.u32	%rd40, %r44;
	// inline asm
	call (%rd37), _rt_buffer_get_64, (%rd26, %r17, %r18, %rd39, %rd40, %rd54, %rd54);
	// inline asm
	ld.u16 	%rs7, [%rd37+2];
	// inline asm
	{  cvt.f32.f16 %f7, %rs7;}

	// inline asm
	ld.global.v2.u32 	{%r47, %r48}, [pixelID];
	cvt.u64.u32	%rd45, %r47;
	cvt.u64.u32	%rd46, %r48;
	// inline asm
	call (%rd43), _rt_buffer_get_64, (%rd26, %r17, %r18, %rd45, %rd46, %rd54, %rd54);
	// inline asm
	ld.u16 	%rs8, [%rd43+4];
	// inline asm
	{  cvt.f32.f16 %f8, %rs8;}

	// inline asm
	add.f32 	%f13, %f2, %f6;
	add.f32 	%f14, %f3, %f7;
	add.f32 	%f15, %f4, %f8;
	mul.f32 	%f9, %f1, %f13;
	mul.f32 	%f10, %f1, %f14;
	mul.f32 	%f11, %f1, %f15;
	min.f32 	%f12, %f1, %f5;
	ld.global.v2.u32 	{%r51, %r52}, [pixelID];
	cvt.u64.u32	%rd51, %r51;
	cvt.u64.u32	%rd52, %r52;
	// inline asm
	call (%rd49), _rt_buffer_get_64, (%rd26, %r17, %r18, %rd51, %rd52, %rd54, %rd54);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs12, %f12;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs11, %f11;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs10, %f10;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs9, %f9;}

	// inline asm
	st.v4.u16 	[%rd49], {%rs9, %rs10, %rs11, %rs12};
	ret;
}