//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 4 .u32 ignoreNormal;
.global .align 1 .b8 localLights[1];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[4];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<137>;
	.reg .b16 	%rs<162>;
	.reg .f32 	%f<1434>;
	.reg .b32 	%r<254>;
	.reg .b64 	%rd<272>;


	mov.u64 	%rd271, __local_depot0;
	cvta.local.u64 	%SP, %rd271;
	ld.global.v2.u32 	{%r30, %r31}, [pixelID];
	cvt.u64.u32	%rd10, %r30;
	cvt.u64.u32	%rd11, %r31;
	mov.u64 	%rd14, uvnormal;
	cvta.global.u64 	%rd9, %rd14;
	mov.u32 	%r28, 2;
	mov.u32 	%r29, 4;
	mov.u64 	%rd13, 0;
	// inline asm
	call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
	// inline asm
	ld.u32 	%r1, [%rd8];
	shr.u32 	%r34, %r1, 16;
	cvt.u16.u32	%rs1, %r34;
	and.b16  	%rs9, %rs1, 255;
	cvt.u16.u32	%rs10, %r1;
	or.b16  	%rs11, %rs10, %rs9;
	setp.eq.s16	%p8, %rs11, 0;
	mov.f32 	%f1342, 0f00000000;
	mov.f32 	%f1343, %f1342;
	mov.f32 	%f1344, %f1342;
	@%p8 bra 	BB0_2;

	ld.u8 	%rs12, [%rd8+1];
	and.b16  	%rs14, %rs10, 255;
	cvt.rn.f32.u16	%f268, %rs14;
	div.rn.f32 	%f269, %f268, 0f437F0000;
	fma.rn.f32 	%f270, %f269, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f271, %rs12;
	div.rn.f32 	%f272, %f271, 0f437F0000;
	fma.rn.f32 	%f273, %f272, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f274, %rs9;
	div.rn.f32 	%f275, %f274, 0f437F0000;
	fma.rn.f32 	%f276, %f275, 0f40000000, 0fBF800000;
	mul.f32 	%f277, %f273, %f273;
	fma.rn.f32 	%f278, %f270, %f270, %f277;
	fma.rn.f32 	%f279, %f276, %f276, %f278;
	sqrt.rn.f32 	%f280, %f279;
	rcp.rn.f32 	%f281, %f280;
	mul.f32 	%f1342, %f270, %f281;
	mul.f32 	%f1343, %f273, %f281;
	mul.f32 	%f1344, %f276, %f281;

BB0_2:
	ld.global.v2.u32 	{%r35, %r36}, [pixelID];
	ld.global.v2.u32 	{%r38, %r39}, [tileInfo];
	add.s32 	%r2, %r35, %r38;
	add.s32 	%r3, %r36, %r39;
	setp.eq.f32	%p9, %f1343, 0f00000000;
	setp.eq.f32	%p10, %f1342, 0f00000000;
	and.pred  	%p11, %p10, %p9;
	setp.eq.f32	%p12, %f1344, 0f00000000;
	and.pred  	%p13, %p11, %p12;
	@%p13 bra 	BB0_108;
	bra.uni 	BB0_3;

BB0_108:
	ld.global.u32 	%r253, [imageEnabled];
	and.b32  	%r202, %r253, 1;
	setp.eq.b32	%p128, %r202, 1;
	@!%p128 bra 	BB0_110;
	bra.uni 	BB0_109;

BB0_109:
	cvt.u64.u32	%rd159, %r2;
	cvt.u64.u32	%rd160, %r3;
	mov.u64 	%rd163, image;
	cvta.global.u64 	%rd158, %rd163;
	// inline asm
	call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13);
	// inline asm
	mov.u16 	%rs93, 0;
	st.v4.u8 	[%rd157], {%rs93, %rs93, %rs93, %rs93};
	ld.global.u32 	%r253, [imageEnabled];

BB0_110:
	and.b32  	%r205, %r253, 8;
	setp.eq.s32	%p129, %r205, 0;
	@%p129 bra 	BB0_112;

	cvt.u64.u32	%rd167, %r3;
	cvt.u64.u32	%rd166, %r2;
	mov.u64 	%rd170, image_Mask;
	cvta.global.u64 	%rd165, %rd170;
	// inline asm
	call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1306, 0f00000000;
	cvt.rzi.u32.f32	%r208, %f1306;
	cvt.u16.u32	%rs94, %r208;
	mov.u16 	%rs95, 0;
	st.v2.u8 	[%rd164], {%rs94, %rs95};
	ld.global.u32 	%r253, [imageEnabled];

BB0_112:
	cvt.u64.u32	%rd6, %r2;
	cvt.u64.u32	%rd7, %r3;
	and.b32  	%r209, %r253, 4;
	setp.eq.s32	%p130, %r209, 0;
	@%p130 bra 	BB0_116;

	ld.global.u32 	%r210, [additive];
	setp.eq.s32	%p131, %r210, 0;
	@%p131 bra 	BB0_115;

	mov.u64 	%rd183, image_HDR;
	cvta.global.u64 	%rd172, %rd183;
	mov.u32 	%r214, 8;
	// inline asm
	call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r214, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs102, %rs103, %rs104, %rs105}, [%rd171];
	// inline asm
	{  cvt.f32.f16 %f1307, %rs102;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1308, %rs103;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1309, %rs104;}

	// inline asm
	// inline asm
	call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r214, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1310, %f1307, 0f00000000;
	add.f32 	%f1311, %f1308, 0f00000000;
	add.f32 	%f1312, %f1309, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs101, %f1312;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs100, %f1311;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs99, %f1310;}

	// inline asm
	mov.u16 	%rs106, 0;
	st.v4.u16 	[%rd177], {%rs99, %rs100, %rs101, %rs106};
	bra.uni 	BB0_116;

BB0_3:
	ld.global.v2.u32 	{%r47, %r48}, [pixelID];
	cvt.u64.u32	%rd17, %r47;
	cvt.u64.u32	%rd18, %r48;
	mov.u64 	%rd26, uvpos;
	cvta.global.u64 	%rd16, %rd26;
	mov.u32 	%r44, 12;
	// inline asm
	call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
	// inline asm
	ld.f32 	%f9, [%rd15+8];
	ld.f32 	%f8, [%rd15+4];
	ld.f32 	%f7, [%rd15];
	mul.f32 	%f298, %f7, 0f3456BF95;
	mul.f32 	%f299, %f8, 0f3456BF95;
	mul.f32 	%f300, %f9, 0f3456BF95;
	abs.f32 	%f301, %f1342;
	div.rn.f32 	%f302, %f298, %f301;
	abs.f32 	%f303, %f1343;
	div.rn.f32 	%f304, %f299, %f303;
	abs.f32 	%f305, %f1344;
	div.rn.f32 	%f306, %f300, %f305;
	abs.f32 	%f307, %f302;
	abs.f32 	%f308, %f304;
	abs.f32 	%f309, %f306;
	mov.f32 	%f310, 0f38D1B717;
	max.f32 	%f311, %f307, %f310;
	max.f32 	%f312, %f308, %f310;
	max.f32 	%f313, %f309, %f310;
	fma.rn.f32 	%f10, %f1342, %f311, %f7;
	fma.rn.f32 	%f11, %f1343, %f312, %f8;
	fma.rn.f32 	%f12, %f1344, %f313, %f9;
	ld.global.v2.u32 	{%r51, %r52}, [pixelID];
	cvt.rn.f32.u32	%f13, %r51;
	cvt.rn.f32.u32	%f14, %r52;
	mov.u64 	%rd27, localLights;
	cvta.global.u64 	%rd25, %rd27;
	mov.u32 	%r45, 1;
	mov.u32 	%r46, 96;
	// inline asm
	call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
	// inline asm
	cvt.u32.u64	%r4, %rd21;
	setp.eq.s32	%p14, %r4, 0;
	mov.f32 	%f1345, 0f00000000;
	mov.f32 	%f1346, %f1345;
	mov.f32 	%f1347, %f1345;
	mov.f32 	%f1348, %f1345;
	mov.f32 	%f1349, %f1345;
	mov.f32 	%f1350, %f1345;
	mov.f32 	%f1351, %f1345;
	mov.f32 	%f1352, %f1345;
	mov.f32 	%f1353, %f1345;
	mov.f32 	%f1354, %f1345;
	mov.f32 	%f1355, %f1345;
	mov.f32 	%f1356, %f1345;
	mov.f32 	%f1357, %f1345;
	mov.f32 	%f1358, %f1345;
	mov.f32 	%f1359, %f1345;
	mov.f32 	%f1360, %f1345;
	@%p14 bra 	BB0_44;

	mov.f32 	%f330, 0f40000000;
	cvt.rzi.f32.f32	%f331, %f330;
	add.f32 	%f332, %f331, %f331;
	mov.f32 	%f333, 0f40800000;
	sub.f32 	%f334, %f333, %f332;
	abs.f32 	%f15, %f334;
	mul.f32 	%f16, %f10, 0f3456BF95;
	mul.f32 	%f17, %f11, 0f3456BF95;
	mul.f32 	%f18, %f12, 0f3456BF95;
	mul.f32 	%f19, %f13, 0f3DD32618;
	mul.f32 	%f20, %f14, 0f3DD2F1AA;
	mov.f32 	%f329, 0f00000000;
	mov.u32 	%r245, 0;
	abs.f32 	%f524, %f16;
	abs.f32 	%f525, %f17;
	max.f32 	%f526, %f524, %f525;
	abs.f32 	%f527, %f18;
	max.f32 	%f528, %f526, %f527;
	mov.f32 	%f1345, %f329;
	mov.f32 	%f1346, %f329;
	mov.f32 	%f1347, %f329;
	mov.f32 	%f1348, %f329;
	mov.f32 	%f1349, %f329;
	mov.f32 	%f1350, %f329;
	mov.f32 	%f1351, %f329;
	mov.f32 	%f1352, %f329;
	mov.f32 	%f1353, %f329;
	mov.f32 	%f1354, %f329;
	mov.f32 	%f1355, %f329;
	mov.f32 	%f1356, %f329;
	mov.f32 	%f1357, %f329;
	mov.f32 	%f1358, %f329;
	mov.f32 	%f1359, %f329;
	mov.f32 	%f1360, %f329;

BB0_5:
	cvt.u64.u32	%rd30, %r245;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
	// inline asm
	ld.v4.f32 	{%f337, %f338, %f339, %f340}, [%rd28+80];
	ld.v4.f32 	{%f341, %f342, %f343, %f344}, [%rd28+64];
	ld.v4.f32 	{%f345, %f346, %f347, %f348}, [%rd28+48];
	ld.v4.f32 	{%f349, %f1365, %f1366, %f352}, [%rd28+32];
	ld.v4.f32 	{%f353, %f354, %f355, %f356}, [%rd28+16];
	ld.v4.f32 	{%f357, %f358, %f359, %f360}, [%rd28];
	mov.b32 	 %r6, %f340;
	sub.f32 	%f362, %f358, %f7;
	sub.f32 	%f363, %f359, %f8;
	sub.f32 	%f364, %f360, %f9;
	mul.f32 	%f365, %f363, %f363;
	fma.rn.f32 	%f366, %f362, %f362, %f365;
	fma.rn.f32 	%f367, %f364, %f364, %f366;
	sqrt.rn.f32 	%f63, %f367;
	rcp.rn.f32 	%f368, %f63;
	mul.f32 	%f64, %f362, %f368;
	mul.f32 	%f65, %f363, %f368;
	mul.f32 	%f66, %f364, %f368;
	mul.f32 	%f67, %f63, %f356;
	abs.f32 	%f68, %f67;
	setp.lt.f32	%p15, %f68, 0f00800000;
	mul.f32 	%f369, %f68, 0f4B800000;
	selp.f32	%f370, 0fC3170000, 0fC2FE0000, %p15;
	selp.f32	%f371, %f369, %f68, %p15;
	mov.b32 	 %r58, %f371;
	and.b32  	%r59, %r58, 8388607;
	or.b32  	%r60, %r59, 1065353216;
	mov.b32 	 %f372, %r60;
	shr.u32 	%r61, %r58, 23;
	cvt.rn.f32.u32	%f373, %r61;
	add.f32 	%f374, %f370, %f373;
	setp.gt.f32	%p16, %f372, 0f3FB504F3;
	mul.f32 	%f375, %f372, 0f3F000000;
	add.f32 	%f376, %f374, 0f3F800000;
	selp.f32	%f377, %f375, %f372, %p16;
	selp.f32	%f378, %f376, %f374, %p16;
	add.f32 	%f379, %f377, 0fBF800000;
	add.f32 	%f336, %f377, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f335,%f336;
	// inline asm
	add.f32 	%f380, %f379, %f379;
	mul.f32 	%f381, %f335, %f380;
	mul.f32 	%f382, %f381, %f381;
	mov.f32 	%f383, 0f3C4CAF63;
	mov.f32 	%f384, 0f3B18F0FE;
	fma.rn.f32 	%f385, %f384, %f382, %f383;
	mov.f32 	%f386, 0f3DAAAABD;
	fma.rn.f32 	%f387, %f385, %f382, %f386;
	mul.rn.f32 	%f388, %f387, %f382;
	mul.rn.f32 	%f389, %f388, %f381;
	sub.f32 	%f390, %f379, %f381;
	neg.f32 	%f391, %f381;
	add.f32 	%f392, %f390, %f390;
	fma.rn.f32 	%f393, %f391, %f379, %f392;
	mul.rn.f32 	%f394, %f335, %f393;
	add.f32 	%f395, %f389, %f381;
	sub.f32 	%f396, %f381, %f395;
	add.f32 	%f397, %f389, %f396;
	add.f32 	%f398, %f394, %f397;
	add.f32 	%f399, %f395, %f398;
	sub.f32 	%f400, %f395, %f399;
	add.f32 	%f401, %f398, %f400;
	mov.f32 	%f402, 0f3F317200;
	mul.rn.f32 	%f403, %f378, %f402;
	mov.f32 	%f404, 0f35BFBE8E;
	mul.rn.f32 	%f405, %f378, %f404;
	add.f32 	%f406, %f403, %f399;
	sub.f32 	%f407, %f403, %f406;
	add.f32 	%f408, %f399, %f407;
	add.f32 	%f409, %f401, %f408;
	add.f32 	%f410, %f405, %f409;
	add.f32 	%f411, %f406, %f410;
	sub.f32 	%f412, %f406, %f411;
	add.f32 	%f413, %f410, %f412;
	mul.rn.f32 	%f69, %f333, %f411;
	neg.f32 	%f415, %f69;
	fma.rn.f32 	%f416, %f333, %f411, %f415;
	fma.rn.f32 	%f417, %f333, %f413, %f416;
	fma.rn.f32 	%f70, %f329, %f411, %f417;
	add.rn.f32 	%f71, %f69, %f70;
	mov.b32 	 %r62, %f71;
	setp.eq.s32	%p1, %r62, 1118925336;
	add.s32 	%r63, %r62, -1;
	mov.b32 	 %f419, %r63;
	selp.f32	%f420, %f419, %f71, %p1;
	mul.f32 	%f421, %f420, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f422, %f421;
	mov.f32 	%f423, 0fBF317200;
	fma.rn.f32 	%f424, %f422, %f423, %f420;
	mov.f32 	%f425, 0fB5BFBE8E;
	fma.rn.f32 	%f426, %f422, %f425, %f424;
	mul.f32 	%f427, %f426, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f428, %f427;
	add.f32 	%f429, %f422, 0f00000000;
	ex2.approx.f32 	%f430, %f429;
	mul.f32 	%f431, %f428, %f430;
	setp.lt.f32	%p17, %f420, 0fC2D20000;
	selp.f32	%f432, 0f00000000, %f431, %p17;
	setp.gt.f32	%p18, %f420, 0f42D20000;
	selp.f32	%f1361, 0f7F800000, %f432, %p18;
	setp.eq.f32	%p19, %f1361, 0f7F800000;
	@%p19 bra 	BB0_7;

	neg.f32 	%f433, %f71;
	add.rn.f32 	%f434, %f69, %f433;
	add.rn.f32 	%f435, %f434, %f70;
	add.f32 	%f436, %f435, 0f37000000;
	selp.f32	%f437, %f436, %f435, %p1;
	fma.rn.f32 	%f1361, %f1361, %f437, %f1361;

BB0_7:
	setp.lt.f32	%p20, %f67, 0f00000000;
	setp.eq.f32	%p21, %f15, 0f3F800000;
	and.pred  	%p2, %p20, %p21;
	mov.b32 	 %r64, %f1361;
	xor.b32  	%r65, %r64, -2147483648;
	mov.b32 	 %f438, %r65;
	selp.f32	%f1363, %f438, %f1361, %p2;
	setp.eq.f32	%p22, %f67, 0f00000000;
	@%p22 bra 	BB0_10;
	bra.uni 	BB0_8;

BB0_10:
	add.f32 	%f441, %f67, %f67;
	selp.f32	%f1363, %f441, 0f00000000, %p21;
	bra.uni 	BB0_11;

BB0_8:
	setp.geu.f32	%p23, %f67, 0f00000000;
	@%p23 bra 	BB0_11;

	cvt.rzi.f32.f32	%f440, %f333;
	setp.neu.f32	%p24, %f440, 0f40800000;
	selp.f32	%f1363, 0f7FFFFFFF, %f1363, %p24;

BB0_11:
	add.f32 	%f442, %f68, 0f40800000;
	mov.b32 	 %r66, %f442;
	setp.lt.s32	%p26, %r66, 2139095040;
	@%p26 bra 	BB0_16;

	setp.gtu.f32	%p27, %f68, 0f7F800000;
	@%p27 bra 	BB0_15;
	bra.uni 	BB0_13;

BB0_15:
	add.f32 	%f1363, %f67, 0f40800000;
	bra.uni 	BB0_16;

BB0_13:
	setp.neu.f32	%p28, %f68, 0f7F800000;
	@%p28 bra 	BB0_16;

	selp.f32	%f1363, 0fFF800000, 0f7F800000, %p2;

BB0_16:
	mul.f32 	%f443, %f63, %f354;
	mov.f32 	%f1388, 0f3F800000;
	sub.f32 	%f445, %f1388, %f1363;
	setp.eq.f32	%p29, %f67, 0f3F800000;
	selp.f32	%f446, 0f00000000, %f445, %p29;
	cvt.sat.f32.f32	%f447, %f446;
	fma.rn.f32 	%f448, %f443, %f443, %f355;
	div.rn.f32 	%f97, %f447, %f448;
	mul.f32 	%f449, %f1343, %f65;
	fma.rn.f32 	%f450, %f1342, %f64, %f449;
	fma.rn.f32 	%f98, %f1344, %f66, %f450;
	setp.eq.f32	%p30, %f357, 0f3F800000;
	@%p30 bra 	BB0_23;
	bra.uni 	BB0_17;

BB0_23:
	setp.leu.f32	%p34, %f352, 0f00000000;
	@%p34 bra 	BB0_19;

	mul.f32 	%f481, %f337, %f64;
	mul.f32 	%f482, %f338, %f65;
	neg.f32 	%f483, %f482;
	sub.f32 	%f484, %f483, %f481;
	mul.f32 	%f485, %f339, %f66;
	sub.f32 	%f486, %f484, %f485;
	setp.gt.f32	%p35, %f486, 0f00000000;
	selp.f32	%f487, 0f3F800000, 0f00000000, %p35;
	mul.f32 	%f488, %f346, %f65;
	fma.rn.f32 	%f489, %f345, %f64, %f488;
	mul.f32 	%f490, %f342, %f65;
	fma.rn.f32 	%f491, %f341, %f64, %f490;
	fma.rn.f32 	%f492, %f347, %f66, %f489;
	fma.rn.f32 	%f493, %f343, %f66, %f491;
	fma.rn.f32 	%f494, %f348, %f492, 0f3F000000;
	mov.f32 	%f495, 0f3F800000;
	sub.f32 	%f477, %f495, %f494;
	fma.rn.f32 	%f478, %f348, %f493, 0f3F000000;
	cvt.rzi.s32.f32	%r70, %f352;
	mov.f32 	%f480, 0f00000000;
	// inline asm
	call (%f473, %f474, %f475, %f476), _rt_texture_get_f_id, (%r70, %r28, %f477, %f478, %f480, %f480);
	// inline asm
	mul.f32 	%f496, %f487, %f473;
	mul.f32 	%f497, %f487, %f474;
	mul.f32 	%f498, %f487, %f475;
	mul.f32 	%f1364, %f349, %f496;
	mul.f32 	%f1365, %f1365, %f497;
	mul.f32 	%f1366, %f1366, %f498;
	bra.uni 	BB0_25;

BB0_17:
	setp.eq.f32	%p31, %f357, 0f40000000;
	@%p31 bra 	BB0_21;
	bra.uni 	BB0_18;

BB0_21:
	setp.leu.f32	%p33, %f352, 0f00000000;
	@%p33 bra 	BB0_19;

	mul.f32 	%f467, %f346, %f65;
	fma.rn.f32 	%f468, %f345, %f64, %f467;
	mul.f32 	%f469, %f342, %f65;
	fma.rn.f32 	%f470, %f341, %f64, %f469;
	mul.f32 	%f471, %f338, %f65;
	fma.rn.f32 	%f472, %f337, %f64, %f471;
	fma.rn.f32 	%f464, %f347, %f66, %f468;
	fma.rn.f32 	%f465, %f343, %f66, %f470;
	fma.rn.f32 	%f466, %f339, %f66, %f472;
	cvt.rzi.s32.f32	%r67, %f352;
	mov.u32 	%r68, 6;
	mov.u32 	%r69, 0;
	// inline asm
	call (%f460, %f461, %f462, %f463), _rt_texture_get_base_id, (%r67, %r68, %f464, %f465, %f466, %r69);
	// inline asm
	mul.f32 	%f1364, %f349, %f460;
	mul.f32 	%f1365, %f1365, %f461;
	mul.f32 	%f1366, %f1366, %f462;
	bra.uni 	BB0_25;

BB0_18:
	setp.neu.f32	%p32, %f357, 0f40800000;
	@%p32 bra 	BB0_19;

	mul.f32 	%f451, %f337, %f64;
	mul.f32 	%f452, %f338, %f65;
	neg.f32 	%f453, %f452;
	sub.f32 	%f454, %f453, %f451;
	mul.f32 	%f455, %f339, %f66;
	sub.f32 	%f456, %f454, %f455;
	fma.rn.f32 	%f457, %f352, %f456, %f348;
	cvt.sat.f32.f32	%f458, %f457;
	mul.f32 	%f459, %f458, %f458;
	mul.f32 	%f1367, %f97, %f459;
	mov.f32 	%f1364, %f349;
	bra.uni 	BB0_26;

BB0_19:
	mov.f32 	%f1364, %f349;

BB0_25:
	mov.f32 	%f1367, %f97;

BB0_26:
	max.f32 	%f514, %f1364, %f1365;
	max.f32 	%f515, %f514, %f1366;
	mul.f32 	%f516, %f1367, %f515;
	setp.lt.f32	%p37, %f516, 0f3727C5AC;
	mov.pred 	%p136, -1;
	mov.f32 	%f125, 0f00000000;
	mov.f32 	%f1369, %f125;
	mov.f32 	%f1370, %f125;
	mov.f32 	%f1371, %f125;
	mov.f32 	%f1372, %f125;
	mov.f32 	%f1373, %f125;
	mov.f32 	%f1374, %f125;
	mov.f32 	%f1375, %f125;
	mov.f32 	%f1376, %f125;
	mov.f32 	%f1377, %f125;
	mov.f32 	%f1378, %f125;
	mov.f32 	%f1379, %f125;
	mov.f32 	%f1380, %f125;
	mov.f32 	%f1381, %f125;
	mov.f32 	%f1382, %f125;
	@%p37 bra 	BB0_28;

	ld.global.u32 	%r72, [ignoreNormal];
	setp.eq.s32	%p39, %r72, 0;
	selp.f32	%f517, %f98, 0f3F800000, %p39;
	cvt.sat.f32.f32	%f518, %f517;
	mul.f32 	%f519, %f1367, %f518;
	mul.f32 	%f125, %f1364, %f519;
	mul.f32 	%f1369, %f1365, %f519;
	mul.f32 	%f1370, %f1366, %f519;
	mul.f32 	%f520, %f1367, 0f3E800000;
	mul.f32 	%f1371, %f1364, %f520;
	mul.f32 	%f1372, %f1365, %f520;
	mul.f32 	%f1373, %f1366, %f520;
	mul.f32 	%f1374, %f64, %f1371;
	mul.f32 	%f1375, %f64, %f1372;
	mul.f32 	%f1376, %f64, %f1373;
	mul.f32 	%f1377, %f65, %f1371;
	mul.f32 	%f1378, %f65, %f1372;
	mul.f32 	%f1379, %f65, %f1373;
	mul.f32 	%f1380, %f66, %f1371;
	mul.f32 	%f1381, %f66, %f1372;
	mul.f32 	%f1382, %f66, %f1373;
	mov.pred 	%p136, 0;

BB0_28:
	@%p136 bra 	BB0_43;

	setp.eq.s32	%p40, %r6, 0;
	mov.u16 	%rs161, 0;
	@%p40 bra 	BB0_40;

	abs.s32 	%r8, %r6;
	mov.f32 	%f1387, 0f00000000;
	setp.lt.s32	%p41, %r8, 1;
	@%p41 bra 	BB0_39;

	max.f32 	%f141, %f528, %f310;
	and.b32  	%r9, %r8, 3;
	setp.eq.s32	%p42, %r9, 0;
	add.u64 	%rd35, %SP, 0;
	cvta.to.local.u64 	%rd2, %rd35;
	mov.f32 	%f1387, 0f00000000;
	mov.u32 	%r249, 0;
	@%p42 bra 	BB0_37;

	setp.eq.s32	%p43, %r9, 1;
	mov.f32 	%f1384, 0f00000000;
	mov.u32 	%r247, 0;
	@%p43 bra 	BB0_36;

	setp.eq.s32	%p44, %r9, 2;
	mov.f32 	%f1383, 0f00000000;
	mov.u32 	%r246, 0;
	@%p44 bra 	BB0_35;

	cvt.rmi.f32.f32	%f540, %f19;
	sub.f32 	%f541, %f19, %f540;
	cvt.rmi.f32.f32	%f542, %f20;
	sub.f32 	%f543, %f20, %f542;
	add.f32 	%f544, %f543, 0f420551EC;
	add.f32 	%f545, %f541, 0f420551EC;
	mul.f32 	%f546, %f541, %f544;
	fma.rn.f32 	%f547, %f543, %f545, %f546;
	add.f32 	%f548, %f547, 0f00000000;
	add.f32 	%f549, %f541, %f548;
	add.f32 	%f550, %f543, %f548;
	add.f32 	%f551, %f549, %f550;
	mul.f32 	%f552, %f548, %f551;
	cvt.rmi.f32.f32	%f553, %f552;
	sub.f32 	%f554, %f552, %f553;
	add.f32 	%f555, %f549, %f549;
	mul.f32 	%f556, %f550, %f555;
	cvt.rmi.f32.f32	%f557, %f556;
	sub.f32 	%f558, %f556, %f557;
	mul.f32 	%f559, %f549, %f551;
	cvt.rmi.f32.f32	%f560, %f559;
	sub.f32 	%f561, %f559, %f560;
	fma.rn.f32 	%f562, %f554, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f563, %f558, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f564, %f561, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f565, %f353, %f562, %f358;
	fma.rn.f32 	%f566, %f353, %f563, %f359;
	fma.rn.f32 	%f567, %f353, %f564, %f360;
	sub.f32 	%f568, %f565, %f7;
	sub.f32 	%f569, %f566, %f8;
	sub.f32 	%f570, %f567, %f9;
	mul.f32 	%f571, %f569, %f569;
	fma.rn.f32 	%f572, %f568, %f568, %f571;
	fma.rn.f32 	%f573, %f570, %f570, %f572;
	sqrt.rn.f32 	%f539, %f573;
	rcp.rn.f32 	%f574, %f539;
	mul.f32 	%f535, %f574, %f568;
	mul.f32 	%f536, %f574, %f569;
	mul.f32 	%f537, %f574, %f570;
	ld.global.u32 	%r80, [imageEnabled];
	and.b32  	%r81, %r80, 32;
	setp.eq.s32	%p45, %r81, 0;
	selp.f32	%f575, 0f3F800000, 0f41200000, %p45;
	mul.f32 	%f538, %f575, %f141;
	mov.u32 	%r82, 1065353216;
	st.local.u32 	[%rd2], %r82;
	ld.global.u32 	%r76, [root];
	// inline asm
	call _rt_trace_64, (%r76, %f10, %f11, %f12, %f535, %f536, %f537, %r45, %f538, %f539, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f576, [%rd2];
	add.f32 	%f1383, %f576, 0f00000000;
	mov.u32 	%r246, %r45;

BB0_35:
	cvt.rn.f32.s32	%f585, %r246;
	add.f32 	%f586, %f13, %f585;
	sub.f32 	%f587, %f14, %f585;
	mul.f32 	%f588, %f586, 0f3DD32618;
	cvt.rmi.f32.f32	%f589, %f588;
	sub.f32 	%f590, %f588, %f589;
	mul.f32 	%f591, %f587, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f592, %f591;
	sub.f32 	%f593, %f591, %f592;
	mul.f32 	%f594, %f585, 0f3DC74539;
	cvt.rmi.f32.f32	%f595, %f594;
	sub.f32 	%f596, %f594, %f595;
	add.f32 	%f597, %f593, 0f420551EC;
	add.f32 	%f598, %f590, 0f420551EC;
	add.f32 	%f599, %f596, 0f420551EC;
	mul.f32 	%f600, %f590, %f597;
	fma.rn.f32 	%f601, %f593, %f598, %f600;
	fma.rn.f32 	%f602, %f596, %f599, %f601;
	add.f32 	%f603, %f590, %f602;
	add.f32 	%f604, %f593, %f602;
	add.f32 	%f605, %f596, %f602;
	add.f32 	%f606, %f603, %f604;
	mul.f32 	%f607, %f605, %f606;
	cvt.rmi.f32.f32	%f608, %f607;
	sub.f32 	%f609, %f607, %f608;
	add.f32 	%f610, %f603, %f603;
	mul.f32 	%f611, %f604, %f610;
	cvt.rmi.f32.f32	%f612, %f611;
	sub.f32 	%f613, %f611, %f612;
	mul.f32 	%f614, %f603, %f606;
	cvt.rmi.f32.f32	%f615, %f614;
	sub.f32 	%f616, %f614, %f615;
	fma.rn.f32 	%f617, %f609, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f618, %f613, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f619, %f616, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f620, %f353, %f617, %f358;
	fma.rn.f32 	%f621, %f353, %f618, %f359;
	fma.rn.f32 	%f622, %f353, %f619, %f360;
	sub.f32 	%f623, %f620, %f7;
	sub.f32 	%f624, %f621, %f8;
	sub.f32 	%f625, %f622, %f9;
	mul.f32 	%f626, %f624, %f624;
	fma.rn.f32 	%f627, %f623, %f623, %f626;
	fma.rn.f32 	%f628, %f625, %f625, %f627;
	sqrt.rn.f32 	%f584, %f628;
	rcp.rn.f32 	%f629, %f584;
	mul.f32 	%f580, %f629, %f623;
	mul.f32 	%f581, %f629, %f624;
	mul.f32 	%f582, %f629, %f625;
	ld.global.u32 	%r86, [imageEnabled];
	and.b32  	%r87, %r86, 32;
	setp.eq.s32	%p46, %r87, 0;
	selp.f32	%f630, 0f3F800000, 0f41200000, %p46;
	mul.f32 	%f583, %f630, %f141;
	mov.u32 	%r88, 1065353216;
	st.local.u32 	[%rd2], %r88;
	ld.global.u32 	%r83, [root];
	// inline asm
	call _rt_trace_64, (%r83, %f10, %f11, %f12, %f580, %f581, %f582, %r45, %f583, %f584, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f631, [%rd2];
	add.f32 	%f1384, %f1383, %f631;
	add.s32 	%r247, %r246, 1;

BB0_36:
	cvt.rn.f32.s32	%f640, %r247;
	add.f32 	%f641, %f13, %f640;
	sub.f32 	%f642, %f14, %f640;
	mul.f32 	%f643, %f641, 0f3DD32618;
	cvt.rmi.f32.f32	%f644, %f643;
	sub.f32 	%f645, %f643, %f644;
	mul.f32 	%f646, %f642, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f647, %f646;
	sub.f32 	%f648, %f646, %f647;
	mul.f32 	%f649, %f640, 0f3DC74539;
	cvt.rmi.f32.f32	%f650, %f649;
	sub.f32 	%f651, %f649, %f650;
	add.f32 	%f652, %f648, 0f420551EC;
	add.f32 	%f653, %f645, 0f420551EC;
	add.f32 	%f654, %f651, 0f420551EC;
	mul.f32 	%f655, %f645, %f652;
	fma.rn.f32 	%f656, %f648, %f653, %f655;
	fma.rn.f32 	%f657, %f651, %f654, %f656;
	add.f32 	%f658, %f645, %f657;
	add.f32 	%f659, %f648, %f657;
	add.f32 	%f660, %f651, %f657;
	add.f32 	%f661, %f658, %f659;
	mul.f32 	%f662, %f660, %f661;
	cvt.rmi.f32.f32	%f663, %f662;
	sub.f32 	%f664, %f662, %f663;
	add.f32 	%f665, %f658, %f658;
	mul.f32 	%f666, %f659, %f665;
	cvt.rmi.f32.f32	%f667, %f666;
	sub.f32 	%f668, %f666, %f667;
	mul.f32 	%f669, %f658, %f661;
	cvt.rmi.f32.f32	%f670, %f669;
	sub.f32 	%f671, %f669, %f670;
	fma.rn.f32 	%f672, %f664, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f673, %f668, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f674, %f671, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f675, %f353, %f672, %f358;
	fma.rn.f32 	%f676, %f353, %f673, %f359;
	fma.rn.f32 	%f677, %f353, %f674, %f360;
	sub.f32 	%f678, %f675, %f7;
	sub.f32 	%f679, %f676, %f8;
	sub.f32 	%f680, %f677, %f9;
	mul.f32 	%f681, %f679, %f679;
	fma.rn.f32 	%f682, %f678, %f678, %f681;
	fma.rn.f32 	%f683, %f680, %f680, %f682;
	sqrt.rn.f32 	%f639, %f683;
	rcp.rn.f32 	%f684, %f639;
	mul.f32 	%f635, %f684, %f678;
	mul.f32 	%f636, %f684, %f679;
	mul.f32 	%f637, %f684, %f680;
	ld.global.u32 	%r92, [imageEnabled];
	and.b32  	%r93, %r92, 32;
	setp.eq.s32	%p47, %r93, 0;
	selp.f32	%f685, 0f3F800000, 0f41200000, %p47;
	mul.f32 	%f638, %f685, %f141;
	mov.u32 	%r94, 1065353216;
	st.local.u32 	[%rd2], %r94;
	ld.global.u32 	%r89, [root];
	mov.u32 	%r90, 1;
	// inline asm
	call _rt_trace_64, (%r89, %f10, %f11, %f12, %f635, %f636, %f637, %r90, %f638, %f639, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f686, [%rd2];
	add.f32 	%f1387, %f1384, %f686;
	add.s32 	%r249, %r247, 1;

BB0_37:
	setp.lt.u32	%p48, %r8, 4;
	@%p48 bra 	BB0_39;

BB0_38:
	cvt.rn.f32.s32	%f719, %r249;
	add.f32 	%f720, %f13, %f719;
	sub.f32 	%f721, %f14, %f719;
	mul.f32 	%f722, %f720, 0f3DD32618;
	cvt.rmi.f32.f32	%f723, %f722;
	sub.f32 	%f724, %f722, %f723;
	mul.f32 	%f725, %f721, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f726, %f725;
	sub.f32 	%f727, %f725, %f726;
	mul.f32 	%f728, %f719, 0f3DC74539;
	cvt.rmi.f32.f32	%f729, %f728;
	sub.f32 	%f730, %f728, %f729;
	add.f32 	%f731, %f727, 0f420551EC;
	add.f32 	%f732, %f724, 0f420551EC;
	add.f32 	%f733, %f730, 0f420551EC;
	mul.f32 	%f734, %f724, %f731;
	fma.rn.f32 	%f735, %f727, %f732, %f734;
	fma.rn.f32 	%f736, %f730, %f733, %f735;
	add.f32 	%f737, %f724, %f736;
	add.f32 	%f738, %f727, %f736;
	add.f32 	%f739, %f730, %f736;
	add.f32 	%f740, %f737, %f738;
	mul.f32 	%f741, %f739, %f740;
	cvt.rmi.f32.f32	%f742, %f741;
	sub.f32 	%f743, %f741, %f742;
	add.f32 	%f744, %f737, %f737;
	mul.f32 	%f745, %f738, %f744;
	cvt.rmi.f32.f32	%f746, %f745;
	sub.f32 	%f747, %f745, %f746;
	mul.f32 	%f748, %f737, %f740;
	cvt.rmi.f32.f32	%f749, %f748;
	sub.f32 	%f750, %f748, %f749;
	fma.rn.f32 	%f751, %f743, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f752, %f747, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f753, %f750, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f754, %f353, %f751, %f358;
	fma.rn.f32 	%f755, %f353, %f752, %f359;
	fma.rn.f32 	%f756, %f353, %f753, %f360;
	sub.f32 	%f757, %f754, %f7;
	sub.f32 	%f758, %f755, %f8;
	sub.f32 	%f759, %f756, %f9;
	mul.f32 	%f760, %f758, %f758;
	fma.rn.f32 	%f761, %f757, %f757, %f760;
	fma.rn.f32 	%f762, %f759, %f759, %f761;
	sqrt.rn.f32 	%f694, %f762;
	rcp.rn.f32 	%f763, %f694;
	mul.f32 	%f690, %f763, %f757;
	mul.f32 	%f691, %f763, %f758;
	mul.f32 	%f692, %f763, %f759;
	ld.global.u32 	%r107, [imageEnabled];
	and.b32  	%r108, %r107, 32;
	setp.eq.s32	%p49, %r108, 0;
	selp.f32	%f764, 0f3F800000, 0f41200000, %p49;
	mul.f32 	%f693, %f764, %f141;
	mov.u32 	%r109, 1065353216;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r95, [root];
	mov.u32 	%r105, 1;
	// inline asm
	call _rt_trace_64, (%r95, %f10, %f11, %f12, %f690, %f691, %f692, %r105, %f693, %f694, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f765, [%rd2];
	add.f32 	%f766, %f1387, %f765;
	add.s32 	%r110, %r249, 1;
	cvt.rn.f32.s32	%f767, %r110;
	add.f32 	%f768, %f13, %f767;
	sub.f32 	%f769, %f14, %f767;
	mul.f32 	%f770, %f768, 0f3DD32618;
	cvt.rmi.f32.f32	%f771, %f770;
	sub.f32 	%f772, %f770, %f771;
	mul.f32 	%f773, %f769, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f774, %f773;
	sub.f32 	%f775, %f773, %f774;
	mul.f32 	%f776, %f767, 0f3DC74539;
	cvt.rmi.f32.f32	%f777, %f776;
	sub.f32 	%f778, %f776, %f777;
	add.f32 	%f779, %f775, 0f420551EC;
	add.f32 	%f780, %f772, 0f420551EC;
	add.f32 	%f781, %f778, 0f420551EC;
	mul.f32 	%f782, %f772, %f779;
	fma.rn.f32 	%f783, %f775, %f780, %f782;
	fma.rn.f32 	%f784, %f778, %f781, %f783;
	add.f32 	%f785, %f772, %f784;
	add.f32 	%f786, %f775, %f784;
	add.f32 	%f787, %f778, %f784;
	add.f32 	%f788, %f785, %f786;
	mul.f32 	%f789, %f787, %f788;
	cvt.rmi.f32.f32	%f790, %f789;
	sub.f32 	%f791, %f789, %f790;
	add.f32 	%f792, %f785, %f785;
	mul.f32 	%f793, %f786, %f792;
	cvt.rmi.f32.f32	%f794, %f793;
	sub.f32 	%f795, %f793, %f794;
	mul.f32 	%f796, %f785, %f788;
	cvt.rmi.f32.f32	%f797, %f796;
	sub.f32 	%f798, %f796, %f797;
	fma.rn.f32 	%f799, %f791, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f800, %f795, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f801, %f798, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f802, %f353, %f799, %f358;
	fma.rn.f32 	%f803, %f353, %f800, %f359;
	fma.rn.f32 	%f804, %f353, %f801, %f360;
	sub.f32 	%f805, %f802, %f7;
	sub.f32 	%f806, %f803, %f8;
	sub.f32 	%f807, %f804, %f9;
	mul.f32 	%f808, %f806, %f806;
	fma.rn.f32 	%f809, %f805, %f805, %f808;
	fma.rn.f32 	%f810, %f807, %f807, %f809;
	sqrt.rn.f32 	%f702, %f810;
	rcp.rn.f32 	%f811, %f702;
	mul.f32 	%f698, %f811, %f805;
	mul.f32 	%f699, %f811, %f806;
	mul.f32 	%f700, %f811, %f807;
	ld.global.u32 	%r111, [imageEnabled];
	and.b32  	%r112, %r111, 32;
	setp.eq.s32	%p50, %r112, 0;
	selp.f32	%f812, 0f3F800000, 0f41200000, %p50;
	mul.f32 	%f701, %f812, %f141;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r98, [root];
	// inline asm
	call _rt_trace_64, (%r98, %f10, %f11, %f12, %f698, %f699, %f700, %r105, %f701, %f702, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f813, [%rd2];
	add.f32 	%f814, %f766, %f813;
	add.s32 	%r113, %r249, 2;
	cvt.rn.f32.s32	%f815, %r113;
	add.f32 	%f816, %f13, %f815;
	sub.f32 	%f817, %f14, %f815;
	mul.f32 	%f818, %f816, 0f3DD32618;
	cvt.rmi.f32.f32	%f819, %f818;
	sub.f32 	%f820, %f818, %f819;
	mul.f32 	%f821, %f817, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f822, %f821;
	sub.f32 	%f823, %f821, %f822;
	mul.f32 	%f824, %f815, 0f3DC74539;
	cvt.rmi.f32.f32	%f825, %f824;
	sub.f32 	%f826, %f824, %f825;
	add.f32 	%f827, %f823, 0f420551EC;
	add.f32 	%f828, %f820, 0f420551EC;
	add.f32 	%f829, %f826, 0f420551EC;
	mul.f32 	%f830, %f820, %f827;
	fma.rn.f32 	%f831, %f823, %f828, %f830;
	fma.rn.f32 	%f832, %f826, %f829, %f831;
	add.f32 	%f833, %f820, %f832;
	add.f32 	%f834, %f823, %f832;
	add.f32 	%f835, %f826, %f832;
	add.f32 	%f836, %f833, %f834;
	mul.f32 	%f837, %f835, %f836;
	cvt.rmi.f32.f32	%f838, %f837;
	sub.f32 	%f839, %f837, %f838;
	add.f32 	%f840, %f833, %f833;
	mul.f32 	%f841, %f834, %f840;
	cvt.rmi.f32.f32	%f842, %f841;
	sub.f32 	%f843, %f841, %f842;
	mul.f32 	%f844, %f833, %f836;
	cvt.rmi.f32.f32	%f845, %f844;
	sub.f32 	%f846, %f844, %f845;
	fma.rn.f32 	%f847, %f839, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f848, %f843, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f849, %f846, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f850, %f353, %f847, %f358;
	fma.rn.f32 	%f851, %f353, %f848, %f359;
	fma.rn.f32 	%f852, %f353, %f849, %f360;
	sub.f32 	%f853, %f850, %f7;
	sub.f32 	%f854, %f851, %f8;
	sub.f32 	%f855, %f852, %f9;
	mul.f32 	%f856, %f854, %f854;
	fma.rn.f32 	%f857, %f853, %f853, %f856;
	fma.rn.f32 	%f858, %f855, %f855, %f857;
	sqrt.rn.f32 	%f710, %f858;
	rcp.rn.f32 	%f859, %f710;
	mul.f32 	%f706, %f859, %f853;
	mul.f32 	%f707, %f859, %f854;
	mul.f32 	%f708, %f859, %f855;
	ld.global.u32 	%r114, [imageEnabled];
	and.b32  	%r115, %r114, 32;
	setp.eq.s32	%p51, %r115, 0;
	selp.f32	%f860, 0f3F800000, 0f41200000, %p51;
	mul.f32 	%f709, %f860, %f141;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r101, [root];
	// inline asm
	call _rt_trace_64, (%r101, %f10, %f11, %f12, %f706, %f707, %f708, %r105, %f709, %f710, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f861, [%rd2];
	add.f32 	%f862, %f814, %f861;
	add.s32 	%r116, %r249, 3;
	cvt.rn.f32.s32	%f863, %r116;
	add.f32 	%f864, %f13, %f863;
	sub.f32 	%f865, %f14, %f863;
	mul.f32 	%f866, %f864, 0f3DD32618;
	cvt.rmi.f32.f32	%f867, %f866;
	sub.f32 	%f868, %f866, %f867;
	mul.f32 	%f869, %f865, 0f3DD2F1AA;
	cvt.rmi.f32.f32	%f870, %f869;
	sub.f32 	%f871, %f869, %f870;
	mul.f32 	%f872, %f863, 0f3DC74539;
	cvt.rmi.f32.f32	%f873, %f872;
	sub.f32 	%f874, %f872, %f873;
	add.f32 	%f875, %f871, 0f420551EC;
	add.f32 	%f876, %f868, 0f420551EC;
	add.f32 	%f877, %f874, 0f420551EC;
	mul.f32 	%f878, %f868, %f875;
	fma.rn.f32 	%f879, %f871, %f876, %f878;
	fma.rn.f32 	%f880, %f874, %f877, %f879;
	add.f32 	%f881, %f868, %f880;
	add.f32 	%f882, %f871, %f880;
	add.f32 	%f883, %f874, %f880;
	add.f32 	%f884, %f881, %f882;
	mul.f32 	%f885, %f883, %f884;
	cvt.rmi.f32.f32	%f886, %f885;
	sub.f32 	%f887, %f885, %f886;
	add.f32 	%f888, %f881, %f881;
	mul.f32 	%f889, %f882, %f888;
	cvt.rmi.f32.f32	%f890, %f889;
	sub.f32 	%f891, %f889, %f890;
	mul.f32 	%f892, %f881, %f884;
	cvt.rmi.f32.f32	%f893, %f892;
	sub.f32 	%f894, %f892, %f893;
	fma.rn.f32 	%f895, %f887, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f896, %f891, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f897, %f894, 0f40000000, 0fBF800000;
	fma.rn.f32 	%f898, %f353, %f895, %f358;
	fma.rn.f32 	%f899, %f353, %f896, %f359;
	fma.rn.f32 	%f900, %f353, %f897, %f360;
	sub.f32 	%f901, %f898, %f7;
	sub.f32 	%f902, %f899, %f8;
	sub.f32 	%f903, %f900, %f9;
	mul.f32 	%f904, %f902, %f902;
	fma.rn.f32 	%f905, %f901, %f901, %f904;
	fma.rn.f32 	%f906, %f903, %f903, %f905;
	sqrt.rn.f32 	%f718, %f906;
	rcp.rn.f32 	%f907, %f718;
	mul.f32 	%f714, %f907, %f901;
	mul.f32 	%f715, %f907, %f902;
	mul.f32 	%f716, %f907, %f903;
	ld.global.u32 	%r117, [imageEnabled];
	and.b32  	%r118, %r117, 32;
	setp.eq.s32	%p52, %r118, 0;
	selp.f32	%f908, 0f3F800000, 0f41200000, %p52;
	mul.f32 	%f717, %f908, %f141;
	st.local.u32 	[%rd2], %r109;
	ld.global.u32 	%r104, [root];
	// inline asm
	call _rt_trace_64, (%r104, %f10, %f11, %f12, %f714, %f715, %f716, %r105, %f717, %f718, %rd35, %r29);
	// inline asm
	ld.local.f32 	%f909, [%rd2];
	add.f32 	%f1387, %f862, %f909;
	add.s32 	%r249, %r249, 4;
	setp.lt.s32	%p53, %r249, %r8;
	@%p53 bra 	BB0_38;

BB0_39:
	cvt.rn.f32.s32	%f910, %r8;
	div.rn.f32 	%f1388, %f1387, %f910;
	shr.u32 	%r119, %r6, 31;
	cvt.u16.u32	%rs161, %r119;

BB0_40:
	fma.rn.f32 	%f1360, %f125, %f1388, %f1360;
	fma.rn.f32 	%f1359, %f1369, %f1388, %f1359;
	fma.rn.f32 	%f1358, %f1370, %f1388, %f1358;
	fma.rn.f32 	%f1357, %f1371, %f1388, %f1357;
	fma.rn.f32 	%f1356, %f1372, %f1388, %f1356;
	fma.rn.f32 	%f1355, %f1373, %f1388, %f1355;
	fma.rn.f32 	%f1354, %f1374, %f1388, %f1354;
	fma.rn.f32 	%f1353, %f1375, %f1388, %f1353;
	fma.rn.f32 	%f1352, %f1376, %f1388, %f1352;
	fma.rn.f32 	%f1351, %f1377, %f1388, %f1351;
	fma.rn.f32 	%f1350, %f1378, %f1388, %f1350;
	fma.rn.f32 	%f1349, %f1379, %f1388, %f1349;
	fma.rn.f32 	%f1348, %f1380, %f1388, %f1348;
	fma.rn.f32 	%f1347, %f1381, %f1388, %f1347;
	fma.rn.f32 	%f1346, %f1382, %f1388, %f1346;
	setp.eq.s16	%p54, %rs161, 0;
	@%p54 bra 	BB0_42;

	div.rn.f32 	%f911, %f125, %f349;
	div.rn.f32 	%f912, %f911, %f97;
	cvt.sat.f32.f32	%f913, %f912;
	mul.f32 	%f1388, %f1388, %f913;

BB0_42:
	add.f32 	%f1345, %f1345, %f1388;

BB0_43:
	add.s32 	%r245, %r245, 1;
	setp.lt.u32	%p55, %r245, %r4;
	@%p55 bra 	BB0_5;

BB0_44:
	ld.global.u32 	%r251, [imageEnabled];
	and.b32  	%r120, %r251, 8;
	setp.eq.s32	%p56, %r120, 0;
	@%p56 bra 	BB0_57;

	cvt.sat.f32.f32	%f203, %f1345;
	cvt.u64.u32	%rd46, %r3;
	cvt.u64.u32	%rd45, %r2;
	mov.u64 	%rd49, image_Mask;
	cvta.global.u64 	%rd44, %rd49;
	// inline asm
	call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
	// inline asm
	mov.f32 	%f916, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f917, %f916;
	fma.rn.f32 	%f918, %f917, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f204, %f918;
	abs.f32 	%f205, %f203;
	setp.lt.f32	%p57, %f205, 0f00800000;
	mul.f32 	%f919, %f205, 0f4B800000;
	selp.f32	%f920, 0fC3170000, 0fC2FE0000, %p57;
	selp.f32	%f921, %f919, %f205, %p57;
	mov.b32 	 %r123, %f921;
	and.b32  	%r124, %r123, 8388607;
	or.b32  	%r125, %r124, 1065353216;
	mov.b32 	 %f922, %r125;
	shr.u32 	%r126, %r123, 23;
	cvt.rn.f32.u32	%f923, %r126;
	add.f32 	%f924, %f920, %f923;
	setp.gt.f32	%p58, %f922, 0f3FB504F3;
	mul.f32 	%f925, %f922, 0f3F000000;
	add.f32 	%f926, %f924, 0f3F800000;
	selp.f32	%f927, %f925, %f922, %p58;
	selp.f32	%f928, %f926, %f924, %p58;
	add.f32 	%f929, %f927, 0fBF800000;
	add.f32 	%f915, %f927, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f914,%f915;
	// inline asm
	add.f32 	%f930, %f929, %f929;
	mul.f32 	%f931, %f914, %f930;
	mul.f32 	%f932, %f931, %f931;
	mov.f32 	%f933, 0f3C4CAF63;
	mov.f32 	%f934, 0f3B18F0FE;
	fma.rn.f32 	%f935, %f934, %f932, %f933;
	mov.f32 	%f936, 0f3DAAAABD;
	fma.rn.f32 	%f937, %f935, %f932, %f936;
	mul.rn.f32 	%f938, %f937, %f932;
	mul.rn.f32 	%f939, %f938, %f931;
	sub.f32 	%f940, %f929, %f931;
	neg.f32 	%f941, %f931;
	add.f32 	%f942, %f940, %f940;
	fma.rn.f32 	%f943, %f941, %f929, %f942;
	mul.rn.f32 	%f944, %f914, %f943;
	add.f32 	%f945, %f939, %f931;
	sub.f32 	%f946, %f931, %f945;
	add.f32 	%f947, %f939, %f946;
	add.f32 	%f948, %f944, %f947;
	add.f32 	%f949, %f945, %f948;
	sub.f32 	%f950, %f945, %f949;
	add.f32 	%f951, %f948, %f950;
	mov.f32 	%f952, 0f3F317200;
	mul.rn.f32 	%f953, %f928, %f952;
	mov.f32 	%f954, 0f35BFBE8E;
	mul.rn.f32 	%f955, %f928, %f954;
	add.f32 	%f956, %f953, %f949;
	sub.f32 	%f957, %f953, %f956;
	add.f32 	%f958, %f949, %f957;
	add.f32 	%f959, %f951, %f958;
	add.f32 	%f960, %f955, %f959;
	add.f32 	%f961, %f956, %f960;
	sub.f32 	%f962, %f956, %f961;
	add.f32 	%f963, %f960, %f962;
	mov.f32 	%f964, 0f3EE8BA2E;
	mul.rn.f32 	%f965, %f964, %f961;
	neg.f32 	%f966, %f965;
	fma.rn.f32 	%f967, %f964, %f961, %f966;
	fma.rn.f32 	%f968, %f964, %f963, %f967;
	mov.f32 	%f969, 0f00000000;
	fma.rn.f32 	%f970, %f969, %f961, %f968;
	add.rn.f32 	%f971, %f965, %f970;
	neg.f32 	%f972, %f971;
	add.rn.f32 	%f973, %f965, %f972;
	add.rn.f32 	%f974, %f973, %f970;
	mov.b32 	 %r127, %f971;
	setp.eq.s32	%p59, %r127, 1118925336;
	add.s32 	%r128, %r127, -1;
	mov.b32 	 %f975, %r128;
	add.f32 	%f976, %f974, 0f37000000;
	selp.f32	%f977, %f975, %f971, %p59;
	selp.f32	%f206, %f976, %f974, %p59;
	mul.f32 	%f978, %f977, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f979, %f978;
	mov.f32 	%f980, 0fBF317200;
	fma.rn.f32 	%f981, %f979, %f980, %f977;
	mov.f32 	%f982, 0fB5BFBE8E;
	fma.rn.f32 	%f983, %f979, %f982, %f981;
	mul.f32 	%f984, %f983, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f985, %f984;
	add.f32 	%f986, %f979, 0f00000000;
	ex2.approx.f32 	%f987, %f986;
	mul.f32 	%f988, %f985, %f987;
	setp.lt.f32	%p60, %f977, 0fC2D20000;
	selp.f32	%f989, 0f00000000, %f988, %p60;
	setp.gt.f32	%p61, %f977, 0f42D20000;
	selp.f32	%f1422, 0f7F800000, %f989, %p61;
	setp.eq.f32	%p62, %f1422, 0f7F800000;
	@%p62 bra 	BB0_47;

	fma.rn.f32 	%f1422, %f1422, %f206, %f1422;

BB0_47:
	setp.lt.f32	%p63, %f203, 0f00000000;
	setp.eq.f32	%p64, %f204, 0f3F800000;
	and.pred  	%p4, %p63, %p64;
	mov.b32 	 %r129, %f1422;
	xor.b32  	%r130, %r129, -2147483648;
	mov.b32 	 %f990, %r130;
	selp.f32	%f1424, %f990, %f1422, %p4;
	setp.eq.f32	%p65, %f203, 0f00000000;
	@%p65 bra 	BB0_50;
	bra.uni 	BB0_48;

BB0_50:
	add.f32 	%f993, %f203, %f203;
	selp.f32	%f1424, %f993, 0f00000000, %p64;
	bra.uni 	BB0_51;

BB0_115:
	mov.u64 	%rd190, image_HDR;
	cvta.global.u64 	%rd185, %rd190;
	mov.u32 	%r216, 8;
	// inline asm
	call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r216, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1313, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs107, %f1313;}

	// inline asm
	mov.u16 	%rs108, 0;
	st.v4.u16 	[%rd184], {%rs107, %rs107, %rs107, %rs108};

BB0_116:
	ld.global.u32 	%r217, [additive];
	setp.eq.s32	%p132, %r217, 0;
	@%p132 bra 	BB0_118;

	mov.u64 	%rd203, image_RNM0;
	cvta.global.u64 	%rd192, %rd203;
	mov.u32 	%r221, 8;
	// inline asm
	call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r221, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs115, %rs116, %rs117, %rs118}, [%rd191];
	// inline asm
	{  cvt.f32.f16 %f1314, %rs115;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1315, %rs116;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1316, %rs117;}

	// inline asm
	// inline asm
	call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r221, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1317, %f1314, 0f00000000;
	add.f32 	%f1318, %f1315, 0f00000000;
	add.f32 	%f1319, %f1316, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs114, %f1319;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs113, %f1318;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs112, %f1317;}

	// inline asm
	mov.u16 	%rs119, 0;
	st.v4.u16 	[%rd197], {%rs112, %rs113, %rs114, %rs119};
	bra.uni 	BB0_119;

BB0_118:
	mov.u64 	%rd210, image_RNM0;
	cvta.global.u64 	%rd205, %rd210;
	mov.u32 	%r223, 8;
	// inline asm
	call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r223, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1320, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs120, %f1320;}

	// inline asm
	mov.u16 	%rs121, 0;
	st.v4.u16 	[%rd204], {%rs120, %rs120, %rs120, %rs121};

BB0_119:
	ld.global.u32 	%r224, [additive];
	setp.eq.s32	%p133, %r224, 0;
	@%p133 bra 	BB0_121;

	mov.u64 	%rd223, image_RNM1;
	cvta.global.u64 	%rd212, %rd223;
	mov.u32 	%r228, 8;
	// inline asm
	call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r228, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs128, %rs129, %rs130, %rs131}, [%rd211];
	// inline asm
	{  cvt.f32.f16 %f1321, %rs128;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1322, %rs129;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1323, %rs130;}

	// inline asm
	// inline asm
	call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r228, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1324, %f1321, 0f00000000;
	add.f32 	%f1325, %f1322, 0f00000000;
	add.f32 	%f1326, %f1323, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs127, %f1326;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs126, %f1325;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs125, %f1324;}

	// inline asm
	mov.u16 	%rs132, 0;
	st.v4.u16 	[%rd217], {%rs125, %rs126, %rs127, %rs132};
	bra.uni 	BB0_122;

BB0_121:
	mov.u64 	%rd230, image_RNM1;
	cvta.global.u64 	%rd225, %rd230;
	mov.u32 	%r230, 8;
	// inline asm
	call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r230, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1327, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs133, %f1327;}

	// inline asm
	mov.u16 	%rs134, 0;
	st.v4.u16 	[%rd224], {%rs133, %rs133, %rs133, %rs134};

BB0_122:
	ld.global.u32 	%r231, [additive];
	setp.eq.s32	%p134, %r231, 0;
	@%p134 bra 	BB0_124;

	mov.u64 	%rd243, image_RNM2;
	cvta.global.u64 	%rd232, %rd243;
	mov.u32 	%r235, 8;
	// inline asm
	call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r235, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs141, %rs142, %rs143, %rs144}, [%rd231];
	// inline asm
	{  cvt.f32.f16 %f1328, %rs141;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1329, %rs142;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1330, %rs143;}

	// inline asm
	// inline asm
	call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r235, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1331, %f1328, 0f00000000;
	add.f32 	%f1332, %f1329, 0f00000000;
	add.f32 	%f1333, %f1330, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs140, %f1333;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs139, %f1332;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs138, %f1331;}

	// inline asm
	mov.u16 	%rs145, 0;
	st.v4.u16 	[%rd237], {%rs138, %rs139, %rs140, %rs145};
	bra.uni 	BB0_125;

BB0_124:
	mov.u64 	%rd250, image_RNM2;
	cvta.global.u64 	%rd245, %rd250;
	mov.u32 	%r237, 8;
	// inline asm
	call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r237, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1334, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs146, %f1334;}

	// inline asm
	mov.u16 	%rs147, 0;
	st.v4.u16 	[%rd244], {%rs146, %rs146, %rs146, %rs147};

BB0_125:
	ld.global.u32 	%r238, [additive];
	setp.eq.s32	%p135, %r238, 0;
	@%p135 bra 	BB0_127;

	mov.u64 	%rd263, image_RNM3;
	cvta.global.u64 	%rd252, %rd263;
	mov.u32 	%r242, 8;
	// inline asm
	call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r242, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs154, %rs155, %rs156, %rs157}, [%rd251];
	// inline asm
	{  cvt.f32.f16 %f1335, %rs154;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1336, %rs155;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1337, %rs156;}

	// inline asm
	// inline asm
	call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r242, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	add.f32 	%f1338, %f1335, 0f00000000;
	add.f32 	%f1339, %f1336, 0f00000000;
	add.f32 	%f1340, %f1337, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs153, %f1340;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs152, %f1339;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs151, %f1338;}

	// inline asm
	mov.u16 	%rs158, 0;
	st.v4.u16 	[%rd257], {%rs151, %rs152, %rs153, %rs158};
	bra.uni 	BB0_128;

BB0_127:
	mov.u64 	%rd270, image_RNM3;
	cvta.global.u64 	%rd265, %rd270;
	mov.u32 	%r244, 8;
	// inline asm
	call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r244, %rd6, %rd7, %rd13, %rd13);
	// inline asm
	mov.f32 	%f1341, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs159, %f1341;}

	// inline asm
	mov.u16 	%rs160, 0;
	st.v4.u16 	[%rd264], {%rs159, %rs159, %rs159, %rs160};
	bra.uni 	BB0_128;

BB0_48:
	setp.geu.f32	%p66, %f203, 0f00000000;
	@%p66 bra 	BB0_51;

	cvt.rzi.f32.f32	%f992, %f964;
	setp.neu.f32	%p67, %f992, 0f3EE8BA2E;
	selp.f32	%f1424, 0f7FFFFFFF, %f1424, %p67;

BB0_51:
	add.f32 	%f994, %f205, 0f3EE8BA2E;
	mov.b32 	 %r131, %f994;
	setp.lt.s32	%p69, %r131, 2139095040;
	@%p69 bra 	BB0_56;

	setp.gtu.f32	%p70, %f205, 0f7F800000;
	@%p70 bra 	BB0_55;
	bra.uni 	BB0_53;

BB0_55:
	add.f32 	%f1424, %f203, 0f3EE8BA2E;
	bra.uni 	BB0_56;

BB0_53:
	setp.neu.f32	%p71, %f205, 0f7F800000;
	@%p71 bra 	BB0_56;

	selp.f32	%f1424, 0fFF800000, 0f7F800000, %p4;

BB0_56:
	mul.f32 	%f995, %f1424, 0f437F0000;
	setp.eq.f32	%p72, %f203, 0f3F800000;
	selp.f32	%f996, 0f437F0000, %f995, %p72;
	cvt.rzi.u32.f32	%r132, %f996;
	cvt.u16.u32	%rs17, %r132;
	mov.u16 	%rs18, 255;
	st.v2.u8 	[%rd43], {%rs17, %rs18};
	ld.global.u32 	%r251, [imageEnabled];

BB0_57:
	and.b32  	%r133, %r251, 1;
	setp.eq.b32	%p73, %r133, 1;
	@!%p73 bra 	BB0_92;
	bra.uni 	BB0_58;

BB0_58:
	mov.f32 	%f999, 0f3E666666;
	cvt.rzi.f32.f32	%f1000, %f999;
	fma.rn.f32 	%f1001, %f1000, 0fC0000000, 0f3EE66666;
	abs.f32 	%f217, %f1001;
	abs.f32 	%f218, %f1360;
	setp.lt.f32	%p74, %f218, 0f00800000;
	mul.f32 	%f1002, %f218, 0f4B800000;
	selp.f32	%f1003, 0fC3170000, 0fC2FE0000, %p74;
	selp.f32	%f1004, %f1002, %f218, %p74;
	mov.b32 	 %r134, %f1004;
	and.b32  	%r135, %r134, 8388607;
	or.b32  	%r136, %r135, 1065353216;
	mov.b32 	 %f1005, %r136;
	shr.u32 	%r137, %r134, 23;
	cvt.rn.f32.u32	%f1006, %r137;
	add.f32 	%f1007, %f1003, %f1006;
	setp.gt.f32	%p75, %f1005, 0f3FB504F3;
	mul.f32 	%f1008, %f1005, 0f3F000000;
	add.f32 	%f1009, %f1007, 0f3F800000;
	selp.f32	%f1010, %f1008, %f1005, %p75;
	selp.f32	%f1011, %f1009, %f1007, %p75;
	add.f32 	%f1012, %f1010, 0fBF800000;
	add.f32 	%f998, %f1010, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f997,%f998;
	// inline asm
	add.f32 	%f1013, %f1012, %f1012;
	mul.f32 	%f1014, %f997, %f1013;
	mul.f32 	%f1015, %f1014, %f1014;
	mov.f32 	%f1016, 0f3C4CAF63;
	mov.f32 	%f1017, 0f3B18F0FE;
	fma.rn.f32 	%f1018, %f1017, %f1015, %f1016;
	mov.f32 	%f1019, 0f3DAAAABD;
	fma.rn.f32 	%f1020, %f1018, %f1015, %f1019;
	mul.rn.f32 	%f1021, %f1020, %f1015;
	mul.rn.f32 	%f1022, %f1021, %f1014;
	sub.f32 	%f1023, %f1012, %f1014;
	neg.f32 	%f1024, %f1014;
	add.f32 	%f1025, %f1023, %f1023;
	fma.rn.f32 	%f1026, %f1024, %f1012, %f1025;
	mul.rn.f32 	%f1027, %f997, %f1026;
	add.f32 	%f1028, %f1022, %f1014;
	sub.f32 	%f1029, %f1014, %f1028;
	add.f32 	%f1030, %f1022, %f1029;
	add.f32 	%f1031, %f1027, %f1030;
	add.f32 	%f1032, %f1028, %f1031;
	sub.f32 	%f1033, %f1028, %f1032;
	add.f32 	%f1034, %f1031, %f1033;
	mov.f32 	%f1035, 0f3F317200;
	mul.rn.f32 	%f1036, %f1011, %f1035;
	mov.f32 	%f1037, 0f35BFBE8E;
	mul.rn.f32 	%f1038, %f1011, %f1037;
	add.f32 	%f1039, %f1036, %f1032;
	sub.f32 	%f1040, %f1036, %f1039;
	add.f32 	%f1041, %f1032, %f1040;
	add.f32 	%f1042, %f1034, %f1041;
	add.f32 	%f1043, %f1038, %f1042;
	add.f32 	%f1044, %f1039, %f1043;
	sub.f32 	%f1045, %f1039, %f1044;
	add.f32 	%f1046, %f1043, %f1045;
	mov.f32 	%f1047, 0f3EE66666;
	mul.rn.f32 	%f1048, %f1047, %f1044;
	neg.f32 	%f1049, %f1048;
	fma.rn.f32 	%f1050, %f1047, %f1044, %f1049;
	fma.rn.f32 	%f1051, %f1047, %f1046, %f1050;
	mov.f32 	%f1052, 0f00000000;
	fma.rn.f32 	%f1053, %f1052, %f1044, %f1051;
	add.rn.f32 	%f1054, %f1048, %f1053;
	neg.f32 	%f1055, %f1054;
	add.rn.f32 	%f1056, %f1048, %f1055;
	add.rn.f32 	%f1057, %f1056, %f1053;
	mov.b32 	 %r138, %f1054;
	setp.eq.s32	%p76, %r138, 1118925336;
	add.s32 	%r139, %r138, -1;
	mov.b32 	 %f1058, %r139;
	add.f32 	%f1059, %f1057, 0f37000000;
	selp.f32	%f1060, %f1058, %f1054, %p76;
	selp.f32	%f219, %f1059, %f1057, %p76;
	mul.f32 	%f1061, %f1060, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1062, %f1061;
	mov.f32 	%f1063, 0fBF317200;
	fma.rn.f32 	%f1064, %f1062, %f1063, %f1060;
	mov.f32 	%f1065, 0fB5BFBE8E;
	fma.rn.f32 	%f1066, %f1062, %f1065, %f1064;
	mul.f32 	%f1067, %f1066, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1068, %f1067;
	add.f32 	%f1069, %f1062, 0f00000000;
	ex2.approx.f32 	%f1070, %f1069;
	mul.f32 	%f1071, %f1068, %f1070;
	setp.lt.f32	%p77, %f1060, 0fC2D20000;
	selp.f32	%f1072, 0f00000000, %f1071, %p77;
	setp.gt.f32	%p78, %f1060, 0f42D20000;
	selp.f32	%f1425, 0f7F800000, %f1072, %p78;
	setp.eq.f32	%p79, %f1425, 0f7F800000;
	@%p79 bra 	BB0_60;

	fma.rn.f32 	%f1425, %f1425, %f219, %f1425;

BB0_60:
	setp.lt.f32	%p80, %f1360, 0f00000000;
	setp.eq.f32	%p81, %f217, 0f3F800000;
	and.pred  	%p5, %p80, %p81;
	mov.b32 	 %r140, %f1425;
	xor.b32  	%r141, %r140, -2147483648;
	mov.b32 	 %f1073, %r141;
	selp.f32	%f1427, %f1073, %f1425, %p5;
	setp.eq.f32	%p82, %f1360, 0f00000000;
	@%p82 bra 	BB0_63;
	bra.uni 	BB0_61;

BB0_63:
	add.f32 	%f1076, %f1360, %f1360;
	selp.f32	%f1427, %f1076, 0f00000000, %p81;
	bra.uni 	BB0_64;

BB0_61:
	setp.geu.f32	%p83, %f1360, 0f00000000;
	@%p83 bra 	BB0_64;

	cvt.rzi.f32.f32	%f1075, %f1047;
	setp.neu.f32	%p84, %f1075, 0f3EE66666;
	selp.f32	%f1427, 0f7FFFFFFF, %f1427, %p84;

BB0_64:
	add.f32 	%f1077, %f218, 0f3EE66666;
	mov.b32 	 %r142, %f1077;
	setp.lt.s32	%p86, %r142, 2139095040;
	@%p86 bra 	BB0_69;

	setp.gtu.f32	%p87, %f218, 0f7F800000;
	@%p87 bra 	BB0_68;
	bra.uni 	BB0_66;

BB0_68:
	add.f32 	%f1427, %f1360, 0f3EE66666;
	bra.uni 	BB0_69;

BB0_66:
	setp.neu.f32	%p88, %f218, 0f7F800000;
	@%p88 bra 	BB0_69;

	selp.f32	%f1427, 0fFF800000, 0f7F800000, %p5;

BB0_69:
	setp.eq.f32	%p89, %f1360, 0f3F800000;
	selp.f32	%f230, 0f3F800000, %f1427, %p89;
	abs.f32 	%f231, %f1359;
	setp.lt.f32	%p90, %f231, 0f00800000;
	mul.f32 	%f1080, %f231, 0f4B800000;
	selp.f32	%f1081, 0fC3170000, 0fC2FE0000, %p90;
	selp.f32	%f1082, %f1080, %f231, %p90;
	mov.b32 	 %r143, %f1082;
	and.b32  	%r144, %r143, 8388607;
	or.b32  	%r145, %r144, 1065353216;
	mov.b32 	 %f1083, %r145;
	shr.u32 	%r146, %r143, 23;
	cvt.rn.f32.u32	%f1084, %r146;
	add.f32 	%f1085, %f1081, %f1084;
	setp.gt.f32	%p91, %f1083, 0f3FB504F3;
	mul.f32 	%f1086, %f1083, 0f3F000000;
	add.f32 	%f1087, %f1085, 0f3F800000;
	selp.f32	%f1088, %f1086, %f1083, %p91;
	selp.f32	%f1089, %f1087, %f1085, %p91;
	add.f32 	%f1090, %f1088, 0fBF800000;
	add.f32 	%f1079, %f1088, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1078,%f1079;
	// inline asm
	add.f32 	%f1091, %f1090, %f1090;
	mul.f32 	%f1092, %f1078, %f1091;
	mul.f32 	%f1093, %f1092, %f1092;
	fma.rn.f32 	%f1096, %f1017, %f1093, %f1016;
	fma.rn.f32 	%f1098, %f1096, %f1093, %f1019;
	mul.rn.f32 	%f1099, %f1098, %f1093;
	mul.rn.f32 	%f1100, %f1099, %f1092;
	sub.f32 	%f1101, %f1090, %f1092;
	neg.f32 	%f1102, %f1092;
	add.f32 	%f1103, %f1101, %f1101;
	fma.rn.f32 	%f1104, %f1102, %f1090, %f1103;
	mul.rn.f32 	%f1105, %f1078, %f1104;
	add.f32 	%f1106, %f1100, %f1092;
	sub.f32 	%f1107, %f1092, %f1106;
	add.f32 	%f1108, %f1100, %f1107;
	add.f32 	%f1109, %f1105, %f1108;
	add.f32 	%f1110, %f1106, %f1109;
	sub.f32 	%f1111, %f1106, %f1110;
	add.f32 	%f1112, %f1109, %f1111;
	mul.rn.f32 	%f1114, %f1089, %f1035;
	mul.rn.f32 	%f1116, %f1089, %f1037;
	add.f32 	%f1117, %f1114, %f1110;
	sub.f32 	%f1118, %f1114, %f1117;
	add.f32 	%f1119, %f1110, %f1118;
	add.f32 	%f1120, %f1112, %f1119;
	add.f32 	%f1121, %f1116, %f1120;
	add.f32 	%f1122, %f1117, %f1121;
	sub.f32 	%f1123, %f1117, %f1122;
	add.f32 	%f1124, %f1121, %f1123;
	mul.rn.f32 	%f1126, %f1047, %f1122;
	neg.f32 	%f1127, %f1126;
	fma.rn.f32 	%f1128, %f1047, %f1122, %f1127;
	fma.rn.f32 	%f1129, %f1047, %f1124, %f1128;
	fma.rn.f32 	%f1131, %f1052, %f1122, %f1129;
	add.rn.f32 	%f1132, %f1126, %f1131;
	neg.f32 	%f1133, %f1132;
	add.rn.f32 	%f1134, %f1126, %f1133;
	add.rn.f32 	%f1135, %f1134, %f1131;
	mov.b32 	 %r147, %f1132;
	setp.eq.s32	%p92, %r147, 1118925336;
	add.s32 	%r148, %r147, -1;
	mov.b32 	 %f1136, %r148;
	add.f32 	%f1137, %f1135, 0f37000000;
	selp.f32	%f1138, %f1136, %f1132, %p92;
	selp.f32	%f232, %f1137, %f1135, %p92;
	mul.f32 	%f1139, %f1138, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1140, %f1139;
	fma.rn.f32 	%f1142, %f1140, %f1063, %f1138;
	fma.rn.f32 	%f1144, %f1140, %f1065, %f1142;
	mul.f32 	%f1145, %f1144, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1146, %f1145;
	add.f32 	%f1147, %f1140, 0f00000000;
	ex2.approx.f32 	%f1148, %f1147;
	mul.f32 	%f1149, %f1146, %f1148;
	setp.lt.f32	%p93, %f1138, 0fC2D20000;
	selp.f32	%f1150, 0f00000000, %f1149, %p93;
	setp.gt.f32	%p94, %f1138, 0f42D20000;
	selp.f32	%f1428, 0f7F800000, %f1150, %p94;
	setp.eq.f32	%p95, %f1428, 0f7F800000;
	@%p95 bra 	BB0_71;

	fma.rn.f32 	%f1428, %f1428, %f232, %f1428;

BB0_71:
	setp.lt.f32	%p96, %f1359, 0f00000000;
	and.pred  	%p6, %p96, %p81;
	mov.b32 	 %r149, %f1428;
	xor.b32  	%r150, %r149, -2147483648;
	mov.b32 	 %f1151, %r150;
	selp.f32	%f1430, %f1151, %f1428, %p6;
	setp.eq.f32	%p98, %f1359, 0f00000000;
	@%p98 bra 	BB0_74;
	bra.uni 	BB0_72;

BB0_74:
	add.f32 	%f1154, %f1359, %f1359;
	selp.f32	%f1430, %f1154, 0f00000000, %p81;
	bra.uni 	BB0_75;

BB0_72:
	setp.geu.f32	%p99, %f1359, 0f00000000;
	@%p99 bra 	BB0_75;

	cvt.rzi.f32.f32	%f1153, %f1047;
	setp.neu.f32	%p100, %f1153, 0f3EE66666;
	selp.f32	%f1430, 0f7FFFFFFF, %f1430, %p100;

BB0_75:
	add.f32 	%f1155, %f231, 0f3EE66666;
	mov.b32 	 %r151, %f1155;
	setp.lt.s32	%p102, %r151, 2139095040;
	@%p102 bra 	BB0_80;

	setp.gtu.f32	%p103, %f231, 0f7F800000;
	@%p103 bra 	BB0_79;
	bra.uni 	BB0_77;

BB0_79:
	add.f32 	%f1430, %f1359, 0f3EE66666;
	bra.uni 	BB0_80;

BB0_77:
	setp.neu.f32	%p104, %f231, 0f7F800000;
	@%p104 bra 	BB0_80;

	selp.f32	%f1430, 0fFF800000, 0f7F800000, %p6;

BB0_80:
	setp.eq.f32	%p105, %f1359, 0f3F800000;
	selp.f32	%f243, 0f3F800000, %f1430, %p105;
	abs.f32 	%f244, %f1358;
	setp.lt.f32	%p106, %f244, 0f00800000;
	mul.f32 	%f1158, %f244, 0f4B800000;
	selp.f32	%f1159, 0fC3170000, 0fC2FE0000, %p106;
	selp.f32	%f1160, %f1158, %f244, %p106;
	mov.b32 	 %r152, %f1160;
	and.b32  	%r153, %r152, 8388607;
	or.b32  	%r154, %r153, 1065353216;
	mov.b32 	 %f1161, %r154;
	shr.u32 	%r155, %r152, 23;
	cvt.rn.f32.u32	%f1162, %r155;
	add.f32 	%f1163, %f1159, %f1162;
	setp.gt.f32	%p107, %f1161, 0f3FB504F3;
	mul.f32 	%f1164, %f1161, 0f3F000000;
	add.f32 	%f1165, %f1163, 0f3F800000;
	selp.f32	%f1166, %f1164, %f1161, %p107;
	selp.f32	%f1167, %f1165, %f1163, %p107;
	add.f32 	%f1168, %f1166, 0fBF800000;
	add.f32 	%f1157, %f1166, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f1156,%f1157;
	// inline asm
	add.f32 	%f1169, %f1168, %f1168;
	mul.f32 	%f1170, %f1156, %f1169;
	mul.f32 	%f1171, %f1170, %f1170;
	fma.rn.f32 	%f1174, %f1017, %f1171, %f1016;
	fma.rn.f32 	%f1176, %f1174, %f1171, %f1019;
	mul.rn.f32 	%f1177, %f1176, %f1171;
	mul.rn.f32 	%f1178, %f1177, %f1170;
	sub.f32 	%f1179, %f1168, %f1170;
	neg.f32 	%f1180, %f1170;
	add.f32 	%f1181, %f1179, %f1179;
	fma.rn.f32 	%f1182, %f1180, %f1168, %f1181;
	mul.rn.f32 	%f1183, %f1156, %f1182;
	add.f32 	%f1184, %f1178, %f1170;
	sub.f32 	%f1185, %f1170, %f1184;
	add.f32 	%f1186, %f1178, %f1185;
	add.f32 	%f1187, %f1183, %f1186;
	add.f32 	%f1188, %f1184, %f1187;
	sub.f32 	%f1189, %f1184, %f1188;
	add.f32 	%f1190, %f1187, %f1189;
	mul.rn.f32 	%f1192, %f1167, %f1035;
	mul.rn.f32 	%f1194, %f1167, %f1037;
	add.f32 	%f1195, %f1192, %f1188;
	sub.f32 	%f1196, %f1192, %f1195;
	add.f32 	%f1197, %f1188, %f1196;
	add.f32 	%f1198, %f1190, %f1197;
	add.f32 	%f1199, %f1194, %f1198;
	add.f32 	%f1200, %f1195, %f1199;
	sub.f32 	%f1201, %f1195, %f1200;
	add.f32 	%f1202, %f1199, %f1201;
	mul.rn.f32 	%f1204, %f1047, %f1200;
	neg.f32 	%f1205, %f1204;
	fma.rn.f32 	%f1206, %f1047, %f1200, %f1205;
	fma.rn.f32 	%f1207, %f1047, %f1202, %f1206;
	fma.rn.f32 	%f1209, %f1052, %f1200, %f1207;
	add.rn.f32 	%f1210, %f1204, %f1209;
	neg.f32 	%f1211, %f1210;
	add.rn.f32 	%f1212, %f1204, %f1211;
	add.rn.f32 	%f1213, %f1212, %f1209;
	mov.b32 	 %r156, %f1210;
	setp.eq.s32	%p108, %r156, 1118925336;
	add.s32 	%r157, %r156, -1;
	mov.b32 	 %f1214, %r157;
	add.f32 	%f1215, %f1213, 0f37000000;
	selp.f32	%f1216, %f1214, %f1210, %p108;
	selp.f32	%f245, %f1215, %f1213, %p108;
	mul.f32 	%f1217, %f1216, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f1218, %f1217;
	fma.rn.f32 	%f1220, %f1218, %f1063, %f1216;
	fma.rn.f32 	%f1222, %f1218, %f1065, %f1220;
	mul.f32 	%f1223, %f1222, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f1224, %f1223;
	add.f32 	%f1225, %f1218, 0f00000000;
	ex2.approx.f32 	%f1226, %f1225;
	mul.f32 	%f1227, %f1224, %f1226;
	setp.lt.f32	%p109, %f1216, 0fC2D20000;
	selp.f32	%f1228, 0f00000000, %f1227, %p109;
	setp.gt.f32	%p110, %f1216, 0f42D20000;
	selp.f32	%f1431, 0f7F800000, %f1228, %p110;
	setp.eq.f32	%p111, %f1431, 0f7F800000;
	@%p111 bra 	BB0_82;

	fma.rn.f32 	%f1431, %f1431, %f245, %f1431;

BB0_82:
	setp.lt.f32	%p112, %f1358, 0f00000000;
	and.pred  	%p7, %p112, %p81;
	mov.b32 	 %r158, %f1431;
	xor.b32  	%r159, %r158, -2147483648;
	mov.b32 	 %f1229, %r159;
	selp.f32	%f1433, %f1229, %f1431, %p7;
	setp.eq.f32	%p114, %f1358, 0f00000000;
	@%p114 bra 	BB0_85;
	bra.uni 	BB0_83;

BB0_85:
	add.f32 	%f1232, %f1358, %f1358;
	selp.f32	%f1433, %f1232, 0f00000000, %p81;
	bra.uni 	BB0_86;

BB0_83:
	setp.geu.f32	%p115, %f1358, 0f00000000;
	@%p115 bra 	BB0_86;

	cvt.rzi.f32.f32	%f1231, %f1047;
	setp.neu.f32	%p116, %f1231, 0f3EE66666;
	selp.f32	%f1433, 0f7FFFFFFF, %f1433, %p116;

BB0_86:
	add.f32 	%f1233, %f244, 0f3EE66666;
	mov.b32 	 %r160, %f1233;
	setp.lt.s32	%p118, %r160, 2139095040;
	@%p118 bra 	BB0_91;

	setp.gtu.f32	%p119, %f244, 0f7F800000;
	@%p119 bra 	BB0_90;
	bra.uni 	BB0_88;

BB0_90:
	add.f32 	%f1433, %f1358, 0f3EE66666;
	bra.uni 	BB0_91;

BB0_88:
	setp.neu.f32	%p120, %f244, 0f7F800000;
	@%p120 bra 	BB0_91;

	selp.f32	%f1433, 0fFF800000, 0f7F800000, %p7;

BB0_91:
	setp.eq.f32	%p121, %f1358, 0f3F800000;
	selp.f32	%f1234, 0f3F800000, %f1433, %p121;
	cvt.u64.u32	%rd53, %r3;
	cvt.u64.u32	%rd52, %r2;
	mov.u64 	%rd56, image;
	cvta.global.u64 	%rd51, %rd56;
	// inline asm
	call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13);
	// inline asm
	cvt.sat.f32.f32	%f1235, %f1234;
	mul.f32 	%f1236, %f1235, 0f437FFD71;
	cvt.rzi.u32.f32	%r163, %f1236;
	cvt.sat.f32.f32	%f1237, %f243;
	mul.f32 	%f1238, %f1237, 0f437FFD71;
	cvt.rzi.u32.f32	%r164, %f1238;
	cvt.sat.f32.f32	%f1239, %f230;
	mul.f32 	%f1240, %f1239, 0f437FFD71;
	cvt.rzi.u32.f32	%r165, %f1240;
	cvt.u16.u32	%rs19, %r163;
	cvt.u16.u32	%rs20, %r165;
	cvt.u16.u32	%rs21, %r164;
	mov.u16 	%rs22, 255;
	st.v4.u8 	[%rd50], {%rs19, %rs21, %rs20, %rs22};
	ld.global.u32 	%r251, [imageEnabled];

BB0_92:
	cvt.u64.u32	%rd4, %r2;
	cvt.u64.u32	%rd5, %r3;
	and.b32  	%r166, %r251, 4;
	setp.eq.s32	%p122, %r166, 0;
	@%p122 bra 	BB0_96;

	ld.global.u32 	%r167, [additive];
	setp.eq.s32	%p123, %r167, 0;
	mov.f32 	%f1241, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f1241;}

	// inline asm
	@%p123 bra 	BB0_95;

	mov.u64 	%rd69, image_HDR;
	cvta.global.u64 	%rd58, %rd69;
	mov.u32 	%r171, 8;
	// inline asm
	call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs30, %rs31, %rs32, %rs33}, [%rd57];
	// inline asm
	{  cvt.f32.f16 %f1242, %rs30;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1243, %rs31;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1244, %rs32;}

	// inline asm
	// inline asm
	call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1245, %f1360, %f1242;
	add.f32 	%f1246, %f1359, %f1243;
	add.f32 	%f1247, %f1358, %f1244;
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f1247;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f1246;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f1245;}

	// inline asm
	st.v4.u16 	[%rd63], {%rs27, %rs28, %rs29, %rs23};
	bra.uni 	BB0_96;

BB0_95:
	mov.u64 	%rd76, image_HDR;
	cvta.global.u64 	%rd71, %rd76;
	mov.u32 	%r173, 8;
	// inline asm
	call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r173, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs36, %f1358;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs35, %f1359;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f1360;}

	// inline asm
	st.v4.u16 	[%rd70], {%rs34, %rs35, %rs36, %rs23};

BB0_96:
	mov.f32 	%f1252, 0f34000000;
	max.f32 	%f1253, %f1357, %f1252;
	div.rn.f32 	%f1254, %f1354, %f1253;
	max.f32 	%f1255, %f1356, %f1252;
	div.rn.f32 	%f1256, %f1353, %f1255;
	max.f32 	%f1257, %f1355, %f1252;
	div.rn.f32 	%f1258, %f1352, %f1257;
	fma.rn.f32 	%f256, %f1254, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f257, %f1256, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f258, %f1258, 0f3F000000, 0f3F000000;
	div.rn.f32 	%f1259, %f1351, %f1253;
	div.rn.f32 	%f1260, %f1350, %f1255;
	div.rn.f32 	%f1261, %f1349, %f1257;
	fma.rn.f32 	%f259, %f1259, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f260, %f1260, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f261, %f1261, 0f3F000000, 0f3F000000;
	div.rn.f32 	%f1262, %f1348, %f1253;
	div.rn.f32 	%f1263, %f1347, %f1255;
	div.rn.f32 	%f1264, %f1346, %f1257;
	fma.rn.f32 	%f262, %f1262, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f263, %f1263, 0f3F000000, 0f3F000000;
	fma.rn.f32 	%f264, %f1264, 0f3F000000, 0f3F000000;
	ld.global.u32 	%r174, [additive];
	setp.eq.s32	%p124, %r174, 0;
	mov.f32 	%f1251, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs37, %f1251;}

	// inline asm
	@%p124 bra 	BB0_98;

	mov.u64 	%rd89, image_RNM0;
	cvta.global.u64 	%rd78, %rd89;
	mov.u32 	%r178, 8;
	// inline asm
	call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r178, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs44, %rs45, %rs46, %rs47}, [%rd77];
	// inline asm
	{  cvt.f32.f16 %f1265, %rs44;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1266, %rs45;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1267, %rs46;}

	// inline asm
	// inline asm
	call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r178, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1268, %f1357, %f1265;
	add.f32 	%f1269, %f1356, %f1266;
	add.f32 	%f1270, %f1355, %f1267;
	// inline asm
	{  cvt.rn.f16.f32 %rs43, %f1270;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs42, %f1269;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs41, %f1268;}

	// inline asm
	st.v4.u16 	[%rd83], {%rs41, %rs42, %rs43, %rs37};
	bra.uni 	BB0_99;

BB0_98:
	mov.u64 	%rd96, image_RNM0;
	cvta.global.u64 	%rd91, %rd96;
	mov.u32 	%r180, 8;
	// inline asm
	call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r180, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs50, %f1355;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs49, %f1356;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs48, %f1357;}

	// inline asm
	st.v4.u16 	[%rd90], {%rs48, %rs49, %rs50, %rs37};

BB0_99:
	ld.global.u32 	%r181, [additive];
	setp.eq.s32	%p125, %r181, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs51, %f1251;}

	// inline asm
	@%p125 bra 	BB0_101;

	mov.u64 	%rd109, image_RNM1;
	cvta.global.u64 	%rd98, %rd109;
	mov.u32 	%r185, 8;
	// inline asm
	call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r185, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs58, %rs59, %rs60, %rs61}, [%rd97];
	// inline asm
	{  cvt.f32.f16 %f1275, %rs58;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1276, %rs59;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1277, %rs60;}

	// inline asm
	// inline asm
	call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r185, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1278, %f256, %f1275;
	add.f32 	%f1279, %f257, %f1276;
	add.f32 	%f1280, %f258, %f1277;
	// inline asm
	{  cvt.rn.f16.f32 %rs57, %f1280;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs56, %f1279;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs55, %f1278;}

	// inline asm
	st.v4.u16 	[%rd103], {%rs55, %rs56, %rs57, %rs51};
	bra.uni 	BB0_102;

BB0_101:
	mov.u64 	%rd116, image_RNM1;
	cvta.global.u64 	%rd111, %rd116;
	mov.u32 	%r187, 8;
	// inline asm
	call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r187, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f258;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs63, %f257;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs62, %f256;}

	// inline asm
	st.v4.u16 	[%rd110], {%rs62, %rs63, %rs64, %rs51};

BB0_102:
	ld.global.u32 	%r188, [additive];
	setp.eq.s32	%p126, %r188, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f1251;}

	// inline asm
	@%p126 bra 	BB0_104;

	mov.u64 	%rd129, image_RNM2;
	cvta.global.u64 	%rd118, %rd129;
	mov.u32 	%r192, 8;
	// inline asm
	call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r192, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs72, %rs73, %rs74, %rs75}, [%rd117];
	// inline asm
	{  cvt.f32.f16 %f1285, %rs72;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1286, %rs73;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1287, %rs74;}

	// inline asm
	// inline asm
	call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r192, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1288, %f259, %f1285;
	add.f32 	%f1289, %f260, %f1286;
	add.f32 	%f1290, %f261, %f1287;
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f1290;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs70, %f1289;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs69, %f1288;}

	// inline asm
	st.v4.u16 	[%rd123], {%rs69, %rs70, %rs71, %rs65};
	bra.uni 	BB0_105;

BB0_104:
	mov.u64 	%rd136, image_RNM2;
	cvta.global.u64 	%rd131, %rd136;
	mov.u32 	%r194, 8;
	// inline asm
	call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r194, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs78, %f261;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs77, %f260;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs76, %f259;}

	// inline asm
	st.v4.u16 	[%rd130], {%rs76, %rs77, %rs78, %rs65};

BB0_105:
	ld.global.u32 	%r195, [additive];
	setp.eq.s32	%p127, %r195, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs79, %f1251;}

	// inline asm
	@%p127 bra 	BB0_107;

	mov.u64 	%rd149, image_RNM3;
	cvta.global.u64 	%rd138, %rd149;
	mov.u32 	%r199, 8;
	// inline asm
	call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r199, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	ld.v4.u16 	{%rs86, %rs87, %rs88, %rs89}, [%rd137];
	// inline asm
	{  cvt.f32.f16 %f1295, %rs86;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1296, %rs87;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f1297, %rs88;}

	// inline asm
	// inline asm
	call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r199, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	add.f32 	%f1298, %f262, %f1295;
	add.f32 	%f1299, %f263, %f1296;
	add.f32 	%f1300, %f264, %f1297;
	// inline asm
	{  cvt.rn.f16.f32 %rs85, %f1300;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs84, %f1299;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs83, %f1298;}

	// inline asm
	st.v4.u16 	[%rd143], {%rs83, %rs84, %rs85, %rs79};
	bra.uni 	BB0_128;

BB0_107:
	mov.u64 	%rd156, image_RNM3;
	cvta.global.u64 	%rd151, %rd156;
	mov.u32 	%r201, 8;
	// inline asm
	call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r201, %rd4, %rd5, %rd13, %rd13);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs92, %f264;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs91, %f263;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs90, %f262;}

	// inline asm
	st.v4.u16 	[%rd150], {%rs90, %rs91, %rs92, %rs79};

BB0_128:
	ret;
}