//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Dir[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .texref sky;
.global .align 4 .b8 skyColor[12];
.global .align 4 .u32 samples;
.global .align 4 .u32 hemispherical;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8skyColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo13hemisphericalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8skyColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename13hemisphericalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8skyColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum13hemisphericalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8skyColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic13hemisphericalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8skyColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation13hemisphericalE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[32];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<99>;
	.reg .b16 	%rs<51>;
	.reg .f32 	%f<620>;
	.reg .b32 	%r<311>;
	.reg .b64 	%rd<129>;


	mov.u64 	%rd128, __local_depot0;
	cvta.local.u64 	%SP, %rd128;
	ld.global.u32 	%r1, [samples];
	ld.global.v2.u32 	{%r93, %r94}, [pixelID];
	cvt.u64.u32	%rd21, %r93;
	cvt.u64.u32	%rd22, %r94;
	mov.u64 	%rd25, uvnormal;
	cvta.global.u64 	%rd20, %rd25;
	mov.u32 	%r91, 2;
	mov.u32 	%r92, 4;
	mov.u64 	%rd24, 0;
	// inline asm
	call (%rd19), _rt_buffer_get_64, (%rd20, %r91, %r92, %rd21, %rd22, %rd24, %rd24);
	// inline asm
	ld.u32 	%r2, [%rd19];
	shr.u32 	%r97, %r2, 16;
	cvt.u16.u32	%rs1, %r97;
	and.b16  	%rs3, %rs1, 255;
	cvt.u16.u32	%rs4, %r2;
	or.b16  	%rs5, %rs4, %rs3;
	setp.eq.s16	%p4, %rs5, 0;
	mov.f32 	%f580, 0f00000000;
	mov.f32 	%f581, %f580;
	mov.f32 	%f582, %f580;
	@%p4 bra 	BB0_2;

	ld.u8 	%rs6, [%rd19+1];
	and.b16  	%rs8, %rs4, 255;
	cvt.rn.f32.u16	%f127, %rs8;
	div.rn.f32 	%f128, %f127, 0f437F0000;
	fma.rn.f32 	%f129, %f128, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f130, %rs6;
	div.rn.f32 	%f131, %f130, 0f437F0000;
	fma.rn.f32 	%f132, %f131, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f133, %rs3;
	div.rn.f32 	%f134, %f133, 0f437F0000;
	fma.rn.f32 	%f135, %f134, 0f40000000, 0fBF800000;
	mul.f32 	%f136, %f132, %f132;
	fma.rn.f32 	%f137, %f129, %f129, %f136;
	fma.rn.f32 	%f138, %f135, %f135, %f137;
	sqrt.rn.f32 	%f139, %f138;
	rcp.rn.f32 	%f140, %f139;
	mul.f32 	%f580, %f129, %f140;
	mul.f32 	%f581, %f132, %f140;
	mul.f32 	%f582, %f135, %f140;

BB0_2:
	ld.global.v2.u32 	{%r98, %r99}, [pixelID];
	ld.global.v2.u32 	{%r101, %r102}, [tileInfo];
	add.s32 	%r3, %r98, %r101;
	add.s32 	%r4, %r99, %r102;
	setp.eq.f32	%p5, %f581, 0f00000000;
	setp.eq.f32	%p6, %f580, 0f00000000;
	and.pred  	%p7, %p6, %p5;
	setp.eq.f32	%p8, %f582, 0f00000000;
	and.pred  	%p9, %p7, %p8;
	@%p9 bra 	BB0_97;
	bra.uni 	BB0_3;

BB0_97:
	ld.global.u32 	%r310, [imageEnabled];
	and.b32  	%r266, %r310, 1;
	setp.eq.b32	%p95, %r266, 1;
	@!%p95 bra 	BB0_99;
	bra.uni 	BB0_98;

BB0_98:
	cvt.u64.u32	%rd88, %r3;
	cvt.u64.u32	%rd89, %r4;
	mov.u64 	%rd92, image;
	cvta.global.u64 	%rd87, %rd92;
	// inline asm
	call (%rd86), _rt_buffer_get_64, (%rd87, %r91, %r92, %rd88, %rd89, %rd24, %rd24);
	// inline asm
	mov.u16 	%rs34, 0;
	st.v4.u8 	[%rd86], {%rs34, %rs34, %rs34, %rs34};
	ld.global.u32 	%r310, [imageEnabled];

BB0_99:
	and.b32  	%r269, %r310, 4;
	setp.eq.s32	%p96, %r269, 0;
	@%p96 bra 	BB0_103;

	ld.global.u32 	%r270, [additive];
	setp.eq.s32	%p97, %r270, 0;
	cvt.u64.u32	%rd17, %r3;
	cvt.u64.u32	%rd18, %r4;
	@%p97 bra 	BB0_102;

	mov.u64 	%rd105, image_HDR;
	cvta.global.u64 	%rd94, %rd105;
	mov.u32 	%r274, 8;
	// inline asm
	call (%rd93), _rt_buffer_get_64, (%rd94, %r91, %r274, %rd17, %rd18, %rd24, %rd24);
	// inline asm
	ld.v4.u16 	{%rs41, %rs42, %rs43, %rs44}, [%rd93];
	// inline asm
	{  cvt.f32.f16 %f543, %rs41;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f544, %rs42;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f545, %rs43;}

	// inline asm
	// inline asm
	call (%rd99), _rt_buffer_get_64, (%rd94, %r91, %r274, %rd17, %rd18, %rd24, %rd24);
	// inline asm
	add.f32 	%f546, %f543, 0f00000000;
	add.f32 	%f547, %f544, 0f00000000;
	add.f32 	%f548, %f545, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs40, %f548;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs39, %f547;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs38, %f546;}

	// inline asm
	mov.u16 	%rs45, 0;
	st.v4.u16 	[%rd99], {%rs38, %rs39, %rs40, %rs45};
	bra.uni 	BB0_103;

BB0_3:
	ld.global.v2.u32 	{%r110, %r111}, [pixelID];
	cvt.u64.u32	%rd28, %r110;
	cvt.u64.u32	%rd29, %r111;
	mov.u64 	%rd38, uvpos;
	cvta.global.u64 	%rd27, %rd38;
	mov.u32 	%r107, 12;
	// inline asm
	call (%rd26), _rt_buffer_get_64, (%rd27, %r91, %r107, %rd28, %rd29, %rd24, %rd24);
	// inline asm
	ld.f32 	%f145, [%rd26+8];
	ld.f32 	%f146, [%rd26+4];
	ld.f32 	%f147, [%rd26];
	mul.f32 	%f148, %f147, 0f3456BF95;
	mul.f32 	%f149, %f146, 0f3456BF95;
	mul.f32 	%f150, %f145, 0f3456BF95;
	abs.f32 	%f151, %f580;
	div.rn.f32 	%f152, %f148, %f151;
	abs.f32 	%f153, %f581;
	div.rn.f32 	%f154, %f149, %f153;
	abs.f32 	%f155, %f582;
	div.rn.f32 	%f156, %f150, %f155;
	abs.f32 	%f157, %f152;
	abs.f32 	%f158, %f154;
	abs.f32 	%f159, %f156;
	mov.f32 	%f160, 0f38D1B717;
	max.f32 	%f161, %f157, %f160;
	max.f32 	%f162, %f158, %f160;
	max.f32 	%f163, %f159, %f160;
	fma.rn.f32 	%f7, %f580, %f161, %f147;
	fma.rn.f32 	%f8, %f581, %f162, %f146;
	fma.rn.f32 	%f9, %f582, %f163, %f145;
	ld.global.u32 	%r5, [hemispherical];
	setp.gt.f32	%p10, %f151, %f155;
	neg.f32 	%f164, %f581;
	selp.f32	%f165, %f164, 0f00000000, %p10;
	neg.f32 	%f166, %f582;
	selp.f32	%f167, %f580, %f166, %p10;
	selp.f32	%f168, 0f00000000, %f581, %p10;
	mul.f32 	%f169, %f167, %f167;
	fma.rn.f32 	%f170, %f165, %f165, %f169;
	fma.rn.f32 	%f171, %f168, %f168, %f170;
	sqrt.rn.f32 	%f172, %f171;
	rcp.rn.f32 	%f173, %f172;
	mul.f32 	%f10, %f165, %f173;
	mul.f32 	%f11, %f167, %f173;
	mul.f32 	%f12, %f168, %f173;
	ld.global.v2.u32 	{%r114, %r115}, [pixelID];
	cvt.u64.u32	%rd34, %r114;
	cvt.u64.u32	%rd35, %r115;
	mov.u64 	%rd39, rnd_seeds;
	cvta.global.u64 	%rd33, %rd39;
	// inline asm
	call (%rd32), _rt_buffer_get_64, (%rd33, %r91, %r92, %rd34, %rd35, %rd24, %rd24);
	// inline asm
	mov.f32 	%f606, 0f00000000;
	setp.lt.s32	%p11, %r1, 1;
	mov.f32 	%f605, %f606;
	mov.f32 	%f604, %f606;
	mov.f32 	%f603, %f606;
	@%p11 bra 	BB0_56;

	cvt.rn.f32.s32	%f178, %r1;
	rcp.rn.f32 	%f13, %f178;
	ld.u32 	%r288, [%rd32];
	mul.f32 	%f14, %f7, 0f3456BF95;
	mul.f32 	%f15, %f8, 0f3456BF95;
	mul.f32 	%f16, %f9, 0f3456BF95;
	mul.f32 	%f179, %f580, %f11;
	mul.f32 	%f180, %f581, %f10;
	sub.f32 	%f17, %f180, %f179;
	mul.f32 	%f181, %f582, %f10;
	mul.f32 	%f182, %f580, %f12;
	sub.f32 	%f18, %f182, %f181;
	mul.f32 	%f183, %f581, %f12;
	mul.f32 	%f184, %f582, %f11;
	sub.f32 	%f19, %f184, %f183;
	mov.f32 	%f606, 0f00000000;
	mov.u32 	%r118, 0;
	abs.f32 	%f258, %f15;
	abs.f32 	%f259, %f14;
	max.f32 	%f260, %f259, %f258;
	abs.f32 	%f261, %f16;
	max.f32 	%f262, %f260, %f261;
	mov.u32 	%r285, %r118;
	mov.f32 	%f605, %f606;
	mov.f32 	%f604, %f606;
	mov.f32 	%f603, %f606;

BB0_5:
	cvt.rn.f32.s32	%f24, %r285;
	mov.u32 	%r287, %r118;

BB0_6:
	mad.lo.s32 	%r120, %r288, 1664525, 1013904223;
	and.b32  	%r121, %r120, 16777215;
	cvt.rn.f32.u32	%f185, %r121;
	fma.rn.f32 	%f186, %f185, 0f33800000, %f24;
	mul.f32 	%f29, %f13, %f186;
	mad.lo.s32 	%r288, %r120, 1664525, 1013904223;
	and.b32  	%r122, %r288, 16777215;
	cvt.rn.f32.u32	%f187, %r122;
	cvt.rn.f32.s32	%f188, %r287;
	fma.rn.f32 	%f189, %f187, 0f33800000, %f188;
	mul.f32 	%f190, %f13, %f189;
	mul.f32 	%f191, %f29, %f29;
	mov.f32 	%f192, 0f3F800000;
	sub.f32 	%f193, %f192, %f191;
	mov.f32 	%f194, 0f00000000;
	max.f32 	%f195, %f194, %f193;
	sqrt.rn.f32 	%f30, %f195;
	mul.f32 	%f597, %f190, 0f40C90FDB;
	abs.f32 	%f32, %f597;
	setp.neu.f32	%p12, %f32, 0f7F800000;
	mov.f32 	%f591, %f597;
	@%p12 bra 	BB0_8;

	mul.rn.f32 	%f591, %f597, %f194;

BB0_8:
	mul.f32 	%f197, %f591, 0f3F22F983;
	cvt.rni.s32.f32	%r298, %f197;
	cvt.rn.f32.s32	%f198, %r298;
	neg.f32 	%f199, %f198;
	mov.f32 	%f200, 0f3FC90FDA;
	fma.rn.f32 	%f201, %f199, %f200, %f591;
	mov.f32 	%f202, 0f33A22168;
	fma.rn.f32 	%f203, %f199, %f202, %f201;
	mov.f32 	%f204, 0f27C234C5;
	fma.rn.f32 	%f592, %f199, %f204, %f203;
	abs.f32 	%f205, %f591;
	setp.leu.f32	%p13, %f205, 0f47CE4780;
	@%p13 bra 	BB0_19;

	mov.b32 	 %r13, %f591;
	shr.u32 	%r14, %r13, 23;
	shl.b32 	%r125, %r13, 8;
	or.b32  	%r15, %r125, -2147483648;
	add.u64 	%rd41, %SP, 0;
	cvta.to.local.u64 	%rd125, %rd41;
	mov.u32 	%r290, 0;
	mov.u64 	%rd124, __cudart_i2opi_f;
	mov.u32 	%r289, -6;

BB0_10:
	.pragma "nounroll";
	ld.const.u32 	%r128, [%rd124];
	// inline asm
	{
	mad.lo.cc.u32   %r126, %r128, %r15, %r290;
	madc.hi.u32     %r290, %r128, %r15,  0;
	}
	// inline asm
	st.local.u32 	[%rd125], %r126;
	add.s64 	%rd125, %rd125, 4;
	add.s64 	%rd124, %rd124, 4;
	add.s32 	%r289, %r289, 1;
	setp.ne.s32	%p14, %r289, 0;
	@%p14 bra 	BB0_10;

	and.b32  	%r131, %r14, 255;
	add.s32 	%r132, %r131, -128;
	shr.u32 	%r133, %r132, 5;
	and.b32  	%r20, %r13, -2147483648;
	cvta.to.local.u64 	%rd43, %rd41;
	st.local.u32 	[%rd43+24], %r290;
	mov.u32 	%r134, 6;
	sub.s32 	%r135, %r134, %r133;
	mul.wide.s32 	%rd44, %r135, 4;
	add.s64 	%rd8, %rd43, %rd44;
	ld.local.u32 	%r291, [%rd8];
	ld.local.u32 	%r292, [%rd8+-4];
	and.b32  	%r23, %r14, 31;
	setp.eq.s32	%p15, %r23, 0;
	@%p15 bra 	BB0_13;

	mov.u32 	%r136, 32;
	sub.s32 	%r137, %r136, %r23;
	shr.u32 	%r138, %r292, %r137;
	shl.b32 	%r139, %r291, %r23;
	add.s32 	%r291, %r138, %r139;
	ld.local.u32 	%r140, [%rd8+-8];
	shr.u32 	%r141, %r140, %r137;
	shl.b32 	%r142, %r292, %r23;
	add.s32 	%r292, %r141, %r142;

BB0_13:
	shr.u32 	%r143, %r292, 30;
	shl.b32 	%r144, %r291, 2;
	add.s32 	%r293, %r143, %r144;
	shl.b32 	%r29, %r292, 2;
	shr.u32 	%r145, %r293, 31;
	shr.u32 	%r146, %r291, 30;
	add.s32 	%r30, %r145, %r146;
	setp.eq.s32	%p16, %r145, 0;
	@%p16 bra 	BB0_14;
	bra.uni 	BB0_15;

BB0_14:
	mov.u32 	%r294, %r20;
	mov.u32 	%r295, %r29;
	bra.uni 	BB0_16;

BB0_15:
	not.b32 	%r147, %r293;
	neg.s32 	%r295, %r29;
	setp.eq.s32	%p17, %r29, 0;
	selp.u32	%r148, 1, 0, %p17;
	add.s32 	%r293, %r148, %r147;
	xor.b32  	%r294, %r20, -2147483648;

BB0_16:
	clz.b32 	%r297, %r293;
	setp.eq.s32	%p18, %r297, 0;
	shl.b32 	%r149, %r293, %r297;
	mov.u32 	%r150, 32;
	sub.s32 	%r151, %r150, %r297;
	shr.u32 	%r152, %r295, %r151;
	add.s32 	%r153, %r152, %r149;
	selp.b32	%r38, %r293, %r153, %p18;
	mov.u32 	%r154, -921707870;
	mul.hi.u32 	%r296, %r38, %r154;
	setp.eq.s32	%p19, %r20, 0;
	neg.s32 	%r155, %r30;
	selp.b32	%r298, %r30, %r155, %p19;
	setp.lt.s32	%p20, %r296, 1;
	@%p20 bra 	BB0_18;

	mul.lo.s32 	%r156, %r38, -921707870;
	shr.u32 	%r157, %r156, 31;
	shl.b32 	%r158, %r296, 1;
	add.s32 	%r296, %r157, %r158;
	add.s32 	%r297, %r297, 1;

BB0_18:
	mov.u32 	%r159, 126;
	sub.s32 	%r160, %r159, %r297;
	shl.b32 	%r161, %r160, 23;
	add.s32 	%r162, %r296, 1;
	shr.u32 	%r163, %r162, 7;
	add.s32 	%r164, %r163, 1;
	shr.u32 	%r165, %r164, 1;
	add.s32 	%r166, %r165, %r161;
	or.b32  	%r167, %r166, %r294;
	mov.b32 	 %f592, %r167;

BB0_19:
	mul.rn.f32 	%f38, %f592, %f592;
	add.s32 	%r46, %r298, 1;
	and.b32  	%r47, %r46, 1;
	setp.eq.s32	%p21, %r47, 0;
	@%p21 bra 	BB0_21;
	bra.uni 	BB0_20;

BB0_21:
	mov.f32 	%f208, 0f3C08839E;
	mov.f32 	%f209, 0fB94CA1F9;
	fma.rn.f32 	%f593, %f209, %f38, %f208;
	bra.uni 	BB0_22;

BB0_20:
	mov.f32 	%f206, 0fBAB6061A;
	mov.f32 	%f207, 0f37CCF5CE;
	fma.rn.f32 	%f593, %f207, %f38, %f206;

BB0_22:
	@%p21 bra 	BB0_24;
	bra.uni 	BB0_23;

BB0_24:
	mov.f32 	%f213, 0fBE2AAAA3;
	fma.rn.f32 	%f214, %f593, %f38, %f213;
	fma.rn.f32 	%f594, %f214, %f38, %f194;
	bra.uni 	BB0_25;

BB0_23:
	mov.f32 	%f210, 0f3D2AAAA5;
	fma.rn.f32 	%f211, %f593, %f38, %f210;
	mov.f32 	%f212, 0fBF000000;
	fma.rn.f32 	%f594, %f211, %f38, %f212;

BB0_25:
	fma.rn.f32 	%f595, %f594, %f592, %f592;
	@%p21 bra 	BB0_27;

	fma.rn.f32 	%f595, %f594, %f38, %f192;

BB0_27:
	and.b32  	%r168, %r46, 2;
	setp.eq.s32	%p24, %r168, 0;
	@%p24 bra 	BB0_29;

	mov.f32 	%f218, 0fBF800000;
	fma.rn.f32 	%f595, %f595, %f218, %f194;

BB0_29:
	@%p12 bra 	BB0_31;

	mul.rn.f32 	%f597, %f597, %f194;

BB0_31:
	mul.f32 	%f220, %f597, 0f3F22F983;
	cvt.rni.s32.f32	%r308, %f220;
	cvt.rn.f32.s32	%f221, %r308;
	neg.f32 	%f222, %f221;
	fma.rn.f32 	%f224, %f222, %f200, %f597;
	fma.rn.f32 	%f226, %f222, %f202, %f224;
	fma.rn.f32 	%f598, %f222, %f204, %f226;
	abs.f32 	%f228, %f597;
	setp.leu.f32	%p26, %f228, 0f47CE4780;
	@%p26 bra 	BB0_42;

	mov.b32 	 %r49, %f597;
	shr.u32 	%r50, %r49, 23;
	shl.b32 	%r171, %r49, 8;
	or.b32  	%r51, %r171, -2147483648;
	add.u64 	%rd46, %SP, 0;
	cvta.to.local.u64 	%rd127, %rd46;
	mov.u32 	%r300, 0;
	mov.u64 	%rd126, __cudart_i2opi_f;
	mov.u32 	%r299, -6;

BB0_33:
	.pragma "nounroll";
	ld.const.u32 	%r174, [%rd126];
	// inline asm
	{
	mad.lo.cc.u32   %r172, %r174, %r51, %r300;
	madc.hi.u32     %r300, %r174, %r51,  0;
	}
	// inline asm
	st.local.u32 	[%rd127], %r172;
	add.s64 	%rd127, %rd127, 4;
	add.s64 	%rd126, %rd126, 4;
	add.s32 	%r299, %r299, 1;
	setp.ne.s32	%p27, %r299, 0;
	@%p27 bra 	BB0_33;

	and.b32  	%r177, %r50, 255;
	add.s32 	%r178, %r177, -128;
	shr.u32 	%r179, %r178, 5;
	and.b32  	%r56, %r49, -2147483648;
	cvta.to.local.u64 	%rd48, %rd46;
	st.local.u32 	[%rd48+24], %r300;
	mov.u32 	%r180, 6;
	sub.s32 	%r181, %r180, %r179;
	mul.wide.s32 	%rd49, %r181, 4;
	add.s64 	%rd14, %rd48, %rd49;
	ld.local.u32 	%r301, [%rd14];
	ld.local.u32 	%r302, [%rd14+-4];
	and.b32  	%r59, %r50, 31;
	setp.eq.s32	%p28, %r59, 0;
	@%p28 bra 	BB0_36;

	mov.u32 	%r182, 32;
	sub.s32 	%r183, %r182, %r59;
	shr.u32 	%r184, %r302, %r183;
	shl.b32 	%r185, %r301, %r59;
	add.s32 	%r301, %r184, %r185;
	ld.local.u32 	%r186, [%rd14+-8];
	shr.u32 	%r187, %r186, %r183;
	shl.b32 	%r188, %r302, %r59;
	add.s32 	%r302, %r187, %r188;

BB0_36:
	shr.u32 	%r189, %r302, 30;
	shl.b32 	%r190, %r301, 2;
	add.s32 	%r303, %r189, %r190;
	shl.b32 	%r65, %r302, 2;
	shr.u32 	%r191, %r303, 31;
	shr.u32 	%r192, %r301, 30;
	add.s32 	%r66, %r191, %r192;
	setp.eq.s32	%p29, %r191, 0;
	@%p29 bra 	BB0_37;
	bra.uni 	BB0_38;

BB0_37:
	mov.u32 	%r304, %r56;
	mov.u32 	%r305, %r65;
	bra.uni 	BB0_39;

BB0_38:
	not.b32 	%r193, %r303;
	neg.s32 	%r305, %r65;
	setp.eq.s32	%p30, %r65, 0;
	selp.u32	%r194, 1, 0, %p30;
	add.s32 	%r303, %r194, %r193;
	xor.b32  	%r304, %r56, -2147483648;

BB0_39:
	clz.b32 	%r307, %r303;
	setp.eq.s32	%p31, %r307, 0;
	shl.b32 	%r195, %r303, %r307;
	mov.u32 	%r196, 32;
	sub.s32 	%r197, %r196, %r307;
	shr.u32 	%r198, %r305, %r197;
	add.s32 	%r199, %r198, %r195;
	selp.b32	%r74, %r303, %r199, %p31;
	mov.u32 	%r200, -921707870;
	mul.hi.u32 	%r306, %r74, %r200;
	setp.eq.s32	%p32, %r56, 0;
	neg.s32 	%r201, %r66;
	selp.b32	%r308, %r66, %r201, %p32;
	setp.lt.s32	%p33, %r306, 1;
	@%p33 bra 	BB0_41;

	mul.lo.s32 	%r202, %r74, -921707870;
	shr.u32 	%r203, %r202, 31;
	shl.b32 	%r204, %r306, 1;
	add.s32 	%r306, %r203, %r204;
	add.s32 	%r307, %r307, 1;

BB0_41:
	mov.u32 	%r205, 126;
	sub.s32 	%r206, %r205, %r307;
	shl.b32 	%r207, %r206, 23;
	add.s32 	%r208, %r306, 1;
	shr.u32 	%r209, %r208, 7;
	add.s32 	%r210, %r209, 1;
	shr.u32 	%r211, %r210, 1;
	add.s32 	%r212, %r211, %r207;
	or.b32  	%r213, %r212, %r304;
	mov.b32 	 %f598, %r213;

BB0_42:
	mul.rn.f32 	%f55, %f598, %f598;
	and.b32  	%r82, %r308, 1;
	setp.eq.s32	%p34, %r82, 0;
	@%p34 bra 	BB0_44;
	bra.uni 	BB0_43;

BB0_44:
	mov.f32 	%f231, 0f3C08839E;
	mov.f32 	%f232, 0fB94CA1F9;
	fma.rn.f32 	%f599, %f232, %f55, %f231;
	bra.uni 	BB0_45;

BB0_43:
	mov.f32 	%f229, 0fBAB6061A;
	mov.f32 	%f230, 0f37CCF5CE;
	fma.rn.f32 	%f599, %f230, %f55, %f229;

BB0_45:
	@%p34 bra 	BB0_47;
	bra.uni 	BB0_46;

BB0_47:
	mov.f32 	%f236, 0fBE2AAAA3;
	fma.rn.f32 	%f237, %f599, %f55, %f236;
	fma.rn.f32 	%f600, %f237, %f55, %f194;
	bra.uni 	BB0_48;

BB0_46:
	mov.f32 	%f233, 0f3D2AAAA5;
	fma.rn.f32 	%f234, %f599, %f55, %f233;
	mov.f32 	%f235, 0fBF000000;
	fma.rn.f32 	%f600, %f234, %f55, %f235;

BB0_48:
	fma.rn.f32 	%f601, %f600, %f598, %f598;
	@%p34 bra 	BB0_50;

	fma.rn.f32 	%f601, %f600, %f55, %f192;

BB0_50:
	and.b32  	%r214, %r308, 2;
	setp.eq.s32	%p37, %r214, 0;
	@%p37 bra 	BB0_52;

	mov.f32 	%f241, 0fBF800000;
	fma.rn.f32 	%f601, %f601, %f241, %f194;

BB0_52:
	mul.f32 	%f242, %f30, %f595;
	mul.f32 	%f243, %f30, %f601;
	mul.f32 	%f244, %f10, %f243;
	mul.f32 	%f245, %f11, %f243;
	mul.f32 	%f246, %f12, %f243;
	fma.rn.f32 	%f247, %f19, %f242, %f244;
	fma.rn.f32 	%f248, %f18, %f242, %f245;
	fma.rn.f32 	%f249, %f17, %f242, %f246;
	fma.rn.f32 	%f67, %f580, %f29, %f247;
	fma.rn.f32 	%f68, %f581, %f29, %f248;
	fma.rn.f32 	%f69, %f582, %f29, %f249;
	setp.gt.f32	%p38, %f68, 0f00000000;
	setp.eq.s32	%p39, %r5, 0;
	or.pred  	%p40, %p39, %p38;
	@!%p40 bra 	BB0_54;
	bra.uni 	BB0_53;

BB0_53:
	add.u64 	%rd50, %SP, 28;
	cvta.to.local.u64 	%rd51, %rd50;
	max.f32 	%f256, %f262, %f160;
	mov.u32 	%r218, 1065353216;
	st.local.u32 	[%rd51], %r218;
	ld.global.u32 	%r215, [root];
	mov.u32 	%r216, 1;
	mov.f32 	%f257, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r215, %f7, %f8, %f9, %f67, %f68, %f69, %r216, %f256, %f257, %rd50, %r92);
	// inline asm
	ld.local.f32 	%f264, [%rd51];
	fma.rn.f32 	%f603, %f67, %f264, %f603;
	fma.rn.f32 	%f604, %f68, %f264, %f604;
	fma.rn.f32 	%f605, %f69, %f264, %f605;
	mul.f32 	%f265, %f581, %f68;
	fma.rn.f32 	%f266, %f580, %f67, %f265;
	fma.rn.f32 	%f267, %f582, %f69, %f266;
	cvt.sat.f32.f32	%f268, %f267;
	fma.rn.f32 	%f606, %f268, %f264, %f606;

BB0_54:
	add.s32 	%r287, %r287, 1;
	setp.lt.s32	%p41, %r287, %r1;
	@%p41 bra 	BB0_6;

	add.s32 	%r285, %r285, 1;
	setp.lt.s32	%p42, %r285, %r1;
	@%p42 bra 	BB0_5;

BB0_56:
	mul.lo.s32 	%r219, %r1, %r1;
	cvt.rn.f32.s32	%f269, %r219;
	div.rn.f32 	%f270, %f606, %f269;
	add.f32 	%f271, %f270, %f270;
	ld.global.f32 	%f272, [skyColor];
	mul.f32 	%f82, %f272, %f271;
	ld.global.f32 	%f273, [skyColor+4];
	mul.f32 	%f83, %f271, %f273;
	ld.global.f32 	%f274, [skyColor+8];
	mul.f32 	%f84, %f271, %f274;
	ld.global.u32 	%r309, [imageEnabled];
	and.b32  	%r220, %r309, 1;
	setp.eq.b32	%p43, %r220, 1;
	@!%p43 bra 	BB0_91;
	bra.uni 	BB0_57;

BB0_57:
	mov.f32 	%f277, 0f3E666666;
	cvt.rzi.f32.f32	%f278, %f277;
	fma.rn.f32 	%f279, %f278, 0fC0000000, 0f3EE66666;
	abs.f32 	%f85, %f279;
	abs.f32 	%f86, %f82;
	setp.lt.f32	%p44, %f86, 0f00800000;
	mul.f32 	%f280, %f86, 0f4B800000;
	selp.f32	%f281, 0fC3170000, 0fC2FE0000, %p44;
	selp.f32	%f282, %f280, %f86, %p44;
	mov.b32 	 %r221, %f282;
	and.b32  	%r222, %r221, 8388607;
	or.b32  	%r223, %r222, 1065353216;
	mov.b32 	 %f283, %r223;
	shr.u32 	%r224, %r221, 23;
	cvt.rn.f32.u32	%f284, %r224;
	add.f32 	%f285, %f281, %f284;
	setp.gt.f32	%p45, %f283, 0f3FB504F3;
	mul.f32 	%f286, %f283, 0f3F000000;
	add.f32 	%f287, %f285, 0f3F800000;
	selp.f32	%f288, %f286, %f283, %p45;
	selp.f32	%f289, %f287, %f285, %p45;
	add.f32 	%f290, %f288, 0fBF800000;
	add.f32 	%f276, %f288, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f275,%f276;
	// inline asm
	add.f32 	%f291, %f290, %f290;
	mul.f32 	%f292, %f275, %f291;
	mul.f32 	%f293, %f292, %f292;
	mov.f32 	%f294, 0f3C4CAF63;
	mov.f32 	%f295, 0f3B18F0FE;
	fma.rn.f32 	%f296, %f295, %f293, %f294;
	mov.f32 	%f297, 0f3DAAAABD;
	fma.rn.f32 	%f298, %f296, %f293, %f297;
	mul.rn.f32 	%f299, %f298, %f293;
	mul.rn.f32 	%f300, %f299, %f292;
	sub.f32 	%f301, %f290, %f292;
	neg.f32 	%f302, %f292;
	add.f32 	%f303, %f301, %f301;
	fma.rn.f32 	%f304, %f302, %f290, %f303;
	mul.rn.f32 	%f305, %f275, %f304;
	add.f32 	%f306, %f300, %f292;
	sub.f32 	%f307, %f292, %f306;
	add.f32 	%f308, %f300, %f307;
	add.f32 	%f309, %f305, %f308;
	add.f32 	%f310, %f306, %f309;
	sub.f32 	%f311, %f306, %f310;
	add.f32 	%f312, %f309, %f311;
	mov.f32 	%f313, 0f3F317200;
	mul.rn.f32 	%f314, %f289, %f313;
	mov.f32 	%f315, 0f35BFBE8E;
	mul.rn.f32 	%f316, %f289, %f315;
	add.f32 	%f317, %f314, %f310;
	sub.f32 	%f318, %f314, %f317;
	add.f32 	%f319, %f310, %f318;
	add.f32 	%f320, %f312, %f319;
	add.f32 	%f321, %f316, %f320;
	add.f32 	%f322, %f317, %f321;
	sub.f32 	%f323, %f317, %f322;
	add.f32 	%f324, %f321, %f323;
	mov.f32 	%f325, 0f3EE66666;
	mul.rn.f32 	%f326, %f325, %f322;
	neg.f32 	%f327, %f326;
	fma.rn.f32 	%f328, %f325, %f322, %f327;
	fma.rn.f32 	%f329, %f325, %f324, %f328;
	mov.f32 	%f330, 0f00000000;
	fma.rn.f32 	%f331, %f330, %f322, %f329;
	add.rn.f32 	%f332, %f326, %f331;
	neg.f32 	%f333, %f332;
	add.rn.f32 	%f334, %f326, %f333;
	add.rn.f32 	%f335, %f334, %f331;
	mov.b32 	 %r225, %f332;
	setp.eq.s32	%p46, %r225, 1118925336;
	add.s32 	%r226, %r225, -1;
	mov.b32 	 %f336, %r226;
	add.f32 	%f337, %f335, 0f37000000;
	selp.f32	%f338, %f336, %f332, %p46;
	selp.f32	%f87, %f337, %f335, %p46;
	mul.f32 	%f339, %f338, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f340, %f339;
	mov.f32 	%f341, 0fBF317200;
	fma.rn.f32 	%f342, %f340, %f341, %f338;
	mov.f32 	%f343, 0fB5BFBE8E;
	fma.rn.f32 	%f344, %f340, %f343, %f342;
	mul.f32 	%f345, %f344, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f346, %f345;
	add.f32 	%f347, %f340, 0f00000000;
	ex2.approx.f32 	%f348, %f347;
	mul.f32 	%f349, %f346, %f348;
	setp.lt.f32	%p47, %f338, 0fC2D20000;
	selp.f32	%f350, 0f00000000, %f349, %p47;
	setp.gt.f32	%p48, %f338, 0f42D20000;
	selp.f32	%f611, 0f7F800000, %f350, %p48;
	setp.eq.f32	%p49, %f611, 0f7F800000;
	@%p49 bra 	BB0_59;

	fma.rn.f32 	%f611, %f611, %f87, %f611;

BB0_59:
	setp.lt.f32	%p50, %f82, 0f00000000;
	setp.eq.f32	%p51, %f85, 0f3F800000;
	and.pred  	%p1, %p50, %p51;
	mov.b32 	 %r227, %f611;
	xor.b32  	%r228, %r227, -2147483648;
	mov.b32 	 %f351, %r228;
	selp.f32	%f613, %f351, %f611, %p1;
	setp.eq.f32	%p52, %f82, 0f00000000;
	@%p52 bra 	BB0_62;
	bra.uni 	BB0_60;

BB0_62:
	add.f32 	%f354, %f82, %f82;
	selp.f32	%f613, %f354, 0f00000000, %p51;
	bra.uni 	BB0_63;

BB0_102:
	mov.u64 	%rd112, image_HDR;
	cvta.global.u64 	%rd107, %rd112;
	mov.u32 	%r276, 8;
	// inline asm
	call (%rd106), _rt_buffer_get_64, (%rd107, %r91, %r276, %rd17, %rd18, %rd24, %rd24);
	// inline asm
	mov.f32 	%f549, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs46, %f549;}

	// inline asm
	mov.u16 	%rs47, 0;
	st.v4.u16 	[%rd106], {%rs46, %rs46, %rs46, %rs47};

BB0_103:
	ld.global.u8 	%rs48, [imageEnabled];
	and.b16  	%rs49, %rs48, 64;
	setp.eq.s16	%p98, %rs49, 0;
	@%p98 bra 	BB0_105;

	cvt.u64.u32	%rd115, %r3;
	cvt.u64.u32	%rd116, %r4;
	mov.u64 	%rd119, image_Dir;
	cvta.global.u64 	%rd114, %rd119;
	// inline asm
	call (%rd113), _rt_buffer_get_64, (%rd114, %r91, %r92, %rd115, %rd116, %rd24, %rd24);
	// inline asm
	mov.u16 	%rs50, 0;
	st.v4.u8 	[%rd113], {%rs50, %rs50, %rs50, %rs50};
	bra.uni 	BB0_105;

BB0_60:
	setp.geu.f32	%p53, %f82, 0f00000000;
	@%p53 bra 	BB0_63;

	mov.f32 	%f573, 0f3EE66666;
	cvt.rzi.f32.f32	%f353, %f573;
	setp.neu.f32	%p54, %f353, 0f3EE66666;
	selp.f32	%f613, 0f7FFFFFFF, %f613, %p54;

BB0_63:
	abs.f32 	%f550, %f82;
	add.f32 	%f355, %f550, 0f3EE66666;
	mov.b32 	 %r229, %f355;
	setp.lt.s32	%p56, %r229, 2139095040;
	@%p56 bra 	BB0_68;

	abs.f32 	%f571, %f82;
	setp.gtu.f32	%p57, %f571, 0f7F800000;
	@%p57 bra 	BB0_67;
	bra.uni 	BB0_65;

BB0_67:
	add.f32 	%f613, %f82, 0f3EE66666;
	bra.uni 	BB0_68;

BB0_65:
	abs.f32 	%f572, %f82;
	setp.neu.f32	%p58, %f572, 0f7F800000;
	@%p58 bra 	BB0_68;

	selp.f32	%f613, 0fFF800000, 0f7F800000, %p1;

BB0_68:
	mov.f32 	%f559, 0fB5BFBE8E;
	mov.f32 	%f558, 0fBF317200;
	mov.f32 	%f557, 0f00000000;
	mov.f32 	%f556, 0f35BFBE8E;
	mov.f32 	%f555, 0f3F317200;
	mov.f32 	%f554, 0f3DAAAABD;
	mov.f32 	%f553, 0f3C4CAF63;
	mov.f32 	%f552, 0f3B18F0FE;
	mov.f32 	%f551, 0f3EE66666;
	setp.eq.f32	%p59, %f82, 0f3F800000;
	selp.f32	%f98, 0f3F800000, %f613, %p59;
	abs.f32 	%f99, %f83;
	setp.lt.f32	%p60, %f99, 0f00800000;
	mul.f32 	%f358, %f99, 0f4B800000;
	selp.f32	%f359, 0fC3170000, 0fC2FE0000, %p60;
	selp.f32	%f360, %f358, %f99, %p60;
	mov.b32 	 %r230, %f360;
	and.b32  	%r231, %r230, 8388607;
	or.b32  	%r232, %r231, 1065353216;
	mov.b32 	 %f361, %r232;
	shr.u32 	%r233, %r230, 23;
	cvt.rn.f32.u32	%f362, %r233;
	add.f32 	%f363, %f359, %f362;
	setp.gt.f32	%p61, %f361, 0f3FB504F3;
	mul.f32 	%f364, %f361, 0f3F000000;
	add.f32 	%f365, %f363, 0f3F800000;
	selp.f32	%f366, %f364, %f361, %p61;
	selp.f32	%f367, %f365, %f363, %p61;
	add.f32 	%f368, %f366, 0fBF800000;
	add.f32 	%f357, %f366, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f356,%f357;
	// inline asm
	add.f32 	%f369, %f368, %f368;
	mul.f32 	%f370, %f356, %f369;
	mul.f32 	%f371, %f370, %f370;
	fma.rn.f32 	%f374, %f552, %f371, %f553;
	fma.rn.f32 	%f376, %f374, %f371, %f554;
	mul.rn.f32 	%f377, %f376, %f371;
	mul.rn.f32 	%f378, %f377, %f370;
	sub.f32 	%f379, %f368, %f370;
	neg.f32 	%f380, %f370;
	add.f32 	%f381, %f379, %f379;
	fma.rn.f32 	%f382, %f380, %f368, %f381;
	mul.rn.f32 	%f383, %f356, %f382;
	add.f32 	%f384, %f378, %f370;
	sub.f32 	%f385, %f370, %f384;
	add.f32 	%f386, %f378, %f385;
	add.f32 	%f387, %f383, %f386;
	add.f32 	%f388, %f384, %f387;
	sub.f32 	%f389, %f384, %f388;
	add.f32 	%f390, %f387, %f389;
	mul.rn.f32 	%f392, %f367, %f555;
	mul.rn.f32 	%f394, %f367, %f556;
	add.f32 	%f395, %f392, %f388;
	sub.f32 	%f396, %f392, %f395;
	add.f32 	%f397, %f388, %f396;
	add.f32 	%f398, %f390, %f397;
	add.f32 	%f399, %f394, %f398;
	add.f32 	%f400, %f395, %f399;
	sub.f32 	%f401, %f395, %f400;
	add.f32 	%f402, %f399, %f401;
	mul.rn.f32 	%f404, %f551, %f400;
	neg.f32 	%f405, %f404;
	fma.rn.f32 	%f406, %f551, %f400, %f405;
	fma.rn.f32 	%f407, %f551, %f402, %f406;
	fma.rn.f32 	%f409, %f557, %f400, %f407;
	add.rn.f32 	%f410, %f404, %f409;
	neg.f32 	%f411, %f410;
	add.rn.f32 	%f412, %f404, %f411;
	add.rn.f32 	%f413, %f412, %f409;
	mov.b32 	 %r234, %f410;
	setp.eq.s32	%p62, %r234, 1118925336;
	add.s32 	%r235, %r234, -1;
	mov.b32 	 %f414, %r235;
	add.f32 	%f415, %f413, 0f37000000;
	selp.f32	%f416, %f414, %f410, %p62;
	selp.f32	%f100, %f415, %f413, %p62;
	mul.f32 	%f417, %f416, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f418, %f417;
	fma.rn.f32 	%f420, %f418, %f558, %f416;
	fma.rn.f32 	%f422, %f418, %f559, %f420;
	mul.f32 	%f423, %f422, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f424, %f423;
	add.f32 	%f425, %f418, 0f00000000;
	ex2.approx.f32 	%f426, %f425;
	mul.f32 	%f427, %f424, %f426;
	setp.lt.f32	%p63, %f416, 0fC2D20000;
	selp.f32	%f428, 0f00000000, %f427, %p63;
	setp.gt.f32	%p64, %f416, 0f42D20000;
	selp.f32	%f614, 0f7F800000, %f428, %p64;
	setp.eq.f32	%p65, %f614, 0f7F800000;
	@%p65 bra 	BB0_70;

	fma.rn.f32 	%f614, %f614, %f100, %f614;

BB0_70:
	setp.lt.f32	%p66, %f83, 0f00000000;
	and.pred  	%p2, %p66, %p51;
	mov.b32 	 %r236, %f614;
	xor.b32  	%r237, %r236, -2147483648;
	mov.b32 	 %f429, %r237;
	selp.f32	%f616, %f429, %f614, %p2;
	setp.eq.f32	%p68, %f83, 0f00000000;
	@%p68 bra 	BB0_73;
	bra.uni 	BB0_71;

BB0_73:
	add.f32 	%f432, %f83, %f83;
	selp.f32	%f616, %f432, 0f00000000, %p51;
	bra.uni 	BB0_74;

BB0_71:
	setp.geu.f32	%p69, %f83, 0f00000000;
	@%p69 bra 	BB0_74;

	mov.f32 	%f570, 0f3EE66666;
	cvt.rzi.f32.f32	%f431, %f570;
	setp.neu.f32	%p70, %f431, 0f3EE66666;
	selp.f32	%f616, 0f7FFFFFFF, %f616, %p70;

BB0_74:
	abs.f32 	%f574, %f83;
	add.f32 	%f433, %f574, 0f3EE66666;
	mov.b32 	 %r238, %f433;
	setp.lt.s32	%p72, %r238, 2139095040;
	@%p72 bra 	BB0_79;

	abs.f32 	%f575, %f83;
	setp.gtu.f32	%p73, %f575, 0f7F800000;
	@%p73 bra 	BB0_78;
	bra.uni 	BB0_76;

BB0_78:
	add.f32 	%f616, %f83, 0f3EE66666;
	bra.uni 	BB0_79;

BB0_76:
	abs.f32 	%f576, %f83;
	setp.neu.f32	%p74, %f576, 0f7F800000;
	@%p74 bra 	BB0_79;

	selp.f32	%f616, 0fFF800000, 0f7F800000, %p2;

BB0_79:
	mov.f32 	%f568, 0fB5BFBE8E;
	mov.f32 	%f567, 0fBF317200;
	mov.f32 	%f566, 0f00000000;
	mov.f32 	%f565, 0f35BFBE8E;
	mov.f32 	%f564, 0f3F317200;
	mov.f32 	%f563, 0f3DAAAABD;
	mov.f32 	%f562, 0f3C4CAF63;
	mov.f32 	%f561, 0f3B18F0FE;
	mov.f32 	%f560, 0f3EE66666;
	setp.eq.f32	%p75, %f83, 0f3F800000;
	selp.f32	%f111, 0f3F800000, %f616, %p75;
	abs.f32 	%f112, %f84;
	setp.lt.f32	%p76, %f112, 0f00800000;
	mul.f32 	%f436, %f112, 0f4B800000;
	selp.f32	%f437, 0fC3170000, 0fC2FE0000, %p76;
	selp.f32	%f438, %f436, %f112, %p76;
	mov.b32 	 %r239, %f438;
	and.b32  	%r240, %r239, 8388607;
	or.b32  	%r241, %r240, 1065353216;
	mov.b32 	 %f439, %r241;
	shr.u32 	%r242, %r239, 23;
	cvt.rn.f32.u32	%f440, %r242;
	add.f32 	%f441, %f437, %f440;
	setp.gt.f32	%p77, %f439, 0f3FB504F3;
	mul.f32 	%f442, %f439, 0f3F000000;
	add.f32 	%f443, %f441, 0f3F800000;
	selp.f32	%f444, %f442, %f439, %p77;
	selp.f32	%f445, %f443, %f441, %p77;
	add.f32 	%f446, %f444, 0fBF800000;
	add.f32 	%f435, %f444, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f434,%f435;
	// inline asm
	add.f32 	%f447, %f446, %f446;
	mul.f32 	%f448, %f434, %f447;
	mul.f32 	%f449, %f448, %f448;
	fma.rn.f32 	%f452, %f561, %f449, %f562;
	fma.rn.f32 	%f454, %f452, %f449, %f563;
	mul.rn.f32 	%f455, %f454, %f449;
	mul.rn.f32 	%f456, %f455, %f448;
	sub.f32 	%f457, %f446, %f448;
	neg.f32 	%f458, %f448;
	add.f32 	%f459, %f457, %f457;
	fma.rn.f32 	%f460, %f458, %f446, %f459;
	mul.rn.f32 	%f461, %f434, %f460;
	add.f32 	%f462, %f456, %f448;
	sub.f32 	%f463, %f448, %f462;
	add.f32 	%f464, %f456, %f463;
	add.f32 	%f465, %f461, %f464;
	add.f32 	%f466, %f462, %f465;
	sub.f32 	%f467, %f462, %f466;
	add.f32 	%f468, %f465, %f467;
	mul.rn.f32 	%f470, %f445, %f564;
	mul.rn.f32 	%f472, %f445, %f565;
	add.f32 	%f473, %f470, %f466;
	sub.f32 	%f474, %f470, %f473;
	add.f32 	%f475, %f466, %f474;
	add.f32 	%f476, %f468, %f475;
	add.f32 	%f477, %f472, %f476;
	add.f32 	%f478, %f473, %f477;
	sub.f32 	%f479, %f473, %f478;
	add.f32 	%f480, %f477, %f479;
	mul.rn.f32 	%f482, %f560, %f478;
	neg.f32 	%f483, %f482;
	fma.rn.f32 	%f484, %f560, %f478, %f483;
	fma.rn.f32 	%f485, %f560, %f480, %f484;
	fma.rn.f32 	%f487, %f566, %f478, %f485;
	add.rn.f32 	%f488, %f482, %f487;
	neg.f32 	%f489, %f488;
	add.rn.f32 	%f490, %f482, %f489;
	add.rn.f32 	%f491, %f490, %f487;
	mov.b32 	 %r243, %f488;
	setp.eq.s32	%p78, %r243, 1118925336;
	add.s32 	%r244, %r243, -1;
	mov.b32 	 %f492, %r244;
	add.f32 	%f493, %f491, 0f37000000;
	selp.f32	%f494, %f492, %f488, %p78;
	selp.f32	%f113, %f493, %f491, %p78;
	mul.f32 	%f495, %f494, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f496, %f495;
	fma.rn.f32 	%f498, %f496, %f567, %f494;
	fma.rn.f32 	%f500, %f496, %f568, %f498;
	mul.f32 	%f501, %f500, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f502, %f501;
	add.f32 	%f503, %f496, 0f00000000;
	ex2.approx.f32 	%f504, %f503;
	mul.f32 	%f505, %f502, %f504;
	setp.lt.f32	%p79, %f494, 0fC2D20000;
	selp.f32	%f506, 0f00000000, %f505, %p79;
	setp.gt.f32	%p80, %f494, 0f42D20000;
	selp.f32	%f617, 0f7F800000, %f506, %p80;
	setp.eq.f32	%p81, %f617, 0f7F800000;
	@%p81 bra 	BB0_81;

	fma.rn.f32 	%f617, %f617, %f113, %f617;

BB0_81:
	setp.lt.f32	%p82, %f84, 0f00000000;
	and.pred  	%p3, %p82, %p51;
	mov.b32 	 %r245, %f617;
	xor.b32  	%r246, %r245, -2147483648;
	mov.b32 	 %f507, %r246;
	selp.f32	%f619, %f507, %f617, %p3;
	setp.eq.f32	%p84, %f84, 0f00000000;
	@%p84 bra 	BB0_84;
	bra.uni 	BB0_82;

BB0_84:
	add.f32 	%f510, %f84, %f84;
	selp.f32	%f619, %f510, 0f00000000, %p51;
	bra.uni 	BB0_85;

BB0_82:
	setp.geu.f32	%p85, %f84, 0f00000000;
	@%p85 bra 	BB0_85;

	mov.f32 	%f569, 0f3EE66666;
	cvt.rzi.f32.f32	%f509, %f569;
	setp.neu.f32	%p86, %f509, 0f3EE66666;
	selp.f32	%f619, 0f7FFFFFFF, %f619, %p86;

BB0_85:
	abs.f32 	%f577, %f84;
	add.f32 	%f511, %f577, 0f3EE66666;
	mov.b32 	 %r247, %f511;
	setp.lt.s32	%p88, %r247, 2139095040;
	@%p88 bra 	BB0_90;

	abs.f32 	%f578, %f84;
	setp.gtu.f32	%p89, %f578, 0f7F800000;
	@%p89 bra 	BB0_89;
	bra.uni 	BB0_87;

BB0_89:
	add.f32 	%f619, %f84, 0f3EE66666;
	bra.uni 	BB0_90;

BB0_87:
	abs.f32 	%f579, %f84;
	setp.neu.f32	%p90, %f579, 0f7F800000;
	@%p90 bra 	BB0_90;

	selp.f32	%f619, 0fFF800000, 0f7F800000, %p3;

BB0_90:
	mov.u32 	%r280, 4;
	mov.u64 	%rd120, 0;
	mov.u32 	%r279, 2;
	setp.eq.f32	%p91, %f84, 0f3F800000;
	selp.f32	%f512, 0f3F800000, %f619, %p91;
	cvt.u64.u32	%rd55, %r4;
	cvt.u64.u32	%rd54, %r3;
	mov.u64 	%rd58, image;
	cvta.global.u64 	%rd53, %rd58;
	// inline asm
	call (%rd52), _rt_buffer_get_64, (%rd53, %r279, %r280, %rd54, %rd55, %rd120, %rd120);
	// inline asm
	cvt.sat.f32.f32	%f513, %f512;
	mul.f32 	%f514, %f513, 0f437FFD71;
	cvt.rzi.u32.f32	%r250, %f514;
	cvt.sat.f32.f32	%f515, %f111;
	mul.f32 	%f516, %f515, 0f437FFD71;
	cvt.rzi.u32.f32	%r251, %f516;
	cvt.sat.f32.f32	%f517, %f98;
	mul.f32 	%f518, %f517, 0f437FFD71;
	cvt.rzi.u32.f32	%r252, %f518;
	cvt.u16.u32	%rs10, %r250;
	cvt.u16.u32	%rs11, %r252;
	cvt.u16.u32	%rs12, %r251;
	mov.u16 	%rs13, 255;
	st.v4.u8 	[%rd52], {%rs10, %rs12, %rs11, %rs13};
	ld.global.u32 	%r309, [imageEnabled];

BB0_91:
	and.b32  	%r253, %r309, 4;
	setp.eq.s32	%p92, %r253, 0;
	@%p92 bra 	BB0_95;

	ld.global.u32 	%r254, [additive];
	setp.eq.s32	%p93, %r254, 0;
	cvt.u64.u32	%rd15, %r3;
	cvt.u64.u32	%rd16, %r4;
	mov.f32 	%f519, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs14, %f519;}

	// inline asm
	@%p93 bra 	BB0_94;

	mov.u64 	%rd121, 0;
	mov.u32 	%r281, 2;
	mov.u64 	%rd71, image_HDR;
	cvta.global.u64 	%rd60, %rd71;
	mov.u32 	%r258, 8;
	// inline asm
	call (%rd59), _rt_buffer_get_64, (%rd60, %r281, %r258, %rd15, %rd16, %rd121, %rd121);
	// inline asm
	ld.v4.u16 	{%rs21, %rs22, %rs23, %rs24}, [%rd59];
	// inline asm
	{  cvt.f32.f16 %f520, %rs21;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f521, %rs22;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f522, %rs23;}

	// inline asm
	// inline asm
	call (%rd65), _rt_buffer_get_64, (%rd60, %r281, %r258, %rd15, %rd16, %rd121, %rd121);
	// inline asm
	add.f32 	%f523, %f82, %f520;
	add.f32 	%f524, %f83, %f521;
	add.f32 	%f525, %f84, %f522;
	// inline asm
	{  cvt.rn.f16.f32 %rs20, %f525;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs19, %f524;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs18, %f523;}

	// inline asm
	st.v4.u16 	[%rd65], {%rs18, %rs19, %rs20, %rs14};
	bra.uni 	BB0_95;

BB0_94:
	mov.u64 	%rd122, 0;
	mov.u32 	%r282, 2;
	mov.u64 	%rd78, image_HDR;
	cvta.global.u64 	%rd73, %rd78;
	mov.u32 	%r260, 8;
	// inline asm
	call (%rd72), _rt_buffer_get_64, (%rd73, %r282, %r260, %rd15, %rd16, %rd122, %rd122);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs27, %f84;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs26, %f83;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f82;}

	// inline asm
	st.v4.u16 	[%rd72], {%rs25, %rs26, %rs27, %rs14};

BB0_95:
	ld.global.u8 	%rs28, [imageEnabled];
	and.b16  	%rs29, %rs28, 64;
	setp.eq.s16	%p94, %rs29, 0;
	@%p94 bra 	BB0_105;

	mov.u32 	%r284, 4;
	mov.u64 	%rd123, 0;
	mov.u32 	%r283, 2;
	mul.f32 	%f529, %f604, %f604;
	fma.rn.f32 	%f530, %f603, %f603, %f529;
	fma.rn.f32 	%f531, %f605, %f605, %f530;
	sqrt.rn.f32 	%f532, %f531;
	rcp.rn.f32 	%f533, %f532;
	mul.f32 	%f534, %f603, %f533;
	mul.f32 	%f535, %f604, %f533;
	mul.f32 	%f536, %f605, %f533;
	cvt.u64.u32	%rd82, %r4;
	cvt.u64.u32	%rd81, %r3;
	mov.u64 	%rd85, image_Dir;
	cvta.global.u64 	%rd80, %rd85;
	// inline asm
	call (%rd79), _rt_buffer_get_64, (%rd80, %r283, %r284, %rd81, %rd82, %rd123, %rd123);
	// inline asm
	fma.rn.f32 	%f537, %f534, 0f3F000000, 0f3F000000;
	mul.f32 	%f538, %f537, 0f437F0000;
	cvt.rzi.u32.f32	%r263, %f538;
	fma.rn.f32 	%f539, %f535, 0f3F000000, 0f3F000000;
	mul.f32 	%f540, %f539, 0f437F0000;
	cvt.rzi.u32.f32	%r264, %f540;
	fma.rn.f32 	%f541, %f536, 0f3F000000, 0f3F000000;
	mul.f32 	%f542, %f541, 0f437F0000;
	cvt.rzi.u32.f32	%r265, %f542;
	cvt.u16.u32	%rs30, %r265;
	cvt.u16.u32	%rs31, %r264;
	cvt.u16.u32	%rs32, %r263;
	mov.u16 	%rs33, 255;
	st.v4.u8 	[%rd79], {%rs32, %rs31, %rs30, %rs33};

BB0_105:
	ret;
}