//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_Dir[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 4 .b8 directDir[12];
.global .align 4 .b8 directColor[12];
.global .align 4 .f32 shadowSpread;
.global .align 4 .u32 samples;
.global .align 4 .u32 ignoreNormal;
.global .align 4 .u32 lightCookie;
.global .align 16 .b8 lightTilingOffset[16];
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9directDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo11directColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12shadowSpreadE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightCookieE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo17lightTilingOffsetE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9directDirE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename11directColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename12shadowSpreadE[6] = {102, 108, 111, 97, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename11lightCookieE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename17lightTilingOffsetE[7] = {102, 108, 111, 97, 116, 52, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9directDirE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum11directColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12shadowSpreadE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum11lightCookieE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum17lightTilingOffsetE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic9directDirE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic11directColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12shadowSpreadE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic11lightCookieE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic17lightTilingOffsetE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9directDirE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation11directColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12shadowSpreadE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation11lightCookieE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation17lightTilingOffsetE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[32];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<129>;
	.reg .b16 	%rs<76>;
	.reg .f32 	%f<751>;
	.reg .b32 	%r<373>;
	.reg .b64 	%rd<187>;


	mov.u64 	%rd186, __local_depot0;
	cvta.local.u64 	%SP, %rd186;
	ld.global.v2.u32 	{%r106, %r107}, [pixelID];
	cvt.u64.u32	%rd24, %r106;
	cvt.u64.u32	%rd25, %r107;
	mov.u64 	%rd28, uvnormal;
	cvta.global.u64 	%rd23, %rd28;
	mov.u32 	%r104, 2;
	mov.u32 	%r105, 4;
	mov.u64 	%rd27, 0;
	// inline asm
	call (%rd22), _rt_buffer_get_64, (%rd23, %r104, %r105, %rd24, %rd25, %rd27, %rd27);
	// inline asm
	ld.u32 	%r1, [%rd22];
	shr.u32 	%r110, %r1, 16;
	cvt.u16.u32	%rs1, %r110;
	and.b16  	%rs4, %rs1, 255;
	cvt.u16.u32	%rs5, %r1;
	or.b16  	%rs6, %rs5, %rs4;
	setp.eq.s16	%p5, %rs6, 0;
	mov.f32 	%f719, 0f00000000;
	mov.f32 	%f720, %f719;
	mov.f32 	%f721, %f719;
	@%p5 bra 	BB0_2;

	ld.u8 	%rs7, [%rd22+1];
	and.b16  	%rs9, %rs5, 255;
	cvt.rn.f32.u16	%f132, %rs9;
	div.rn.f32 	%f133, %f132, 0f437F0000;
	fma.rn.f32 	%f134, %f133, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f135, %rs7;
	div.rn.f32 	%f136, %f135, 0f437F0000;
	fma.rn.f32 	%f137, %f136, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f138, %rs4;
	div.rn.f32 	%f139, %f138, 0f437F0000;
	fma.rn.f32 	%f140, %f139, 0f40000000, 0fBF800000;
	mul.f32 	%f141, %f137, %f137;
	fma.rn.f32 	%f142, %f134, %f134, %f141;
	fma.rn.f32 	%f143, %f140, %f140, %f142;
	sqrt.rn.f32 	%f144, %f143;
	rcp.rn.f32 	%f145, %f144;
	mul.f32 	%f719, %f134, %f145;
	mul.f32 	%f720, %f137, %f145;
	mul.f32 	%f721, %f140, %f145;

BB0_2:
	ld.global.v2.u32 	{%r111, %r112}, [pixelID];
	ld.global.v2.u32 	{%r114, %r115}, [tileInfo];
	add.s32 	%r2, %r111, %r114;
	add.s32 	%r3, %r112, %r115;
	setp.eq.f32	%p6, %f720, 0f00000000;
	setp.eq.f32	%p7, %f719, 0f00000000;
	and.pred  	%p8, %p7, %p6;
	setp.eq.f32	%p9, %f721, 0f00000000;
	and.pred  	%p10, %p8, %p9;
	@%p10 bra 	BB0_122;
	bra.uni 	BB0_3;

BB0_122:
	ld.global.u32 	%r372, [imageEnabled];
	and.b32  	%r316, %r372, 1;
	setp.eq.b32	%p124, %r316, 1;
	@!%p124 bra 	BB0_124;
	bra.uni 	BB0_123;

BB0_123:
	cvt.u64.u32	%rd139, %r2;
	cvt.u64.u32	%rd140, %r3;
	mov.u64 	%rd143, image;
	cvta.global.u64 	%rd138, %rd143;
	// inline asm
	call (%rd137), _rt_buffer_get_64, (%rd138, %r104, %r105, %rd139, %rd140, %rd27, %rd27);
	// inline asm
	mov.u16 	%rs57, 0;
	st.v4.u8 	[%rd137], {%rs57, %rs57, %rs57, %rs57};
	ld.global.u32 	%r372, [imageEnabled];

BB0_124:
	and.b32  	%r319, %r372, 8;
	setp.eq.s32	%p125, %r319, 0;
	@%p125 bra 	BB0_126;

	cvt.u64.u32	%rd146, %r2;
	cvt.u64.u32	%rd147, %r3;
	mov.u64 	%rd150, image_Mask;
	cvta.global.u64 	%rd145, %rd150;
	// inline asm
	call (%rd144), _rt_buffer_get_64, (%rd145, %r104, %r104, %rd146, %rd147, %rd27, %rd27);
	// inline asm
	mov.f32 	%f684, 0f00000000;
	cvt.rzi.u32.f32	%r322, %f684;
	cvt.u16.u32	%rs58, %r322;
	mov.u16 	%rs59, 0;
	st.v2.u8 	[%rd144], {%rs58, %rs59};
	ld.global.u32 	%r372, [imageEnabled];

BB0_126:
	and.b32  	%r323, %r372, 4;
	setp.eq.s32	%p126, %r323, 0;
	@%p126 bra 	BB0_130;

	ld.global.u32 	%r324, [additive];
	setp.eq.s32	%p127, %r324, 0;
	cvt.u64.u32	%rd20, %r2;
	cvt.u64.u32	%rd21, %r3;
	@%p127 bra 	BB0_129;

	mov.u64 	%rd163, image_HDR;
	cvta.global.u64 	%rd152, %rd163;
	mov.u32 	%r328, 8;
	// inline asm
	call (%rd151), _rt_buffer_get_64, (%rd152, %r104, %r328, %rd20, %rd21, %rd27, %rd27);
	// inline asm
	ld.v4.u16 	{%rs66, %rs67, %rs68, %rs69}, [%rd151];
	// inline asm
	{  cvt.f32.f16 %f685, %rs66;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f686, %rs67;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f687, %rs68;}

	// inline asm
	// inline asm
	call (%rd157), _rt_buffer_get_64, (%rd152, %r104, %r328, %rd20, %rd21, %rd27, %rd27);
	// inline asm
	add.f32 	%f688, %f685, 0f00000000;
	add.f32 	%f689, %f686, 0f00000000;
	add.f32 	%f690, %f687, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f690;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f689;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs63, %f688;}

	// inline asm
	mov.u16 	%rs70, 0;
	st.v4.u16 	[%rd157], {%rs63, %rs64, %rs65, %rs70};
	bra.uni 	BB0_130;

BB0_3:
	ld.global.f32 	%f9, [directDir+8];
	ld.global.f32 	%f8, [directDir+4];
	ld.global.f32 	%f7, [directDir];
	mul.f32 	%f146, %f719, %f7;
	mul.f32 	%f147, %f720, %f8;
	neg.f32 	%f148, %f147;
	sub.f32 	%f149, %f148, %f146;
	mul.f32 	%f150, %f721, %f9;
	sub.f32 	%f10, %f149, %f150;
	ld.global.u32 	%r119, [ignoreNormal];
	setp.eq.s32	%p11, %r119, 0;
	setp.le.f32	%p12, %f10, 0f00000000;
	and.pred  	%p13, %p11, %p12;
	ld.global.u32 	%r370, [imageEnabled];
	and.b32  	%r120, %r370, 32;
	setp.eq.s32	%p14, %r120, 0;
	and.pred  	%p15, %p13, %p14;
	@%p15 bra 	BB0_112;
	bra.uni 	BB0_4;

BB0_112:
	and.b32  	%r299, %r370, 1;
	setp.eq.b32	%p119, %r299, 1;
	@!%p119 bra 	BB0_114;
	bra.uni 	BB0_113;

BB0_113:
	cvt.u64.u32	%rd98, %r2;
	cvt.u64.u32	%rd99, %r3;
	mov.u64 	%rd102, image;
	cvta.global.u64 	%rd97, %rd102;
	// inline asm
	call (%rd96), _rt_buffer_get_64, (%rd97, %r104, %r105, %rd98, %rd99, %rd27, %rd27);
	// inline asm
	mov.u16 	%rs37, 255;
	mov.u16 	%rs38, 0;
	st.v4.u8 	[%rd96], {%rs38, %rs38, %rs38, %rs37};
	ld.global.u32 	%r370, [imageEnabled];

BB0_114:
	and.b32  	%r302, %r370, 8;
	setp.eq.s32	%p120, %r302, 0;
	@%p120 bra 	BB0_116;

	cvt.u64.u32	%rd105, %r2;
	cvt.u64.u32	%rd106, %r3;
	mov.u64 	%rd109, image_Mask;
	cvta.global.u64 	%rd104, %rd109;
	// inline asm
	call (%rd103), _rt_buffer_get_64, (%rd104, %r104, %r104, %rd105, %rd106, %rd27, %rd27);
	// inline asm
	mov.f32 	%f673, 0f00000000;
	cvt.rzi.u32.f32	%r305, %f673;
	cvt.u16.u32	%rs39, %r305;
	mov.u16 	%rs40, 255;
	st.v2.u8 	[%rd103], {%rs39, %rs40};
	ld.global.u32 	%r370, [imageEnabled];

BB0_116:
	and.b32  	%r306, %r370, 4;
	setp.eq.s32	%p121, %r306, 0;
	@%p121 bra 	BB0_120;

	ld.global.u32 	%r307, [additive];
	setp.eq.s32	%p122, %r307, 0;
	cvt.u64.u32	%rd18, %r2;
	cvt.u64.u32	%rd19, %r3;
	mov.f32 	%f674, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs41, %f674;}

	// inline asm
	@%p122 bra 	BB0_119;

	mov.u64 	%rd122, image_HDR;
	cvta.global.u64 	%rd111, %rd122;
	mov.u32 	%r311, 8;
	// inline asm
	call (%rd110), _rt_buffer_get_64, (%rd111, %r104, %r311, %rd18, %rd19, %rd27, %rd27);
	// inline asm
	ld.v4.u16 	{%rs48, %rs49, %rs50, %rs51}, [%rd110];
	// inline asm
	{  cvt.f32.f16 %f675, %rs48;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f676, %rs49;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f677, %rs50;}

	// inline asm
	// inline asm
	call (%rd116), _rt_buffer_get_64, (%rd111, %r104, %r311, %rd18, %rd19, %rd27, %rd27);
	// inline asm
	add.f32 	%f678, %f675, 0f00000000;
	add.f32 	%f679, %f676, 0f00000000;
	add.f32 	%f680, %f677, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs47, %f680;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs46, %f679;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs45, %f678;}

	// inline asm
	st.v4.u16 	[%rd116], {%rs45, %rs46, %rs47, %rs41};
	bra.uni 	BB0_120;

BB0_4:
	ld.global.v2.u32 	{%r125, %r126}, [pixelID];
	cvt.u64.u32	%rd31, %r125;
	cvt.u64.u32	%rd32, %r126;
	mov.u64 	%rd41, uvpos;
	cvta.global.u64 	%rd30, %rd41;
	mov.u32 	%r122, 12;
	// inline asm
	call (%rd29), _rt_buffer_get_64, (%rd30, %r104, %r122, %rd31, %rd32, %rd27, %rd27);
	// inline asm
	ld.f32 	%f13, [%rd29+8];
	ld.f32 	%f12, [%rd29+4];
	ld.f32 	%f11, [%rd29];
	mul.f32 	%f152, %f11, 0f3456BF95;
	mul.f32 	%f153, %f12, 0f3456BF95;
	mul.f32 	%f154, %f13, 0f3456BF95;
	abs.f32 	%f155, %f719;
	div.rn.f32 	%f156, %f152, %f155;
	abs.f32 	%f157, %f720;
	div.rn.f32 	%f158, %f153, %f157;
	abs.f32 	%f159, %f721;
	div.rn.f32 	%f160, %f154, %f159;
	abs.f32 	%f161, %f156;
	abs.f32 	%f162, %f158;
	abs.f32 	%f163, %f160;
	mov.f32 	%f164, 0f38D1B717;
	max.f32 	%f165, %f161, %f164;
	max.f32 	%f166, %f162, %f164;
	max.f32 	%f167, %f163, %f164;
	fma.rn.f32 	%f14, %f719, %f165, %f11;
	fma.rn.f32 	%f15, %f720, %f166, %f12;
	fma.rn.f32 	%f16, %f721, %f167, %f13;
	abs.f32 	%f168, %f9;
	abs.f32 	%f169, %f7;
	setp.gt.f32	%p16, %f169, %f168;
	neg.f32 	%f170, %f8;
	selp.f32	%f171, %f170, 0f00000000, %p16;
	neg.f32 	%f172, %f9;
	selp.f32	%f173, %f7, %f172, %p16;
	selp.f32	%f174, 0f00000000, %f8, %p16;
	mul.f32 	%f175, %f173, %f173;
	fma.rn.f32 	%f176, %f171, %f171, %f175;
	fma.rn.f32 	%f177, %f174, %f174, %f176;
	sqrt.rn.f32 	%f178, %f177;
	rcp.rn.f32 	%f179, %f178;
	mul.f32 	%f17, %f171, %f179;
	mul.f32 	%f18, %f173, %f179;
	mul.f32 	%f19, %f174, %f179;
	mul.f32 	%f180, %f9, %f18;
	mul.f32 	%f181, %f8, %f19;
	sub.f32 	%f20, %f180, %f181;
	mul.f32 	%f182, %f7, %f19;
	mul.f32 	%f183, %f9, %f17;
	sub.f32 	%f21, %f182, %f183;
	mul.f32 	%f184, %f8, %f17;
	mul.f32 	%f185, %f7, %f18;
	sub.f32 	%f22, %f184, %f185;
	ld.global.v2.u32 	{%r129, %r130}, [pixelID];
	cvt.u64.u32	%rd37, %r129;
	cvt.u64.u32	%rd38, %r130;
	mov.u64 	%rd42, rnd_seeds;
	cvta.global.u64 	%rd36, %rd42;
	// inline asm
	call (%rd35), _rt_buffer_get_64, (%rd36, %r104, %r105, %rd37, %rd38, %rd27, %rd27);
	// inline asm
	ld.global.u32 	%r339, [samples];
	mov.f32 	%f736, 0f00000000;
	setp.lt.s32	%p17, %r339, 1;
	@%p17 bra 	BB0_56;

	cvt.rn.f32.s32	%f187, %r339;
	rcp.rn.f32 	%f23, %f187;
	ld.u32 	%r365, [%rd35];
	mul.f32 	%f24, %f14, 0f3456BF95;
	mul.f32 	%f25, %f15, 0f3456BF95;
	mul.f32 	%f26, %f16, 0f3456BF95;
	mov.f32 	%f736, 0f00000000;
	mov.u32 	%r340, 0;
	abs.f32 	%f188, %f25;
	abs.f32 	%f189, %f24;
	max.f32 	%f190, %f189, %f188;
	abs.f32 	%f191, %f26;
	max.f32 	%f192, %f190, %f191;

BB0_6:
	setp.lt.s32	%p18, %r339, 1;
	@%p18 bra 	BB0_55;

	cvt.rn.f32.s32	%f28, %r340;
	max.f32 	%f29, %f192, %f164;
	mov.u32 	%r342, 0;

BB0_8:
	mad.lo.s32 	%r135, %r365, 1664525, 1013904223;
	and.b32  	%r136, %r135, 16777215;
	cvt.rn.f32.u32	%f194, %r136;
	fma.rn.f32 	%f195, %f194, 0f33800000, %f28;
	mul.f32 	%f196, %f23, %f195;
	mad.lo.s32 	%r365, %r135, 1664525, 1013904223;
	and.b32  	%r137, %r365, 16777215;
	cvt.rn.f32.u32	%f197, %r137;
	cvt.rn.f32.s32	%f198, %r342;
	fma.rn.f32 	%f199, %f197, 0f33800000, %f198;
	mul.f32 	%f200, %f23, %f199;
	sqrt.rn.f32 	%f31, %f196;
	mul.f32 	%f730, %f200, 0f40C90FDB;
	abs.f32 	%f33, %f730;
	setp.neu.f32	%p19, %f33, 0f7F800000;
	mov.f32 	%f724, %f730;
	@%p19 bra 	BB0_10;

	mov.f32 	%f201, 0f00000000;
	mul.rn.f32 	%f724, %f730, %f201;

BB0_10:
	mul.f32 	%f202, %f724, 0f3F22F983;
	cvt.rni.s32.f32	%r353, %f202;
	cvt.rn.f32.s32	%f203, %r353;
	neg.f32 	%f204, %f203;
	mov.f32 	%f205, 0f3FC90FDA;
	fma.rn.f32 	%f206, %f204, %f205, %f724;
	mov.f32 	%f207, 0f33A22168;
	fma.rn.f32 	%f208, %f204, %f207, %f206;
	mov.f32 	%f209, 0f27C234C5;
	fma.rn.f32 	%f725, %f204, %f209, %f208;
	abs.f32 	%f210, %f724;
	setp.leu.f32	%p20, %f210, 0f47CE4780;
	@%p20 bra 	BB0_21;

	mov.b32 	 %r14, %f724;
	shr.u32 	%r15, %r14, 23;
	shl.b32 	%r140, %r14, 8;
	or.b32  	%r16, %r140, -2147483648;
	add.u64 	%rd44, %SP, 0;
	cvta.to.local.u64 	%rd183, %rd44;
	mov.u32 	%r345, 0;
	mov.u64 	%rd182, __cudart_i2opi_f;
	mov.u32 	%r344, -6;

BB0_12:
	.pragma "nounroll";
	ld.const.u32 	%r143, [%rd182];
	// inline asm
	{
	mad.lo.cc.u32   %r141, %r143, %r16, %r345;
	madc.hi.u32     %r345, %r143, %r16,  0;
	}
	// inline asm
	st.local.u32 	[%rd183], %r141;
	add.s64 	%rd183, %rd183, 4;
	add.s64 	%rd182, %rd182, 4;
	add.s32 	%r344, %r344, 1;
	setp.ne.s32	%p21, %r344, 0;
	@%p21 bra 	BB0_12;

	and.b32  	%r146, %r15, 255;
	add.s32 	%r147, %r146, -128;
	shr.u32 	%r148, %r147, 5;
	and.b32  	%r21, %r14, -2147483648;
	cvta.to.local.u64 	%rd46, %rd44;
	st.local.u32 	[%rd46+24], %r345;
	mov.u32 	%r149, 6;
	sub.s32 	%r150, %r149, %r148;
	mul.wide.s32 	%rd47, %r150, 4;
	add.s64 	%rd8, %rd46, %rd47;
	ld.local.u32 	%r346, [%rd8];
	ld.local.u32 	%r347, [%rd8+-4];
	and.b32  	%r24, %r15, 31;
	setp.eq.s32	%p22, %r24, 0;
	@%p22 bra 	BB0_15;

	mov.u32 	%r151, 32;
	sub.s32 	%r152, %r151, %r24;
	shr.u32 	%r153, %r347, %r152;
	shl.b32 	%r154, %r346, %r24;
	add.s32 	%r346, %r153, %r154;
	ld.local.u32 	%r155, [%rd8+-8];
	shr.u32 	%r156, %r155, %r152;
	shl.b32 	%r157, %r347, %r24;
	add.s32 	%r347, %r156, %r157;

BB0_15:
	shr.u32 	%r158, %r347, 30;
	shl.b32 	%r159, %r346, 2;
	add.s32 	%r348, %r158, %r159;
	shl.b32 	%r30, %r347, 2;
	shr.u32 	%r160, %r348, 31;
	shr.u32 	%r161, %r346, 30;
	add.s32 	%r31, %r160, %r161;
	setp.eq.s32	%p23, %r160, 0;
	@%p23 bra 	BB0_16;
	bra.uni 	BB0_17;

BB0_16:
	mov.u32 	%r349, %r21;
	mov.u32 	%r350, %r30;
	bra.uni 	BB0_18;

BB0_17:
	not.b32 	%r162, %r348;
	neg.s32 	%r350, %r30;
	setp.eq.s32	%p24, %r30, 0;
	selp.u32	%r163, 1, 0, %p24;
	add.s32 	%r348, %r163, %r162;
	xor.b32  	%r349, %r21, -2147483648;

BB0_18:
	clz.b32 	%r352, %r348;
	setp.eq.s32	%p25, %r352, 0;
	shl.b32 	%r164, %r348, %r352;
	mov.u32 	%r165, 32;
	sub.s32 	%r166, %r165, %r352;
	shr.u32 	%r167, %r350, %r166;
	add.s32 	%r168, %r167, %r164;
	selp.b32	%r39, %r348, %r168, %p25;
	mov.u32 	%r169, -921707870;
	mul.hi.u32 	%r351, %r39, %r169;
	setp.eq.s32	%p26, %r21, 0;
	neg.s32 	%r170, %r31;
	selp.b32	%r353, %r31, %r170, %p26;
	setp.lt.s32	%p27, %r351, 1;
	@%p27 bra 	BB0_20;

	mul.lo.s32 	%r171, %r39, -921707870;
	shr.u32 	%r172, %r171, 31;
	shl.b32 	%r173, %r351, 1;
	add.s32 	%r351, %r172, %r173;
	add.s32 	%r352, %r352, 1;

BB0_20:
	mov.u32 	%r174, 126;
	sub.s32 	%r175, %r174, %r352;
	shl.b32 	%r176, %r175, 23;
	add.s32 	%r177, %r351, 1;
	shr.u32 	%r178, %r177, 7;
	add.s32 	%r179, %r178, 1;
	shr.u32 	%r180, %r179, 1;
	add.s32 	%r181, %r180, %r176;
	or.b32  	%r182, %r181, %r349;
	mov.b32 	 %f725, %r182;

BB0_21:
	mul.rn.f32 	%f39, %f725, %f725;
	add.s32 	%r47, %r353, 1;
	and.b32  	%r48, %r47, 1;
	setp.eq.s32	%p28, %r48, 0;
	@%p28 bra 	BB0_23;
	bra.uni 	BB0_22;

BB0_23:
	mov.f32 	%f213, 0f3C08839E;
	mov.f32 	%f214, 0fB94CA1F9;
	fma.rn.f32 	%f726, %f214, %f39, %f213;
	bra.uni 	BB0_24;

BB0_22:
	mov.f32 	%f211, 0fBAB6061A;
	mov.f32 	%f212, 0f37CCF5CE;
	fma.rn.f32 	%f726, %f212, %f39, %f211;

BB0_24:
	@%p28 bra 	BB0_26;
	bra.uni 	BB0_25;

BB0_26:
	mov.f32 	%f218, 0fBE2AAAA3;
	fma.rn.f32 	%f219, %f726, %f39, %f218;
	mov.f32 	%f220, 0f00000000;
	fma.rn.f32 	%f727, %f219, %f39, %f220;
	bra.uni 	BB0_27;

BB0_25:
	mov.f32 	%f215, 0f3D2AAAA5;
	fma.rn.f32 	%f216, %f726, %f39, %f215;
	mov.f32 	%f217, 0fBF000000;
	fma.rn.f32 	%f727, %f216, %f39, %f217;

BB0_27:
	fma.rn.f32 	%f728, %f727, %f725, %f725;
	@%p28 bra 	BB0_29;

	mov.f32 	%f221, 0f3F800000;
	fma.rn.f32 	%f728, %f727, %f39, %f221;

BB0_29:
	and.b32  	%r183, %r47, 2;
	setp.eq.s32	%p31, %r183, 0;
	@%p31 bra 	BB0_31;

	mov.f32 	%f222, 0f00000000;
	mov.f32 	%f223, 0fBF800000;
	fma.rn.f32 	%f728, %f728, %f223, %f222;

BB0_31:
	@%p19 bra 	BB0_33;

	mov.f32 	%f224, 0f00000000;
	mul.rn.f32 	%f730, %f730, %f224;

BB0_33:
	mul.f32 	%f225, %f730, 0f3F22F983;
	cvt.rni.s32.f32	%r363, %f225;
	cvt.rn.f32.s32	%f226, %r363;
	neg.f32 	%f227, %f226;
	fma.rn.f32 	%f229, %f227, %f205, %f730;
	fma.rn.f32 	%f231, %f227, %f207, %f229;
	fma.rn.f32 	%f731, %f227, %f209, %f231;
	abs.f32 	%f233, %f730;
	setp.leu.f32	%p33, %f233, 0f47CE4780;
	@%p33 bra 	BB0_44;

	mov.b32 	 %r50, %f730;
	shr.u32 	%r51, %r50, 23;
	shl.b32 	%r186, %r50, 8;
	or.b32  	%r52, %r186, -2147483648;
	add.u64 	%rd49, %SP, 0;
	cvta.to.local.u64 	%rd185, %rd49;
	mov.u32 	%r355, 0;
	mov.u64 	%rd184, __cudart_i2opi_f;
	mov.u32 	%r354, -6;

BB0_35:
	.pragma "nounroll";
	ld.const.u32 	%r189, [%rd184];
	// inline asm
	{
	mad.lo.cc.u32   %r187, %r189, %r52, %r355;
	madc.hi.u32     %r355, %r189, %r52,  0;
	}
	// inline asm
	st.local.u32 	[%rd185], %r187;
	add.s64 	%rd185, %rd185, 4;
	add.s64 	%rd184, %rd184, 4;
	add.s32 	%r354, %r354, 1;
	setp.ne.s32	%p34, %r354, 0;
	@%p34 bra 	BB0_35;

	and.b32  	%r192, %r51, 255;
	add.s32 	%r193, %r192, -128;
	shr.u32 	%r194, %r193, 5;
	and.b32  	%r57, %r50, -2147483648;
	cvta.to.local.u64 	%rd51, %rd49;
	st.local.u32 	[%rd51+24], %r355;
	mov.u32 	%r195, 6;
	sub.s32 	%r196, %r195, %r194;
	mul.wide.s32 	%rd52, %r196, 4;
	add.s64 	%rd14, %rd51, %rd52;
	ld.local.u32 	%r356, [%rd14];
	ld.local.u32 	%r357, [%rd14+-4];
	and.b32  	%r60, %r51, 31;
	setp.eq.s32	%p35, %r60, 0;
	@%p35 bra 	BB0_38;

	mov.u32 	%r197, 32;
	sub.s32 	%r198, %r197, %r60;
	shr.u32 	%r199, %r357, %r198;
	shl.b32 	%r200, %r356, %r60;
	add.s32 	%r356, %r199, %r200;
	ld.local.u32 	%r201, [%rd14+-8];
	shr.u32 	%r202, %r201, %r198;
	shl.b32 	%r203, %r357, %r60;
	add.s32 	%r357, %r202, %r203;

BB0_38:
	shr.u32 	%r204, %r357, 30;
	shl.b32 	%r205, %r356, 2;
	add.s32 	%r358, %r204, %r205;
	shl.b32 	%r66, %r357, 2;
	shr.u32 	%r206, %r358, 31;
	shr.u32 	%r207, %r356, 30;
	add.s32 	%r67, %r206, %r207;
	setp.eq.s32	%p36, %r206, 0;
	@%p36 bra 	BB0_39;
	bra.uni 	BB0_40;

BB0_39:
	mov.u32 	%r359, %r57;
	mov.u32 	%r360, %r66;
	bra.uni 	BB0_41;

BB0_40:
	not.b32 	%r208, %r358;
	neg.s32 	%r360, %r66;
	setp.eq.s32	%p37, %r66, 0;
	selp.u32	%r209, 1, 0, %p37;
	add.s32 	%r358, %r209, %r208;
	xor.b32  	%r359, %r57, -2147483648;

BB0_41:
	clz.b32 	%r362, %r358;
	setp.eq.s32	%p38, %r362, 0;
	shl.b32 	%r210, %r358, %r362;
	mov.u32 	%r211, 32;
	sub.s32 	%r212, %r211, %r362;
	shr.u32 	%r213, %r360, %r212;
	add.s32 	%r214, %r213, %r210;
	selp.b32	%r75, %r358, %r214, %p38;
	mov.u32 	%r215, -921707870;
	mul.hi.u32 	%r361, %r75, %r215;
	setp.eq.s32	%p39, %r57, 0;
	neg.s32 	%r216, %r67;
	selp.b32	%r363, %r67, %r216, %p39;
	setp.lt.s32	%p40, %r361, 1;
	@%p40 bra 	BB0_43;

	mul.lo.s32 	%r217, %r75, -921707870;
	shr.u32 	%r218, %r217, 31;
	shl.b32 	%r219, %r361, 1;
	add.s32 	%r361, %r218, %r219;
	add.s32 	%r362, %r362, 1;

BB0_43:
	mov.u32 	%r220, 126;
	sub.s32 	%r221, %r220, %r362;
	shl.b32 	%r222, %r221, 23;
	add.s32 	%r223, %r361, 1;
	shr.u32 	%r224, %r223, 7;
	add.s32 	%r225, %r224, 1;
	shr.u32 	%r226, %r225, 1;
	add.s32 	%r227, %r226, %r222;
	or.b32  	%r228, %r227, %r359;
	mov.b32 	 %f731, %r228;

BB0_44:
	mul.rn.f32 	%f56, %f731, %f731;
	and.b32  	%r83, %r363, 1;
	setp.eq.s32	%p41, %r83, 0;
	@%p41 bra 	BB0_46;
	bra.uni 	BB0_45;

BB0_46:
	mov.f32 	%f236, 0f3C08839E;
	mov.f32 	%f237, 0fB94CA1F9;
	fma.rn.f32 	%f732, %f237, %f56, %f236;
	bra.uni 	BB0_47;

BB0_45:
	mov.f32 	%f234, 0fBAB6061A;
	mov.f32 	%f235, 0f37CCF5CE;
	fma.rn.f32 	%f732, %f235, %f56, %f234;

BB0_47:
	@%p41 bra 	BB0_49;
	bra.uni 	BB0_48;

BB0_49:
	mov.f32 	%f241, 0fBE2AAAA3;
	fma.rn.f32 	%f242, %f732, %f56, %f241;
	mov.f32 	%f243, 0f00000000;
	fma.rn.f32 	%f733, %f242, %f56, %f243;
	bra.uni 	BB0_50;

BB0_48:
	mov.f32 	%f238, 0f3D2AAAA5;
	fma.rn.f32 	%f239, %f732, %f56, %f238;
	mov.f32 	%f240, 0fBF000000;
	fma.rn.f32 	%f733, %f239, %f56, %f240;

BB0_50:
	fma.rn.f32 	%f734, %f733, %f731, %f731;
	@%p41 bra 	BB0_52;

	mov.f32 	%f244, 0f3F800000;
	fma.rn.f32 	%f734, %f733, %f56, %f244;

BB0_52:
	and.b32  	%r229, %r363, 2;
	setp.eq.s32	%p44, %r229, 0;
	@%p44 bra 	BB0_54;

	mov.f32 	%f245, 0f00000000;
	mov.f32 	%f246, 0fBF800000;
	fma.rn.f32 	%f734, %f734, %f246, %f245;

BB0_54:
	mul.f32 	%f255, %f31, %f728;
	add.u64 	%rd53, %SP, 28;
	cvta.to.local.u64 	%rd54, %rd53;
	mul.f32 	%f256, %f255, %f255;
	mov.f32 	%f257, 0f3F800000;
	sub.f32 	%f258, %f257, %f256;
	mul.f32 	%f259, %f31, %f734;
	mul.f32 	%f260, %f259, %f259;
	sub.f32 	%f261, %f258, %f260;
	mov.f32 	%f262, 0f00000000;
	max.f32 	%f263, %f262, %f261;
	sqrt.rn.f32 	%f264, %f263;
	mul.f32 	%f265, %f17, %f259;
	mul.f32 	%f266, %f18, %f259;
	mul.f32 	%f267, %f19, %f259;
	fma.rn.f32 	%f268, %f20, %f255, %f265;
	fma.rn.f32 	%f269, %f21, %f255, %f266;
	fma.rn.f32 	%f270, %f22, %f255, %f267;
	fma.rn.f32 	%f271, %f7, %f264, %f268;
	fma.rn.f32 	%f272, %f8, %f264, %f269;
	fma.rn.f32 	%f273, %f9, %f264, %f270;
	add.f32 	%f274, %f7, %f271;
	add.f32 	%f275, %f8, %f272;
	add.f32 	%f276, %f9, %f273;
	ld.global.f32 	%f277, [shadowSpread];
	mul.f32 	%f278, %f277, %f274;
	mul.f32 	%f279, %f277, %f275;
	mul.f32 	%f280, %f277, %f276;
	sub.f32 	%f281, %f278, %f7;
	sub.f32 	%f282, %f279, %f8;
	sub.f32 	%f283, %f280, %f9;
	mul.f32 	%f284, %f282, %f282;
	fma.rn.f32 	%f285, %f281, %f281, %f284;
	fma.rn.f32 	%f286, %f283, %f283, %f285;
	sqrt.rn.f32 	%f287, %f286;
	rcp.rn.f32 	%f288, %f287;
	mul.f32 	%f250, %f288, %f281;
	mul.f32 	%f251, %f288, %f282;
	mul.f32 	%f252, %f288, %f283;
	ld.global.u32 	%r233, [imageEnabled];
	and.b32  	%r234, %r233, 32;
	setp.eq.s32	%p45, %r234, 0;
	selp.f32	%f289, 0f3F800000, 0f41200000, %p45;
	mul.f32 	%f253, %f289, %f29;
	mov.u32 	%r235, 1065353216;
	st.local.u32 	[%rd54], %r235;
	ld.global.u32 	%r230, [root];
	mov.u32 	%r231, 1;
	mov.f32 	%f254, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r230, %f14, %f15, %f16, %f250, %f251, %f252, %r231, %f253, %f254, %rd53, %r105);
	// inline asm
	ld.local.f32 	%f290, [%rd54];
	add.f32 	%f736, %f736, %f290;
	ld.global.u32 	%r339, [samples];
	add.s32 	%r342, %r342, 1;
	setp.lt.s32	%p46, %r342, %r339;
	@%p46 bra 	BB0_8;

BB0_55:
	add.s32 	%r340, %r340, 1;
	setp.lt.s32	%p47, %r340, %r339;
	@%p47 bra 	BB0_6;

BB0_56:
	setp.eq.s32	%p48, %r339, 0;
	mov.f32 	%f738, 0f3F800000;
	@%p48 bra 	BB0_58;

	mul.lo.s32 	%r236, %r339, %r339;
	cvt.rn.f32.s32	%f292, %r236;
	div.rn.f32 	%f738, %f736, %f292;

BB0_58:
	mul.f32 	%f301, %f12, %f21;
	fma.rn.f32 	%f302, %f11, %f20, %f301;
	fma.rn.f32 	%f303, %f13, %f22, %f302;
	ld.global.v4.f32 	{%f304, %f305, %f306, %f307}, [lightTilingOffset];
	fma.rn.f32 	%f297, %f303, %f304, %f306;
	mul.f32 	%f310, %f12, %f18;
	fma.rn.f32 	%f311, %f11, %f17, %f310;
	fma.rn.f32 	%f312, %f13, %f19, %f311;
	fma.rn.f32 	%f298, %f312, %f305, %f307;
	ld.global.u32 	%r237, [lightCookie];
	mov.f32 	%f300, 0f00000000;
	// inline asm
	call (%f293, %f294, %f295, %f296), _rt_texture_get_f_id, (%r237, %r104, %f297, %f298, %f300, %f300);
	// inline asm
	mul.f32 	%f73, %f738, %f293;
	ld.global.f32 	%f315, [directColor];
	mul.f32 	%f316, %f315, %f73;
	ld.global.f32 	%f317, [directColor+4];
	mul.f32 	%f318, %f317, %f73;
	ld.global.f32 	%f319, [directColor+8];
	mul.f32 	%f320, %f73, %f319;
	cvt.sat.f32.f32	%f321, %f10;
	mul.f32 	%f322, %f316, %f321;
	mul.f32 	%f323, %f318, %f321;
	mul.f32 	%f324, %f320, %f321;
	ld.global.u32 	%r239, [ignoreNormal];
	setp.eq.s32	%p49, %r239, 0;
	selp.f32	%f74, %f322, %f316, %p49;
	selp.f32	%f75, %f323, %f318, %p49;
	selp.f32	%f76, %f324, %f320, %p49;
	ld.global.u32 	%r368, [imageEnabled];
	and.b32  	%r240, %r368, 8;
	setp.eq.s32	%p50, %r240, 0;
	@%p50 bra 	BB0_71;

	cvt.u64.u32	%rd57, %r2;
	cvt.u64.u32	%rd58, %r3;
	mov.u64 	%rd61, image_Mask;
	cvta.global.u64 	%rd56, %rd61;
	// inline asm
	call (%rd55), _rt_buffer_get_64, (%rd56, %r104, %r104, %rd57, %rd58, %rd27, %rd27);
	// inline asm
	mov.f32 	%f327, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f328, %f327;
	fma.rn.f32 	%f329, %f328, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f77, %f329;
	abs.f32 	%f78, %f73;
	setp.lt.f32	%p51, %f78, 0f00800000;
	mul.f32 	%f330, %f78, 0f4B800000;
	selp.f32	%f331, 0fC3170000, 0fC2FE0000, %p51;
	selp.f32	%f332, %f330, %f78, %p51;
	mov.b32 	 %r243, %f332;
	and.b32  	%r244, %r243, 8388607;
	or.b32  	%r245, %r244, 1065353216;
	mov.b32 	 %f333, %r245;
	shr.u32 	%r246, %r243, 23;
	cvt.rn.f32.u32	%f334, %r246;
	add.f32 	%f335, %f331, %f334;
	setp.gt.f32	%p52, %f333, 0f3FB504F3;
	mul.f32 	%f336, %f333, 0f3F000000;
	add.f32 	%f337, %f335, 0f3F800000;
	selp.f32	%f338, %f336, %f333, %p52;
	selp.f32	%f339, %f337, %f335, %p52;
	add.f32 	%f340, %f338, 0fBF800000;
	add.f32 	%f326, %f338, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f325,%f326;
	// inline asm
	add.f32 	%f341, %f340, %f340;
	mul.f32 	%f342, %f325, %f341;
	mul.f32 	%f343, %f342, %f342;
	mov.f32 	%f344, 0f3C4CAF63;
	mov.f32 	%f345, 0f3B18F0FE;
	fma.rn.f32 	%f346, %f345, %f343, %f344;
	mov.f32 	%f347, 0f3DAAAABD;
	fma.rn.f32 	%f348, %f346, %f343, %f347;
	mul.rn.f32 	%f349, %f348, %f343;
	mul.rn.f32 	%f350, %f349, %f342;
	sub.f32 	%f351, %f340, %f342;
	neg.f32 	%f352, %f342;
	add.f32 	%f353, %f351, %f351;
	fma.rn.f32 	%f354, %f352, %f340, %f353;
	mul.rn.f32 	%f355, %f325, %f354;
	add.f32 	%f356, %f350, %f342;
	sub.f32 	%f357, %f342, %f356;
	add.f32 	%f358, %f350, %f357;
	add.f32 	%f359, %f355, %f358;
	add.f32 	%f360, %f356, %f359;
	sub.f32 	%f361, %f356, %f360;
	add.f32 	%f362, %f359, %f361;
	mov.f32 	%f363, 0f3F317200;
	mul.rn.f32 	%f364, %f339, %f363;
	mov.f32 	%f365, 0f35BFBE8E;
	mul.rn.f32 	%f366, %f339, %f365;
	add.f32 	%f367, %f364, %f360;
	sub.f32 	%f368, %f364, %f367;
	add.f32 	%f369, %f360, %f368;
	add.f32 	%f370, %f362, %f369;
	add.f32 	%f371, %f366, %f370;
	add.f32 	%f372, %f367, %f371;
	sub.f32 	%f373, %f367, %f372;
	add.f32 	%f374, %f371, %f373;
	mov.f32 	%f375, 0f3EE8BA2E;
	mul.rn.f32 	%f376, %f375, %f372;
	neg.f32 	%f377, %f376;
	fma.rn.f32 	%f378, %f375, %f372, %f377;
	fma.rn.f32 	%f379, %f375, %f374, %f378;
	fma.rn.f32 	%f381, %f300, %f372, %f379;
	add.rn.f32 	%f382, %f376, %f381;
	neg.f32 	%f383, %f382;
	add.rn.f32 	%f384, %f376, %f383;
	add.rn.f32 	%f385, %f384, %f381;
	mov.b32 	 %r247, %f382;
	setp.eq.s32	%p53, %r247, 1118925336;
	add.s32 	%r248, %r247, -1;
	mov.b32 	 %f386, %r248;
	add.f32 	%f387, %f385, 0f37000000;
	selp.f32	%f388, %f386, %f382, %p53;
	selp.f32	%f79, %f387, %f385, %p53;
	mul.f32 	%f389, %f388, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f390, %f389;
	mov.f32 	%f391, 0fBF317200;
	fma.rn.f32 	%f392, %f390, %f391, %f388;
	mov.f32 	%f393, 0fB5BFBE8E;
	fma.rn.f32 	%f394, %f390, %f393, %f392;
	mul.f32 	%f395, %f394, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f396, %f395;
	add.f32 	%f397, %f390, 0f00000000;
	ex2.approx.f32 	%f398, %f397;
	mul.f32 	%f399, %f396, %f398;
	setp.lt.f32	%p54, %f388, 0fC2D20000;
	selp.f32	%f400, 0f00000000, %f399, %p54;
	setp.gt.f32	%p55, %f388, 0f42D20000;
	selp.f32	%f739, 0f7F800000, %f400, %p55;
	setp.eq.f32	%p56, %f739, 0f7F800000;
	@%p56 bra 	BB0_61;

	fma.rn.f32 	%f739, %f739, %f79, %f739;

BB0_61:
	setp.lt.f32	%p57, %f73, 0f00000000;
	setp.eq.f32	%p58, %f77, 0f3F800000;
	and.pred  	%p1, %p57, %p58;
	mov.b32 	 %r249, %f739;
	xor.b32  	%r250, %r249, -2147483648;
	mov.b32 	 %f401, %r250;
	selp.f32	%f741, %f401, %f739, %p1;
	setp.eq.f32	%p59, %f73, 0f00000000;
	@%p59 bra 	BB0_64;
	bra.uni 	BB0_62;

BB0_64:
	add.f32 	%f404, %f73, %f73;
	selp.f32	%f741, %f404, 0f00000000, %p58;
	bra.uni 	BB0_65;

BB0_129:
	mov.u64 	%rd170, image_HDR;
	cvta.global.u64 	%rd165, %rd170;
	mov.u32 	%r330, 8;
	// inline asm
	call (%rd164), _rt_buffer_get_64, (%rd165, %r104, %r330, %rd20, %rd21, %rd27, %rd27);
	// inline asm
	mov.f32 	%f691, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f691;}

	// inline asm
	mov.u16 	%rs72, 0;
	st.v4.u16 	[%rd164], {%rs71, %rs71, %rs71, %rs72};

BB0_130:
	ld.global.u8 	%rs73, [imageEnabled];
	and.b16  	%rs74, %rs73, 64;
	setp.eq.s16	%p128, %rs74, 0;
	@%p128 bra 	BB0_132;

	cvt.u64.u32	%rd173, %r2;
	cvt.u64.u32	%rd174, %r3;
	mov.u64 	%rd177, image_Dir;
	cvta.global.u64 	%rd172, %rd177;
	// inline asm
	call (%rd171), _rt_buffer_get_64, (%rd172, %r104, %r105, %rd173, %rd174, %rd27, %rd27);
	// inline asm
	mov.u16 	%rs75, 0;
	st.v4.u8 	[%rd171], {%rs75, %rs75, %rs75, %rs75};
	bra.uni 	BB0_132;

BB0_119:
	mov.u64 	%rd129, image_HDR;
	cvta.global.u64 	%rd124, %rd129;
	mov.u32 	%r313, 8;
	// inline asm
	call (%rd123), _rt_buffer_get_64, (%rd124, %r104, %r313, %rd18, %rd19, %rd27, %rd27);
	// inline asm
	mov.f32 	%f681, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs52, %f681;}

	// inline asm
	st.v4.u16 	[%rd123], {%rs52, %rs52, %rs52, %rs41};

BB0_120:
	ld.global.u8 	%rs53, [imageEnabled];
	and.b16  	%rs54, %rs53, 64;
	setp.eq.s16	%p123, %rs54, 0;
	@%p123 bra 	BB0_132;

	cvt.u64.u32	%rd132, %r2;
	cvt.u64.u32	%rd133, %r3;
	mov.u64 	%rd136, image_Dir;
	cvta.global.u64 	%rd131, %rd136;
	// inline asm
	call (%rd130), _rt_buffer_get_64, (%rd131, %r104, %r105, %rd132, %rd133, %rd27, %rd27);
	// inline asm
	mov.u16 	%rs55, 255;
	mov.u16 	%rs56, 0;
	st.v4.u8 	[%rd130], {%rs56, %rs56, %rs56, %rs55};
	bra.uni 	BB0_132;

BB0_62:
	setp.geu.f32	%p60, %f73, 0f00000000;
	@%p60 bra 	BB0_65;

	mov.f32 	%f718, 0f3EE8BA2E;
	cvt.rzi.f32.f32	%f403, %f718;
	setp.neu.f32	%p61, %f403, 0f3EE8BA2E;
	selp.f32	%f741, 0f7FFFFFFF, %f741, %p61;

BB0_65:
	add.f32 	%f405, %f78, 0f3EE8BA2E;
	mov.b32 	 %r251, %f405;
	setp.lt.s32	%p63, %r251, 2139095040;
	@%p63 bra 	BB0_70;

	setp.gtu.f32	%p64, %f78, 0f7F800000;
	@%p64 bra 	BB0_69;
	bra.uni 	BB0_67;

BB0_69:
	add.f32 	%f741, %f73, 0f3EE8BA2E;
	bra.uni 	BB0_70;

BB0_67:
	setp.neu.f32	%p65, %f78, 0f7F800000;
	@%p65 bra 	BB0_70;

	selp.f32	%f741, 0fFF800000, 0f7F800000, %p1;

BB0_70:
	mul.f32 	%f406, %f741, 0f437F0000;
	setp.eq.f32	%p66, %f73, 0f3F800000;
	selp.f32	%f407, 0f437F0000, %f406, %p66;
	cvt.rzi.u32.f32	%r252, %f407;
	cvt.u16.u32	%rs11, %r252;
	mov.u16 	%rs12, 255;
	st.v2.u8 	[%rd55], {%rs11, %rs12};
	ld.global.u32 	%r368, [imageEnabled];

BB0_71:
	and.b32  	%r253, %r368, 1;
	setp.eq.b32	%p67, %r253, 1;
	@!%p67 bra 	BB0_106;
	bra.uni 	BB0_72;

BB0_72:
	mov.f32 	%f717, 0f00000000;
	mov.f32 	%f410, 0f3E666666;
	cvt.rzi.f32.f32	%f411, %f410;
	fma.rn.f32 	%f412, %f411, 0fC0000000, 0f3EE66666;
	abs.f32 	%f90, %f412;
	abs.f32 	%f91, %f74;
	setp.lt.f32	%p68, %f91, 0f00800000;
	mul.f32 	%f413, %f91, 0f4B800000;
	selp.f32	%f414, 0fC3170000, 0fC2FE0000, %p68;
	selp.f32	%f415, %f413, %f91, %p68;
	mov.b32 	 %r254, %f415;
	and.b32  	%r255, %r254, 8388607;
	or.b32  	%r256, %r255, 1065353216;
	mov.b32 	 %f416, %r256;
	shr.u32 	%r257, %r254, 23;
	cvt.rn.f32.u32	%f417, %r257;
	add.f32 	%f418, %f414, %f417;
	setp.gt.f32	%p69, %f416, 0f3FB504F3;
	mul.f32 	%f419, %f416, 0f3F000000;
	add.f32 	%f420, %f418, 0f3F800000;
	selp.f32	%f421, %f419, %f416, %p69;
	selp.f32	%f422, %f420, %f418, %p69;
	add.f32 	%f423, %f421, 0fBF800000;
	add.f32 	%f409, %f421, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f408,%f409;
	// inline asm
	add.f32 	%f424, %f423, %f423;
	mul.f32 	%f425, %f408, %f424;
	mul.f32 	%f426, %f425, %f425;
	mov.f32 	%f427, 0f3C4CAF63;
	mov.f32 	%f428, 0f3B18F0FE;
	fma.rn.f32 	%f429, %f428, %f426, %f427;
	mov.f32 	%f430, 0f3DAAAABD;
	fma.rn.f32 	%f431, %f429, %f426, %f430;
	mul.rn.f32 	%f432, %f431, %f426;
	mul.rn.f32 	%f433, %f432, %f425;
	sub.f32 	%f434, %f423, %f425;
	neg.f32 	%f435, %f425;
	add.f32 	%f436, %f434, %f434;
	fma.rn.f32 	%f437, %f435, %f423, %f436;
	mul.rn.f32 	%f438, %f408, %f437;
	add.f32 	%f439, %f433, %f425;
	sub.f32 	%f440, %f425, %f439;
	add.f32 	%f441, %f433, %f440;
	add.f32 	%f442, %f438, %f441;
	add.f32 	%f443, %f439, %f442;
	sub.f32 	%f444, %f439, %f443;
	add.f32 	%f445, %f442, %f444;
	mov.f32 	%f446, 0f3F317200;
	mul.rn.f32 	%f447, %f422, %f446;
	mov.f32 	%f448, 0f35BFBE8E;
	mul.rn.f32 	%f449, %f422, %f448;
	add.f32 	%f450, %f447, %f443;
	sub.f32 	%f451, %f447, %f450;
	add.f32 	%f452, %f443, %f451;
	add.f32 	%f453, %f445, %f452;
	add.f32 	%f454, %f449, %f453;
	add.f32 	%f455, %f450, %f454;
	sub.f32 	%f456, %f450, %f455;
	add.f32 	%f457, %f454, %f456;
	mov.f32 	%f458, 0f3EE66666;
	mul.rn.f32 	%f459, %f458, %f455;
	neg.f32 	%f460, %f459;
	fma.rn.f32 	%f461, %f458, %f455, %f460;
	fma.rn.f32 	%f462, %f458, %f457, %f461;
	fma.rn.f32 	%f464, %f717, %f455, %f462;
	add.rn.f32 	%f465, %f459, %f464;
	neg.f32 	%f466, %f465;
	add.rn.f32 	%f467, %f459, %f466;
	add.rn.f32 	%f468, %f467, %f464;
	mov.b32 	 %r258, %f465;
	setp.eq.s32	%p70, %r258, 1118925336;
	add.s32 	%r259, %r258, -1;
	mov.b32 	 %f469, %r259;
	add.f32 	%f470, %f468, 0f37000000;
	selp.f32	%f471, %f469, %f465, %p70;
	selp.f32	%f92, %f470, %f468, %p70;
	mul.f32 	%f472, %f471, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f473, %f472;
	mov.f32 	%f474, 0fBF317200;
	fma.rn.f32 	%f475, %f473, %f474, %f471;
	mov.f32 	%f476, 0fB5BFBE8E;
	fma.rn.f32 	%f477, %f473, %f476, %f475;
	mul.f32 	%f478, %f477, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f479, %f478;
	add.f32 	%f480, %f473, 0f00000000;
	ex2.approx.f32 	%f481, %f480;
	mul.f32 	%f482, %f479, %f481;
	setp.lt.f32	%p71, %f471, 0fC2D20000;
	selp.f32	%f483, 0f00000000, %f482, %p71;
	setp.gt.f32	%p72, %f471, 0f42D20000;
	selp.f32	%f742, 0f7F800000, %f483, %p72;
	setp.eq.f32	%p73, %f742, 0f7F800000;
	@%p73 bra 	BB0_74;

	fma.rn.f32 	%f742, %f742, %f92, %f742;

BB0_74:
	setp.lt.f32	%p74, %f74, 0f00000000;
	setp.eq.f32	%p75, %f90, 0f3F800000;
	and.pred  	%p2, %p74, %p75;
	mov.b32 	 %r260, %f742;
	xor.b32  	%r261, %r260, -2147483648;
	mov.b32 	 %f484, %r261;
	selp.f32	%f744, %f484, %f742, %p2;
	setp.eq.f32	%p76, %f74, 0f00000000;
	@%p76 bra 	BB0_77;
	bra.uni 	BB0_75;

BB0_77:
	add.f32 	%f487, %f74, %f74;
	selp.f32	%f744, %f487, 0f00000000, %p75;
	bra.uni 	BB0_78;

BB0_75:
	setp.geu.f32	%p77, %f74, 0f00000000;
	@%p77 bra 	BB0_78;

	cvt.rzi.f32.f32	%f486, %f458;
	setp.neu.f32	%p78, %f486, 0f3EE66666;
	selp.f32	%f744, 0f7FFFFFFF, %f744, %p78;

BB0_78:
	abs.f32 	%f692, %f74;
	add.f32 	%f488, %f692, 0f3EE66666;
	mov.b32 	 %r262, %f488;
	setp.lt.s32	%p80, %r262, 2139095040;
	@%p80 bra 	BB0_83;

	abs.f32 	%f709, %f74;
	setp.gtu.f32	%p81, %f709, 0f7F800000;
	@%p81 bra 	BB0_82;
	bra.uni 	BB0_80;

BB0_82:
	add.f32 	%f744, %f74, 0f3EE66666;
	bra.uni 	BB0_83;

BB0_80:
	abs.f32 	%f710, %f74;
	setp.neu.f32	%p82, %f710, 0f7F800000;
	@%p82 bra 	BB0_83;

	selp.f32	%f744, 0fFF800000, 0f7F800000, %p2;

BB0_83:
	mov.f32 	%f700, 0fB5BFBE8E;
	mov.f32 	%f699, 0fBF317200;
	mov.f32 	%f698, 0f35BFBE8E;
	mov.f32 	%f697, 0f3F317200;
	mov.f32 	%f696, 0f3DAAAABD;
	mov.f32 	%f695, 0f3C4CAF63;
	mov.f32 	%f694, 0f3B18F0FE;
	mov.f32 	%f693, 0f00000000;
	setp.eq.f32	%p83, %f74, 0f3F800000;
	selp.f32	%f103, 0f3F800000, %f744, %p83;
	abs.f32 	%f104, %f75;
	setp.lt.f32	%p84, %f104, 0f00800000;
	mul.f32 	%f491, %f104, 0f4B800000;
	selp.f32	%f492, 0fC3170000, 0fC2FE0000, %p84;
	selp.f32	%f493, %f491, %f104, %p84;
	mov.b32 	 %r263, %f493;
	and.b32  	%r264, %r263, 8388607;
	or.b32  	%r265, %r264, 1065353216;
	mov.b32 	 %f494, %r265;
	shr.u32 	%r266, %r263, 23;
	cvt.rn.f32.u32	%f495, %r266;
	add.f32 	%f496, %f492, %f495;
	setp.gt.f32	%p85, %f494, 0f3FB504F3;
	mul.f32 	%f497, %f494, 0f3F000000;
	add.f32 	%f498, %f496, 0f3F800000;
	selp.f32	%f499, %f497, %f494, %p85;
	selp.f32	%f500, %f498, %f496, %p85;
	add.f32 	%f501, %f499, 0fBF800000;
	add.f32 	%f490, %f499, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f489,%f490;
	// inline asm
	add.f32 	%f502, %f501, %f501;
	mul.f32 	%f503, %f489, %f502;
	mul.f32 	%f504, %f503, %f503;
	fma.rn.f32 	%f507, %f694, %f504, %f695;
	fma.rn.f32 	%f509, %f507, %f504, %f696;
	mul.rn.f32 	%f510, %f509, %f504;
	mul.rn.f32 	%f511, %f510, %f503;
	sub.f32 	%f512, %f501, %f503;
	neg.f32 	%f513, %f503;
	add.f32 	%f514, %f512, %f512;
	fma.rn.f32 	%f515, %f513, %f501, %f514;
	mul.rn.f32 	%f516, %f489, %f515;
	add.f32 	%f517, %f511, %f503;
	sub.f32 	%f518, %f503, %f517;
	add.f32 	%f519, %f511, %f518;
	add.f32 	%f520, %f516, %f519;
	add.f32 	%f521, %f517, %f520;
	sub.f32 	%f522, %f517, %f521;
	add.f32 	%f523, %f520, %f522;
	mul.rn.f32 	%f525, %f500, %f697;
	mul.rn.f32 	%f527, %f500, %f698;
	add.f32 	%f528, %f525, %f521;
	sub.f32 	%f529, %f525, %f528;
	add.f32 	%f530, %f521, %f529;
	add.f32 	%f531, %f523, %f530;
	add.f32 	%f532, %f527, %f531;
	add.f32 	%f533, %f528, %f532;
	sub.f32 	%f534, %f528, %f533;
	add.f32 	%f535, %f532, %f534;
	mul.rn.f32 	%f537, %f458, %f533;
	neg.f32 	%f538, %f537;
	fma.rn.f32 	%f539, %f458, %f533, %f538;
	fma.rn.f32 	%f540, %f458, %f535, %f539;
	fma.rn.f32 	%f542, %f693, %f533, %f540;
	add.rn.f32 	%f543, %f537, %f542;
	neg.f32 	%f544, %f543;
	add.rn.f32 	%f545, %f537, %f544;
	add.rn.f32 	%f546, %f545, %f542;
	mov.b32 	 %r267, %f543;
	setp.eq.s32	%p86, %r267, 1118925336;
	add.s32 	%r268, %r267, -1;
	mov.b32 	 %f547, %r268;
	add.f32 	%f548, %f546, 0f37000000;
	selp.f32	%f549, %f547, %f543, %p86;
	selp.f32	%f105, %f548, %f546, %p86;
	mul.f32 	%f550, %f549, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f551, %f550;
	fma.rn.f32 	%f553, %f551, %f699, %f549;
	fma.rn.f32 	%f555, %f551, %f700, %f553;
	mul.f32 	%f556, %f555, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f557, %f556;
	add.f32 	%f558, %f551, 0f00000000;
	ex2.approx.f32 	%f559, %f558;
	mul.f32 	%f560, %f557, %f559;
	setp.lt.f32	%p87, %f549, 0fC2D20000;
	selp.f32	%f561, 0f00000000, %f560, %p87;
	setp.gt.f32	%p88, %f549, 0f42D20000;
	selp.f32	%f745, 0f7F800000, %f561, %p88;
	setp.eq.f32	%p89, %f745, 0f7F800000;
	@%p89 bra 	BB0_85;

	fma.rn.f32 	%f745, %f745, %f105, %f745;

BB0_85:
	setp.lt.f32	%p90, %f75, 0f00000000;
	and.pred  	%p3, %p90, %p75;
	mov.b32 	 %r269, %f745;
	xor.b32  	%r270, %r269, -2147483648;
	mov.b32 	 %f562, %r270;
	selp.f32	%f747, %f562, %f745, %p3;
	setp.eq.f32	%p92, %f75, 0f00000000;
	@%p92 bra 	BB0_88;
	bra.uni 	BB0_86;

BB0_88:
	add.f32 	%f565, %f75, %f75;
	selp.f32	%f747, %f565, 0f00000000, %p75;
	bra.uni 	BB0_89;

BB0_86:
	setp.geu.f32	%p93, %f75, 0f00000000;
	@%p93 bra 	BB0_89;

	mov.f32 	%f716, 0f3EE66666;
	cvt.rzi.f32.f32	%f564, %f716;
	setp.neu.f32	%p94, %f564, 0f3EE66666;
	selp.f32	%f747, 0f7FFFFFFF, %f747, %p94;

BB0_89:
	abs.f32 	%f711, %f75;
	add.f32 	%f566, %f711, 0f3EE66666;
	mov.b32 	 %r271, %f566;
	setp.lt.s32	%p96, %r271, 2139095040;
	@%p96 bra 	BB0_94;

	abs.f32 	%f714, %f75;
	setp.gtu.f32	%p97, %f714, 0f7F800000;
	@%p97 bra 	BB0_93;
	bra.uni 	BB0_91;

BB0_93:
	add.f32 	%f747, %f75, 0f3EE66666;
	bra.uni 	BB0_94;

BB0_91:
	abs.f32 	%f715, %f75;
	setp.neu.f32	%p98, %f715, 0f7F800000;
	@%p98 bra 	BB0_94;

	selp.f32	%f747, 0fFF800000, 0f7F800000, %p3;

BB0_94:
	mov.f32 	%f712, 0f3EE66666;
	mov.f32 	%f708, 0fB5BFBE8E;
	mov.f32 	%f707, 0fBF317200;
	mov.f32 	%f706, 0f35BFBE8E;
	mov.f32 	%f705, 0f3F317200;
	mov.f32 	%f704, 0f3DAAAABD;
	mov.f32 	%f703, 0f3C4CAF63;
	mov.f32 	%f702, 0f3B18F0FE;
	mov.f32 	%f701, 0f00000000;
	setp.eq.f32	%p99, %f75, 0f3F800000;
	selp.f32	%f116, 0f3F800000, %f747, %p99;
	abs.f32 	%f117, %f76;
	setp.lt.f32	%p100, %f117, 0f00800000;
	mul.f32 	%f569, %f117, 0f4B800000;
	selp.f32	%f570, 0fC3170000, 0fC2FE0000, %p100;
	selp.f32	%f571, %f569, %f117, %p100;
	mov.b32 	 %r272, %f571;
	and.b32  	%r273, %r272, 8388607;
	or.b32  	%r274, %r273, 1065353216;
	mov.b32 	 %f572, %r274;
	shr.u32 	%r275, %r272, 23;
	cvt.rn.f32.u32	%f573, %r275;
	add.f32 	%f574, %f570, %f573;
	setp.gt.f32	%p101, %f572, 0f3FB504F3;
	mul.f32 	%f575, %f572, 0f3F000000;
	add.f32 	%f576, %f574, 0f3F800000;
	selp.f32	%f577, %f575, %f572, %p101;
	selp.f32	%f578, %f576, %f574, %p101;
	add.f32 	%f579, %f577, 0fBF800000;
	add.f32 	%f568, %f577, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f567,%f568;
	// inline asm
	add.f32 	%f580, %f579, %f579;
	mul.f32 	%f581, %f567, %f580;
	mul.f32 	%f582, %f581, %f581;
	fma.rn.f32 	%f585, %f702, %f582, %f703;
	fma.rn.f32 	%f587, %f585, %f582, %f704;
	mul.rn.f32 	%f588, %f587, %f582;
	mul.rn.f32 	%f589, %f588, %f581;
	sub.f32 	%f590, %f579, %f581;
	neg.f32 	%f591, %f581;
	add.f32 	%f592, %f590, %f590;
	fma.rn.f32 	%f593, %f591, %f579, %f592;
	mul.rn.f32 	%f594, %f567, %f593;
	add.f32 	%f595, %f589, %f581;
	sub.f32 	%f596, %f581, %f595;
	add.f32 	%f597, %f589, %f596;
	add.f32 	%f598, %f594, %f597;
	add.f32 	%f599, %f595, %f598;
	sub.f32 	%f600, %f595, %f599;
	add.f32 	%f601, %f598, %f600;
	mul.rn.f32 	%f603, %f578, %f705;
	mul.rn.f32 	%f605, %f578, %f706;
	add.f32 	%f606, %f603, %f599;
	sub.f32 	%f607, %f603, %f606;
	add.f32 	%f608, %f599, %f607;
	add.f32 	%f609, %f601, %f608;
	add.f32 	%f610, %f605, %f609;
	add.f32 	%f611, %f606, %f610;
	sub.f32 	%f612, %f606, %f611;
	add.f32 	%f613, %f610, %f612;
	mul.rn.f32 	%f615, %f712, %f611;
	neg.f32 	%f616, %f615;
	fma.rn.f32 	%f617, %f712, %f611, %f616;
	fma.rn.f32 	%f618, %f712, %f613, %f617;
	fma.rn.f32 	%f620, %f701, %f611, %f618;
	add.rn.f32 	%f621, %f615, %f620;
	neg.f32 	%f622, %f621;
	add.rn.f32 	%f623, %f615, %f622;
	add.rn.f32 	%f624, %f623, %f620;
	mov.b32 	 %r276, %f621;
	setp.eq.s32	%p102, %r276, 1118925336;
	add.s32 	%r277, %r276, -1;
	mov.b32 	 %f625, %r277;
	add.f32 	%f626, %f624, 0f37000000;
	selp.f32	%f627, %f625, %f621, %p102;
	selp.f32	%f118, %f626, %f624, %p102;
	mul.f32 	%f628, %f627, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f629, %f628;
	fma.rn.f32 	%f631, %f629, %f707, %f627;
	fma.rn.f32 	%f633, %f629, %f708, %f631;
	mul.f32 	%f634, %f633, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f635, %f634;
	add.f32 	%f636, %f629, 0f00000000;
	ex2.approx.f32 	%f637, %f636;
	mul.f32 	%f638, %f635, %f637;
	setp.lt.f32	%p103, %f627, 0fC2D20000;
	selp.f32	%f639, 0f00000000, %f638, %p103;
	setp.gt.f32	%p104, %f627, 0f42D20000;
	selp.f32	%f748, 0f7F800000, %f639, %p104;
	setp.eq.f32	%p105, %f748, 0f7F800000;
	@%p105 bra 	BB0_96;

	fma.rn.f32 	%f748, %f748, %f118, %f748;

BB0_96:
	setp.lt.f32	%p106, %f76, 0f00000000;
	and.pred  	%p4, %p106, %p75;
	mov.b32 	 %r278, %f748;
	xor.b32  	%r279, %r278, -2147483648;
	mov.b32 	 %f640, %r279;
	selp.f32	%f750, %f640, %f748, %p4;
	setp.eq.f32	%p108, %f76, 0f00000000;
	@%p108 bra 	BB0_99;
	bra.uni 	BB0_97;

BB0_99:
	add.f32 	%f643, %f76, %f76;
	selp.f32	%f750, %f643, 0f00000000, %p75;
	bra.uni 	BB0_100;

BB0_97:
	setp.geu.f32	%p109, %f76, 0f00000000;
	@%p109 bra 	BB0_100;

	mov.f32 	%f713, 0f3EE66666;
	cvt.rzi.f32.f32	%f642, %f713;
	setp.neu.f32	%p110, %f642, 0f3EE66666;
	selp.f32	%f750, 0f7FFFFFFF, %f750, %p110;

BB0_100:
	add.f32 	%f644, %f117, 0f3EE66666;
	mov.b32 	 %r280, %f644;
	setp.lt.s32	%p112, %r280, 2139095040;
	@%p112 bra 	BB0_105;

	setp.gtu.f32	%p113, %f117, 0f7F800000;
	@%p113 bra 	BB0_104;
	bra.uni 	BB0_102;

BB0_104:
	add.f32 	%f750, %f76, 0f3EE66666;
	bra.uni 	BB0_105;

BB0_102:
	setp.neu.f32	%p114, %f117, 0f7F800000;
	@%p114 bra 	BB0_105;

	selp.f32	%f750, 0fFF800000, 0f7F800000, %p4;

BB0_105:
	mov.u32 	%r334, 4;
	mov.u64 	%rd178, 0;
	mov.u32 	%r333, 2;
	setp.eq.f32	%p115, %f76, 0f3F800000;
	selp.f32	%f645, 0f3F800000, %f750, %p115;
	cvt.u64.u32	%rd65, %r3;
	cvt.u64.u32	%rd64, %r2;
	mov.u64 	%rd68, image;
	cvta.global.u64 	%rd63, %rd68;
	// inline asm
	call (%rd62), _rt_buffer_get_64, (%rd63, %r333, %r334, %rd64, %rd65, %rd178, %rd178);
	// inline asm
	cvt.sat.f32.f32	%f646, %f645;
	mul.f32 	%f647, %f646, 0f437FFD71;
	cvt.rzi.u32.f32	%r283, %f647;
	cvt.sat.f32.f32	%f648, %f116;
	mul.f32 	%f649, %f648, 0f437FFD71;
	cvt.rzi.u32.f32	%r284, %f649;
	cvt.sat.f32.f32	%f650, %f103;
	mul.f32 	%f651, %f650, 0f437FFD71;
	cvt.rzi.u32.f32	%r285, %f651;
	cvt.u16.u32	%rs13, %r283;
	cvt.u16.u32	%rs14, %r285;
	cvt.u16.u32	%rs15, %r284;
	mov.u16 	%rs16, 255;
	st.v4.u8 	[%rd62], {%rs13, %rs15, %rs14, %rs16};
	ld.global.u32 	%r368, [imageEnabled];

BB0_106:
	and.b32  	%r286, %r368, 4;
	setp.eq.s32	%p116, %r286, 0;
	@%p116 bra 	BB0_110;

	ld.global.u32 	%r287, [additive];
	setp.eq.s32	%p117, %r287, 0;
	cvt.u64.u32	%rd16, %r2;
	cvt.u64.u32	%rd17, %r3;
	mov.f32 	%f652, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs17, %f652;}

	// inline asm
	@%p117 bra 	BB0_109;

	mov.u64 	%rd179, 0;
	mov.u32 	%r335, 2;
	mov.u64 	%rd81, image_HDR;
	cvta.global.u64 	%rd70, %rd81;
	mov.u32 	%r291, 8;
	// inline asm
	call (%rd69), _rt_buffer_get_64, (%rd70, %r335, %r291, %rd16, %rd17, %rd179, %rd179);
	// inline asm
	ld.v4.u16 	{%rs24, %rs25, %rs26, %rs27}, [%rd69];
	// inline asm
	{  cvt.f32.f16 %f653, %rs24;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f654, %rs25;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f655, %rs26;}

	// inline asm
	// inline asm
	call (%rd75), _rt_buffer_get_64, (%rd70, %r335, %r291, %rd16, %rd17, %rd179, %rd179);
	// inline asm
	add.f32 	%f656, %f74, %f653;
	add.f32 	%f657, %f75, %f654;
	add.f32 	%f658, %f76, %f655;
	// inline asm
	{  cvt.rn.f16.f32 %rs23, %f658;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs22, %f657;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs21, %f656;}

	// inline asm
	st.v4.u16 	[%rd75], {%rs21, %rs22, %rs23, %rs17};
	bra.uni 	BB0_110;

BB0_109:
	mov.u64 	%rd180, 0;
	mov.u32 	%r336, 2;
	mov.u64 	%rd88, image_HDR;
	cvta.global.u64 	%rd83, %rd88;
	mov.u32 	%r293, 8;
	// inline asm
	call (%rd82), _rt_buffer_get_64, (%rd83, %r336, %r293, %rd16, %rd17, %rd180, %rd180);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs30, %f76;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs29, %f75;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs28, %f74;}

	// inline asm
	st.v4.u16 	[%rd82], {%rs28, %rs29, %rs30, %rs17};

BB0_110:
	ld.global.u8 	%rs31, [imageEnabled];
	and.b16  	%rs32, %rs31, 64;
	setp.eq.s16	%p118, %rs32, 0;
	@%p118 bra 	BB0_132;

	mov.u32 	%r338, 4;
	mov.u64 	%rd181, 0;
	mov.u32 	%r337, 2;
	ld.global.f32 	%f662, [directDir];
	ld.global.f32 	%f663, [directDir+4];
	ld.global.f32 	%f664, [directDir+8];
	cvt.u64.u32	%rd92, %r3;
	cvt.u64.u32	%rd91, %r2;
	mov.u64 	%rd95, image_Dir;
	cvta.global.u64 	%rd90, %rd95;
	// inline asm
	call (%rd89), _rt_buffer_get_64, (%rd90, %r337, %r338, %rd91, %rd92, %rd181, %rd181);
	// inline asm
	fma.rn.f32 	%f665, %f662, 0fBF000000, 0f3F000000;
	mul.f32 	%f666, %f665, 0f437F0000;
	cvt.rzi.u32.f32	%r296, %f666;
	fma.rn.f32 	%f667, %f663, 0fBF000000, 0f3F000000;
	mul.f32 	%f668, %f667, 0f437F0000;
	cvt.rzi.u32.f32	%r297, %f668;
	fma.rn.f32 	%f669, %f664, 0fBF000000, 0f3F000000;
	mul.f32 	%f670, %f669, 0f437F0000;
	cvt.rzi.u32.f32	%r298, %f670;
	cvt.u16.u32	%rs33, %r298;
	cvt.u16.u32	%rs34, %r297;
	cvt.u16.u32	%rs35, %r296;
	mov.u16 	%rs36, 255;
	st.v4.u8 	[%rd89], {%rs35, %rs34, %rs33, %rs36};

BB0_132:
	ret;
}