338 lines
12 KiB
Plaintext
338 lines
12 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 uvfacenormal[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<12>;
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.reg .b16 %rs<9>;
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.reg .f32 %f<153>;
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.reg .b32 %r<59>;
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.reg .b64 %rd<57>;
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mov.u64 %rd56, __local_depot0;
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cvta.local.u64 %SP, %rd56;
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ld.global.v2.u32 {%r6, %r7}, [pixelID];
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cvt.u64.u32 %rd4, %r6;
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cvt.u64.u32 %rd5, %r7;
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mov.u64 %rd8, uvfacenormal;
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cvta.global.u64 %rd3, %rd8;
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mov.u32 %r4, 2;
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mov.u32 %r5, 4;
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mov.u64 %rd7, 0;
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// inline asm
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call (%rd2), _rt_buffer_get_64, (%rd3, %r4, %r5, %rd4, %rd5, %rd7, %rd7);
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// inline asm
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ld.u32 %r1, [%rd2];
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shr.u32 %r10, %r1, 16;
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cvt.u16.u32 %rs1, %r10;
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and.b16 %rs2, %rs1, 255;
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cvt.u16.u32 %rs3, %r1;
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or.b16 %rs4, %rs3, %rs2;
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setp.eq.s16 %p1, %rs4, 0;
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mov.f32 %f143, 0f00000000;
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mov.f32 %f144, %f143;
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mov.f32 %f145, %f143;
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@%p1 bra BB0_2;
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ld.u8 %rs5, [%rd2+1];
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and.b16 %rs7, %rs3, 255;
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cvt.rn.f32.u16 %f61, %rs7;
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div.rn.f32 %f62, %f61, 0f437F0000;
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fma.rn.f32 %f63, %f62, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f64, %rs5;
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div.rn.f32 %f65, %f64, 0f437F0000;
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fma.rn.f32 %f66, %f65, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f67, %rs2;
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div.rn.f32 %f68, %f67, 0f437F0000;
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fma.rn.f32 %f69, %f68, 0f40000000, 0fBF800000;
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mul.f32 %f70, %f66, %f66;
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fma.rn.f32 %f71, %f63, %f63, %f70;
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fma.rn.f32 %f72, %f69, %f69, %f71;
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sqrt.rn.f32 %f73, %f72;
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rcp.rn.f32 %f74, %f73;
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mul.f32 %f143, %f63, %f74;
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mul.f32 %f144, %f66, %f74;
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mul.f32 %f145, %f69, %f74;
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BB0_2:
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ld.global.v2.u32 {%r11, %r12}, [pixelID];
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ld.global.v2.u32 {%r14, %r15}, [tileInfo];
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add.s32 %r2, %r11, %r14;
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add.s32 %r3, %r12, %r15;
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setp.eq.f32 %p2, %f144, 0f00000000;
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setp.eq.f32 %p3, %f143, 0f00000000;
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and.pred %p4, %p3, %p2;
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setp.eq.f32 %p5, %f145, 0f00000000;
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and.pred %p6, %p4, %p5;
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@%p6 bra BB0_9;
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bra.uni BB0_3;
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BB0_9:
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cvt.u64.u32 %rd51, %r2;
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cvt.u64.u32 %rd52, %r3;
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mov.u64 %rd55, image_HDR;
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cvta.global.u64 %rd50, %rd55;
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mov.u32 %r58, 16;
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// inline asm
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call (%rd49), _rt_buffer_get_64, (%rd50, %r4, %r58, %rd51, %rd52, %rd7, %rd7);
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// inline asm
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mov.f32 %f142, 0f00000000;
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st.v4.f32 [%rd49], {%f142, %f142, %f142, %f142};
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bra.uni BB0_10;
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BB0_3:
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ld.global.v2.u32 {%r30, %r31}, [pixelID];
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cvt.u64.u32 %rd11, %r30;
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cvt.u64.u32 %rd12, %r31;
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mov.u64 %rd34, uvpos;
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cvta.global.u64 %rd10, %rd34;
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mov.u32 %r26, 16;
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// inline asm
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call (%rd9), _rt_buffer_get_64, (%rd10, %r4, %r26, %rd11, %rd12, %rd7, %rd7);
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// inline asm
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ld.f32 %f150, [%rd9];
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ld.global.v2.u32 {%r34, %r35}, [pixelID];
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cvt.u64.u32 %rd17, %r34;
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cvt.u64.u32 %rd18, %r35;
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// inline asm
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call (%rd15), _rt_buffer_get_64, (%rd10, %r4, %r26, %rd17, %rd18, %rd7, %rd7);
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// inline asm
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ld.f32 %f151, [%rd15+4];
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ld.global.v2.u32 {%r38, %r39}, [pixelID];
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cvt.u64.u32 %rd23, %r38;
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cvt.u64.u32 %rd24, %r39;
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// inline asm
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call (%rd21), _rt_buffer_get_64, (%rd10, %r4, %r26, %rd23, %rd24, %rd7, %rd7);
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// inline asm
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ld.f32 %f152, [%rd21+8];
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ld.global.v2.u32 {%r42, %r43}, [pixelID];
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cvt.u64.u32 %rd29, %r42;
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cvt.u64.u32 %rd30, %r43;
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// inline asm
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call (%rd27), _rt_buffer_get_64, (%rd10, %r4, %r26, %rd29, %rd30, %rd7, %rd7);
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// inline asm
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ld.f32 %f83, [%rd27+12];
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add.f32 %f82, %f83, 0f38D1B717;
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fma.rn.f32 %f11, %f143, 0f38D1B717, %f150;
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fma.rn.f32 %f12, %f144, 0f38D1B717, %f151;
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fma.rn.f32 %f13, %f145, 0f38D1B717, %f152;
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abs.f32 %f84, %f145;
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abs.f32 %f85, %f143;
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setp.gt.f32 %p7, %f85, %f84;
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neg.f32 %f86, %f144;
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selp.f32 %f87, %f86, 0f00000000, %p7;
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neg.f32 %f88, %f145;
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selp.f32 %f89, %f143, %f88, %p7;
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selp.f32 %f90, 0f00000000, %f144, %p7;
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mul.f32 %f91, %f89, %f89;
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fma.rn.f32 %f92, %f87, %f87, %f91;
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fma.rn.f32 %f93, %f90, %f90, %f92;
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sqrt.rn.f32 %f94, %f93;
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rcp.rn.f32 %f95, %f94;
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mul.f32 %f14, %f87, %f95;
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mul.f32 %f15, %f89, %f95;
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mul.f32 %f16, %f90, %f95;
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mul.f32 %f96, %f145, %f15;
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mul.f32 %f97, %f144, %f16;
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sub.f32 %f17, %f96, %f97;
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mul.f32 %f98, %f143, %f16;
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mul.f32 %f99, %f145, %f14;
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sub.f32 %f18, %f98, %f99;
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mul.f32 %f100, %f144, %f14;
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mul.f32 %f101, %f143, %f15;
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sub.f32 %f19, %f100, %f101;
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mov.f32 %f102, 0f3F8147AE;
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sqrt.rn.f32 %f103, %f102;
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rcp.rn.f32 %f20, %f103;
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neg.f32 %f21, %f20;
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mul.f32 %f22, %f20, 0f00000000;
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mul.f32 %f104, %f20, 0f3DCCCCCD;
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mul.f32 %f23, %f14, %f22;
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mul.f32 %f24, %f15, %f22;
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mul.f32 %f25, %f16, %f22;
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fma.rn.f32 %f105, %f17, %f21, %f23;
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fma.rn.f32 %f106, %f18, %f21, %f24;
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fma.rn.f32 %f107, %f19, %f21, %f25;
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mul.f32 %f26, %f143, %f104;
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mul.f32 %f27, %f144, %f104;
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mul.f32 %f28, %f145, %f104;
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add.f32 %f149, %f105, %f26;
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add.f32 %f148, %f106, %f27;
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add.f32 %f147, %f107, %f28;
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add.u64 %rd33, %SP, 0;
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cvta.to.local.u64 %rd35, %rd33;
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mov.u32 %r28, 0;
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st.local.u32 [%rd35], %r28;
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ld.global.u32 %r27, [root];
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mov.f32 %f81, 0f38D1B717;
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// inline asm
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call _rt_trace_64, (%r27, %f11, %f12, %f13, %f149, %f148, %f147, %r28, %f81, %f82, %rd33, %r5);
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// inline asm
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ld.local.f32 %f146, [%rd35];
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setp.gt.f32 %p8, %f146, 0f00000000;
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@%p8 bra BB0_7;
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fma.rn.f32 %f116, %f17, %f20, %f23;
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fma.rn.f32 %f117, %f18, %f20, %f24;
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fma.rn.f32 %f118, %f19, %f20, %f25;
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add.f32 %f149, %f116, %f26;
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add.f32 %f148, %f117, %f27;
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add.f32 %f147, %f118, %f28;
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st.local.u32 [%rd35], %r28;
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ld.global.u32 %r46, [root];
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// inline asm
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call _rt_trace_64, (%r46, %f11, %f12, %f13, %f149, %f148, %f147, %r28, %f81, %f82, %rd33, %r5);
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// inline asm
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ld.local.f32 %f146, [%rd35];
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setp.gt.f32 %p9, %f146, 0f00000000;
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@%p9 bra BB0_7;
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mul.f32 %f37, %f17, %f22;
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fma.rn.f32 %f127, %f14, %f21, %f37;
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mul.f32 %f38, %f18, %f22;
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fma.rn.f32 %f128, %f15, %f21, %f38;
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mul.f32 %f39, %f19, %f22;
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fma.rn.f32 %f129, %f16, %f21, %f39;
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add.f32 %f149, %f127, %f26;
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add.f32 %f148, %f128, %f27;
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add.f32 %f147, %f129, %f28;
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st.local.u32 [%rd35], %r28;
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ld.global.u32 %r49, [root];
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// inline asm
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call _rt_trace_64, (%r49, %f11, %f12, %f13, %f149, %f148, %f147, %r28, %f81, %f82, %rd33, %r5);
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// inline asm
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ld.local.f32 %f146, [%rd35];
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setp.gt.f32 %p10, %f146, 0f00000000;
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@%p10 bra BB0_7;
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fma.rn.f32 %f138, %f14, %f20, %f37;
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fma.rn.f32 %f139, %f15, %f20, %f38;
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fma.rn.f32 %f140, %f16, %f20, %f39;
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add.f32 %f149, %f138, %f26;
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add.f32 %f148, %f139, %f27;
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add.f32 %f147, %f140, %f28;
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st.local.u32 [%rd35], %r28;
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ld.global.u32 %r52, [root];
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// inline asm
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call _rt_trace_64, (%r52, %f11, %f12, %f13, %f149, %f148, %f147, %r28, %f81, %f82, %rd33, %r5);
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// inline asm
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ld.local.f32 %f146, [%rd35];
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setp.leu.f32 %p11, %f146, 0f00000000;
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@%p11 bra BB0_8;
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BB0_7:
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fma.rn.f32 %f150, %f146, %f149, %f11;
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fma.rn.f32 %f151, %f146, %f148, %f12;
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fma.rn.f32 %f152, %f146, %f147, %f13;
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BB0_8:
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cvt.u64.u32 %rd45, %r3;
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cvt.u64.u32 %rd44, %r2;
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mov.u64 %rd48, image_HDR;
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cvta.global.u64 %rd43, %rd48;
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// inline asm
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call (%rd42), _rt_buffer_get_64, (%rd43, %r4, %r26, %rd44, %rd45, %rd7, %rd7);
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// inline asm
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mov.f32 %f141, 0f3F800000;
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st.v4.f32 [%rd42], {%f150, %f151, %f152, %f141};
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BB0_10:
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ret;
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}
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