2402 lines
69 KiB
Plaintext
2402 lines
69 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 image_RNM3[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<137>;
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.reg .b16 %rs<162>;
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.reg .f32 %f<1399>;
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.reg .b32 %r<250>;
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.reg .b64 %rd<272>;
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mov.u64 %rd271, __local_depot0;
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cvta.local.u64 %SP, %rd271;
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ld.global.v2.u32 {%r30, %r31}, [pixelID];
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cvt.u64.u32 %rd10, %r30;
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cvt.u64.u32 %rd11, %r31;
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mov.u64 %rd14, uvnormal;
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cvta.global.u64 %rd9, %rd14;
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mov.u32 %r28, 2;
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mov.u32 %r29, 4;
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mov.u64 %rd13, 0;
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// inline asm
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call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
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// inline asm
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ld.u32 %r1, [%rd8];
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shr.u32 %r34, %r1, 16;
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cvt.u16.u32 %rs1, %r34;
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and.b16 %rs9, %rs1, 255;
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cvt.u16.u32 %rs10, %r1;
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or.b16 %rs11, %rs10, %rs9;
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setp.eq.s16 %p8, %rs11, 0;
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mov.f32 %f1307, 0f00000000;
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mov.f32 %f1308, %f1307;
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mov.f32 %f1309, %f1307;
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@%p8 bra BB0_2;
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ld.u8 %rs12, [%rd8+1];
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and.b16 %rs14, %rs10, 255;
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cvt.rn.f32.u16 %f264, %rs14;
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div.rn.f32 %f265, %f264, 0f437F0000;
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fma.rn.f32 %f266, %f265, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f267, %rs12;
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div.rn.f32 %f268, %f267, 0f437F0000;
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fma.rn.f32 %f269, %f268, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f270, %rs9;
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div.rn.f32 %f271, %f270, 0f437F0000;
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fma.rn.f32 %f272, %f271, 0f40000000, 0fBF800000;
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mul.f32 %f273, %f269, %f269;
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fma.rn.f32 %f274, %f266, %f266, %f273;
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fma.rn.f32 %f275, %f272, %f272, %f274;
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sqrt.rn.f32 %f276, %f275;
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rcp.rn.f32 %f277, %f276;
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mul.f32 %f1307, %f266, %f277;
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mul.f32 %f1308, %f269, %f277;
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mul.f32 %f1309, %f272, %f277;
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BB0_2:
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ld.global.v2.u32 {%r35, %r36}, [pixelID];
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ld.global.v2.u32 {%r38, %r39}, [tileInfo];
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add.s32 %r2, %r35, %r38;
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add.s32 %r3, %r36, %r39;
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setp.eq.f32 %p9, %f1308, 0f00000000;
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setp.eq.f32 %p10, %f1307, 0f00000000;
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and.pred %p11, %p10, %p9;
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setp.eq.f32 %p12, %f1309, 0f00000000;
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and.pred %p13, %p11, %p12;
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@%p13 bra BB0_108;
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bra.uni BB0_3;
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BB0_108:
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ld.global.u32 %r249, [imageEnabled];
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and.b32 %r198, %r249, 1;
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setp.eq.b32 %p128, %r198, 1;
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@!%p128 bra BB0_110;
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bra.uni BB0_109;
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BB0_109:
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cvt.u64.u32 %rd159, %r2;
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cvt.u64.u32 %rd160, %r3;
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mov.u64 %rd163, image;
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cvta.global.u64 %rd158, %rd163;
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// inline asm
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call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13);
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// inline asm
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mov.u16 %rs93, 0;
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st.v4.u8 [%rd157], {%rs93, %rs93, %rs93, %rs93};
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ld.global.u32 %r249, [imageEnabled];
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BB0_110:
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and.b32 %r201, %r249, 8;
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setp.eq.s32 %p129, %r201, 0;
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@%p129 bra BB0_112;
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cvt.u64.u32 %rd167, %r3;
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cvt.u64.u32 %rd166, %r2;
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mov.u64 %rd170, image_Mask;
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cvta.global.u64 %rd165, %rd170;
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// inline asm
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call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13);
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// inline asm
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mov.f32 %f1271, 0f00000000;
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cvt.rzi.u32.f32 %r204, %f1271;
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cvt.u16.u32 %rs94, %r204;
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mov.u16 %rs95, 0;
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st.v2.u8 [%rd164], {%rs94, %rs95};
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ld.global.u32 %r249, [imageEnabled];
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BB0_112:
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cvt.u64.u32 %rd6, %r2;
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cvt.u64.u32 %rd7, %r3;
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and.b32 %r205, %r249, 4;
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setp.eq.s32 %p130, %r205, 0;
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@%p130 bra BB0_116;
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ld.global.u32 %r206, [additive];
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setp.eq.s32 %p131, %r206, 0;
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@%p131 bra BB0_115;
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mov.u64 %rd183, image_HDR;
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cvta.global.u64 %rd172, %rd183;
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mov.u32 %r210, 8;
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// inline asm
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call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r210, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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ld.v4.u16 {%rs102, %rs103, %rs104, %rs105}, [%rd171];
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// inline asm
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{ cvt.f32.f16 %f1272, %rs102;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1273, %rs103;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1274, %rs104;}
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// inline asm
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// inline asm
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call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r210, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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add.f32 %f1275, %f1272, 0f00000000;
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add.f32 %f1276, %f1273, 0f00000000;
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add.f32 %f1277, %f1274, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs101, %f1277;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs100, %f1276;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs99, %f1275;}
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// inline asm
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mov.u16 %rs106, 0;
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st.v4.u16 [%rd177], {%rs99, %rs100, %rs101, %rs106};
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bra.uni BB0_116;
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BB0_3:
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ld.global.v2.u32 {%r47, %r48}, [pixelID];
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cvt.u64.u32 %rd17, %r47;
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cvt.u64.u32 %rd18, %r48;
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mov.u64 %rd26, uvpos;
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cvta.global.u64 %rd16, %rd26;
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mov.u32 %r44, 12;
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// inline asm
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call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
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// inline asm
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ld.f32 %f9, [%rd15+8];
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ld.f32 %f8, [%rd15+4];
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ld.f32 %f7, [%rd15];
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mul.f32 %f294, %f7, 0f3456BF95;
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mul.f32 %f295, %f8, 0f3456BF95;
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mul.f32 %f296, %f9, 0f3456BF95;
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abs.f32 %f297, %f1307;
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div.rn.f32 %f298, %f294, %f297;
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abs.f32 %f299, %f1308;
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div.rn.f32 %f300, %f295, %f299;
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abs.f32 %f301, %f1309;
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div.rn.f32 %f302, %f296, %f301;
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abs.f32 %f303, %f298;
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abs.f32 %f304, %f300;
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abs.f32 %f305, %f302;
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mov.f32 %f306, 0f38D1B717;
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max.f32 %f307, %f303, %f306;
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max.f32 %f308, %f304, %f306;
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max.f32 %f309, %f305, %f306;
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fma.rn.f32 %f10, %f1307, %f307, %f7;
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fma.rn.f32 %f11, %f1308, %f308, %f8;
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fma.rn.f32 %f12, %f1309, %f309, %f9;
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mov.u64 %rd27, localLights;
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cvta.global.u64 %rd25, %rd27;
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mov.u32 %r45, 1;
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mov.u32 %r46, 96;
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// inline asm
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call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
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// inline asm
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cvt.u32.u64 %r4, %rd21;
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setp.eq.s32 %p14, %r4, 0;
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mov.f32 %f1310, 0f00000000;
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mov.f32 %f1311, %f1310;
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mov.f32 %f1312, %f1310;
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mov.f32 %f1313, %f1310;
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mov.f32 %f1314, %f1310;
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mov.f32 %f1315, %f1310;
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mov.f32 %f1316, %f1310;
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mov.f32 %f1317, %f1310;
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mov.f32 %f1318, %f1310;
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mov.f32 %f1319, %f1310;
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mov.f32 %f1320, %f1310;
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mov.f32 %f1321, %f1310;
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mov.f32 %f1322, %f1310;
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mov.f32 %f1323, %f1310;
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mov.f32 %f1324, %f1310;
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mov.f32 %f1325, %f1310;
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@%p14 bra BB0_44;
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mov.f32 %f326, 0f40000000;
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cvt.rzi.f32.f32 %f327, %f326;
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add.f32 %f328, %f327, %f327;
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mov.f32 %f329, 0f40800000;
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sub.f32 %f330, %f329, %f328;
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abs.f32 %f13, %f330;
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mul.f32 %f14, %f10, 0f3456BF95;
|
|
mul.f32 %f15, %f11, 0f3456BF95;
|
|
mul.f32 %f16, %f12, 0f3456BF95;
|
|
mov.f32 %f325, 0f00000000;
|
|
mov.u32 %r241, 0;
|
|
abs.f32 %f520, %f14;
|
|
abs.f32 %f521, %f15;
|
|
max.f32 %f522, %f520, %f521;
|
|
abs.f32 %f523, %f16;
|
|
max.f32 %f524, %f522, %f523;
|
|
mov.f32 %f1310, %f325;
|
|
mov.f32 %f1311, %f325;
|
|
mov.f32 %f1312, %f325;
|
|
mov.f32 %f1313, %f325;
|
|
mov.f32 %f1314, %f325;
|
|
mov.f32 %f1315, %f325;
|
|
mov.f32 %f1316, %f325;
|
|
mov.f32 %f1317, %f325;
|
|
mov.f32 %f1318, %f325;
|
|
mov.f32 %f1319, %f325;
|
|
mov.f32 %f1320, %f325;
|
|
mov.f32 %f1321, %f325;
|
|
mov.f32 %f1322, %f325;
|
|
mov.f32 %f1323, %f325;
|
|
mov.f32 %f1324, %f325;
|
|
mov.f32 %f1325, %f325;
|
|
|
|
BB0_5:
|
|
cvt.u64.u32 %rd30, %r241;
|
|
// inline asm
|
|
call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.f32 {%f333, %f334, %f335, %f336}, [%rd28+80];
|
|
ld.v4.f32 {%f337, %f338, %f339, %f340}, [%rd28+64];
|
|
ld.v4.f32 {%f341, %f342, %f343, %f344}, [%rd28+48];
|
|
ld.v4.f32 {%f345, %f1330, %f1331, %f348}, [%rd28+32];
|
|
ld.v4.f32 {%f349, %f350, %f351, %f352}, [%rd28+16];
|
|
ld.v4.f32 {%f353, %f354, %f355, %f356}, [%rd28];
|
|
mov.b32 %r6, %f336;
|
|
sub.f32 %f358, %f354, %f7;
|
|
sub.f32 %f359, %f355, %f8;
|
|
sub.f32 %f360, %f356, %f9;
|
|
mul.f32 %f361, %f359, %f359;
|
|
fma.rn.f32 %f362, %f358, %f358, %f361;
|
|
fma.rn.f32 %f363, %f360, %f360, %f362;
|
|
sqrt.rn.f32 %f59, %f363;
|
|
rcp.rn.f32 %f364, %f59;
|
|
mul.f32 %f60, %f358, %f364;
|
|
mul.f32 %f61, %f359, %f364;
|
|
mul.f32 %f62, %f360, %f364;
|
|
mul.f32 %f63, %f59, %f352;
|
|
abs.f32 %f64, %f63;
|
|
setp.lt.f32 %p15, %f64, 0f00800000;
|
|
mul.f32 %f365, %f64, 0f4B800000;
|
|
selp.f32 %f366, 0fC3170000, 0fC2FE0000, %p15;
|
|
selp.f32 %f367, %f365, %f64, %p15;
|
|
mov.b32 %r54, %f367;
|
|
and.b32 %r55, %r54, 8388607;
|
|
or.b32 %r56, %r55, 1065353216;
|
|
mov.b32 %f368, %r56;
|
|
shr.u32 %r57, %r54, 23;
|
|
cvt.rn.f32.u32 %f369, %r57;
|
|
add.f32 %f370, %f366, %f369;
|
|
setp.gt.f32 %p16, %f368, 0f3FB504F3;
|
|
mul.f32 %f371, %f368, 0f3F000000;
|
|
add.f32 %f372, %f370, 0f3F800000;
|
|
selp.f32 %f373, %f371, %f368, %p16;
|
|
selp.f32 %f374, %f372, %f370, %p16;
|
|
add.f32 %f375, %f373, 0fBF800000;
|
|
add.f32 %f332, %f373, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f331,%f332;
|
|
// inline asm
|
|
add.f32 %f376, %f375, %f375;
|
|
mul.f32 %f377, %f331, %f376;
|
|
mul.f32 %f378, %f377, %f377;
|
|
mov.f32 %f379, 0f3C4CAF63;
|
|
mov.f32 %f380, 0f3B18F0FE;
|
|
fma.rn.f32 %f381, %f380, %f378, %f379;
|
|
mov.f32 %f382, 0f3DAAAABD;
|
|
fma.rn.f32 %f383, %f381, %f378, %f382;
|
|
mul.rn.f32 %f384, %f383, %f378;
|
|
mul.rn.f32 %f385, %f384, %f377;
|
|
sub.f32 %f386, %f375, %f377;
|
|
neg.f32 %f387, %f377;
|
|
add.f32 %f388, %f386, %f386;
|
|
fma.rn.f32 %f389, %f387, %f375, %f388;
|
|
mul.rn.f32 %f390, %f331, %f389;
|
|
add.f32 %f391, %f385, %f377;
|
|
sub.f32 %f392, %f377, %f391;
|
|
add.f32 %f393, %f385, %f392;
|
|
add.f32 %f394, %f390, %f393;
|
|
add.f32 %f395, %f391, %f394;
|
|
sub.f32 %f396, %f391, %f395;
|
|
add.f32 %f397, %f394, %f396;
|
|
mov.f32 %f398, 0f3F317200;
|
|
mul.rn.f32 %f399, %f374, %f398;
|
|
mov.f32 %f400, 0f35BFBE8E;
|
|
mul.rn.f32 %f401, %f374, %f400;
|
|
add.f32 %f402, %f399, %f395;
|
|
sub.f32 %f403, %f399, %f402;
|
|
add.f32 %f404, %f395, %f403;
|
|
add.f32 %f405, %f397, %f404;
|
|
add.f32 %f406, %f401, %f405;
|
|
add.f32 %f407, %f402, %f406;
|
|
sub.f32 %f408, %f402, %f407;
|
|
add.f32 %f409, %f406, %f408;
|
|
mul.rn.f32 %f65, %f329, %f407;
|
|
neg.f32 %f411, %f65;
|
|
fma.rn.f32 %f412, %f329, %f407, %f411;
|
|
fma.rn.f32 %f413, %f329, %f409, %f412;
|
|
fma.rn.f32 %f66, %f325, %f407, %f413;
|
|
add.rn.f32 %f67, %f65, %f66;
|
|
mov.b32 %r58, %f67;
|
|
setp.eq.s32 %p1, %r58, 1118925336;
|
|
add.s32 %r59, %r58, -1;
|
|
mov.b32 %f415, %r59;
|
|
selp.f32 %f416, %f415, %f67, %p1;
|
|
mul.f32 %f417, %f416, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f418, %f417;
|
|
mov.f32 %f419, 0fBF317200;
|
|
fma.rn.f32 %f420, %f418, %f419, %f416;
|
|
mov.f32 %f421, 0fB5BFBE8E;
|
|
fma.rn.f32 %f422, %f418, %f421, %f420;
|
|
mul.f32 %f423, %f422, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f424, %f423;
|
|
add.f32 %f425, %f418, 0f00000000;
|
|
ex2.approx.f32 %f426, %f425;
|
|
mul.f32 %f427, %f424, %f426;
|
|
setp.lt.f32 %p17, %f416, 0fC2D20000;
|
|
selp.f32 %f428, 0f00000000, %f427, %p17;
|
|
setp.gt.f32 %p18, %f416, 0f42D20000;
|
|
selp.f32 %f1326, 0f7F800000, %f428, %p18;
|
|
setp.eq.f32 %p19, %f1326, 0f7F800000;
|
|
@%p19 bra BB0_7;
|
|
|
|
neg.f32 %f429, %f67;
|
|
add.rn.f32 %f430, %f65, %f429;
|
|
add.rn.f32 %f431, %f430, %f66;
|
|
add.f32 %f432, %f431, 0f37000000;
|
|
selp.f32 %f433, %f432, %f431, %p1;
|
|
fma.rn.f32 %f1326, %f1326, %f433, %f1326;
|
|
|
|
BB0_7:
|
|
setp.lt.f32 %p20, %f63, 0f00000000;
|
|
setp.eq.f32 %p21, %f13, 0f3F800000;
|
|
and.pred %p2, %p20, %p21;
|
|
mov.b32 %r60, %f1326;
|
|
xor.b32 %r61, %r60, -2147483648;
|
|
mov.b32 %f434, %r61;
|
|
selp.f32 %f1328, %f434, %f1326, %p2;
|
|
setp.eq.f32 %p22, %f63, 0f00000000;
|
|
@%p22 bra BB0_10;
|
|
bra.uni BB0_8;
|
|
|
|
BB0_10:
|
|
add.f32 %f437, %f63, %f63;
|
|
selp.f32 %f1328, %f437, 0f00000000, %p21;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_8:
|
|
setp.geu.f32 %p23, %f63, 0f00000000;
|
|
@%p23 bra BB0_11;
|
|
|
|
cvt.rzi.f32.f32 %f436, %f329;
|
|
setp.neu.f32 %p24, %f436, 0f40800000;
|
|
selp.f32 %f1328, 0f7FFFFFFF, %f1328, %p24;
|
|
|
|
BB0_11:
|
|
add.f32 %f438, %f64, 0f40800000;
|
|
mov.b32 %r62, %f438;
|
|
setp.lt.s32 %p26, %r62, 2139095040;
|
|
@%p26 bra BB0_16;
|
|
|
|
setp.gtu.f32 %p27, %f64, 0f7F800000;
|
|
@%p27 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
add.f32 %f1328, %f63, 0f40800000;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p28, %f64, 0f7F800000;
|
|
@%p28 bra BB0_16;
|
|
|
|
selp.f32 %f1328, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_16:
|
|
mul.f32 %f439, %f59, %f350;
|
|
mov.f32 %f1353, 0f3F800000;
|
|
sub.f32 %f441, %f1353, %f1328;
|
|
setp.eq.f32 %p29, %f63, 0f3F800000;
|
|
selp.f32 %f442, 0f00000000, %f441, %p29;
|
|
cvt.sat.f32.f32 %f443, %f442;
|
|
fma.rn.f32 %f444, %f439, %f439, %f351;
|
|
div.rn.f32 %f93, %f443, %f444;
|
|
mul.f32 %f445, %f1308, %f61;
|
|
fma.rn.f32 %f446, %f1307, %f60, %f445;
|
|
fma.rn.f32 %f94, %f1309, %f62, %f446;
|
|
setp.eq.f32 %p30, %f353, 0f3F800000;
|
|
@%p30 bra BB0_23;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_23:
|
|
setp.leu.f32 %p34, %f348, 0f00000000;
|
|
@%p34 bra BB0_19;
|
|
|
|
mul.f32 %f477, %f333, %f60;
|
|
mul.f32 %f478, %f334, %f61;
|
|
neg.f32 %f479, %f478;
|
|
sub.f32 %f480, %f479, %f477;
|
|
mul.f32 %f481, %f335, %f62;
|
|
sub.f32 %f482, %f480, %f481;
|
|
setp.gt.f32 %p35, %f482, 0f00000000;
|
|
selp.f32 %f483, 0f3F800000, 0f00000000, %p35;
|
|
mul.f32 %f484, %f342, %f61;
|
|
fma.rn.f32 %f485, %f341, %f60, %f484;
|
|
mul.f32 %f486, %f338, %f61;
|
|
fma.rn.f32 %f487, %f337, %f60, %f486;
|
|
fma.rn.f32 %f488, %f343, %f62, %f485;
|
|
fma.rn.f32 %f489, %f339, %f62, %f487;
|
|
fma.rn.f32 %f490, %f344, %f488, 0f3F000000;
|
|
mov.f32 %f491, 0f3F800000;
|
|
sub.f32 %f473, %f491, %f490;
|
|
fma.rn.f32 %f474, %f344, %f489, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r66, %f348;
|
|
mov.f32 %f476, 0f00000000;
|
|
// inline asm
|
|
call (%f469, %f470, %f471, %f472), _rt_texture_get_f_id, (%r66, %r28, %f473, %f474, %f476, %f476);
|
|
// inline asm
|
|
mul.f32 %f492, %f483, %f469;
|
|
mul.f32 %f493, %f483, %f470;
|
|
mul.f32 %f494, %f483, %f471;
|
|
mul.f32 %f1329, %f345, %f492;
|
|
mul.f32 %f1330, %f1330, %f493;
|
|
mul.f32 %f1331, %f1331, %f494;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p31, %f353, 0f40000000;
|
|
@%p31 bra BB0_21;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_21:
|
|
setp.leu.f32 %p33, %f348, 0f00000000;
|
|
@%p33 bra BB0_19;
|
|
|
|
mul.f32 %f463, %f342, %f61;
|
|
fma.rn.f32 %f464, %f341, %f60, %f463;
|
|
mul.f32 %f465, %f338, %f61;
|
|
fma.rn.f32 %f466, %f337, %f60, %f465;
|
|
mul.f32 %f467, %f334, %f61;
|
|
fma.rn.f32 %f468, %f333, %f60, %f467;
|
|
fma.rn.f32 %f460, %f343, %f62, %f464;
|
|
fma.rn.f32 %f461, %f339, %f62, %f466;
|
|
fma.rn.f32 %f462, %f335, %f62, %f468;
|
|
cvt.rzi.s32.f32 %r63, %f348;
|
|
mov.u32 %r64, 6;
|
|
mov.u32 %r65, 0;
|
|
// inline asm
|
|
call (%f456, %f457, %f458, %f459), _rt_texture_get_base_id, (%r63, %r64, %f460, %f461, %f462, %r65);
|
|
// inline asm
|
|
mul.f32 %f1329, %f345, %f456;
|
|
mul.f32 %f1330, %f1330, %f457;
|
|
mul.f32 %f1331, %f1331, %f458;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_18:
|
|
setp.neu.f32 %p32, %f353, 0f40800000;
|
|
@%p32 bra BB0_19;
|
|
|
|
mul.f32 %f447, %f333, %f60;
|
|
mul.f32 %f448, %f334, %f61;
|
|
neg.f32 %f449, %f448;
|
|
sub.f32 %f450, %f449, %f447;
|
|
mul.f32 %f451, %f335, %f62;
|
|
sub.f32 %f452, %f450, %f451;
|
|
fma.rn.f32 %f453, %f348, %f452, %f344;
|
|
cvt.sat.f32.f32 %f454, %f453;
|
|
mul.f32 %f455, %f454, %f454;
|
|
mul.f32 %f1332, %f93, %f455;
|
|
mov.f32 %f1329, %f345;
|
|
bra.uni BB0_26;
|
|
|
|
BB0_19:
|
|
mov.f32 %f1329, %f345;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1332, %f93;
|
|
|
|
BB0_26:
|
|
max.f32 %f510, %f1329, %f1330;
|
|
max.f32 %f511, %f510, %f1331;
|
|
mul.f32 %f512, %f1332, %f511;
|
|
setp.lt.f32 %p37, %f512, 0f3727C5AC;
|
|
mov.pred %p136, -1;
|
|
mov.f32 %f121, 0f00000000;
|
|
mov.f32 %f1334, %f121;
|
|
mov.f32 %f1335, %f121;
|
|
mov.f32 %f1336, %f121;
|
|
mov.f32 %f1337, %f121;
|
|
mov.f32 %f1338, %f121;
|
|
mov.f32 %f1339, %f121;
|
|
mov.f32 %f1340, %f121;
|
|
mov.f32 %f1341, %f121;
|
|
mov.f32 %f1342, %f121;
|
|
mov.f32 %f1343, %f121;
|
|
mov.f32 %f1344, %f121;
|
|
mov.f32 %f1345, %f121;
|
|
mov.f32 %f1346, %f121;
|
|
mov.f32 %f1347, %f121;
|
|
@%p37 bra BB0_28;
|
|
|
|
ld.global.u32 %r68, [ignoreNormal];
|
|
setp.eq.s32 %p39, %r68, 0;
|
|
selp.f32 %f513, %f94, 0f3F800000, %p39;
|
|
cvt.sat.f32.f32 %f514, %f513;
|
|
mul.f32 %f515, %f1332, %f514;
|
|
mul.f32 %f121, %f1329, %f515;
|
|
mul.f32 %f1334, %f1330, %f515;
|
|
mul.f32 %f1335, %f1331, %f515;
|
|
mul.f32 %f516, %f1332, 0f3E800000;
|
|
mul.f32 %f1336, %f1329, %f516;
|
|
mul.f32 %f1337, %f1330, %f516;
|
|
mul.f32 %f1338, %f1331, %f516;
|
|
mul.f32 %f1339, %f60, %f1336;
|
|
mul.f32 %f1340, %f60, %f1337;
|
|
mul.f32 %f1341, %f60, %f1338;
|
|
mul.f32 %f1342, %f61, %f1336;
|
|
mul.f32 %f1343, %f61, %f1337;
|
|
mul.f32 %f1344, %f61, %f1338;
|
|
mul.f32 %f1345, %f62, %f1336;
|
|
mul.f32 %f1346, %f62, %f1337;
|
|
mul.f32 %f1347, %f62, %f1338;
|
|
mov.pred %p136, 0;
|
|
|
|
BB0_28:
|
|
@%p136 bra BB0_43;
|
|
|
|
setp.eq.s32 %p40, %r6, 0;
|
|
mov.u16 %rs161, 0;
|
|
@%p40 bra BB0_40;
|
|
|
|
abs.s32 %r8, %r6;
|
|
mov.f32 %f1352, 0f00000000;
|
|
setp.lt.s32 %p41, %r8, 1;
|
|
@%p41 bra BB0_39;
|
|
|
|
max.f32 %f137, %f524, %f306;
|
|
and.b32 %r9, %r8, 3;
|
|
setp.eq.s32 %p42, %r9, 0;
|
|
add.u64 %rd35, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd35;
|
|
mov.f32 %f1352, 0f00000000;
|
|
mov.u32 %r245, 0;
|
|
@%p42 bra BB0_37;
|
|
|
|
setp.eq.s32 %p43, %r9, 1;
|
|
mov.f32 %f1349, 0f00000000;
|
|
mov.u32 %r243, 0;
|
|
@%p43 bra BB0_36;
|
|
|
|
setp.eq.s32 %p44, %r9, 2;
|
|
mov.f32 %f1348, 0f00000000;
|
|
mov.u32 %r242, 0;
|
|
@%p44 bra BB0_35;
|
|
|
|
sub.f32 %f536, %f354, %f349;
|
|
sub.f32 %f537, %f355, %f349;
|
|
sub.f32 %f538, %f356, %f349;
|
|
sub.f32 %f539, %f536, %f7;
|
|
sub.f32 %f540, %f537, %f8;
|
|
sub.f32 %f541, %f538, %f9;
|
|
mul.f32 %f542, %f540, %f540;
|
|
fma.rn.f32 %f543, %f539, %f539, %f542;
|
|
fma.rn.f32 %f544, %f541, %f541, %f543;
|
|
sqrt.rn.f32 %f535, %f544;
|
|
rcp.rn.f32 %f545, %f535;
|
|
mul.f32 %f531, %f545, %f539;
|
|
mul.f32 %f532, %f545, %f540;
|
|
mul.f32 %f533, %f545, %f541;
|
|
ld.global.u32 %r76, [imageEnabled];
|
|
and.b32 %r77, %r76, 32;
|
|
setp.eq.s32 %p45, %r77, 0;
|
|
selp.f32 %f546, 0f3F800000, 0f41200000, %p45;
|
|
mul.f32 %f534, %f546, %f137;
|
|
mov.u32 %r78, 1065353216;
|
|
st.local.u32 [%rd2], %r78;
|
|
ld.global.u32 %r72, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r72, %f10, %f11, %f12, %f531, %f532, %f533, %r45, %f534, %f535, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f547, [%rd2];
|
|
add.f32 %f1348, %f547, 0f00000000;
|
|
mov.u32 %r242, %r45;
|
|
|
|
BB0_35:
|
|
cvt.rn.f32.s32 %f556, %r242;
|
|
mul.f32 %f557, %f556, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f558, %f557;
|
|
sub.f32 %f559, %f557, %f558;
|
|
mul.f32 %f560, %f556, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f561, %f560;
|
|
sub.f32 %f562, %f560, %f561;
|
|
mul.f32 %f563, %f556, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f564, %f563;
|
|
sub.f32 %f565, %f563, %f564;
|
|
add.f32 %f566, %f562, 0f4199851F;
|
|
add.f32 %f567, %f565, 0f4199851F;
|
|
add.f32 %f568, %f559, 0f4199851F;
|
|
mul.f32 %f569, %f562, %f567;
|
|
fma.rn.f32 %f570, %f559, %f566, %f569;
|
|
fma.rn.f32 %f571, %f568, %f565, %f570;
|
|
add.f32 %f572, %f559, %f571;
|
|
add.f32 %f573, %f562, %f571;
|
|
add.f32 %f574, %f565, %f571;
|
|
add.f32 %f575, %f572, %f573;
|
|
mul.f32 %f576, %f574, %f575;
|
|
cvt.rmi.f32.f32 %f577, %f576;
|
|
sub.f32 %f578, %f576, %f577;
|
|
add.f32 %f579, %f572, %f574;
|
|
mul.f32 %f580, %f573, %f579;
|
|
cvt.rmi.f32.f32 %f581, %f580;
|
|
sub.f32 %f582, %f580, %f581;
|
|
add.f32 %f583, %f573, %f574;
|
|
mul.f32 %f584, %f572, %f583;
|
|
cvt.rmi.f32.f32 %f585, %f584;
|
|
sub.f32 %f586, %f584, %f585;
|
|
fma.rn.f32 %f587, %f578, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f588, %f582, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f589, %f586, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f590, %f349, %f587, %f354;
|
|
fma.rn.f32 %f591, %f349, %f588, %f355;
|
|
fma.rn.f32 %f592, %f349, %f589, %f356;
|
|
sub.f32 %f593, %f590, %f7;
|
|
sub.f32 %f594, %f591, %f8;
|
|
sub.f32 %f595, %f592, %f9;
|
|
mul.f32 %f596, %f594, %f594;
|
|
fma.rn.f32 %f597, %f593, %f593, %f596;
|
|
fma.rn.f32 %f598, %f595, %f595, %f597;
|
|
sqrt.rn.f32 %f555, %f598;
|
|
rcp.rn.f32 %f599, %f555;
|
|
mul.f32 %f551, %f599, %f593;
|
|
mul.f32 %f552, %f599, %f594;
|
|
mul.f32 %f553, %f599, %f595;
|
|
ld.global.u32 %r82, [imageEnabled];
|
|
and.b32 %r83, %r82, 32;
|
|
setp.eq.s32 %p46, %r83, 0;
|
|
selp.f32 %f600, 0f3F800000, 0f41200000, %p46;
|
|
mul.f32 %f554, %f600, %f137;
|
|
mov.u32 %r84, 1065353216;
|
|
st.local.u32 [%rd2], %r84;
|
|
ld.global.u32 %r79, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r79, %f10, %f11, %f12, %f551, %f552, %f553, %r45, %f554, %f555, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f601, [%rd2];
|
|
add.f32 %f1349, %f1348, %f601;
|
|
add.s32 %r243, %r242, 1;
|
|
|
|
BB0_36:
|
|
cvt.rn.f32.s32 %f610, %r243;
|
|
mul.f32 %f611, %f610, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f612, %f611;
|
|
sub.f32 %f613, %f611, %f612;
|
|
mul.f32 %f614, %f610, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f615, %f614;
|
|
sub.f32 %f616, %f614, %f615;
|
|
mul.f32 %f617, %f610, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f618, %f617;
|
|
sub.f32 %f619, %f617, %f618;
|
|
add.f32 %f620, %f616, 0f4199851F;
|
|
add.f32 %f621, %f619, 0f4199851F;
|
|
add.f32 %f622, %f613, 0f4199851F;
|
|
mul.f32 %f623, %f616, %f621;
|
|
fma.rn.f32 %f624, %f613, %f620, %f623;
|
|
fma.rn.f32 %f625, %f622, %f619, %f624;
|
|
add.f32 %f626, %f613, %f625;
|
|
add.f32 %f627, %f616, %f625;
|
|
add.f32 %f628, %f619, %f625;
|
|
add.f32 %f629, %f626, %f627;
|
|
mul.f32 %f630, %f628, %f629;
|
|
cvt.rmi.f32.f32 %f631, %f630;
|
|
sub.f32 %f632, %f630, %f631;
|
|
add.f32 %f633, %f626, %f628;
|
|
mul.f32 %f634, %f627, %f633;
|
|
cvt.rmi.f32.f32 %f635, %f634;
|
|
sub.f32 %f636, %f634, %f635;
|
|
add.f32 %f637, %f627, %f628;
|
|
mul.f32 %f638, %f626, %f637;
|
|
cvt.rmi.f32.f32 %f639, %f638;
|
|
sub.f32 %f640, %f638, %f639;
|
|
fma.rn.f32 %f641, %f632, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f642, %f636, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f643, %f640, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f644, %f349, %f641, %f354;
|
|
fma.rn.f32 %f645, %f349, %f642, %f355;
|
|
fma.rn.f32 %f646, %f349, %f643, %f356;
|
|
sub.f32 %f647, %f644, %f7;
|
|
sub.f32 %f648, %f645, %f8;
|
|
sub.f32 %f649, %f646, %f9;
|
|
mul.f32 %f650, %f648, %f648;
|
|
fma.rn.f32 %f651, %f647, %f647, %f650;
|
|
fma.rn.f32 %f652, %f649, %f649, %f651;
|
|
sqrt.rn.f32 %f609, %f652;
|
|
rcp.rn.f32 %f653, %f609;
|
|
mul.f32 %f605, %f653, %f647;
|
|
mul.f32 %f606, %f653, %f648;
|
|
mul.f32 %f607, %f653, %f649;
|
|
ld.global.u32 %r88, [imageEnabled];
|
|
and.b32 %r89, %r88, 32;
|
|
setp.eq.s32 %p47, %r89, 0;
|
|
selp.f32 %f654, 0f3F800000, 0f41200000, %p47;
|
|
mul.f32 %f608, %f654, %f137;
|
|
mov.u32 %r90, 1065353216;
|
|
st.local.u32 [%rd2], %r90;
|
|
ld.global.u32 %r85, [root];
|
|
mov.u32 %r86, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r85, %f10, %f11, %f12, %f605, %f606, %f607, %r86, %f608, %f609, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f655, [%rd2];
|
|
add.f32 %f1352, %f1349, %f655;
|
|
add.s32 %r245, %r243, 1;
|
|
|
|
BB0_37:
|
|
setp.lt.u32 %p48, %r8, 4;
|
|
@%p48 bra BB0_39;
|
|
|
|
BB0_38:
|
|
cvt.rn.f32.s32 %f688, %r245;
|
|
mul.f32 %f689, %f688, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f690, %f689;
|
|
sub.f32 %f691, %f689, %f690;
|
|
mul.f32 %f692, %f688, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f693, %f692;
|
|
sub.f32 %f694, %f692, %f693;
|
|
mul.f32 %f695, %f688, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f696, %f695;
|
|
sub.f32 %f697, %f695, %f696;
|
|
add.f32 %f698, %f694, 0f4199851F;
|
|
add.f32 %f699, %f697, 0f4199851F;
|
|
add.f32 %f700, %f691, 0f4199851F;
|
|
mul.f32 %f701, %f694, %f699;
|
|
fma.rn.f32 %f702, %f691, %f698, %f701;
|
|
fma.rn.f32 %f703, %f700, %f697, %f702;
|
|
add.f32 %f704, %f691, %f703;
|
|
add.f32 %f705, %f694, %f703;
|
|
add.f32 %f706, %f697, %f703;
|
|
add.f32 %f707, %f704, %f705;
|
|
mul.f32 %f708, %f706, %f707;
|
|
cvt.rmi.f32.f32 %f709, %f708;
|
|
sub.f32 %f710, %f708, %f709;
|
|
add.f32 %f711, %f704, %f706;
|
|
mul.f32 %f712, %f705, %f711;
|
|
cvt.rmi.f32.f32 %f713, %f712;
|
|
sub.f32 %f714, %f712, %f713;
|
|
add.f32 %f715, %f705, %f706;
|
|
mul.f32 %f716, %f704, %f715;
|
|
cvt.rmi.f32.f32 %f717, %f716;
|
|
sub.f32 %f718, %f716, %f717;
|
|
fma.rn.f32 %f719, %f710, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f720, %f714, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f721, %f718, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f722, %f349, %f719, %f354;
|
|
fma.rn.f32 %f723, %f349, %f720, %f355;
|
|
fma.rn.f32 %f724, %f349, %f721, %f356;
|
|
sub.f32 %f725, %f722, %f7;
|
|
sub.f32 %f726, %f723, %f8;
|
|
sub.f32 %f727, %f724, %f9;
|
|
mul.f32 %f728, %f726, %f726;
|
|
fma.rn.f32 %f729, %f725, %f725, %f728;
|
|
fma.rn.f32 %f730, %f727, %f727, %f729;
|
|
sqrt.rn.f32 %f663, %f730;
|
|
rcp.rn.f32 %f731, %f663;
|
|
mul.f32 %f659, %f731, %f725;
|
|
mul.f32 %f660, %f731, %f726;
|
|
mul.f32 %f661, %f731, %f727;
|
|
ld.global.u32 %r103, [imageEnabled];
|
|
and.b32 %r104, %r103, 32;
|
|
setp.eq.s32 %p49, %r104, 0;
|
|
selp.f32 %f732, 0f3F800000, 0f41200000, %p49;
|
|
mul.f32 %f662, %f732, %f137;
|
|
mov.u32 %r105, 1065353216;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r91, [root];
|
|
mov.u32 %r101, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r91, %f10, %f11, %f12, %f659, %f660, %f661, %r101, %f662, %f663, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f733, [%rd2];
|
|
add.f32 %f734, %f1352, %f733;
|
|
add.s32 %r106, %r245, 1;
|
|
cvt.rn.f32.s32 %f735, %r106;
|
|
mul.f32 %f736, %f735, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f737, %f736;
|
|
sub.f32 %f738, %f736, %f737;
|
|
mul.f32 %f739, %f735, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f740, %f739;
|
|
sub.f32 %f741, %f739, %f740;
|
|
mul.f32 %f742, %f735, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f743, %f742;
|
|
sub.f32 %f744, %f742, %f743;
|
|
add.f32 %f745, %f741, 0f4199851F;
|
|
add.f32 %f746, %f744, 0f4199851F;
|
|
add.f32 %f747, %f738, 0f4199851F;
|
|
mul.f32 %f748, %f741, %f746;
|
|
fma.rn.f32 %f749, %f738, %f745, %f748;
|
|
fma.rn.f32 %f750, %f747, %f744, %f749;
|
|
add.f32 %f751, %f738, %f750;
|
|
add.f32 %f752, %f741, %f750;
|
|
add.f32 %f753, %f744, %f750;
|
|
add.f32 %f754, %f751, %f752;
|
|
mul.f32 %f755, %f753, %f754;
|
|
cvt.rmi.f32.f32 %f756, %f755;
|
|
sub.f32 %f757, %f755, %f756;
|
|
add.f32 %f758, %f751, %f753;
|
|
mul.f32 %f759, %f752, %f758;
|
|
cvt.rmi.f32.f32 %f760, %f759;
|
|
sub.f32 %f761, %f759, %f760;
|
|
add.f32 %f762, %f752, %f753;
|
|
mul.f32 %f763, %f751, %f762;
|
|
cvt.rmi.f32.f32 %f764, %f763;
|
|
sub.f32 %f765, %f763, %f764;
|
|
fma.rn.f32 %f766, %f757, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f767, %f761, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f768, %f765, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f769, %f349, %f766, %f354;
|
|
fma.rn.f32 %f770, %f349, %f767, %f355;
|
|
fma.rn.f32 %f771, %f349, %f768, %f356;
|
|
sub.f32 %f772, %f769, %f7;
|
|
sub.f32 %f773, %f770, %f8;
|
|
sub.f32 %f774, %f771, %f9;
|
|
mul.f32 %f775, %f773, %f773;
|
|
fma.rn.f32 %f776, %f772, %f772, %f775;
|
|
fma.rn.f32 %f777, %f774, %f774, %f776;
|
|
sqrt.rn.f32 %f671, %f777;
|
|
rcp.rn.f32 %f778, %f671;
|
|
mul.f32 %f667, %f778, %f772;
|
|
mul.f32 %f668, %f778, %f773;
|
|
mul.f32 %f669, %f778, %f774;
|
|
ld.global.u32 %r107, [imageEnabled];
|
|
and.b32 %r108, %r107, 32;
|
|
setp.eq.s32 %p50, %r108, 0;
|
|
selp.f32 %f779, 0f3F800000, 0f41200000, %p50;
|
|
mul.f32 %f670, %f779, %f137;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r94, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r94, %f10, %f11, %f12, %f667, %f668, %f669, %r101, %f670, %f671, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f780, [%rd2];
|
|
add.f32 %f781, %f734, %f780;
|
|
add.s32 %r109, %r245, 2;
|
|
cvt.rn.f32.s32 %f782, %r109;
|
|
mul.f32 %f783, %f782, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f784, %f783;
|
|
sub.f32 %f785, %f783, %f784;
|
|
mul.f32 %f786, %f782, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f787, %f786;
|
|
sub.f32 %f788, %f786, %f787;
|
|
mul.f32 %f789, %f782, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f790, %f789;
|
|
sub.f32 %f791, %f789, %f790;
|
|
add.f32 %f792, %f788, 0f4199851F;
|
|
add.f32 %f793, %f791, 0f4199851F;
|
|
add.f32 %f794, %f785, 0f4199851F;
|
|
mul.f32 %f795, %f788, %f793;
|
|
fma.rn.f32 %f796, %f785, %f792, %f795;
|
|
fma.rn.f32 %f797, %f794, %f791, %f796;
|
|
add.f32 %f798, %f785, %f797;
|
|
add.f32 %f799, %f788, %f797;
|
|
add.f32 %f800, %f791, %f797;
|
|
add.f32 %f801, %f798, %f799;
|
|
mul.f32 %f802, %f800, %f801;
|
|
cvt.rmi.f32.f32 %f803, %f802;
|
|
sub.f32 %f804, %f802, %f803;
|
|
add.f32 %f805, %f798, %f800;
|
|
mul.f32 %f806, %f799, %f805;
|
|
cvt.rmi.f32.f32 %f807, %f806;
|
|
sub.f32 %f808, %f806, %f807;
|
|
add.f32 %f809, %f799, %f800;
|
|
mul.f32 %f810, %f798, %f809;
|
|
cvt.rmi.f32.f32 %f811, %f810;
|
|
sub.f32 %f812, %f810, %f811;
|
|
fma.rn.f32 %f813, %f804, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f814, %f808, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f815, %f812, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f816, %f349, %f813, %f354;
|
|
fma.rn.f32 %f817, %f349, %f814, %f355;
|
|
fma.rn.f32 %f818, %f349, %f815, %f356;
|
|
sub.f32 %f819, %f816, %f7;
|
|
sub.f32 %f820, %f817, %f8;
|
|
sub.f32 %f821, %f818, %f9;
|
|
mul.f32 %f822, %f820, %f820;
|
|
fma.rn.f32 %f823, %f819, %f819, %f822;
|
|
fma.rn.f32 %f824, %f821, %f821, %f823;
|
|
sqrt.rn.f32 %f679, %f824;
|
|
rcp.rn.f32 %f825, %f679;
|
|
mul.f32 %f675, %f825, %f819;
|
|
mul.f32 %f676, %f825, %f820;
|
|
mul.f32 %f677, %f825, %f821;
|
|
ld.global.u32 %r110, [imageEnabled];
|
|
and.b32 %r111, %r110, 32;
|
|
setp.eq.s32 %p51, %r111, 0;
|
|
selp.f32 %f826, 0f3F800000, 0f41200000, %p51;
|
|
mul.f32 %f678, %f826, %f137;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r97, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r97, %f10, %f11, %f12, %f675, %f676, %f677, %r101, %f678, %f679, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f827, [%rd2];
|
|
add.f32 %f828, %f781, %f827;
|
|
add.s32 %r112, %r245, 3;
|
|
cvt.rn.f32.s32 %f829, %r112;
|
|
mul.f32 %f830, %f829, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f831, %f830;
|
|
sub.f32 %f832, %f830, %f831;
|
|
mul.f32 %f833, %f829, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f834, %f833;
|
|
sub.f32 %f835, %f833, %f834;
|
|
mul.f32 %f836, %f829, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f837, %f836;
|
|
sub.f32 %f838, %f836, %f837;
|
|
add.f32 %f839, %f835, 0f4199851F;
|
|
add.f32 %f840, %f838, 0f4199851F;
|
|
add.f32 %f841, %f832, 0f4199851F;
|
|
mul.f32 %f842, %f835, %f840;
|
|
fma.rn.f32 %f843, %f832, %f839, %f842;
|
|
fma.rn.f32 %f844, %f841, %f838, %f843;
|
|
add.f32 %f845, %f832, %f844;
|
|
add.f32 %f846, %f835, %f844;
|
|
add.f32 %f847, %f838, %f844;
|
|
add.f32 %f848, %f845, %f846;
|
|
mul.f32 %f849, %f847, %f848;
|
|
cvt.rmi.f32.f32 %f850, %f849;
|
|
sub.f32 %f851, %f849, %f850;
|
|
add.f32 %f852, %f845, %f847;
|
|
mul.f32 %f853, %f846, %f852;
|
|
cvt.rmi.f32.f32 %f854, %f853;
|
|
sub.f32 %f855, %f853, %f854;
|
|
add.f32 %f856, %f846, %f847;
|
|
mul.f32 %f857, %f845, %f856;
|
|
cvt.rmi.f32.f32 %f858, %f857;
|
|
sub.f32 %f859, %f857, %f858;
|
|
fma.rn.f32 %f860, %f851, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f861, %f855, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f862, %f859, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f863, %f349, %f860, %f354;
|
|
fma.rn.f32 %f864, %f349, %f861, %f355;
|
|
fma.rn.f32 %f865, %f349, %f862, %f356;
|
|
sub.f32 %f866, %f863, %f7;
|
|
sub.f32 %f867, %f864, %f8;
|
|
sub.f32 %f868, %f865, %f9;
|
|
mul.f32 %f869, %f867, %f867;
|
|
fma.rn.f32 %f870, %f866, %f866, %f869;
|
|
fma.rn.f32 %f871, %f868, %f868, %f870;
|
|
sqrt.rn.f32 %f687, %f871;
|
|
rcp.rn.f32 %f872, %f687;
|
|
mul.f32 %f683, %f872, %f866;
|
|
mul.f32 %f684, %f872, %f867;
|
|
mul.f32 %f685, %f872, %f868;
|
|
ld.global.u32 %r113, [imageEnabled];
|
|
and.b32 %r114, %r113, 32;
|
|
setp.eq.s32 %p52, %r114, 0;
|
|
selp.f32 %f873, 0f3F800000, 0f41200000, %p52;
|
|
mul.f32 %f686, %f873, %f137;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r100, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r100, %f10, %f11, %f12, %f683, %f684, %f685, %r101, %f686, %f687, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f874, [%rd2];
|
|
add.f32 %f1352, %f828, %f874;
|
|
add.s32 %r245, %r245, 4;
|
|
setp.lt.s32 %p53, %r245, %r8;
|
|
@%p53 bra BB0_38;
|
|
|
|
BB0_39:
|
|
cvt.rn.f32.s32 %f875, %r8;
|
|
div.rn.f32 %f1353, %f1352, %f875;
|
|
shr.u32 %r115, %r6, 31;
|
|
cvt.u16.u32 %rs161, %r115;
|
|
|
|
BB0_40:
|
|
fma.rn.f32 %f1325, %f121, %f1353, %f1325;
|
|
fma.rn.f32 %f1324, %f1334, %f1353, %f1324;
|
|
fma.rn.f32 %f1323, %f1335, %f1353, %f1323;
|
|
fma.rn.f32 %f1322, %f1336, %f1353, %f1322;
|
|
fma.rn.f32 %f1321, %f1337, %f1353, %f1321;
|
|
fma.rn.f32 %f1320, %f1338, %f1353, %f1320;
|
|
fma.rn.f32 %f1319, %f1339, %f1353, %f1319;
|
|
fma.rn.f32 %f1318, %f1340, %f1353, %f1318;
|
|
fma.rn.f32 %f1317, %f1341, %f1353, %f1317;
|
|
fma.rn.f32 %f1316, %f1342, %f1353, %f1316;
|
|
fma.rn.f32 %f1315, %f1343, %f1353, %f1315;
|
|
fma.rn.f32 %f1314, %f1344, %f1353, %f1314;
|
|
fma.rn.f32 %f1313, %f1345, %f1353, %f1313;
|
|
fma.rn.f32 %f1312, %f1346, %f1353, %f1312;
|
|
fma.rn.f32 %f1311, %f1347, %f1353, %f1311;
|
|
setp.eq.s16 %p54, %rs161, 0;
|
|
@%p54 bra BB0_42;
|
|
|
|
div.rn.f32 %f876, %f121, %f345;
|
|
div.rn.f32 %f877, %f876, %f93;
|
|
cvt.sat.f32.f32 %f878, %f877;
|
|
mul.f32 %f1353, %f1353, %f878;
|
|
|
|
BB0_42:
|
|
add.f32 %f1310, %f1310, %f1353;
|
|
|
|
BB0_43:
|
|
add.s32 %r241, %r241, 1;
|
|
setp.lt.u32 %p55, %r241, %r4;
|
|
@%p55 bra BB0_5;
|
|
|
|
BB0_44:
|
|
ld.global.u32 %r247, [imageEnabled];
|
|
and.b32 %r116, %r247, 8;
|
|
setp.eq.s32 %p56, %r116, 0;
|
|
@%p56 bra BB0_57;
|
|
|
|
cvt.sat.f32.f32 %f199, %f1310;
|
|
cvt.u64.u32 %rd46, %r3;
|
|
cvt.u64.u32 %rd45, %r2;
|
|
mov.u64 %rd49, image_Mask;
|
|
cvta.global.u64 %rd44, %rd49;
|
|
// inline asm
|
|
call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f881, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f882, %f881;
|
|
fma.rn.f32 %f883, %f882, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f200, %f883;
|
|
abs.f32 %f201, %f199;
|
|
setp.lt.f32 %p57, %f201, 0f00800000;
|
|
mul.f32 %f884, %f201, 0f4B800000;
|
|
selp.f32 %f885, 0fC3170000, 0fC2FE0000, %p57;
|
|
selp.f32 %f886, %f884, %f201, %p57;
|
|
mov.b32 %r119, %f886;
|
|
and.b32 %r120, %r119, 8388607;
|
|
or.b32 %r121, %r120, 1065353216;
|
|
mov.b32 %f887, %r121;
|
|
shr.u32 %r122, %r119, 23;
|
|
cvt.rn.f32.u32 %f888, %r122;
|
|
add.f32 %f889, %f885, %f888;
|
|
setp.gt.f32 %p58, %f887, 0f3FB504F3;
|
|
mul.f32 %f890, %f887, 0f3F000000;
|
|
add.f32 %f891, %f889, 0f3F800000;
|
|
selp.f32 %f892, %f890, %f887, %p58;
|
|
selp.f32 %f893, %f891, %f889, %p58;
|
|
add.f32 %f894, %f892, 0fBF800000;
|
|
add.f32 %f880, %f892, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f879,%f880;
|
|
// inline asm
|
|
add.f32 %f895, %f894, %f894;
|
|
mul.f32 %f896, %f879, %f895;
|
|
mul.f32 %f897, %f896, %f896;
|
|
mov.f32 %f898, 0f3C4CAF63;
|
|
mov.f32 %f899, 0f3B18F0FE;
|
|
fma.rn.f32 %f900, %f899, %f897, %f898;
|
|
mov.f32 %f901, 0f3DAAAABD;
|
|
fma.rn.f32 %f902, %f900, %f897, %f901;
|
|
mul.rn.f32 %f903, %f902, %f897;
|
|
mul.rn.f32 %f904, %f903, %f896;
|
|
sub.f32 %f905, %f894, %f896;
|
|
neg.f32 %f906, %f896;
|
|
add.f32 %f907, %f905, %f905;
|
|
fma.rn.f32 %f908, %f906, %f894, %f907;
|
|
mul.rn.f32 %f909, %f879, %f908;
|
|
add.f32 %f910, %f904, %f896;
|
|
sub.f32 %f911, %f896, %f910;
|
|
add.f32 %f912, %f904, %f911;
|
|
add.f32 %f913, %f909, %f912;
|
|
add.f32 %f914, %f910, %f913;
|
|
sub.f32 %f915, %f910, %f914;
|
|
add.f32 %f916, %f913, %f915;
|
|
mov.f32 %f917, 0f3F317200;
|
|
mul.rn.f32 %f918, %f893, %f917;
|
|
mov.f32 %f919, 0f35BFBE8E;
|
|
mul.rn.f32 %f920, %f893, %f919;
|
|
add.f32 %f921, %f918, %f914;
|
|
sub.f32 %f922, %f918, %f921;
|
|
add.f32 %f923, %f914, %f922;
|
|
add.f32 %f924, %f916, %f923;
|
|
add.f32 %f925, %f920, %f924;
|
|
add.f32 %f926, %f921, %f925;
|
|
sub.f32 %f927, %f921, %f926;
|
|
add.f32 %f928, %f925, %f927;
|
|
mov.f32 %f929, 0f3EE8BA2E;
|
|
mul.rn.f32 %f930, %f929, %f926;
|
|
neg.f32 %f931, %f930;
|
|
fma.rn.f32 %f932, %f929, %f926, %f931;
|
|
fma.rn.f32 %f933, %f929, %f928, %f932;
|
|
mov.f32 %f934, 0f00000000;
|
|
fma.rn.f32 %f935, %f934, %f926, %f933;
|
|
add.rn.f32 %f936, %f930, %f935;
|
|
neg.f32 %f937, %f936;
|
|
add.rn.f32 %f938, %f930, %f937;
|
|
add.rn.f32 %f939, %f938, %f935;
|
|
mov.b32 %r123, %f936;
|
|
setp.eq.s32 %p59, %r123, 1118925336;
|
|
add.s32 %r124, %r123, -1;
|
|
mov.b32 %f940, %r124;
|
|
add.f32 %f941, %f939, 0f37000000;
|
|
selp.f32 %f942, %f940, %f936, %p59;
|
|
selp.f32 %f202, %f941, %f939, %p59;
|
|
mul.f32 %f943, %f942, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f944, %f943;
|
|
mov.f32 %f945, 0fBF317200;
|
|
fma.rn.f32 %f946, %f944, %f945, %f942;
|
|
mov.f32 %f947, 0fB5BFBE8E;
|
|
fma.rn.f32 %f948, %f944, %f947, %f946;
|
|
mul.f32 %f949, %f948, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f950, %f949;
|
|
add.f32 %f951, %f944, 0f00000000;
|
|
ex2.approx.f32 %f952, %f951;
|
|
mul.f32 %f953, %f950, %f952;
|
|
setp.lt.f32 %p60, %f942, 0fC2D20000;
|
|
selp.f32 %f954, 0f00000000, %f953, %p60;
|
|
setp.gt.f32 %p61, %f942, 0f42D20000;
|
|
selp.f32 %f1387, 0f7F800000, %f954, %p61;
|
|
setp.eq.f32 %p62, %f1387, 0f7F800000;
|
|
@%p62 bra BB0_47;
|
|
|
|
fma.rn.f32 %f1387, %f1387, %f202, %f1387;
|
|
|
|
BB0_47:
|
|
setp.lt.f32 %p63, %f199, 0f00000000;
|
|
setp.eq.f32 %p64, %f200, 0f3F800000;
|
|
and.pred %p4, %p63, %p64;
|
|
mov.b32 %r125, %f1387;
|
|
xor.b32 %r126, %r125, -2147483648;
|
|
mov.b32 %f955, %r126;
|
|
selp.f32 %f1389, %f955, %f1387, %p4;
|
|
setp.eq.f32 %p65, %f199, 0f00000000;
|
|
@%p65 bra BB0_50;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_50:
|
|
add.f32 %f958, %f199, %f199;
|
|
selp.f32 %f1389, %f958, 0f00000000, %p64;
|
|
bra.uni BB0_51;
|
|
|
|
BB0_115:
|
|
mov.u64 %rd190, image_HDR;
|
|
cvta.global.u64 %rd185, %rd190;
|
|
mov.u32 %r212, 8;
|
|
// inline asm
|
|
call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r212, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1278, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs107, %f1278;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs108, 0;
|
|
st.v4.u16 [%rd184], {%rs107, %rs107, %rs107, %rs108};
|
|
|
|
BB0_116:
|
|
ld.global.u32 %r213, [additive];
|
|
setp.eq.s32 %p132, %r213, 0;
|
|
@%p132 bra BB0_118;
|
|
|
|
mov.u64 %rd203, image_RNM0;
|
|
cvta.global.u64 %rd192, %rd203;
|
|
mov.u32 %r217, 8;
|
|
// inline asm
|
|
call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r217, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs115, %rs116, %rs117, %rs118}, [%rd191];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1279, %rs115;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1280, %rs116;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1281, %rs117;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r217, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1282, %f1279, 0f00000000;
|
|
add.f32 %f1283, %f1280, 0f00000000;
|
|
add.f32 %f1284, %f1281, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs114, %f1284;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs113, %f1283;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f1282;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs119, 0;
|
|
st.v4.u16 [%rd197], {%rs112, %rs113, %rs114, %rs119};
|
|
bra.uni BB0_119;
|
|
|
|
BB0_118:
|
|
mov.u64 %rd210, image_RNM0;
|
|
cvta.global.u64 %rd205, %rd210;
|
|
mov.u32 %r219, 8;
|
|
// inline asm
|
|
call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r219, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1285, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs120, %f1285;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs121, 0;
|
|
st.v4.u16 [%rd204], {%rs120, %rs120, %rs120, %rs121};
|
|
|
|
BB0_119:
|
|
ld.global.u32 %r220, [additive];
|
|
setp.eq.s32 %p133, %r220, 0;
|
|
@%p133 bra BB0_121;
|
|
|
|
mov.u64 %rd223, image_RNM1;
|
|
cvta.global.u64 %rd212, %rd223;
|
|
mov.u32 %r224, 8;
|
|
// inline asm
|
|
call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r224, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs128, %rs129, %rs130, %rs131}, [%rd211];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1286, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1287, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1288, %rs130;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r224, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1289, %f1286, 0f00000000;
|
|
add.f32 %f1290, %f1287, 0f00000000;
|
|
add.f32 %f1291, %f1288, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f1291;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1290;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1289;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs132, 0;
|
|
st.v4.u16 [%rd217], {%rs125, %rs126, %rs127, %rs132};
|
|
bra.uni BB0_122;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd230, image_RNM1;
|
|
cvta.global.u64 %rd225, %rd230;
|
|
mov.u32 %r226, 8;
|
|
// inline asm
|
|
call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r226, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1292, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f1292;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs134, 0;
|
|
st.v4.u16 [%rd224], {%rs133, %rs133, %rs133, %rs134};
|
|
|
|
BB0_122:
|
|
ld.global.u32 %r227, [additive];
|
|
setp.eq.s32 %p134, %r227, 0;
|
|
@%p134 bra BB0_124;
|
|
|
|
mov.u64 %rd243, image_RNM2;
|
|
cvta.global.u64 %rd232, %rd243;
|
|
mov.u32 %r231, 8;
|
|
// inline asm
|
|
call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r231, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs141, %rs142, %rs143, %rs144}, [%rd231];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1293, %rs141;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1294, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1295, %rs143;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r231, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1296, %f1293, 0f00000000;
|
|
add.f32 %f1297, %f1294, 0f00000000;
|
|
add.f32 %f1298, %f1295, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f1298;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f1297;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1296;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs145, 0;
|
|
st.v4.u16 [%rd237], {%rs138, %rs139, %rs140, %rs145};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_124:
|
|
mov.u64 %rd250, image_RNM2;
|
|
cvta.global.u64 %rd245, %rd250;
|
|
mov.u32 %r233, 8;
|
|
// inline asm
|
|
call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r233, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1299, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f1299;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs147, 0;
|
|
st.v4.u16 [%rd244], {%rs146, %rs146, %rs146, %rs147};
|
|
|
|
BB0_125:
|
|
ld.global.u32 %r234, [additive];
|
|
setp.eq.s32 %p135, %r234, 0;
|
|
@%p135 bra BB0_127;
|
|
|
|
mov.u64 %rd263, image_RNM3;
|
|
cvta.global.u64 %rd252, %rd263;
|
|
mov.u32 %r238, 8;
|
|
// inline asm
|
|
call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r238, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs154, %rs155, %rs156, %rs157}, [%rd251];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1300, %rs154;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1301, %rs155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1302, %rs156;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r238, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1303, %f1300, 0f00000000;
|
|
add.f32 %f1304, %f1301, 0f00000000;
|
|
add.f32 %f1305, %f1302, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs153, %f1305;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1304;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1303;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs158, 0;
|
|
st.v4.u16 [%rd257], {%rs151, %rs152, %rs153, %rs158};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_127:
|
|
mov.u64 %rd270, image_RNM3;
|
|
cvta.global.u64 %rd265, %rd270;
|
|
mov.u32 %r240, 8;
|
|
// inline asm
|
|
call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r240, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1306, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1306;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs160, 0;
|
|
st.v4.u16 [%rd264], {%rs159, %rs159, %rs159, %rs160};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_48:
|
|
setp.geu.f32 %p66, %f199, 0f00000000;
|
|
@%p66 bra BB0_51;
|
|
|
|
cvt.rzi.f32.f32 %f957, %f929;
|
|
setp.neu.f32 %p67, %f957, 0f3EE8BA2E;
|
|
selp.f32 %f1389, 0f7FFFFFFF, %f1389, %p67;
|
|
|
|
BB0_51:
|
|
add.f32 %f959, %f201, 0f3EE8BA2E;
|
|
mov.b32 %r127, %f959;
|
|
setp.lt.s32 %p69, %r127, 2139095040;
|
|
@%p69 bra BB0_56;
|
|
|
|
setp.gtu.f32 %p70, %f201, 0f7F800000;
|
|
@%p70 bra BB0_55;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_55:
|
|
add.f32 %f1389, %f199, 0f3EE8BA2E;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_53:
|
|
setp.neu.f32 %p71, %f201, 0f7F800000;
|
|
@%p71 bra BB0_56;
|
|
|
|
selp.f32 %f1389, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_56:
|
|
mul.f32 %f960, %f1389, 0f437F0000;
|
|
setp.eq.f32 %p72, %f199, 0f3F800000;
|
|
selp.f32 %f961, 0f437F0000, %f960, %p72;
|
|
cvt.rzi.u32.f32 %r128, %f961;
|
|
cvt.u16.u32 %rs17, %r128;
|
|
mov.u16 %rs18, 255;
|
|
st.v2.u8 [%rd43], {%rs17, %rs18};
|
|
ld.global.u32 %r247, [imageEnabled];
|
|
|
|
BB0_57:
|
|
and.b32 %r129, %r247, 1;
|
|
setp.eq.b32 %p73, %r129, 1;
|
|
@!%p73 bra BB0_92;
|
|
bra.uni BB0_58;
|
|
|
|
BB0_58:
|
|
mov.f32 %f964, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f965, %f964;
|
|
fma.rn.f32 %f966, %f965, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f213, %f966;
|
|
abs.f32 %f214, %f1325;
|
|
setp.lt.f32 %p74, %f214, 0f00800000;
|
|
mul.f32 %f967, %f214, 0f4B800000;
|
|
selp.f32 %f968, 0fC3170000, 0fC2FE0000, %p74;
|
|
selp.f32 %f969, %f967, %f214, %p74;
|
|
mov.b32 %r130, %f969;
|
|
and.b32 %r131, %r130, 8388607;
|
|
or.b32 %r132, %r131, 1065353216;
|
|
mov.b32 %f970, %r132;
|
|
shr.u32 %r133, %r130, 23;
|
|
cvt.rn.f32.u32 %f971, %r133;
|
|
add.f32 %f972, %f968, %f971;
|
|
setp.gt.f32 %p75, %f970, 0f3FB504F3;
|
|
mul.f32 %f973, %f970, 0f3F000000;
|
|
add.f32 %f974, %f972, 0f3F800000;
|
|
selp.f32 %f975, %f973, %f970, %p75;
|
|
selp.f32 %f976, %f974, %f972, %p75;
|
|
add.f32 %f977, %f975, 0fBF800000;
|
|
add.f32 %f963, %f975, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f962,%f963;
|
|
// inline asm
|
|
add.f32 %f978, %f977, %f977;
|
|
mul.f32 %f979, %f962, %f978;
|
|
mul.f32 %f980, %f979, %f979;
|
|
mov.f32 %f981, 0f3C4CAF63;
|
|
mov.f32 %f982, 0f3B18F0FE;
|
|
fma.rn.f32 %f983, %f982, %f980, %f981;
|
|
mov.f32 %f984, 0f3DAAAABD;
|
|
fma.rn.f32 %f985, %f983, %f980, %f984;
|
|
mul.rn.f32 %f986, %f985, %f980;
|
|
mul.rn.f32 %f987, %f986, %f979;
|
|
sub.f32 %f988, %f977, %f979;
|
|
neg.f32 %f989, %f979;
|
|
add.f32 %f990, %f988, %f988;
|
|
fma.rn.f32 %f991, %f989, %f977, %f990;
|
|
mul.rn.f32 %f992, %f962, %f991;
|
|
add.f32 %f993, %f987, %f979;
|
|
sub.f32 %f994, %f979, %f993;
|
|
add.f32 %f995, %f987, %f994;
|
|
add.f32 %f996, %f992, %f995;
|
|
add.f32 %f997, %f993, %f996;
|
|
sub.f32 %f998, %f993, %f997;
|
|
add.f32 %f999, %f996, %f998;
|
|
mov.f32 %f1000, 0f3F317200;
|
|
mul.rn.f32 %f1001, %f976, %f1000;
|
|
mov.f32 %f1002, 0f35BFBE8E;
|
|
mul.rn.f32 %f1003, %f976, %f1002;
|
|
add.f32 %f1004, %f1001, %f997;
|
|
sub.f32 %f1005, %f1001, %f1004;
|
|
add.f32 %f1006, %f997, %f1005;
|
|
add.f32 %f1007, %f999, %f1006;
|
|
add.f32 %f1008, %f1003, %f1007;
|
|
add.f32 %f1009, %f1004, %f1008;
|
|
sub.f32 %f1010, %f1004, %f1009;
|
|
add.f32 %f1011, %f1008, %f1010;
|
|
mov.f32 %f1012, 0f3EE66666;
|
|
mul.rn.f32 %f1013, %f1012, %f1009;
|
|
neg.f32 %f1014, %f1013;
|
|
fma.rn.f32 %f1015, %f1012, %f1009, %f1014;
|
|
fma.rn.f32 %f1016, %f1012, %f1011, %f1015;
|
|
mov.f32 %f1017, 0f00000000;
|
|
fma.rn.f32 %f1018, %f1017, %f1009, %f1016;
|
|
add.rn.f32 %f1019, %f1013, %f1018;
|
|
neg.f32 %f1020, %f1019;
|
|
add.rn.f32 %f1021, %f1013, %f1020;
|
|
add.rn.f32 %f1022, %f1021, %f1018;
|
|
mov.b32 %r134, %f1019;
|
|
setp.eq.s32 %p76, %r134, 1118925336;
|
|
add.s32 %r135, %r134, -1;
|
|
mov.b32 %f1023, %r135;
|
|
add.f32 %f1024, %f1022, 0f37000000;
|
|
selp.f32 %f1025, %f1023, %f1019, %p76;
|
|
selp.f32 %f215, %f1024, %f1022, %p76;
|
|
mul.f32 %f1026, %f1025, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1027, %f1026;
|
|
mov.f32 %f1028, 0fBF317200;
|
|
fma.rn.f32 %f1029, %f1027, %f1028, %f1025;
|
|
mov.f32 %f1030, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1031, %f1027, %f1030, %f1029;
|
|
mul.f32 %f1032, %f1031, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1033, %f1032;
|
|
add.f32 %f1034, %f1027, 0f00000000;
|
|
ex2.approx.f32 %f1035, %f1034;
|
|
mul.f32 %f1036, %f1033, %f1035;
|
|
setp.lt.f32 %p77, %f1025, 0fC2D20000;
|
|
selp.f32 %f1037, 0f00000000, %f1036, %p77;
|
|
setp.gt.f32 %p78, %f1025, 0f42D20000;
|
|
selp.f32 %f1390, 0f7F800000, %f1037, %p78;
|
|
setp.eq.f32 %p79, %f1390, 0f7F800000;
|
|
@%p79 bra BB0_60;
|
|
|
|
fma.rn.f32 %f1390, %f1390, %f215, %f1390;
|
|
|
|
BB0_60:
|
|
setp.lt.f32 %p80, %f1325, 0f00000000;
|
|
setp.eq.f32 %p81, %f213, 0f3F800000;
|
|
and.pred %p5, %p80, %p81;
|
|
mov.b32 %r136, %f1390;
|
|
xor.b32 %r137, %r136, -2147483648;
|
|
mov.b32 %f1038, %r137;
|
|
selp.f32 %f1392, %f1038, %f1390, %p5;
|
|
setp.eq.f32 %p82, %f1325, 0f00000000;
|
|
@%p82 bra BB0_63;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_63:
|
|
add.f32 %f1041, %f1325, %f1325;
|
|
selp.f32 %f1392, %f1041, 0f00000000, %p81;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_61:
|
|
setp.geu.f32 %p83, %f1325, 0f00000000;
|
|
@%p83 bra BB0_64;
|
|
|
|
cvt.rzi.f32.f32 %f1040, %f1012;
|
|
setp.neu.f32 %p84, %f1040, 0f3EE66666;
|
|
selp.f32 %f1392, 0f7FFFFFFF, %f1392, %p84;
|
|
|
|
BB0_64:
|
|
add.f32 %f1042, %f214, 0f3EE66666;
|
|
mov.b32 %r138, %f1042;
|
|
setp.lt.s32 %p86, %r138, 2139095040;
|
|
@%p86 bra BB0_69;
|
|
|
|
setp.gtu.f32 %p87, %f214, 0f7F800000;
|
|
@%p87 bra BB0_68;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_68:
|
|
add.f32 %f1392, %f1325, 0f3EE66666;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_66:
|
|
setp.neu.f32 %p88, %f214, 0f7F800000;
|
|
@%p88 bra BB0_69;
|
|
|
|
selp.f32 %f1392, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_69:
|
|
setp.eq.f32 %p89, %f1325, 0f3F800000;
|
|
selp.f32 %f226, 0f3F800000, %f1392, %p89;
|
|
abs.f32 %f227, %f1324;
|
|
setp.lt.f32 %p90, %f227, 0f00800000;
|
|
mul.f32 %f1045, %f227, 0f4B800000;
|
|
selp.f32 %f1046, 0fC3170000, 0fC2FE0000, %p90;
|
|
selp.f32 %f1047, %f1045, %f227, %p90;
|
|
mov.b32 %r139, %f1047;
|
|
and.b32 %r140, %r139, 8388607;
|
|
or.b32 %r141, %r140, 1065353216;
|
|
mov.b32 %f1048, %r141;
|
|
shr.u32 %r142, %r139, 23;
|
|
cvt.rn.f32.u32 %f1049, %r142;
|
|
add.f32 %f1050, %f1046, %f1049;
|
|
setp.gt.f32 %p91, %f1048, 0f3FB504F3;
|
|
mul.f32 %f1051, %f1048, 0f3F000000;
|
|
add.f32 %f1052, %f1050, 0f3F800000;
|
|
selp.f32 %f1053, %f1051, %f1048, %p91;
|
|
selp.f32 %f1054, %f1052, %f1050, %p91;
|
|
add.f32 %f1055, %f1053, 0fBF800000;
|
|
add.f32 %f1044, %f1053, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1043,%f1044;
|
|
// inline asm
|
|
add.f32 %f1056, %f1055, %f1055;
|
|
mul.f32 %f1057, %f1043, %f1056;
|
|
mul.f32 %f1058, %f1057, %f1057;
|
|
fma.rn.f32 %f1061, %f982, %f1058, %f981;
|
|
fma.rn.f32 %f1063, %f1061, %f1058, %f984;
|
|
mul.rn.f32 %f1064, %f1063, %f1058;
|
|
mul.rn.f32 %f1065, %f1064, %f1057;
|
|
sub.f32 %f1066, %f1055, %f1057;
|
|
neg.f32 %f1067, %f1057;
|
|
add.f32 %f1068, %f1066, %f1066;
|
|
fma.rn.f32 %f1069, %f1067, %f1055, %f1068;
|
|
mul.rn.f32 %f1070, %f1043, %f1069;
|
|
add.f32 %f1071, %f1065, %f1057;
|
|
sub.f32 %f1072, %f1057, %f1071;
|
|
add.f32 %f1073, %f1065, %f1072;
|
|
add.f32 %f1074, %f1070, %f1073;
|
|
add.f32 %f1075, %f1071, %f1074;
|
|
sub.f32 %f1076, %f1071, %f1075;
|
|
add.f32 %f1077, %f1074, %f1076;
|
|
mul.rn.f32 %f1079, %f1054, %f1000;
|
|
mul.rn.f32 %f1081, %f1054, %f1002;
|
|
add.f32 %f1082, %f1079, %f1075;
|
|
sub.f32 %f1083, %f1079, %f1082;
|
|
add.f32 %f1084, %f1075, %f1083;
|
|
add.f32 %f1085, %f1077, %f1084;
|
|
add.f32 %f1086, %f1081, %f1085;
|
|
add.f32 %f1087, %f1082, %f1086;
|
|
sub.f32 %f1088, %f1082, %f1087;
|
|
add.f32 %f1089, %f1086, %f1088;
|
|
mul.rn.f32 %f1091, %f1012, %f1087;
|
|
neg.f32 %f1092, %f1091;
|
|
fma.rn.f32 %f1093, %f1012, %f1087, %f1092;
|
|
fma.rn.f32 %f1094, %f1012, %f1089, %f1093;
|
|
fma.rn.f32 %f1096, %f1017, %f1087, %f1094;
|
|
add.rn.f32 %f1097, %f1091, %f1096;
|
|
neg.f32 %f1098, %f1097;
|
|
add.rn.f32 %f1099, %f1091, %f1098;
|
|
add.rn.f32 %f1100, %f1099, %f1096;
|
|
mov.b32 %r143, %f1097;
|
|
setp.eq.s32 %p92, %r143, 1118925336;
|
|
add.s32 %r144, %r143, -1;
|
|
mov.b32 %f1101, %r144;
|
|
add.f32 %f1102, %f1100, 0f37000000;
|
|
selp.f32 %f1103, %f1101, %f1097, %p92;
|
|
selp.f32 %f228, %f1102, %f1100, %p92;
|
|
mul.f32 %f1104, %f1103, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1105, %f1104;
|
|
fma.rn.f32 %f1107, %f1105, %f1028, %f1103;
|
|
fma.rn.f32 %f1109, %f1105, %f1030, %f1107;
|
|
mul.f32 %f1110, %f1109, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1111, %f1110;
|
|
add.f32 %f1112, %f1105, 0f00000000;
|
|
ex2.approx.f32 %f1113, %f1112;
|
|
mul.f32 %f1114, %f1111, %f1113;
|
|
setp.lt.f32 %p93, %f1103, 0fC2D20000;
|
|
selp.f32 %f1115, 0f00000000, %f1114, %p93;
|
|
setp.gt.f32 %p94, %f1103, 0f42D20000;
|
|
selp.f32 %f1393, 0f7F800000, %f1115, %p94;
|
|
setp.eq.f32 %p95, %f1393, 0f7F800000;
|
|
@%p95 bra BB0_71;
|
|
|
|
fma.rn.f32 %f1393, %f1393, %f228, %f1393;
|
|
|
|
BB0_71:
|
|
setp.lt.f32 %p96, %f1324, 0f00000000;
|
|
and.pred %p6, %p96, %p81;
|
|
mov.b32 %r145, %f1393;
|
|
xor.b32 %r146, %r145, -2147483648;
|
|
mov.b32 %f1116, %r146;
|
|
selp.f32 %f1395, %f1116, %f1393, %p6;
|
|
setp.eq.f32 %p98, %f1324, 0f00000000;
|
|
@%p98 bra BB0_74;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_74:
|
|
add.f32 %f1119, %f1324, %f1324;
|
|
selp.f32 %f1395, %f1119, 0f00000000, %p81;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_72:
|
|
setp.geu.f32 %p99, %f1324, 0f00000000;
|
|
@%p99 bra BB0_75;
|
|
|
|
cvt.rzi.f32.f32 %f1118, %f1012;
|
|
setp.neu.f32 %p100, %f1118, 0f3EE66666;
|
|
selp.f32 %f1395, 0f7FFFFFFF, %f1395, %p100;
|
|
|
|
BB0_75:
|
|
add.f32 %f1120, %f227, 0f3EE66666;
|
|
mov.b32 %r147, %f1120;
|
|
setp.lt.s32 %p102, %r147, 2139095040;
|
|
@%p102 bra BB0_80;
|
|
|
|
setp.gtu.f32 %p103, %f227, 0f7F800000;
|
|
@%p103 bra BB0_79;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_79:
|
|
add.f32 %f1395, %f1324, 0f3EE66666;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_77:
|
|
setp.neu.f32 %p104, %f227, 0f7F800000;
|
|
@%p104 bra BB0_80;
|
|
|
|
selp.f32 %f1395, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_80:
|
|
setp.eq.f32 %p105, %f1324, 0f3F800000;
|
|
selp.f32 %f239, 0f3F800000, %f1395, %p105;
|
|
abs.f32 %f240, %f1323;
|
|
setp.lt.f32 %p106, %f240, 0f00800000;
|
|
mul.f32 %f1123, %f240, 0f4B800000;
|
|
selp.f32 %f1124, 0fC3170000, 0fC2FE0000, %p106;
|
|
selp.f32 %f1125, %f1123, %f240, %p106;
|
|
mov.b32 %r148, %f1125;
|
|
and.b32 %r149, %r148, 8388607;
|
|
or.b32 %r150, %r149, 1065353216;
|
|
mov.b32 %f1126, %r150;
|
|
shr.u32 %r151, %r148, 23;
|
|
cvt.rn.f32.u32 %f1127, %r151;
|
|
add.f32 %f1128, %f1124, %f1127;
|
|
setp.gt.f32 %p107, %f1126, 0f3FB504F3;
|
|
mul.f32 %f1129, %f1126, 0f3F000000;
|
|
add.f32 %f1130, %f1128, 0f3F800000;
|
|
selp.f32 %f1131, %f1129, %f1126, %p107;
|
|
selp.f32 %f1132, %f1130, %f1128, %p107;
|
|
add.f32 %f1133, %f1131, 0fBF800000;
|
|
add.f32 %f1122, %f1131, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1121,%f1122;
|
|
// inline asm
|
|
add.f32 %f1134, %f1133, %f1133;
|
|
mul.f32 %f1135, %f1121, %f1134;
|
|
mul.f32 %f1136, %f1135, %f1135;
|
|
fma.rn.f32 %f1139, %f982, %f1136, %f981;
|
|
fma.rn.f32 %f1141, %f1139, %f1136, %f984;
|
|
mul.rn.f32 %f1142, %f1141, %f1136;
|
|
mul.rn.f32 %f1143, %f1142, %f1135;
|
|
sub.f32 %f1144, %f1133, %f1135;
|
|
neg.f32 %f1145, %f1135;
|
|
add.f32 %f1146, %f1144, %f1144;
|
|
fma.rn.f32 %f1147, %f1145, %f1133, %f1146;
|
|
mul.rn.f32 %f1148, %f1121, %f1147;
|
|
add.f32 %f1149, %f1143, %f1135;
|
|
sub.f32 %f1150, %f1135, %f1149;
|
|
add.f32 %f1151, %f1143, %f1150;
|
|
add.f32 %f1152, %f1148, %f1151;
|
|
add.f32 %f1153, %f1149, %f1152;
|
|
sub.f32 %f1154, %f1149, %f1153;
|
|
add.f32 %f1155, %f1152, %f1154;
|
|
mul.rn.f32 %f1157, %f1132, %f1000;
|
|
mul.rn.f32 %f1159, %f1132, %f1002;
|
|
add.f32 %f1160, %f1157, %f1153;
|
|
sub.f32 %f1161, %f1157, %f1160;
|
|
add.f32 %f1162, %f1153, %f1161;
|
|
add.f32 %f1163, %f1155, %f1162;
|
|
add.f32 %f1164, %f1159, %f1163;
|
|
add.f32 %f1165, %f1160, %f1164;
|
|
sub.f32 %f1166, %f1160, %f1165;
|
|
add.f32 %f1167, %f1164, %f1166;
|
|
mul.rn.f32 %f1169, %f1012, %f1165;
|
|
neg.f32 %f1170, %f1169;
|
|
fma.rn.f32 %f1171, %f1012, %f1165, %f1170;
|
|
fma.rn.f32 %f1172, %f1012, %f1167, %f1171;
|
|
fma.rn.f32 %f1174, %f1017, %f1165, %f1172;
|
|
add.rn.f32 %f1175, %f1169, %f1174;
|
|
neg.f32 %f1176, %f1175;
|
|
add.rn.f32 %f1177, %f1169, %f1176;
|
|
add.rn.f32 %f1178, %f1177, %f1174;
|
|
mov.b32 %r152, %f1175;
|
|
setp.eq.s32 %p108, %r152, 1118925336;
|
|
add.s32 %r153, %r152, -1;
|
|
mov.b32 %f1179, %r153;
|
|
add.f32 %f1180, %f1178, 0f37000000;
|
|
selp.f32 %f1181, %f1179, %f1175, %p108;
|
|
selp.f32 %f241, %f1180, %f1178, %p108;
|
|
mul.f32 %f1182, %f1181, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1183, %f1182;
|
|
fma.rn.f32 %f1185, %f1183, %f1028, %f1181;
|
|
fma.rn.f32 %f1187, %f1183, %f1030, %f1185;
|
|
mul.f32 %f1188, %f1187, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1189, %f1188;
|
|
add.f32 %f1190, %f1183, 0f00000000;
|
|
ex2.approx.f32 %f1191, %f1190;
|
|
mul.f32 %f1192, %f1189, %f1191;
|
|
setp.lt.f32 %p109, %f1181, 0fC2D20000;
|
|
selp.f32 %f1193, 0f00000000, %f1192, %p109;
|
|
setp.gt.f32 %p110, %f1181, 0f42D20000;
|
|
selp.f32 %f1396, 0f7F800000, %f1193, %p110;
|
|
setp.eq.f32 %p111, %f1396, 0f7F800000;
|
|
@%p111 bra BB0_82;
|
|
|
|
fma.rn.f32 %f1396, %f1396, %f241, %f1396;
|
|
|
|
BB0_82:
|
|
setp.lt.f32 %p112, %f1323, 0f00000000;
|
|
and.pred %p7, %p112, %p81;
|
|
mov.b32 %r154, %f1396;
|
|
xor.b32 %r155, %r154, -2147483648;
|
|
mov.b32 %f1194, %r155;
|
|
selp.f32 %f1398, %f1194, %f1396, %p7;
|
|
setp.eq.f32 %p114, %f1323, 0f00000000;
|
|
@%p114 bra BB0_85;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_85:
|
|
add.f32 %f1197, %f1323, %f1323;
|
|
selp.f32 %f1398, %f1197, 0f00000000, %p81;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_83:
|
|
setp.geu.f32 %p115, %f1323, 0f00000000;
|
|
@%p115 bra BB0_86;
|
|
|
|
cvt.rzi.f32.f32 %f1196, %f1012;
|
|
setp.neu.f32 %p116, %f1196, 0f3EE66666;
|
|
selp.f32 %f1398, 0f7FFFFFFF, %f1398, %p116;
|
|
|
|
BB0_86:
|
|
add.f32 %f1198, %f240, 0f3EE66666;
|
|
mov.b32 %r156, %f1198;
|
|
setp.lt.s32 %p118, %r156, 2139095040;
|
|
@%p118 bra BB0_91;
|
|
|
|
setp.gtu.f32 %p119, %f240, 0f7F800000;
|
|
@%p119 bra BB0_90;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_90:
|
|
add.f32 %f1398, %f1323, 0f3EE66666;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_88:
|
|
setp.neu.f32 %p120, %f240, 0f7F800000;
|
|
@%p120 bra BB0_91;
|
|
|
|
selp.f32 %f1398, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_91:
|
|
setp.eq.f32 %p121, %f1323, 0f3F800000;
|
|
selp.f32 %f1199, 0f3F800000, %f1398, %p121;
|
|
cvt.u64.u32 %rd53, %r3;
|
|
cvt.u64.u32 %rd52, %r2;
|
|
mov.u64 %rd56, image;
|
|
cvta.global.u64 %rd51, %rd56;
|
|
// inline asm
|
|
call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1200, %f1199;
|
|
mul.f32 %f1201, %f1200, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r159, %f1201;
|
|
cvt.sat.f32.f32 %f1202, %f239;
|
|
mul.f32 %f1203, %f1202, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r160, %f1203;
|
|
cvt.sat.f32.f32 %f1204, %f226;
|
|
mul.f32 %f1205, %f1204, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r161, %f1205;
|
|
cvt.u16.u32 %rs19, %r159;
|
|
cvt.u16.u32 %rs20, %r161;
|
|
cvt.u16.u32 %rs21, %r160;
|
|
mov.u16 %rs22, 255;
|
|
st.v4.u8 [%rd50], {%rs19, %rs21, %rs20, %rs22};
|
|
ld.global.u32 %r247, [imageEnabled];
|
|
|
|
BB0_92:
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
and.b32 %r162, %r247, 4;
|
|
setp.eq.s32 %p122, %r162, 0;
|
|
@%p122 bra BB0_96;
|
|
|
|
ld.global.u32 %r163, [additive];
|
|
setp.eq.s32 %p123, %r163, 0;
|
|
mov.f32 %f1206, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f1206;}
|
|
|
|
// inline asm
|
|
@%p123 bra BB0_95;
|
|
|
|
mov.u64 %rd69, image_HDR;
|
|
cvta.global.u64 %rd58, %rd69;
|
|
mov.u32 %r167, 8;
|
|
// inline asm
|
|
call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd57];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1207, %rs30;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1208, %rs31;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1209, %rs32;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1210, %f1325, %f1207;
|
|
add.f32 %f1211, %f1324, %f1208;
|
|
add.f32 %f1212, %f1323, %f1209;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1212;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1211;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1210;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd63], {%rs27, %rs28, %rs29, %rs23};
|
|
bra.uni BB0_96;
|
|
|
|
BB0_95:
|
|
mov.u64 %rd76, image_HDR;
|
|
cvta.global.u64 %rd71, %rd76;
|
|
mov.u32 %r169, 8;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r169, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1323;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f1324;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f1325;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd70], {%rs34, %rs35, %rs36, %rs23};
|
|
|
|
BB0_96:
|
|
mov.f32 %f1217, 0f34000000;
|
|
max.f32 %f1218, %f1322, %f1217;
|
|
div.rn.f32 %f1219, %f1319, %f1218;
|
|
max.f32 %f1220, %f1321, %f1217;
|
|
div.rn.f32 %f1221, %f1318, %f1220;
|
|
max.f32 %f1222, %f1320, %f1217;
|
|
div.rn.f32 %f1223, %f1317, %f1222;
|
|
fma.rn.f32 %f252, %f1219, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f253, %f1221, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f254, %f1223, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1224, %f1316, %f1218;
|
|
div.rn.f32 %f1225, %f1315, %f1220;
|
|
div.rn.f32 %f1226, %f1314, %f1222;
|
|
fma.rn.f32 %f255, %f1224, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f256, %f1225, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f257, %f1226, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1227, %f1313, %f1218;
|
|
div.rn.f32 %f1228, %f1312, %f1220;
|
|
div.rn.f32 %f1229, %f1311, %f1222;
|
|
fma.rn.f32 %f258, %f1227, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f259, %f1228, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f260, %f1229, 0f3F000000, 0f3F000000;
|
|
ld.global.u32 %r170, [additive];
|
|
setp.eq.s32 %p124, %r170, 0;
|
|
mov.f32 %f1216, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f1216;}
|
|
|
|
// inline asm
|
|
@%p124 bra BB0_98;
|
|
|
|
mov.u64 %rd89, image_RNM0;
|
|
cvta.global.u64 %rd78, %rd89;
|
|
mov.u32 %r174, 8;
|
|
// inline asm
|
|
call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r174, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs44, %rs45, %rs46, %rs47}, [%rd77];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1230, %rs44;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1231, %rs45;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1232, %rs46;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r174, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1233, %f1322, %f1230;
|
|
add.f32 %f1234, %f1321, %f1231;
|
|
add.f32 %f1235, %f1320, %f1232;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f1235;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f1234;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f1233;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd83], {%rs41, %rs42, %rs43, %rs37};
|
|
bra.uni BB0_99;
|
|
|
|
BB0_98:
|
|
mov.u64 %rd96, image_RNM0;
|
|
cvta.global.u64 %rd91, %rd96;
|
|
mov.u32 %r176, 8;
|
|
// inline asm
|
|
call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r176, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f1320;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1321;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f1322;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd90], {%rs48, %rs49, %rs50, %rs37};
|
|
|
|
BB0_99:
|
|
ld.global.u32 %r177, [additive];
|
|
setp.eq.s32 %p125, %r177, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1216;}
|
|
|
|
// inline asm
|
|
@%p125 bra BB0_101;
|
|
|
|
mov.u64 %rd109, image_RNM1;
|
|
cvta.global.u64 %rd98, %rd109;
|
|
mov.u32 %r181, 8;
|
|
// inline asm
|
|
call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r181, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd97];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1240, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1241, %rs59;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1242, %rs60;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r181, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1243, %f252, %f1240;
|
|
add.f32 %f1244, %f253, %f1241;
|
|
add.f32 %f1245, %f254, %f1242;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1245;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1244;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1243;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd103], {%rs55, %rs56, %rs57, %rs51};
|
|
bra.uni BB0_102;
|
|
|
|
BB0_101:
|
|
mov.u64 %rd116, image_RNM1;
|
|
cvta.global.u64 %rd111, %rd116;
|
|
mov.u32 %r183, 8;
|
|
// inline asm
|
|
call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r183, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f254;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f253;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f252;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd110], {%rs62, %rs63, %rs64, %rs51};
|
|
|
|
BB0_102:
|
|
ld.global.u32 %r184, [additive];
|
|
setp.eq.s32 %p126, %r184, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f1216;}
|
|
|
|
// inline asm
|
|
@%p126 bra BB0_104;
|
|
|
|
mov.u64 %rd129, image_RNM2;
|
|
cvta.global.u64 %rd118, %rd129;
|
|
mov.u32 %r188, 8;
|
|
// inline asm
|
|
call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r188, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd117];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1250, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1251, %rs73;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1252, %rs74;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r188, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1253, %f255, %f1250;
|
|
add.f32 %f1254, %f256, %f1251;
|
|
add.f32 %f1255, %f257, %f1252;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1255;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f1254;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1253;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd123], {%rs69, %rs70, %rs71, %rs65};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd136, image_RNM2;
|
|
cvta.global.u64 %rd131, %rd136;
|
|
mov.u32 %r190, 8;
|
|
// inline asm
|
|
call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r190, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f257;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f256;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f255;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd130], {%rs76, %rs77, %rs78, %rs65};
|
|
|
|
BB0_105:
|
|
ld.global.u32 %r191, [additive];
|
|
setp.eq.s32 %p127, %r191, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f1216;}
|
|
|
|
// inline asm
|
|
@%p127 bra BB0_107;
|
|
|
|
mov.u64 %rd149, image_RNM3;
|
|
cvta.global.u64 %rd138, %rd149;
|
|
mov.u32 %r195, 8;
|
|
// inline asm
|
|
call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r195, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs86, %rs87, %rs88, %rs89}, [%rd137];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1260, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1261, %rs87;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1262, %rs88;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r195, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1263, %f258, %f1260;
|
|
add.f32 %f1264, %f259, %f1261;
|
|
add.f32 %f1265, %f260, %f1262;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f1265;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f1264;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f1263;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd143], {%rs83, %rs84, %rs85, %rs79};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd156, image_RNM3;
|
|
cvta.global.u64 %rd151, %rd156;
|
|
mov.u32 %r197, 8;
|
|
// inline asm
|
|
call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r197, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f260;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f259;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f258;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd150], {%rs90, %rs91, %rs92, %rs79};
|
|
|
|
BB0_128:
|
|
ret;
|
|
}
|
|
|
|
|