2501 lines
74 KiB
Plaintext
2501 lines
74 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 uvtangent[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<144>;
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.reg .b16 %rs<161>;
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.reg .f32 %f<1541>;
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.reg .b32 %r<260>;
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.reg .b64 %rd<256>;
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mov.u64 %rd255, __local_depot0;
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cvta.local.u64 %SP, %rd255;
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ld.global.v2.u32 {%r36, %r37}, [pixelID];
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cvt.u64.u32 %rd13, %r36;
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cvt.u64.u32 %rd14, %r37;
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mov.u64 %rd17, uvnormal;
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cvta.global.u64 %rd12, %rd17;
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mov.u32 %r34, 2;
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mov.u32 %r35, 4;
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mov.u64 %rd16, 0;
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// inline asm
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call (%rd11), _rt_buffer_get_64, (%rd12, %r34, %r35, %rd13, %rd14, %rd16, %rd16);
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// inline asm
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ld.u32 %r1, [%rd11];
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shr.u32 %r40, %r1, 16;
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cvt.u16.u32 %rs1, %r40;
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and.b16 %rs8, %rs1, 255;
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cvt.u16.u32 %rs9, %r1;
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or.b16 %rs10, %rs9, %rs8;
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setp.eq.s16 %p8, %rs10, 0;
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mov.f32 %f1452, 0f00000000;
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mov.f32 %f1453, %f1452;
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mov.f32 %f1454, %f1452;
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@%p8 bra BB0_2;
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ld.u8 %rs11, [%rd11+1];
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and.b16 %rs13, %rs9, 255;
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cvt.rn.f32.u16 %f272, %rs13;
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div.rn.f32 %f273, %f272, 0f437F0000;
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fma.rn.f32 %f274, %f273, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f275, %rs11;
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div.rn.f32 %f276, %f275, 0f437F0000;
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fma.rn.f32 %f277, %f276, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f278, %rs8;
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div.rn.f32 %f279, %f278, 0f437F0000;
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fma.rn.f32 %f280, %f279, 0f40000000, 0fBF800000;
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mul.f32 %f281, %f277, %f277;
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fma.rn.f32 %f282, %f274, %f274, %f281;
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fma.rn.f32 %f283, %f280, %f280, %f282;
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sqrt.rn.f32 %f284, %f283;
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rcp.rn.f32 %f285, %f284;
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mul.f32 %f1452, %f274, %f285;
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mul.f32 %f1453, %f277, %f285;
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mul.f32 %f1454, %f280, %f285;
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BB0_2:
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ld.global.v2.u32 {%r41, %r42}, [pixelID];
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ld.global.v2.u32 {%r44, %r45}, [tileInfo];
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add.s32 %r2, %r41, %r44;
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add.s32 %r3, %r42, %r45;
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setp.eq.f32 %p9, %f1453, 0f00000000;
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setp.eq.f32 %p10, %f1452, 0f00000000;
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and.pred %p11, %p10, %p9;
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setp.eq.f32 %p12, %f1454, 0f00000000;
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and.pred %p13, %p11, %p12;
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@%p13 bra BB0_111;
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bra.uni BB0_3;
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BB0_111:
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ld.global.u32 %r259, [imageEnabled];
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and.b32 %r215, %r259, 1;
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setp.eq.b32 %p136, %r215, 1;
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@!%p136 bra BB0_113;
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bra.uni BB0_112;
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BB0_112:
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cvt.u64.u32 %rd163, %r2;
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cvt.u64.u32 %rd164, %r3;
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mov.u64 %rd167, image;
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cvta.global.u64 %rd162, %rd167;
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// inline asm
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call (%rd161), _rt_buffer_get_64, (%rd162, %r34, %r35, %rd163, %rd164, %rd16, %rd16);
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// inline asm
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mov.u16 %rs105, 0;
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st.v4.u8 [%rd161], {%rs105, %rs105, %rs105, %rs105};
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ld.global.u32 %r259, [imageEnabled];
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BB0_113:
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and.b32 %r218, %r259, 8;
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setp.eq.s32 %p137, %r218, 0;
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@%p137 bra BB0_115;
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cvt.u64.u32 %rd171, %r3;
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cvt.u64.u32 %rd170, %r2;
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mov.u64 %rd174, image_Mask;
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cvta.global.u64 %rd169, %rd174;
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// inline asm
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call (%rd168), _rt_buffer_get_64, (%rd169, %r34, %r34, %rd170, %rd171, %rd16, %rd16);
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// inline asm
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mov.f32 %f1423, 0f00000000;
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cvt.rzi.u32.f32 %r221, %f1423;
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cvt.u16.u32 %rs106, %r221;
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mov.u16 %rs107, 0;
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st.v2.u8 [%rd168], {%rs106, %rs107};
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ld.global.u32 %r259, [imageEnabled];
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BB0_115:
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cvt.u64.u32 %rd9, %r2;
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cvt.u64.u32 %rd10, %r3;
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and.b32 %r222, %r259, 4;
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setp.eq.s32 %p138, %r222, 0;
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@%p138 bra BB0_119;
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ld.global.u32 %r223, [additive];
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setp.eq.s32 %p139, %r223, 0;
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@%p139 bra BB0_118;
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mov.u64 %rd187, image_HDR;
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cvta.global.u64 %rd176, %rd187;
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mov.u32 %r227, 8;
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// inline asm
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call (%rd175), _rt_buffer_get_64, (%rd176, %r34, %r227, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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ld.v4.u16 {%rs114, %rs115, %rs116, %rs117}, [%rd175];
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// inline asm
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{ cvt.f32.f16 %f1424, %rs114;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1425, %rs115;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1426, %rs116;}
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// inline asm
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// inline asm
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call (%rd181), _rt_buffer_get_64, (%rd176, %r34, %r227, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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add.f32 %f1427, %f1424, 0f00000000;
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add.f32 %f1428, %f1425, 0f00000000;
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add.f32 %f1429, %f1426, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs113, %f1429;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs112, %f1428;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs111, %f1427;}
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// inline asm
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mov.u16 %rs118, 0;
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st.v4.u16 [%rd181], {%rs111, %rs112, %rs113, %rs118};
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bra.uni BB0_119;
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BB0_3:
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ld.global.v2.u32 {%r53, %r54}, [pixelID];
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cvt.u64.u32 %rd20, %r53;
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cvt.u64.u32 %rd21, %r54;
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mov.u64 %rd30, uvpos;
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cvta.global.u64 %rd19, %rd30;
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mov.u32 %r50, 12;
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// inline asm
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call (%rd18), _rt_buffer_get_64, (%rd19, %r34, %r50, %rd20, %rd21, %rd16, %rd16);
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// inline asm
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ld.f32 %f9, [%rd18+8];
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ld.f32 %f8, [%rd18+4];
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ld.f32 %f7, [%rd18];
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mul.f32 %f289, %f7, 0f3456BF95;
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mul.f32 %f290, %f8, 0f3456BF95;
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mul.f32 %f291, %f9, 0f3456BF95;
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abs.f32 %f292, %f1452;
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div.rn.f32 %f293, %f289, %f292;
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abs.f32 %f294, %f1453;
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div.rn.f32 %f295, %f290, %f294;
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abs.f32 %f296, %f1454;
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div.rn.f32 %f297, %f291, %f296;
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abs.f32 %f298, %f293;
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abs.f32 %f299, %f295;
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abs.f32 %f300, %f297;
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mov.f32 %f301, 0f38D1B717;
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max.f32 %f302, %f298, %f301;
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max.f32 %f303, %f299, %f301;
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max.f32 %f304, %f300, %f301;
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fma.rn.f32 %f10, %f1452, %f302, %f7;
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fma.rn.f32 %f11, %f1453, %f303, %f8;
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fma.rn.f32 %f12, %f1454, %f304, %f9;
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ld.global.v2.u32 {%r57, %r58}, [pixelID];
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cvt.rn.f32.u32 %f13, %r57;
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cvt.rn.f32.u32 %f14, %r58;
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cvt.u64.u32 %rd26, %r57;
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cvt.u64.u32 %rd27, %r58;
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mov.u64 %rd31, uvtangent;
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cvta.global.u64 %rd25, %rd31;
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// inline asm
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call (%rd24), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd26, %rd27, %rd16, %rd16);
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// inline asm
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ld.u32 %r4, [%rd24];
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shr.u32 %r5, %r4, 16;
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cvt.u16.u32 %rs15, %r5;
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and.b16 %rs16, %rs15, 255;
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cvt.u16.u32 %rs17, %r4;
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or.b16 %rs18, %rs17, %rs16;
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setp.eq.s16 %p14, %rs18, 0;
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mov.f32 %f1464, 0f00000000;
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mov.f32 %f1455, %f1464;
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mov.f32 %f1456, %f1464;
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mov.f32 %f1457, %f1464;
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@%p14 bra BB0_5;
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ld.u8 %rs19, [%rd24+1];
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and.b16 %rs21, %rs17, 255;
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cvt.rn.f32.u16 %f305, %rs21;
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div.rn.f32 %f306, %f305, 0f437F0000;
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fma.rn.f32 %f307, %f306, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f308, %rs19;
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div.rn.f32 %f309, %f308, 0f437F0000;
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fma.rn.f32 %f310, %f309, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f311, %rs16;
|
|
div.rn.f32 %f312, %f311, 0f437F0000;
|
|
fma.rn.f32 %f313, %f312, 0f40000000, 0fBF800000;
|
|
mul.f32 %f314, %f310, %f310;
|
|
fma.rn.f32 %f315, %f307, %f307, %f314;
|
|
fma.rn.f32 %f316, %f313, %f313, %f315;
|
|
sqrt.rn.f32 %f317, %f316;
|
|
rcp.rn.f32 %f318, %f317;
|
|
mul.f32 %f1455, %f307, %f318;
|
|
mul.f32 %f1456, %f310, %f318;
|
|
mul.f32 %f1457, %f313, %f318;
|
|
|
|
BB0_5:
|
|
mul.f32 %f322, %f1454, %f1456;
|
|
mul.f32 %f323, %f1453, %f1457;
|
|
sub.f32 %f324, %f323, %f322;
|
|
mul.f32 %f325, %f1452, %f1457;
|
|
mul.f32 %f326, %f1454, %f1455;
|
|
sub.f32 %f327, %f326, %f325;
|
|
mul.f32 %f328, %f1453, %f1455;
|
|
mul.f32 %f329, %f1452, %f1456;
|
|
sub.f32 %f330, %f329, %f328;
|
|
setp.lt.u32 %p15, %r4, 16777216;
|
|
selp.f32 %f331, 0fBF800000, 0f3F800000, %p15;
|
|
mul.f32 %f332, %f324, %f331;
|
|
mul.f32 %f333, %f327, %f331;
|
|
mul.f32 %f334, %f330, %f331;
|
|
mul.f32 %f335, %f332, 0f00000000;
|
|
mul.f32 %f336, %f333, 0f00000000;
|
|
mul.f32 %f337, %f334, 0f00000000;
|
|
fma.rn.f32 %f338, %f1455, 0f3F5105EC, %f335;
|
|
fma.rn.f32 %f339, %f1456, 0f3F5105EC, %f336;
|
|
fma.rn.f32 %f340, %f1457, 0f3F5105EC, %f337;
|
|
mul.f32 %f21, %f1452, 0f3F13CD3A;
|
|
add.f32 %f22, %f21, %f338;
|
|
mul.f32 %f23, %f1453, 0f3F13CD3A;
|
|
add.f32 %f24, %f23, %f339;
|
|
mul.f32 %f25, %f1454, 0f3F13CD3A;
|
|
add.f32 %f26, %f25, %f340;
|
|
ld.global.v2.u32 {%r63, %r64}, [pixelID];
|
|
cvt.u64.u32 %rd34, %r63;
|
|
cvt.u64.u32 %rd35, %r64;
|
|
// inline asm
|
|
call (%rd32), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd34, %rd35, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r6, [%rd32];
|
|
shr.u32 %r7, %r6, 16;
|
|
cvt.u16.u32 %rs24, %r7;
|
|
and.b16 %rs25, %rs24, 255;
|
|
cvt.u16.u32 %rs26, %r6;
|
|
or.b16 %rs27, %rs26, %rs25;
|
|
setp.eq.s16 %p16, %rs27, 0;
|
|
mov.f32 %f1458, %f1464;
|
|
mov.f32 %f1459, %f1464;
|
|
mov.f32 %f1460, %f1464;
|
|
@%p16 bra BB0_7;
|
|
|
|
ld.u8 %rs28, [%rd32+1];
|
|
and.b16 %rs30, %rs26, 255;
|
|
cvt.rn.f32.u16 %f341, %rs30;
|
|
div.rn.f32 %f342, %f341, 0f437F0000;
|
|
fma.rn.f32 %f343, %f342, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f344, %rs28;
|
|
div.rn.f32 %f345, %f344, 0f437F0000;
|
|
fma.rn.f32 %f346, %f345, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f347, %rs25;
|
|
div.rn.f32 %f348, %f347, 0f437F0000;
|
|
fma.rn.f32 %f349, %f348, 0f40000000, 0fBF800000;
|
|
mul.f32 %f350, %f346, %f346;
|
|
fma.rn.f32 %f351, %f343, %f343, %f350;
|
|
fma.rn.f32 %f352, %f349, %f349, %f351;
|
|
sqrt.rn.f32 %f353, %f352;
|
|
rcp.rn.f32 %f354, %f353;
|
|
mul.f32 %f1458, %f343, %f354;
|
|
mul.f32 %f1459, %f346, %f354;
|
|
mul.f32 %f1460, %f349, %f354;
|
|
|
|
BB0_7:
|
|
mul.f32 %f358, %f1454, %f1459;
|
|
mul.f32 %f359, %f1453, %f1460;
|
|
sub.f32 %f360, %f359, %f358;
|
|
mul.f32 %f361, %f1452, %f1460;
|
|
mul.f32 %f362, %f1454, %f1458;
|
|
sub.f32 %f363, %f362, %f361;
|
|
mul.f32 %f364, %f1453, %f1458;
|
|
mul.f32 %f365, %f1452, %f1459;
|
|
sub.f32 %f366, %f365, %f364;
|
|
setp.lt.u32 %p17, %r6, 16777216;
|
|
selp.f32 %f367, 0fBF800000, 0f3F800000, %p17;
|
|
mul.f32 %f368, %f360, %f367;
|
|
mul.f32 %f369, %f363, %f367;
|
|
mul.f32 %f370, %f366, %f367;
|
|
mul.f32 %f371, %f368, 0f3F3504F3;
|
|
mul.f32 %f372, %f369, 0f3F3504F3;
|
|
mul.f32 %f373, %f370, 0f3F3504F3;
|
|
fma.rn.f32 %f374, %f1458, 0fBED105EC, %f371;
|
|
fma.rn.f32 %f375, %f1459, 0fBED105EC, %f372;
|
|
fma.rn.f32 %f376, %f1460, 0fBED105EC, %f373;
|
|
add.f32 %f33, %f21, %f374;
|
|
add.f32 %f34, %f23, %f375;
|
|
add.f32 %f35, %f25, %f376;
|
|
ld.global.v2.u32 {%r69, %r70}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r69;
|
|
cvt.u64.u32 %rd42, %r70;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd41, %rd42, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r8, [%rd39];
|
|
shr.u32 %r9, %r8, 16;
|
|
cvt.u16.u32 %rs33, %r9;
|
|
and.b16 %rs34, %rs33, 255;
|
|
cvt.u16.u32 %rs35, %r8;
|
|
or.b16 %rs36, %rs35, %rs34;
|
|
setp.eq.s16 %p18, %rs36, 0;
|
|
mov.f32 %f1461, %f1464;
|
|
mov.f32 %f1462, %f1464;
|
|
mov.f32 %f1463, %f1464;
|
|
@%p18 bra BB0_9;
|
|
|
|
ld.u8 %rs37, [%rd39+1];
|
|
and.b16 %rs39, %rs35, 255;
|
|
cvt.rn.f32.u16 %f377, %rs39;
|
|
div.rn.f32 %f378, %f377, 0f437F0000;
|
|
fma.rn.f32 %f379, %f378, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f380, %rs37;
|
|
div.rn.f32 %f381, %f380, 0f437F0000;
|
|
fma.rn.f32 %f382, %f381, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f383, %rs34;
|
|
div.rn.f32 %f384, %f383, 0f437F0000;
|
|
fma.rn.f32 %f385, %f384, 0f40000000, 0fBF800000;
|
|
mul.f32 %f386, %f382, %f382;
|
|
fma.rn.f32 %f387, %f379, %f379, %f386;
|
|
fma.rn.f32 %f388, %f385, %f385, %f387;
|
|
sqrt.rn.f32 %f389, %f388;
|
|
rcp.rn.f32 %f390, %f389;
|
|
mul.f32 %f1461, %f379, %f390;
|
|
mul.f32 %f1462, %f382, %f390;
|
|
mul.f32 %f1463, %f385, %f390;
|
|
|
|
BB0_9:
|
|
mul.f32 %f404, %f1454, %f1462;
|
|
mul.f32 %f405, %f1453, %f1463;
|
|
sub.f32 %f406, %f405, %f404;
|
|
mul.f32 %f407, %f1452, %f1463;
|
|
mul.f32 %f408, %f1454, %f1461;
|
|
sub.f32 %f409, %f408, %f407;
|
|
mul.f32 %f410, %f1453, %f1461;
|
|
mul.f32 %f411, %f1452, %f1462;
|
|
sub.f32 %f412, %f411, %f410;
|
|
setp.lt.u32 %p19, %r8, 16777216;
|
|
selp.f32 %f413, 0fBF800000, 0f3F800000, %p19;
|
|
mul.f32 %f414, %f406, %f413;
|
|
mul.f32 %f415, %f409, %f413;
|
|
mul.f32 %f416, %f412, %f413;
|
|
mul.f32 %f417, %f414, 0fBF3504F3;
|
|
mul.f32 %f418, %f415, 0fBF3504F3;
|
|
mul.f32 %f419, %f416, 0fBF3504F3;
|
|
fma.rn.f32 %f420, %f1461, 0fBED105EC, %f417;
|
|
fma.rn.f32 %f421, %f1462, 0fBED105EC, %f418;
|
|
fma.rn.f32 %f422, %f1463, 0fBED105EC, %f419;
|
|
add.f32 %f42, %f21, %f420;
|
|
add.f32 %f43, %f23, %f421;
|
|
add.f32 %f44, %f25, %f422;
|
|
mov.u64 %rd51, localLights;
|
|
cvta.global.u64 %rd50, %rd51;
|
|
mov.u32 %r73, 1;
|
|
mov.u32 %r74, 96;
|
|
// inline asm
|
|
call (%rd46, %rd47, %rd48, %rd49), _rt_buffer_get_size_64, (%rd50, %r73, %r74);
|
|
// inline asm
|
|
cvt.u32.u64 %r10, %rd46;
|
|
setp.eq.s32 %p20, %r10, 0;
|
|
mov.f32 %f1465, %f1464;
|
|
mov.f32 %f1466, %f1464;
|
|
mov.f32 %f1467, %f1464;
|
|
mov.f32 %f1468, %f1464;
|
|
mov.f32 %f1469, %f1464;
|
|
mov.f32 %f1470, %f1464;
|
|
mov.f32 %f1471, %f1464;
|
|
mov.f32 %f1472, %f1464;
|
|
mov.f32 %f1473, %f1464;
|
|
mov.f32 %f1474, %f1464;
|
|
mov.f32 %f1475, %f1464;
|
|
mov.f32 %f1476, %f1464;
|
|
@%p20 bra BB0_50;
|
|
|
|
mov.f32 %f436, 0f40000000;
|
|
cvt.rzi.f32.f32 %f437, %f436;
|
|
add.f32 %f438, %f437, %f437;
|
|
mov.f32 %f439, 0f40800000;
|
|
sub.f32 %f440, %f439, %f438;
|
|
abs.f32 %f45, %f440;
|
|
mul.f32 %f46, %f10, 0f3456BF95;
|
|
mul.f32 %f47, %f11, 0f3456BF95;
|
|
mul.f32 %f48, %f12, 0f3456BF95;
|
|
mul.f32 %f49, %f13, 0f3DD32618;
|
|
mul.f32 %f50, %f14, 0f3DD2F1AA;
|
|
mov.f32 %f435, 0f00000000;
|
|
mov.u32 %r251, 0;
|
|
abs.f32 %f664, %f46;
|
|
abs.f32 %f665, %f47;
|
|
max.f32 %f666, %f664, %f665;
|
|
abs.f32 %f667, %f48;
|
|
max.f32 %f668, %f666, %f667;
|
|
mov.f32 %f1464, %f435;
|
|
mov.f32 %f1465, %f435;
|
|
mov.f32 %f1466, %f435;
|
|
mov.f32 %f1467, %f435;
|
|
mov.f32 %f1468, %f435;
|
|
mov.f32 %f1469, %f435;
|
|
mov.f32 %f1470, %f435;
|
|
mov.f32 %f1471, %f435;
|
|
mov.f32 %f1472, %f435;
|
|
mov.f32 %f1473, %f435;
|
|
mov.f32 %f1474, %f435;
|
|
mov.f32 %f1475, %f435;
|
|
mov.f32 %f1476, %f435;
|
|
|
|
BB0_11:
|
|
cvt.u64.u32 %rd54, %r251;
|
|
// inline asm
|
|
call (%rd52), _rt_buffer_get_64, (%rd50, %r73, %r74, %rd54, %rd16, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.f32 {%f443, %f444, %f445, %f446}, [%rd52+80];
|
|
ld.v4.f32 {%f447, %f448, %f449, %f450}, [%rd52+64];
|
|
ld.v4.f32 {%f451, %f452, %f453, %f454}, [%rd52+48];
|
|
ld.v4.f32 {%f455, %f1481, %f1482, %f458}, [%rd52+32];
|
|
ld.v4.f32 {%f459, %f460, %f461, %f462}, [%rd52+16];
|
|
ld.v4.f32 {%f463, %f464, %f465, %f466}, [%rd52];
|
|
mov.b32 %r12, %f446;
|
|
sub.f32 %f468, %f464, %f7;
|
|
sub.f32 %f469, %f465, %f8;
|
|
sub.f32 %f470, %f466, %f9;
|
|
mul.f32 %f471, %f469, %f469;
|
|
fma.rn.f32 %f472, %f468, %f468, %f471;
|
|
fma.rn.f32 %f473, %f470, %f470, %f472;
|
|
sqrt.rn.f32 %f90, %f473;
|
|
rcp.rn.f32 %f474, %f90;
|
|
mul.f32 %f91, %f468, %f474;
|
|
mul.f32 %f92, %f469, %f474;
|
|
mul.f32 %f93, %f470, %f474;
|
|
mul.f32 %f94, %f90, %f462;
|
|
abs.f32 %f95, %f94;
|
|
setp.lt.f32 %p21, %f95, 0f00800000;
|
|
mul.f32 %f475, %f95, 0f4B800000;
|
|
selp.f32 %f476, 0fC3170000, 0fC2FE0000, %p21;
|
|
selp.f32 %f477, %f475, %f95, %p21;
|
|
mov.b32 %r78, %f477;
|
|
and.b32 %r79, %r78, 8388607;
|
|
or.b32 %r80, %r79, 1065353216;
|
|
mov.b32 %f478, %r80;
|
|
shr.u32 %r81, %r78, 23;
|
|
cvt.rn.f32.u32 %f479, %r81;
|
|
add.f32 %f480, %f476, %f479;
|
|
setp.gt.f32 %p22, %f478, 0f3FB504F3;
|
|
mul.f32 %f481, %f478, 0f3F000000;
|
|
add.f32 %f482, %f480, 0f3F800000;
|
|
selp.f32 %f483, %f481, %f478, %p22;
|
|
selp.f32 %f484, %f482, %f480, %p22;
|
|
add.f32 %f485, %f483, 0fBF800000;
|
|
add.f32 %f442, %f483, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f441,%f442;
|
|
// inline asm
|
|
add.f32 %f486, %f485, %f485;
|
|
mul.f32 %f487, %f441, %f486;
|
|
mul.f32 %f488, %f487, %f487;
|
|
mov.f32 %f489, 0f3C4CAF63;
|
|
mov.f32 %f490, 0f3B18F0FE;
|
|
fma.rn.f32 %f491, %f490, %f488, %f489;
|
|
mov.f32 %f492, 0f3DAAAABD;
|
|
fma.rn.f32 %f493, %f491, %f488, %f492;
|
|
mul.rn.f32 %f494, %f493, %f488;
|
|
mul.rn.f32 %f495, %f494, %f487;
|
|
sub.f32 %f496, %f485, %f487;
|
|
neg.f32 %f497, %f487;
|
|
add.f32 %f498, %f496, %f496;
|
|
fma.rn.f32 %f499, %f497, %f485, %f498;
|
|
mul.rn.f32 %f500, %f441, %f499;
|
|
add.f32 %f501, %f495, %f487;
|
|
sub.f32 %f502, %f487, %f501;
|
|
add.f32 %f503, %f495, %f502;
|
|
add.f32 %f504, %f500, %f503;
|
|
add.f32 %f505, %f501, %f504;
|
|
sub.f32 %f506, %f501, %f505;
|
|
add.f32 %f507, %f504, %f506;
|
|
mov.f32 %f508, 0f3F317200;
|
|
mul.rn.f32 %f509, %f484, %f508;
|
|
mov.f32 %f510, 0f35BFBE8E;
|
|
mul.rn.f32 %f511, %f484, %f510;
|
|
add.f32 %f512, %f509, %f505;
|
|
sub.f32 %f513, %f509, %f512;
|
|
add.f32 %f514, %f505, %f513;
|
|
add.f32 %f515, %f507, %f514;
|
|
add.f32 %f516, %f511, %f515;
|
|
add.f32 %f517, %f512, %f516;
|
|
sub.f32 %f518, %f512, %f517;
|
|
add.f32 %f519, %f516, %f518;
|
|
mul.rn.f32 %f96, %f439, %f517;
|
|
neg.f32 %f521, %f96;
|
|
fma.rn.f32 %f522, %f439, %f517, %f521;
|
|
fma.rn.f32 %f523, %f439, %f519, %f522;
|
|
fma.rn.f32 %f97, %f435, %f517, %f523;
|
|
add.rn.f32 %f98, %f96, %f97;
|
|
mov.b32 %r82, %f98;
|
|
setp.eq.s32 %p1, %r82, 1118925336;
|
|
add.s32 %r83, %r82, -1;
|
|
mov.b32 %f525, %r83;
|
|
selp.f32 %f526, %f525, %f98, %p1;
|
|
mul.f32 %f527, %f526, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f528, %f527;
|
|
mov.f32 %f529, 0fBF317200;
|
|
fma.rn.f32 %f530, %f528, %f529, %f526;
|
|
mov.f32 %f531, 0fB5BFBE8E;
|
|
fma.rn.f32 %f532, %f528, %f531, %f530;
|
|
mul.f32 %f533, %f532, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f534, %f533;
|
|
add.f32 %f535, %f528, 0f00000000;
|
|
ex2.approx.f32 %f536, %f535;
|
|
mul.f32 %f537, %f534, %f536;
|
|
setp.lt.f32 %p23, %f526, 0fC2D20000;
|
|
selp.f32 %f538, 0f00000000, %f537, %p23;
|
|
setp.gt.f32 %p24, %f526, 0f42D20000;
|
|
selp.f32 %f1477, 0f7F800000, %f538, %p24;
|
|
setp.eq.f32 %p25, %f1477, 0f7F800000;
|
|
@%p25 bra BB0_13;
|
|
|
|
neg.f32 %f539, %f98;
|
|
add.rn.f32 %f540, %f96, %f539;
|
|
add.rn.f32 %f541, %f540, %f97;
|
|
add.f32 %f542, %f541, 0f37000000;
|
|
selp.f32 %f543, %f542, %f541, %p1;
|
|
fma.rn.f32 %f1477, %f1477, %f543, %f1477;
|
|
|
|
BB0_13:
|
|
setp.lt.f32 %p26, %f94, 0f00000000;
|
|
setp.eq.f32 %p27, %f45, 0f3F800000;
|
|
and.pred %p2, %p26, %p27;
|
|
mov.b32 %r84, %f1477;
|
|
xor.b32 %r85, %r84, -2147483648;
|
|
mov.b32 %f544, %r85;
|
|
selp.f32 %f1479, %f544, %f1477, %p2;
|
|
setp.eq.f32 %p28, %f94, 0f00000000;
|
|
@%p28 bra BB0_16;
|
|
bra.uni BB0_14;
|
|
|
|
BB0_16:
|
|
add.f32 %f547, %f94, %f94;
|
|
selp.f32 %f1479, %f547, 0f00000000, %p27;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_14:
|
|
setp.geu.f32 %p29, %f94, 0f00000000;
|
|
@%p29 bra BB0_17;
|
|
|
|
cvt.rzi.f32.f32 %f546, %f439;
|
|
setp.neu.f32 %p30, %f546, 0f40800000;
|
|
selp.f32 %f1479, 0f7FFFFFFF, %f1479, %p30;
|
|
|
|
BB0_17:
|
|
add.f32 %f548, %f95, 0f40800000;
|
|
mov.b32 %r86, %f548;
|
|
setp.lt.s32 %p32, %r86, 2139095040;
|
|
@%p32 bra BB0_22;
|
|
|
|
setp.gtu.f32 %p33, %f95, 0f7F800000;
|
|
@%p33 bra BB0_21;
|
|
bra.uni BB0_19;
|
|
|
|
BB0_21:
|
|
add.f32 %f1479, %f94, 0f40800000;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_19:
|
|
setp.neu.f32 %p34, %f95, 0f7F800000;
|
|
@%p34 bra BB0_22;
|
|
|
|
selp.f32 %f1479, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_22:
|
|
mul.f32 %f549, %f90, %f460;
|
|
mov.f32 %f1501, 0f3F800000;
|
|
sub.f32 %f551, %f1501, %f1479;
|
|
setp.eq.f32 %p35, %f94, 0f3F800000;
|
|
selp.f32 %f552, 0f00000000, %f551, %p35;
|
|
cvt.sat.f32.f32 %f553, %f552;
|
|
fma.rn.f32 %f554, %f549, %f549, %f461;
|
|
div.rn.f32 %f124, %f553, %f554;
|
|
mul.f32 %f555, %f1453, %f92;
|
|
fma.rn.f32 %f556, %f1452, %f91, %f555;
|
|
fma.rn.f32 %f557, %f1454, %f93, %f556;
|
|
ld.global.u32 %r87, [ignoreNormal];
|
|
setp.eq.s32 %p36, %r87, 0;
|
|
selp.f32 %f558, %f557, 0f3F800000, %p36;
|
|
cvt.sat.f32.f32 %f125, %f558;
|
|
setp.eq.f32 %p37, %f463, 0f3F800000;
|
|
@%p37 bra BB0_29;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_29:
|
|
setp.leu.f32 %p41, %f458, 0f00000000;
|
|
@%p41 bra BB0_25;
|
|
|
|
mul.f32 %f589, %f443, %f91;
|
|
mul.f32 %f590, %f444, %f92;
|
|
neg.f32 %f591, %f590;
|
|
sub.f32 %f592, %f591, %f589;
|
|
mul.f32 %f593, %f445, %f93;
|
|
sub.f32 %f594, %f592, %f593;
|
|
setp.gt.f32 %p42, %f594, 0f00000000;
|
|
selp.f32 %f595, 0f3F800000, 0f00000000, %p42;
|
|
mul.f32 %f596, %f452, %f92;
|
|
fma.rn.f32 %f597, %f451, %f91, %f596;
|
|
mul.f32 %f598, %f448, %f92;
|
|
fma.rn.f32 %f599, %f447, %f91, %f598;
|
|
fma.rn.f32 %f600, %f453, %f93, %f597;
|
|
fma.rn.f32 %f601, %f449, %f93, %f599;
|
|
fma.rn.f32 %f602, %f454, %f600, 0f3F000000;
|
|
mov.f32 %f603, 0f3F800000;
|
|
sub.f32 %f585, %f603, %f602;
|
|
fma.rn.f32 %f586, %f454, %f601, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r91, %f458;
|
|
mov.f32 %f588, 0f00000000;
|
|
// inline asm
|
|
call (%f581, %f582, %f583, %f584), _rt_texture_get_f_id, (%r91, %r34, %f585, %f586, %f588, %f588);
|
|
// inline asm
|
|
mul.f32 %f604, %f595, %f581;
|
|
mul.f32 %f605, %f595, %f582;
|
|
mul.f32 %f606, %f595, %f583;
|
|
mul.f32 %f1480, %f455, %f604;
|
|
mul.f32 %f1481, %f1481, %f605;
|
|
mul.f32 %f1482, %f1482, %f606;
|
|
bra.uni BB0_31;
|
|
|
|
BB0_23:
|
|
setp.eq.f32 %p38, %f463, 0f40000000;
|
|
@%p38 bra BB0_27;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_27:
|
|
setp.leu.f32 %p40, %f458, 0f00000000;
|
|
@%p40 bra BB0_25;
|
|
|
|
mul.f32 %f575, %f452, %f92;
|
|
fma.rn.f32 %f576, %f451, %f91, %f575;
|
|
mul.f32 %f577, %f448, %f92;
|
|
fma.rn.f32 %f578, %f447, %f91, %f577;
|
|
mul.f32 %f579, %f444, %f92;
|
|
fma.rn.f32 %f580, %f443, %f91, %f579;
|
|
fma.rn.f32 %f572, %f453, %f93, %f576;
|
|
fma.rn.f32 %f573, %f449, %f93, %f578;
|
|
fma.rn.f32 %f574, %f445, %f93, %f580;
|
|
cvt.rzi.s32.f32 %r88, %f458;
|
|
mov.u32 %r89, 6;
|
|
mov.u32 %r90, 0;
|
|
// inline asm
|
|
call (%f568, %f569, %f570, %f571), _rt_texture_get_base_id, (%r88, %r89, %f572, %f573, %f574, %r90);
|
|
// inline asm
|
|
mul.f32 %f1480, %f455, %f568;
|
|
mul.f32 %f1481, %f1481, %f569;
|
|
mul.f32 %f1482, %f1482, %f570;
|
|
bra.uni BB0_31;
|
|
|
|
BB0_24:
|
|
setp.neu.f32 %p39, %f463, 0f40800000;
|
|
@%p39 bra BB0_25;
|
|
|
|
mul.f32 %f559, %f443, %f91;
|
|
mul.f32 %f560, %f444, %f92;
|
|
neg.f32 %f561, %f560;
|
|
sub.f32 %f562, %f561, %f559;
|
|
mul.f32 %f563, %f445, %f93;
|
|
sub.f32 %f564, %f562, %f563;
|
|
fma.rn.f32 %f565, %f458, %f564, %f454;
|
|
cvt.sat.f32.f32 %f566, %f565;
|
|
mul.f32 %f567, %f566, %f566;
|
|
mul.f32 %f1483, %f124, %f567;
|
|
mov.f32 %f1480, %f455;
|
|
bra.uni BB0_32;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1480, %f455;
|
|
|
|
BB0_31:
|
|
mov.f32 %f1483, %f124;
|
|
|
|
BB0_32:
|
|
max.f32 %f619, %f1480, %f1481;
|
|
max.f32 %f620, %f619, %f1482;
|
|
mul.f32 %f137, %f125, %f1483;
|
|
mul.f32 %f621, %f137, %f620;
|
|
setp.lt.f32 %p44, %f621, 0f3727C5AC;
|
|
mov.pred %p143, -1;
|
|
mov.f32 %f150, 0f00000000;
|
|
mov.f32 %f1485, %f150;
|
|
mov.f32 %f1486, %f150;
|
|
mov.f32 %f1487, %f150;
|
|
mov.f32 %f1488, %f150;
|
|
mov.f32 %f1489, %f150;
|
|
mov.f32 %f1490, %f150;
|
|
mov.f32 %f1491, %f150;
|
|
mov.f32 %f1492, %f150;
|
|
mov.f32 %f1493, %f150;
|
|
mov.f32 %f1494, %f150;
|
|
mov.f32 %f1495, %f150;
|
|
@%p44 bra BB0_34;
|
|
|
|
mul.f32 %f150, %f1480, %f137;
|
|
mul.f32 %f622, %f24, %f92;
|
|
fma.rn.f32 %f623, %f22, %f91, %f622;
|
|
fma.rn.f32 %f624, %f26, %f93, %f623;
|
|
cvt.sat.f32.f32 %f625, %f624;
|
|
mul.f32 %f626, %f1480, %f1483;
|
|
mul.f32 %f627, %f626, %f625;
|
|
mul.f32 %f628, %f1481, %f1483;
|
|
mul.f32 %f629, %f628, %f625;
|
|
mul.f32 %f630, %f1482, %f1483;
|
|
mul.f32 %f631, %f630, %f625;
|
|
mul.f32 %f632, %f34, %f92;
|
|
fma.rn.f32 %f633, %f33, %f91, %f632;
|
|
fma.rn.f32 %f634, %f35, %f93, %f633;
|
|
cvt.sat.f32.f32 %f635, %f634;
|
|
mul.f32 %f636, %f626, %f635;
|
|
mul.f32 %f637, %f628, %f635;
|
|
mul.f32 %f638, %f630, %f635;
|
|
mul.f32 %f639, %f43, %f92;
|
|
fma.rn.f32 %f640, %f42, %f91, %f639;
|
|
fma.rn.f32 %f641, %f44, %f93, %f640;
|
|
cvt.sat.f32.f32 %f642, %f641;
|
|
mul.f32 %f643, %f626, %f642;
|
|
mul.f32 %f644, %f628, %f642;
|
|
mul.f32 %f645, %f630, %f642;
|
|
add.f32 %f646, %f627, %f636;
|
|
add.f32 %f647, %f629, %f637;
|
|
add.f32 %f648, %f631, %f638;
|
|
add.f32 %f649, %f646, %f643;
|
|
add.f32 %f650, %f647, %f644;
|
|
add.f32 %f651, %f648, %f645;
|
|
mul.f32 %f652, %f649, 0f3F13CD3A;
|
|
mul.f32 %f653, %f650, 0f3F13CD3A;
|
|
mul.f32 %f654, %f651, 0f3F13CD3A;
|
|
div.rn.f32 %f655, %f150, %f652;
|
|
mul.f32 %f1485, %f1481, %f137;
|
|
div.rn.f32 %f656, %f1485, %f653;
|
|
mul.f32 %f1486, %f1482, %f137;
|
|
div.rn.f32 %f657, %f1486, %f654;
|
|
setp.eq.f32 %p46, %f150, 0f00000000;
|
|
selp.f32 %f658, 0f00000000, %f655, %p46;
|
|
setp.eq.f32 %p47, %f1485, 0f00000000;
|
|
selp.f32 %f659, 0f00000000, %f656, %p47;
|
|
setp.eq.f32 %p48, %f1486, 0f00000000;
|
|
selp.f32 %f660, 0f00000000, %f657, %p48;
|
|
mul.f32 %f1487, %f627, %f658;
|
|
mul.f32 %f1488, %f629, %f659;
|
|
mul.f32 %f1489, %f631, %f660;
|
|
mul.f32 %f1490, %f636, %f658;
|
|
mul.f32 %f1491, %f637, %f659;
|
|
mul.f32 %f1492, %f638, %f660;
|
|
mul.f32 %f1493, %f643, %f658;
|
|
mul.f32 %f1494, %f644, %f659;
|
|
mul.f32 %f1495, %f645, %f660;
|
|
mov.pred %p143, 0;
|
|
|
|
BB0_34:
|
|
@%p143 bra BB0_49;
|
|
|
|
setp.eq.s32 %p49, %r12, 0;
|
|
mov.u16 %rs160, 0;
|
|
@%p49 bra BB0_46;
|
|
|
|
abs.s32 %r14, %r12;
|
|
mov.f32 %f1500, 0f00000000;
|
|
setp.lt.s32 %p50, %r14, 1;
|
|
@%p50 bra BB0_45;
|
|
|
|
max.f32 %f163, %f668, %f301;
|
|
and.b32 %r15, %r14, 3;
|
|
setp.eq.s32 %p51, %r15, 0;
|
|
add.u64 %rd59, %SP, 0;
|
|
cvta.to.local.u64 %rd5, %rd59;
|
|
mov.f32 %f1500, 0f00000000;
|
|
mov.u32 %r255, 0;
|
|
@%p51 bra BB0_43;
|
|
|
|
setp.eq.s32 %p52, %r15, 1;
|
|
mov.f32 %f1497, 0f00000000;
|
|
mov.u32 %r253, 0;
|
|
@%p52 bra BB0_42;
|
|
|
|
setp.eq.s32 %p53, %r15, 2;
|
|
mov.f32 %f1496, 0f00000000;
|
|
mov.u32 %r252, 0;
|
|
@%p53 bra BB0_41;
|
|
|
|
cvt.rmi.f32.f32 %f680, %f49;
|
|
sub.f32 %f681, %f49, %f680;
|
|
cvt.rmi.f32.f32 %f682, %f50;
|
|
sub.f32 %f683, %f50, %f682;
|
|
add.f32 %f684, %f683, 0f420551EC;
|
|
add.f32 %f685, %f681, 0f420551EC;
|
|
mul.f32 %f686, %f681, %f684;
|
|
fma.rn.f32 %f687, %f683, %f685, %f686;
|
|
add.f32 %f688, %f687, 0f00000000;
|
|
add.f32 %f689, %f681, %f688;
|
|
add.f32 %f690, %f683, %f688;
|
|
add.f32 %f691, %f689, %f690;
|
|
mul.f32 %f692, %f688, %f691;
|
|
cvt.rmi.f32.f32 %f693, %f692;
|
|
sub.f32 %f694, %f692, %f693;
|
|
add.f32 %f695, %f689, %f689;
|
|
mul.f32 %f696, %f690, %f695;
|
|
cvt.rmi.f32.f32 %f697, %f696;
|
|
sub.f32 %f698, %f696, %f697;
|
|
mul.f32 %f699, %f689, %f691;
|
|
cvt.rmi.f32.f32 %f700, %f699;
|
|
sub.f32 %f701, %f699, %f700;
|
|
fma.rn.f32 %f702, %f694, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f703, %f698, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f704, %f701, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f705, %f459, %f702, %f464;
|
|
fma.rn.f32 %f706, %f459, %f703, %f465;
|
|
fma.rn.f32 %f707, %f459, %f704, %f466;
|
|
sub.f32 %f708, %f705, %f7;
|
|
sub.f32 %f709, %f706, %f8;
|
|
sub.f32 %f710, %f707, %f9;
|
|
mul.f32 %f711, %f709, %f709;
|
|
fma.rn.f32 %f712, %f708, %f708, %f711;
|
|
fma.rn.f32 %f713, %f710, %f710, %f712;
|
|
sqrt.rn.f32 %f679, %f713;
|
|
rcp.rn.f32 %f714, %f679;
|
|
mul.f32 %f675, %f714, %f708;
|
|
mul.f32 %f676, %f714, %f709;
|
|
mul.f32 %f677, %f714, %f710;
|
|
ld.global.u32 %r100, [imageEnabled];
|
|
and.b32 %r101, %r100, 32;
|
|
setp.eq.s32 %p54, %r101, 0;
|
|
selp.f32 %f715, 0f3F800000, 0f41200000, %p54;
|
|
mul.f32 %f678, %f715, %f163;
|
|
mov.u32 %r102, 1065353216;
|
|
st.local.u32 [%rd5], %r102;
|
|
ld.global.u32 %r96, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r96, %f10, %f11, %f12, %f675, %f676, %f677, %r73, %f678, %f679, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f716, [%rd5];
|
|
add.f32 %f1496, %f716, 0f00000000;
|
|
mov.u32 %r252, %r73;
|
|
|
|
BB0_41:
|
|
cvt.rn.f32.s32 %f725, %r252;
|
|
add.f32 %f726, %f13, %f725;
|
|
sub.f32 %f727, %f14, %f725;
|
|
mul.f32 %f728, %f726, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f729, %f728;
|
|
sub.f32 %f730, %f728, %f729;
|
|
mul.f32 %f731, %f727, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f732, %f731;
|
|
sub.f32 %f733, %f731, %f732;
|
|
mul.f32 %f734, %f725, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f735, %f734;
|
|
sub.f32 %f736, %f734, %f735;
|
|
add.f32 %f737, %f733, 0f420551EC;
|
|
add.f32 %f738, %f730, 0f420551EC;
|
|
add.f32 %f739, %f736, 0f420551EC;
|
|
mul.f32 %f740, %f730, %f737;
|
|
fma.rn.f32 %f741, %f733, %f738, %f740;
|
|
fma.rn.f32 %f742, %f736, %f739, %f741;
|
|
add.f32 %f743, %f730, %f742;
|
|
add.f32 %f744, %f733, %f742;
|
|
add.f32 %f745, %f736, %f742;
|
|
add.f32 %f746, %f743, %f744;
|
|
mul.f32 %f747, %f745, %f746;
|
|
cvt.rmi.f32.f32 %f748, %f747;
|
|
sub.f32 %f749, %f747, %f748;
|
|
add.f32 %f750, %f743, %f743;
|
|
mul.f32 %f751, %f744, %f750;
|
|
cvt.rmi.f32.f32 %f752, %f751;
|
|
sub.f32 %f753, %f751, %f752;
|
|
mul.f32 %f754, %f743, %f746;
|
|
cvt.rmi.f32.f32 %f755, %f754;
|
|
sub.f32 %f756, %f754, %f755;
|
|
fma.rn.f32 %f757, %f749, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f758, %f753, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f759, %f756, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f760, %f459, %f757, %f464;
|
|
fma.rn.f32 %f761, %f459, %f758, %f465;
|
|
fma.rn.f32 %f762, %f459, %f759, %f466;
|
|
sub.f32 %f763, %f760, %f7;
|
|
sub.f32 %f764, %f761, %f8;
|
|
sub.f32 %f765, %f762, %f9;
|
|
mul.f32 %f766, %f764, %f764;
|
|
fma.rn.f32 %f767, %f763, %f763, %f766;
|
|
fma.rn.f32 %f768, %f765, %f765, %f767;
|
|
sqrt.rn.f32 %f724, %f768;
|
|
rcp.rn.f32 %f769, %f724;
|
|
mul.f32 %f720, %f769, %f763;
|
|
mul.f32 %f721, %f769, %f764;
|
|
mul.f32 %f722, %f769, %f765;
|
|
ld.global.u32 %r106, [imageEnabled];
|
|
and.b32 %r107, %r106, 32;
|
|
setp.eq.s32 %p55, %r107, 0;
|
|
selp.f32 %f770, 0f3F800000, 0f41200000, %p55;
|
|
mul.f32 %f723, %f770, %f163;
|
|
mov.u32 %r108, 1065353216;
|
|
st.local.u32 [%rd5], %r108;
|
|
ld.global.u32 %r103, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r103, %f10, %f11, %f12, %f720, %f721, %f722, %r73, %f723, %f724, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f771, [%rd5];
|
|
add.f32 %f1497, %f1496, %f771;
|
|
add.s32 %r253, %r252, 1;
|
|
|
|
BB0_42:
|
|
cvt.rn.f32.s32 %f780, %r253;
|
|
add.f32 %f781, %f13, %f780;
|
|
sub.f32 %f782, %f14, %f780;
|
|
mul.f32 %f783, %f781, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f784, %f783;
|
|
sub.f32 %f785, %f783, %f784;
|
|
mul.f32 %f786, %f782, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f787, %f786;
|
|
sub.f32 %f788, %f786, %f787;
|
|
mul.f32 %f789, %f780, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f790, %f789;
|
|
sub.f32 %f791, %f789, %f790;
|
|
add.f32 %f792, %f788, 0f420551EC;
|
|
add.f32 %f793, %f785, 0f420551EC;
|
|
add.f32 %f794, %f791, 0f420551EC;
|
|
mul.f32 %f795, %f785, %f792;
|
|
fma.rn.f32 %f796, %f788, %f793, %f795;
|
|
fma.rn.f32 %f797, %f791, %f794, %f796;
|
|
add.f32 %f798, %f785, %f797;
|
|
add.f32 %f799, %f788, %f797;
|
|
add.f32 %f800, %f791, %f797;
|
|
add.f32 %f801, %f798, %f799;
|
|
mul.f32 %f802, %f800, %f801;
|
|
cvt.rmi.f32.f32 %f803, %f802;
|
|
sub.f32 %f804, %f802, %f803;
|
|
add.f32 %f805, %f798, %f798;
|
|
mul.f32 %f806, %f799, %f805;
|
|
cvt.rmi.f32.f32 %f807, %f806;
|
|
sub.f32 %f808, %f806, %f807;
|
|
mul.f32 %f809, %f798, %f801;
|
|
cvt.rmi.f32.f32 %f810, %f809;
|
|
sub.f32 %f811, %f809, %f810;
|
|
fma.rn.f32 %f812, %f804, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f813, %f808, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f814, %f811, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f815, %f459, %f812, %f464;
|
|
fma.rn.f32 %f816, %f459, %f813, %f465;
|
|
fma.rn.f32 %f817, %f459, %f814, %f466;
|
|
sub.f32 %f818, %f815, %f7;
|
|
sub.f32 %f819, %f816, %f8;
|
|
sub.f32 %f820, %f817, %f9;
|
|
mul.f32 %f821, %f819, %f819;
|
|
fma.rn.f32 %f822, %f818, %f818, %f821;
|
|
fma.rn.f32 %f823, %f820, %f820, %f822;
|
|
sqrt.rn.f32 %f779, %f823;
|
|
rcp.rn.f32 %f824, %f779;
|
|
mul.f32 %f775, %f824, %f818;
|
|
mul.f32 %f776, %f824, %f819;
|
|
mul.f32 %f777, %f824, %f820;
|
|
ld.global.u32 %r112, [imageEnabled];
|
|
and.b32 %r113, %r112, 32;
|
|
setp.eq.s32 %p56, %r113, 0;
|
|
selp.f32 %f825, 0f3F800000, 0f41200000, %p56;
|
|
mul.f32 %f778, %f825, %f163;
|
|
mov.u32 %r114, 1065353216;
|
|
st.local.u32 [%rd5], %r114;
|
|
ld.global.u32 %r109, [root];
|
|
mov.u32 %r110, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r109, %f10, %f11, %f12, %f775, %f776, %f777, %r110, %f778, %f779, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f826, [%rd5];
|
|
add.f32 %f1500, %f1497, %f826;
|
|
add.s32 %r255, %r253, 1;
|
|
|
|
BB0_43:
|
|
setp.lt.u32 %p57, %r14, 4;
|
|
@%p57 bra BB0_45;
|
|
|
|
BB0_44:
|
|
cvt.rn.f32.s32 %f859, %r255;
|
|
add.f32 %f860, %f13, %f859;
|
|
sub.f32 %f861, %f14, %f859;
|
|
mul.f32 %f862, %f860, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f863, %f862;
|
|
sub.f32 %f864, %f862, %f863;
|
|
mul.f32 %f865, %f861, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f866, %f865;
|
|
sub.f32 %f867, %f865, %f866;
|
|
mul.f32 %f868, %f859, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f869, %f868;
|
|
sub.f32 %f870, %f868, %f869;
|
|
add.f32 %f871, %f867, 0f420551EC;
|
|
add.f32 %f872, %f864, 0f420551EC;
|
|
add.f32 %f873, %f870, 0f420551EC;
|
|
mul.f32 %f874, %f864, %f871;
|
|
fma.rn.f32 %f875, %f867, %f872, %f874;
|
|
fma.rn.f32 %f876, %f870, %f873, %f875;
|
|
add.f32 %f877, %f864, %f876;
|
|
add.f32 %f878, %f867, %f876;
|
|
add.f32 %f879, %f870, %f876;
|
|
add.f32 %f880, %f877, %f878;
|
|
mul.f32 %f881, %f879, %f880;
|
|
cvt.rmi.f32.f32 %f882, %f881;
|
|
sub.f32 %f883, %f881, %f882;
|
|
add.f32 %f884, %f877, %f877;
|
|
mul.f32 %f885, %f878, %f884;
|
|
cvt.rmi.f32.f32 %f886, %f885;
|
|
sub.f32 %f887, %f885, %f886;
|
|
mul.f32 %f888, %f877, %f880;
|
|
cvt.rmi.f32.f32 %f889, %f888;
|
|
sub.f32 %f890, %f888, %f889;
|
|
fma.rn.f32 %f891, %f883, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f892, %f887, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f893, %f890, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f894, %f459, %f891, %f464;
|
|
fma.rn.f32 %f895, %f459, %f892, %f465;
|
|
fma.rn.f32 %f896, %f459, %f893, %f466;
|
|
sub.f32 %f897, %f894, %f7;
|
|
sub.f32 %f898, %f895, %f8;
|
|
sub.f32 %f899, %f896, %f9;
|
|
mul.f32 %f900, %f898, %f898;
|
|
fma.rn.f32 %f901, %f897, %f897, %f900;
|
|
fma.rn.f32 %f902, %f899, %f899, %f901;
|
|
sqrt.rn.f32 %f834, %f902;
|
|
rcp.rn.f32 %f903, %f834;
|
|
mul.f32 %f830, %f903, %f897;
|
|
mul.f32 %f831, %f903, %f898;
|
|
mul.f32 %f832, %f903, %f899;
|
|
ld.global.u32 %r127, [imageEnabled];
|
|
and.b32 %r128, %r127, 32;
|
|
setp.eq.s32 %p58, %r128, 0;
|
|
selp.f32 %f904, 0f3F800000, 0f41200000, %p58;
|
|
mul.f32 %f833, %f904, %f163;
|
|
mov.u32 %r129, 1065353216;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r115, [root];
|
|
mov.u32 %r125, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r115, %f10, %f11, %f12, %f830, %f831, %f832, %r125, %f833, %f834, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f905, [%rd5];
|
|
add.f32 %f906, %f1500, %f905;
|
|
add.s32 %r130, %r255, 1;
|
|
cvt.rn.f32.s32 %f907, %r130;
|
|
add.f32 %f908, %f13, %f907;
|
|
sub.f32 %f909, %f14, %f907;
|
|
mul.f32 %f910, %f908, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f911, %f910;
|
|
sub.f32 %f912, %f910, %f911;
|
|
mul.f32 %f913, %f909, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f914, %f913;
|
|
sub.f32 %f915, %f913, %f914;
|
|
mul.f32 %f916, %f907, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f917, %f916;
|
|
sub.f32 %f918, %f916, %f917;
|
|
add.f32 %f919, %f915, 0f420551EC;
|
|
add.f32 %f920, %f912, 0f420551EC;
|
|
add.f32 %f921, %f918, 0f420551EC;
|
|
mul.f32 %f922, %f912, %f919;
|
|
fma.rn.f32 %f923, %f915, %f920, %f922;
|
|
fma.rn.f32 %f924, %f918, %f921, %f923;
|
|
add.f32 %f925, %f912, %f924;
|
|
add.f32 %f926, %f915, %f924;
|
|
add.f32 %f927, %f918, %f924;
|
|
add.f32 %f928, %f925, %f926;
|
|
mul.f32 %f929, %f927, %f928;
|
|
cvt.rmi.f32.f32 %f930, %f929;
|
|
sub.f32 %f931, %f929, %f930;
|
|
add.f32 %f932, %f925, %f925;
|
|
mul.f32 %f933, %f926, %f932;
|
|
cvt.rmi.f32.f32 %f934, %f933;
|
|
sub.f32 %f935, %f933, %f934;
|
|
mul.f32 %f936, %f925, %f928;
|
|
cvt.rmi.f32.f32 %f937, %f936;
|
|
sub.f32 %f938, %f936, %f937;
|
|
fma.rn.f32 %f939, %f931, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f940, %f935, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f941, %f938, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f942, %f459, %f939, %f464;
|
|
fma.rn.f32 %f943, %f459, %f940, %f465;
|
|
fma.rn.f32 %f944, %f459, %f941, %f466;
|
|
sub.f32 %f945, %f942, %f7;
|
|
sub.f32 %f946, %f943, %f8;
|
|
sub.f32 %f947, %f944, %f9;
|
|
mul.f32 %f948, %f946, %f946;
|
|
fma.rn.f32 %f949, %f945, %f945, %f948;
|
|
fma.rn.f32 %f950, %f947, %f947, %f949;
|
|
sqrt.rn.f32 %f842, %f950;
|
|
rcp.rn.f32 %f951, %f842;
|
|
mul.f32 %f838, %f951, %f945;
|
|
mul.f32 %f839, %f951, %f946;
|
|
mul.f32 %f840, %f951, %f947;
|
|
ld.global.u32 %r131, [imageEnabled];
|
|
and.b32 %r132, %r131, 32;
|
|
setp.eq.s32 %p59, %r132, 0;
|
|
selp.f32 %f952, 0f3F800000, 0f41200000, %p59;
|
|
mul.f32 %f841, %f952, %f163;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r118, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r118, %f10, %f11, %f12, %f838, %f839, %f840, %r125, %f841, %f842, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f953, [%rd5];
|
|
add.f32 %f954, %f906, %f953;
|
|
add.s32 %r133, %r255, 2;
|
|
cvt.rn.f32.s32 %f955, %r133;
|
|
add.f32 %f956, %f13, %f955;
|
|
sub.f32 %f957, %f14, %f955;
|
|
mul.f32 %f958, %f956, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f959, %f958;
|
|
sub.f32 %f960, %f958, %f959;
|
|
mul.f32 %f961, %f957, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f962, %f961;
|
|
sub.f32 %f963, %f961, %f962;
|
|
mul.f32 %f964, %f955, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f965, %f964;
|
|
sub.f32 %f966, %f964, %f965;
|
|
add.f32 %f967, %f963, 0f420551EC;
|
|
add.f32 %f968, %f960, 0f420551EC;
|
|
add.f32 %f969, %f966, 0f420551EC;
|
|
mul.f32 %f970, %f960, %f967;
|
|
fma.rn.f32 %f971, %f963, %f968, %f970;
|
|
fma.rn.f32 %f972, %f966, %f969, %f971;
|
|
add.f32 %f973, %f960, %f972;
|
|
add.f32 %f974, %f963, %f972;
|
|
add.f32 %f975, %f966, %f972;
|
|
add.f32 %f976, %f973, %f974;
|
|
mul.f32 %f977, %f975, %f976;
|
|
cvt.rmi.f32.f32 %f978, %f977;
|
|
sub.f32 %f979, %f977, %f978;
|
|
add.f32 %f980, %f973, %f973;
|
|
mul.f32 %f981, %f974, %f980;
|
|
cvt.rmi.f32.f32 %f982, %f981;
|
|
sub.f32 %f983, %f981, %f982;
|
|
mul.f32 %f984, %f973, %f976;
|
|
cvt.rmi.f32.f32 %f985, %f984;
|
|
sub.f32 %f986, %f984, %f985;
|
|
fma.rn.f32 %f987, %f979, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f988, %f983, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f989, %f986, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f990, %f459, %f987, %f464;
|
|
fma.rn.f32 %f991, %f459, %f988, %f465;
|
|
fma.rn.f32 %f992, %f459, %f989, %f466;
|
|
sub.f32 %f993, %f990, %f7;
|
|
sub.f32 %f994, %f991, %f8;
|
|
sub.f32 %f995, %f992, %f9;
|
|
mul.f32 %f996, %f994, %f994;
|
|
fma.rn.f32 %f997, %f993, %f993, %f996;
|
|
fma.rn.f32 %f998, %f995, %f995, %f997;
|
|
sqrt.rn.f32 %f850, %f998;
|
|
rcp.rn.f32 %f999, %f850;
|
|
mul.f32 %f846, %f999, %f993;
|
|
mul.f32 %f847, %f999, %f994;
|
|
mul.f32 %f848, %f999, %f995;
|
|
ld.global.u32 %r134, [imageEnabled];
|
|
and.b32 %r135, %r134, 32;
|
|
setp.eq.s32 %p60, %r135, 0;
|
|
selp.f32 %f1000, 0f3F800000, 0f41200000, %p60;
|
|
mul.f32 %f849, %f1000, %f163;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r121, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r121, %f10, %f11, %f12, %f846, %f847, %f848, %r125, %f849, %f850, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f1001, [%rd5];
|
|
add.f32 %f1002, %f954, %f1001;
|
|
add.s32 %r136, %r255, 3;
|
|
cvt.rn.f32.s32 %f1003, %r136;
|
|
add.f32 %f1004, %f13, %f1003;
|
|
sub.f32 %f1005, %f14, %f1003;
|
|
mul.f32 %f1006, %f1004, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f1007, %f1006;
|
|
sub.f32 %f1008, %f1006, %f1007;
|
|
mul.f32 %f1009, %f1005, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f1010, %f1009;
|
|
sub.f32 %f1011, %f1009, %f1010;
|
|
mul.f32 %f1012, %f1003, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f1013, %f1012;
|
|
sub.f32 %f1014, %f1012, %f1013;
|
|
add.f32 %f1015, %f1011, 0f420551EC;
|
|
add.f32 %f1016, %f1008, 0f420551EC;
|
|
add.f32 %f1017, %f1014, 0f420551EC;
|
|
mul.f32 %f1018, %f1008, %f1015;
|
|
fma.rn.f32 %f1019, %f1011, %f1016, %f1018;
|
|
fma.rn.f32 %f1020, %f1014, %f1017, %f1019;
|
|
add.f32 %f1021, %f1008, %f1020;
|
|
add.f32 %f1022, %f1011, %f1020;
|
|
add.f32 %f1023, %f1014, %f1020;
|
|
add.f32 %f1024, %f1021, %f1022;
|
|
mul.f32 %f1025, %f1023, %f1024;
|
|
cvt.rmi.f32.f32 %f1026, %f1025;
|
|
sub.f32 %f1027, %f1025, %f1026;
|
|
add.f32 %f1028, %f1021, %f1021;
|
|
mul.f32 %f1029, %f1022, %f1028;
|
|
cvt.rmi.f32.f32 %f1030, %f1029;
|
|
sub.f32 %f1031, %f1029, %f1030;
|
|
mul.f32 %f1032, %f1021, %f1024;
|
|
cvt.rmi.f32.f32 %f1033, %f1032;
|
|
sub.f32 %f1034, %f1032, %f1033;
|
|
fma.rn.f32 %f1035, %f1027, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1036, %f1031, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1037, %f1034, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1038, %f459, %f1035, %f464;
|
|
fma.rn.f32 %f1039, %f459, %f1036, %f465;
|
|
fma.rn.f32 %f1040, %f459, %f1037, %f466;
|
|
sub.f32 %f1041, %f1038, %f7;
|
|
sub.f32 %f1042, %f1039, %f8;
|
|
sub.f32 %f1043, %f1040, %f9;
|
|
mul.f32 %f1044, %f1042, %f1042;
|
|
fma.rn.f32 %f1045, %f1041, %f1041, %f1044;
|
|
fma.rn.f32 %f1046, %f1043, %f1043, %f1045;
|
|
sqrt.rn.f32 %f858, %f1046;
|
|
rcp.rn.f32 %f1047, %f858;
|
|
mul.f32 %f854, %f1047, %f1041;
|
|
mul.f32 %f855, %f1047, %f1042;
|
|
mul.f32 %f856, %f1047, %f1043;
|
|
ld.global.u32 %r137, [imageEnabled];
|
|
and.b32 %r138, %r137, 32;
|
|
setp.eq.s32 %p61, %r138, 0;
|
|
selp.f32 %f1048, 0f3F800000, 0f41200000, %p61;
|
|
mul.f32 %f857, %f1048, %f163;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r124, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r124, %f10, %f11, %f12, %f854, %f855, %f856, %r125, %f857, %f858, %rd59, %r35);
|
|
// inline asm
|
|
ld.local.f32 %f1049, [%rd5];
|
|
add.f32 %f1500, %f1002, %f1049;
|
|
add.s32 %r255, %r255, 4;
|
|
setp.lt.s32 %p62, %r255, %r14;
|
|
@%p62 bra BB0_44;
|
|
|
|
BB0_45:
|
|
cvt.rn.f32.s32 %f1050, %r14;
|
|
div.rn.f32 %f1501, %f1500, %f1050;
|
|
shr.u32 %r139, %r12, 31;
|
|
cvt.u16.u32 %rs160, %r139;
|
|
|
|
BB0_46:
|
|
fma.rn.f32 %f1476, %f150, %f1501, %f1476;
|
|
fma.rn.f32 %f1475, %f1485, %f1501, %f1475;
|
|
fma.rn.f32 %f1474, %f1486, %f1501, %f1474;
|
|
fma.rn.f32 %f1473, %f1487, %f1501, %f1473;
|
|
fma.rn.f32 %f1472, %f1488, %f1501, %f1472;
|
|
fma.rn.f32 %f1471, %f1489, %f1501, %f1471;
|
|
fma.rn.f32 %f1470, %f1490, %f1501, %f1470;
|
|
fma.rn.f32 %f1469, %f1491, %f1501, %f1469;
|
|
fma.rn.f32 %f1468, %f1492, %f1501, %f1468;
|
|
fma.rn.f32 %f1467, %f1493, %f1501, %f1467;
|
|
fma.rn.f32 %f1466, %f1494, %f1501, %f1466;
|
|
fma.rn.f32 %f1465, %f1495, %f1501, %f1465;
|
|
setp.eq.s16 %p63, %rs160, 0;
|
|
@%p63 bra BB0_48;
|
|
|
|
div.rn.f32 %f1051, %f150, %f455;
|
|
div.rn.f32 %f1052, %f1051, %f124;
|
|
cvt.sat.f32.f32 %f1053, %f1052;
|
|
mul.f32 %f1501, %f1501, %f1053;
|
|
|
|
BB0_48:
|
|
add.f32 %f1464, %f1464, %f1501;
|
|
|
|
BB0_49:
|
|
add.s32 %r251, %r251, 1;
|
|
setp.lt.u32 %p64, %r251, %r10;
|
|
@%p64 bra BB0_11;
|
|
|
|
BB0_50:
|
|
ld.global.u32 %r257, [imageEnabled];
|
|
and.b32 %r140, %r257, 8;
|
|
setp.eq.s32 %p65, %r140, 0;
|
|
@%p65 bra BB0_63;
|
|
|
|
cvt.sat.f32.f32 %f216, %f1464;
|
|
cvt.u64.u32 %rd70, %r3;
|
|
cvt.u64.u32 %rd69, %r2;
|
|
mov.u64 %rd73, image_Mask;
|
|
cvta.global.u64 %rd68, %rd73;
|
|
// inline asm
|
|
call (%rd67), _rt_buffer_get_64, (%rd68, %r34, %r34, %rd69, %rd70, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1056, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1057, %f1056;
|
|
fma.rn.f32 %f1058, %f1057, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f217, %f1058;
|
|
abs.f32 %f218, %f216;
|
|
setp.lt.f32 %p66, %f218, 0f00800000;
|
|
mul.f32 %f1059, %f218, 0f4B800000;
|
|
selp.f32 %f1060, 0fC3170000, 0fC2FE0000, %p66;
|
|
selp.f32 %f1061, %f1059, %f218, %p66;
|
|
mov.b32 %r143, %f1061;
|
|
and.b32 %r144, %r143, 8388607;
|
|
or.b32 %r145, %r144, 1065353216;
|
|
mov.b32 %f1062, %r145;
|
|
shr.u32 %r146, %r143, 23;
|
|
cvt.rn.f32.u32 %f1063, %r146;
|
|
add.f32 %f1064, %f1060, %f1063;
|
|
setp.gt.f32 %p67, %f1062, 0f3FB504F3;
|
|
mul.f32 %f1065, %f1062, 0f3F000000;
|
|
add.f32 %f1066, %f1064, 0f3F800000;
|
|
selp.f32 %f1067, %f1065, %f1062, %p67;
|
|
selp.f32 %f1068, %f1066, %f1064, %p67;
|
|
add.f32 %f1069, %f1067, 0fBF800000;
|
|
add.f32 %f1055, %f1067, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1054,%f1055;
|
|
// inline asm
|
|
add.f32 %f1070, %f1069, %f1069;
|
|
mul.f32 %f1071, %f1054, %f1070;
|
|
mul.f32 %f1072, %f1071, %f1071;
|
|
mov.f32 %f1073, 0f3C4CAF63;
|
|
mov.f32 %f1074, 0f3B18F0FE;
|
|
fma.rn.f32 %f1075, %f1074, %f1072, %f1073;
|
|
mov.f32 %f1076, 0f3DAAAABD;
|
|
fma.rn.f32 %f1077, %f1075, %f1072, %f1076;
|
|
mul.rn.f32 %f1078, %f1077, %f1072;
|
|
mul.rn.f32 %f1079, %f1078, %f1071;
|
|
sub.f32 %f1080, %f1069, %f1071;
|
|
neg.f32 %f1081, %f1071;
|
|
add.f32 %f1082, %f1080, %f1080;
|
|
fma.rn.f32 %f1083, %f1081, %f1069, %f1082;
|
|
mul.rn.f32 %f1084, %f1054, %f1083;
|
|
add.f32 %f1085, %f1079, %f1071;
|
|
sub.f32 %f1086, %f1071, %f1085;
|
|
add.f32 %f1087, %f1079, %f1086;
|
|
add.f32 %f1088, %f1084, %f1087;
|
|
add.f32 %f1089, %f1085, %f1088;
|
|
sub.f32 %f1090, %f1085, %f1089;
|
|
add.f32 %f1091, %f1088, %f1090;
|
|
mov.f32 %f1092, 0f3F317200;
|
|
mul.rn.f32 %f1093, %f1068, %f1092;
|
|
mov.f32 %f1094, 0f35BFBE8E;
|
|
mul.rn.f32 %f1095, %f1068, %f1094;
|
|
add.f32 %f1096, %f1093, %f1089;
|
|
sub.f32 %f1097, %f1093, %f1096;
|
|
add.f32 %f1098, %f1089, %f1097;
|
|
add.f32 %f1099, %f1091, %f1098;
|
|
add.f32 %f1100, %f1095, %f1099;
|
|
add.f32 %f1101, %f1096, %f1100;
|
|
sub.f32 %f1102, %f1096, %f1101;
|
|
add.f32 %f1103, %f1100, %f1102;
|
|
mov.f32 %f1104, 0f3EE8BA2E;
|
|
mul.rn.f32 %f1105, %f1104, %f1101;
|
|
neg.f32 %f1106, %f1105;
|
|
fma.rn.f32 %f1107, %f1104, %f1101, %f1106;
|
|
fma.rn.f32 %f1108, %f1104, %f1103, %f1107;
|
|
mov.f32 %f1109, 0f00000000;
|
|
fma.rn.f32 %f1110, %f1109, %f1101, %f1108;
|
|
add.rn.f32 %f1111, %f1105, %f1110;
|
|
neg.f32 %f1112, %f1111;
|
|
add.rn.f32 %f1113, %f1105, %f1112;
|
|
add.rn.f32 %f1114, %f1113, %f1110;
|
|
mov.b32 %r147, %f1111;
|
|
setp.eq.s32 %p68, %r147, 1118925336;
|
|
add.s32 %r148, %r147, -1;
|
|
mov.b32 %f1115, %r148;
|
|
add.f32 %f1116, %f1114, 0f37000000;
|
|
selp.f32 %f1117, %f1115, %f1111, %p68;
|
|
selp.f32 %f219, %f1116, %f1114, %p68;
|
|
mul.f32 %f1118, %f1117, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1119, %f1118;
|
|
mov.f32 %f1120, 0fBF317200;
|
|
fma.rn.f32 %f1121, %f1119, %f1120, %f1117;
|
|
mov.f32 %f1122, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1123, %f1119, %f1122, %f1121;
|
|
mul.f32 %f1124, %f1123, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1125, %f1124;
|
|
add.f32 %f1126, %f1119, 0f00000000;
|
|
ex2.approx.f32 %f1127, %f1126;
|
|
mul.f32 %f1128, %f1125, %f1127;
|
|
setp.lt.f32 %p69, %f1117, 0fC2D20000;
|
|
selp.f32 %f1129, 0f00000000, %f1128, %p69;
|
|
setp.gt.f32 %p70, %f1117, 0f42D20000;
|
|
selp.f32 %f1529, 0f7F800000, %f1129, %p70;
|
|
setp.eq.f32 %p71, %f1529, 0f7F800000;
|
|
@%p71 bra BB0_53;
|
|
|
|
fma.rn.f32 %f1529, %f1529, %f219, %f1529;
|
|
|
|
BB0_53:
|
|
setp.lt.f32 %p72, %f216, 0f00000000;
|
|
setp.eq.f32 %p73, %f217, 0f3F800000;
|
|
and.pred %p4, %p72, %p73;
|
|
mov.b32 %r149, %f1529;
|
|
xor.b32 %r150, %r149, -2147483648;
|
|
mov.b32 %f1130, %r150;
|
|
selp.f32 %f1531, %f1130, %f1529, %p4;
|
|
setp.eq.f32 %p74, %f216, 0f00000000;
|
|
@%p74 bra BB0_56;
|
|
bra.uni BB0_54;
|
|
|
|
BB0_56:
|
|
add.f32 %f1133, %f216, %f216;
|
|
selp.f32 %f1531, %f1133, 0f00000000, %p73;
|
|
bra.uni BB0_57;
|
|
|
|
BB0_118:
|
|
mov.u64 %rd194, image_HDR;
|
|
cvta.global.u64 %rd189, %rd194;
|
|
mov.u32 %r229, 8;
|
|
// inline asm
|
|
call (%rd188), _rt_buffer_get_64, (%rd189, %r34, %r229, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1430, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs119, %f1430;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs120, 0;
|
|
st.v4.u16 [%rd188], {%rs119, %rs119, %rs119, %rs120};
|
|
|
|
BB0_119:
|
|
ld.global.u32 %r230, [additive];
|
|
setp.eq.s32 %p140, %r230, 0;
|
|
@%p140 bra BB0_121;
|
|
|
|
mov.u64 %rd207, image_RNM0;
|
|
cvta.global.u64 %rd196, %rd207;
|
|
mov.u32 %r234, 8;
|
|
// inline asm
|
|
call (%rd195), _rt_buffer_get_64, (%rd196, %r34, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs127, %rs128, %rs129, %rs130}, [%rd195];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1431, %rs127;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1432, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1433, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd201), _rt_buffer_get_64, (%rd196, %r34, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1434, %f1431, 0f00000000;
|
|
add.f32 %f1435, %f1432, 0f00000000;
|
|
add.f32 %f1436, %f1433, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1436;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1435;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f1434;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs131, 0;
|
|
st.v4.u16 [%rd201], {%rs124, %rs125, %rs126, %rs131};
|
|
bra.uni BB0_122;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd214, image_RNM0;
|
|
cvta.global.u64 %rd209, %rd214;
|
|
mov.u32 %r236, 8;
|
|
// inline asm
|
|
call (%rd208), _rt_buffer_get_64, (%rd209, %r34, %r236, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1437, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f1437;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs133, 0;
|
|
st.v4.u16 [%rd208], {%rs132, %rs132, %rs132, %rs133};
|
|
|
|
BB0_122:
|
|
ld.global.u32 %r237, [additive];
|
|
setp.eq.s32 %p141, %r237, 0;
|
|
@%p141 bra BB0_124;
|
|
|
|
mov.u64 %rd227, image_RNM1;
|
|
cvta.global.u64 %rd216, %rd227;
|
|
mov.u32 %r241, 8;
|
|
// inline asm
|
|
call (%rd215), _rt_buffer_get_64, (%rd216, %r34, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs140, %rs141, %rs142, %rs143}, [%rd215];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1438, %rs140;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1439, %rs141;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1440, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd221), _rt_buffer_get_64, (%rd216, %r34, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1441, %f1438, 0f00000000;
|
|
add.f32 %f1442, %f1439, 0f00000000;
|
|
add.f32 %f1443, %f1440, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f1443;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1442;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f1441;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs144, 0;
|
|
st.v4.u16 [%rd221], {%rs137, %rs138, %rs139, %rs144};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_124:
|
|
mov.u64 %rd234, image_RNM1;
|
|
cvta.global.u64 %rd229, %rd234;
|
|
mov.u32 %r243, 8;
|
|
// inline asm
|
|
call (%rd228), _rt_buffer_get_64, (%rd229, %r34, %r243, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1444, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f1444;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs146, 0;
|
|
st.v4.u16 [%rd228], {%rs145, %rs145, %rs145, %rs146};
|
|
|
|
BB0_125:
|
|
ld.global.u32 %r244, [additive];
|
|
setp.eq.s32 %p142, %r244, 0;
|
|
@%p142 bra BB0_127;
|
|
|
|
mov.u64 %rd247, image_RNM2;
|
|
cvta.global.u64 %rd236, %rd247;
|
|
mov.u32 %r248, 8;
|
|
// inline asm
|
|
call (%rd235), _rt_buffer_get_64, (%rd236, %r34, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs153, %rs154, %rs155, %rs156}, [%rd235];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1445, %rs153;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1446, %rs154;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1447, %rs155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd241), _rt_buffer_get_64, (%rd236, %r34, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1448, %f1445, 0f00000000;
|
|
add.f32 %f1449, %f1446, 0f00000000;
|
|
add.f32 %f1450, %f1447, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1450;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1449;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs150, %f1448;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs157, 0;
|
|
st.v4.u16 [%rd241], {%rs150, %rs151, %rs152, %rs157};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_127:
|
|
mov.u64 %rd254, image_RNM2;
|
|
cvta.global.u64 %rd249, %rd254;
|
|
mov.u32 %r250, 8;
|
|
// inline asm
|
|
call (%rd248), _rt_buffer_get_64, (%rd249, %r34, %r250, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1451, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs158, %f1451;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs159, 0;
|
|
st.v4.u16 [%rd248], {%rs158, %rs158, %rs158, %rs159};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_54:
|
|
setp.geu.f32 %p75, %f216, 0f00000000;
|
|
@%p75 bra BB0_57;
|
|
|
|
cvt.rzi.f32.f32 %f1132, %f1104;
|
|
setp.neu.f32 %p76, %f1132, 0f3EE8BA2E;
|
|
selp.f32 %f1531, 0f7FFFFFFF, %f1531, %p76;
|
|
|
|
BB0_57:
|
|
add.f32 %f1134, %f218, 0f3EE8BA2E;
|
|
mov.b32 %r151, %f1134;
|
|
setp.lt.s32 %p78, %r151, 2139095040;
|
|
@%p78 bra BB0_62;
|
|
|
|
setp.gtu.f32 %p79, %f218, 0f7F800000;
|
|
@%p79 bra BB0_61;
|
|
bra.uni BB0_59;
|
|
|
|
BB0_61:
|
|
add.f32 %f1531, %f216, 0f3EE8BA2E;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_59:
|
|
setp.neu.f32 %p80, %f218, 0f7F800000;
|
|
@%p80 bra BB0_62;
|
|
|
|
selp.f32 %f1531, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_62:
|
|
mul.f32 %f1135, %f1531, 0f437F0000;
|
|
setp.eq.f32 %p81, %f216, 0f3F800000;
|
|
selp.f32 %f1136, 0f437F0000, %f1135, %p81;
|
|
cvt.rzi.u32.f32 %r152, %f1136;
|
|
cvt.u16.u32 %rs43, %r152;
|
|
mov.u16 %rs44, 255;
|
|
st.v2.u8 [%rd67], {%rs43, %rs44};
|
|
ld.global.u32 %r257, [imageEnabled];
|
|
|
|
BB0_63:
|
|
and.b32 %r153, %r257, 1;
|
|
setp.eq.b32 %p82, %r153, 1;
|
|
@!%p82 bra BB0_98;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_64:
|
|
mov.f32 %f1139, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1140, %f1139;
|
|
fma.rn.f32 %f1141, %f1140, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f230, %f1141;
|
|
abs.f32 %f231, %f1476;
|
|
setp.lt.f32 %p83, %f231, 0f00800000;
|
|
mul.f32 %f1142, %f231, 0f4B800000;
|
|
selp.f32 %f1143, 0fC3170000, 0fC2FE0000, %p83;
|
|
selp.f32 %f1144, %f1142, %f231, %p83;
|
|
mov.b32 %r154, %f1144;
|
|
and.b32 %r155, %r154, 8388607;
|
|
or.b32 %r156, %r155, 1065353216;
|
|
mov.b32 %f1145, %r156;
|
|
shr.u32 %r157, %r154, 23;
|
|
cvt.rn.f32.u32 %f1146, %r157;
|
|
add.f32 %f1147, %f1143, %f1146;
|
|
setp.gt.f32 %p84, %f1145, 0f3FB504F3;
|
|
mul.f32 %f1148, %f1145, 0f3F000000;
|
|
add.f32 %f1149, %f1147, 0f3F800000;
|
|
selp.f32 %f1150, %f1148, %f1145, %p84;
|
|
selp.f32 %f1151, %f1149, %f1147, %p84;
|
|
add.f32 %f1152, %f1150, 0fBF800000;
|
|
add.f32 %f1138, %f1150, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1137,%f1138;
|
|
// inline asm
|
|
add.f32 %f1153, %f1152, %f1152;
|
|
mul.f32 %f1154, %f1137, %f1153;
|
|
mul.f32 %f1155, %f1154, %f1154;
|
|
mov.f32 %f1156, 0f3C4CAF63;
|
|
mov.f32 %f1157, 0f3B18F0FE;
|
|
fma.rn.f32 %f1158, %f1157, %f1155, %f1156;
|
|
mov.f32 %f1159, 0f3DAAAABD;
|
|
fma.rn.f32 %f1160, %f1158, %f1155, %f1159;
|
|
mul.rn.f32 %f1161, %f1160, %f1155;
|
|
mul.rn.f32 %f1162, %f1161, %f1154;
|
|
sub.f32 %f1163, %f1152, %f1154;
|
|
neg.f32 %f1164, %f1154;
|
|
add.f32 %f1165, %f1163, %f1163;
|
|
fma.rn.f32 %f1166, %f1164, %f1152, %f1165;
|
|
mul.rn.f32 %f1167, %f1137, %f1166;
|
|
add.f32 %f1168, %f1162, %f1154;
|
|
sub.f32 %f1169, %f1154, %f1168;
|
|
add.f32 %f1170, %f1162, %f1169;
|
|
add.f32 %f1171, %f1167, %f1170;
|
|
add.f32 %f1172, %f1168, %f1171;
|
|
sub.f32 %f1173, %f1168, %f1172;
|
|
add.f32 %f1174, %f1171, %f1173;
|
|
mov.f32 %f1175, 0f3F317200;
|
|
mul.rn.f32 %f1176, %f1151, %f1175;
|
|
mov.f32 %f1177, 0f35BFBE8E;
|
|
mul.rn.f32 %f1178, %f1151, %f1177;
|
|
add.f32 %f1179, %f1176, %f1172;
|
|
sub.f32 %f1180, %f1176, %f1179;
|
|
add.f32 %f1181, %f1172, %f1180;
|
|
add.f32 %f1182, %f1174, %f1181;
|
|
add.f32 %f1183, %f1178, %f1182;
|
|
add.f32 %f1184, %f1179, %f1183;
|
|
sub.f32 %f1185, %f1179, %f1184;
|
|
add.f32 %f1186, %f1183, %f1185;
|
|
mov.f32 %f1187, 0f3EE66666;
|
|
mul.rn.f32 %f1188, %f1187, %f1184;
|
|
neg.f32 %f1189, %f1188;
|
|
fma.rn.f32 %f1190, %f1187, %f1184, %f1189;
|
|
fma.rn.f32 %f1191, %f1187, %f1186, %f1190;
|
|
mov.f32 %f1192, 0f00000000;
|
|
fma.rn.f32 %f1193, %f1192, %f1184, %f1191;
|
|
add.rn.f32 %f1194, %f1188, %f1193;
|
|
neg.f32 %f1195, %f1194;
|
|
add.rn.f32 %f1196, %f1188, %f1195;
|
|
add.rn.f32 %f1197, %f1196, %f1193;
|
|
mov.b32 %r158, %f1194;
|
|
setp.eq.s32 %p85, %r158, 1118925336;
|
|
add.s32 %r159, %r158, -1;
|
|
mov.b32 %f1198, %r159;
|
|
add.f32 %f1199, %f1197, 0f37000000;
|
|
selp.f32 %f1200, %f1198, %f1194, %p85;
|
|
selp.f32 %f232, %f1199, %f1197, %p85;
|
|
mul.f32 %f1201, %f1200, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1202, %f1201;
|
|
mov.f32 %f1203, 0fBF317200;
|
|
fma.rn.f32 %f1204, %f1202, %f1203, %f1200;
|
|
mov.f32 %f1205, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1206, %f1202, %f1205, %f1204;
|
|
mul.f32 %f1207, %f1206, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1208, %f1207;
|
|
add.f32 %f1209, %f1202, 0f00000000;
|
|
ex2.approx.f32 %f1210, %f1209;
|
|
mul.f32 %f1211, %f1208, %f1210;
|
|
setp.lt.f32 %p86, %f1200, 0fC2D20000;
|
|
selp.f32 %f1212, 0f00000000, %f1211, %p86;
|
|
setp.gt.f32 %p87, %f1200, 0f42D20000;
|
|
selp.f32 %f1532, 0f7F800000, %f1212, %p87;
|
|
setp.eq.f32 %p88, %f1532, 0f7F800000;
|
|
@%p88 bra BB0_66;
|
|
|
|
fma.rn.f32 %f1532, %f1532, %f232, %f1532;
|
|
|
|
BB0_66:
|
|
setp.lt.f32 %p89, %f1476, 0f00000000;
|
|
setp.eq.f32 %p90, %f230, 0f3F800000;
|
|
and.pred %p5, %p89, %p90;
|
|
mov.b32 %r160, %f1532;
|
|
xor.b32 %r161, %r160, -2147483648;
|
|
mov.b32 %f1213, %r161;
|
|
selp.f32 %f1534, %f1213, %f1532, %p5;
|
|
setp.eq.f32 %p91, %f1476, 0f00000000;
|
|
@%p91 bra BB0_69;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_69:
|
|
add.f32 %f1216, %f1476, %f1476;
|
|
selp.f32 %f1534, %f1216, 0f00000000, %p90;
|
|
bra.uni BB0_70;
|
|
|
|
BB0_67:
|
|
setp.geu.f32 %p92, %f1476, 0f00000000;
|
|
@%p92 bra BB0_70;
|
|
|
|
cvt.rzi.f32.f32 %f1215, %f1187;
|
|
setp.neu.f32 %p93, %f1215, 0f3EE66666;
|
|
selp.f32 %f1534, 0f7FFFFFFF, %f1534, %p93;
|
|
|
|
BB0_70:
|
|
add.f32 %f1217, %f231, 0f3EE66666;
|
|
mov.b32 %r162, %f1217;
|
|
setp.lt.s32 %p95, %r162, 2139095040;
|
|
@%p95 bra BB0_75;
|
|
|
|
setp.gtu.f32 %p96, %f231, 0f7F800000;
|
|
@%p96 bra BB0_74;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_74:
|
|
add.f32 %f1534, %f1476, 0f3EE66666;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_72:
|
|
setp.neu.f32 %p97, %f231, 0f7F800000;
|
|
@%p97 bra BB0_75;
|
|
|
|
selp.f32 %f1534, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_75:
|
|
setp.eq.f32 %p98, %f1476, 0f3F800000;
|
|
selp.f32 %f243, 0f3F800000, %f1534, %p98;
|
|
abs.f32 %f244, %f1475;
|
|
setp.lt.f32 %p99, %f244, 0f00800000;
|
|
mul.f32 %f1220, %f244, 0f4B800000;
|
|
selp.f32 %f1221, 0fC3170000, 0fC2FE0000, %p99;
|
|
selp.f32 %f1222, %f1220, %f244, %p99;
|
|
mov.b32 %r163, %f1222;
|
|
and.b32 %r164, %r163, 8388607;
|
|
or.b32 %r165, %r164, 1065353216;
|
|
mov.b32 %f1223, %r165;
|
|
shr.u32 %r166, %r163, 23;
|
|
cvt.rn.f32.u32 %f1224, %r166;
|
|
add.f32 %f1225, %f1221, %f1224;
|
|
setp.gt.f32 %p100, %f1223, 0f3FB504F3;
|
|
mul.f32 %f1226, %f1223, 0f3F000000;
|
|
add.f32 %f1227, %f1225, 0f3F800000;
|
|
selp.f32 %f1228, %f1226, %f1223, %p100;
|
|
selp.f32 %f1229, %f1227, %f1225, %p100;
|
|
add.f32 %f1230, %f1228, 0fBF800000;
|
|
add.f32 %f1219, %f1228, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1218,%f1219;
|
|
// inline asm
|
|
add.f32 %f1231, %f1230, %f1230;
|
|
mul.f32 %f1232, %f1218, %f1231;
|
|
mul.f32 %f1233, %f1232, %f1232;
|
|
fma.rn.f32 %f1236, %f1157, %f1233, %f1156;
|
|
fma.rn.f32 %f1238, %f1236, %f1233, %f1159;
|
|
mul.rn.f32 %f1239, %f1238, %f1233;
|
|
mul.rn.f32 %f1240, %f1239, %f1232;
|
|
sub.f32 %f1241, %f1230, %f1232;
|
|
neg.f32 %f1242, %f1232;
|
|
add.f32 %f1243, %f1241, %f1241;
|
|
fma.rn.f32 %f1244, %f1242, %f1230, %f1243;
|
|
mul.rn.f32 %f1245, %f1218, %f1244;
|
|
add.f32 %f1246, %f1240, %f1232;
|
|
sub.f32 %f1247, %f1232, %f1246;
|
|
add.f32 %f1248, %f1240, %f1247;
|
|
add.f32 %f1249, %f1245, %f1248;
|
|
add.f32 %f1250, %f1246, %f1249;
|
|
sub.f32 %f1251, %f1246, %f1250;
|
|
add.f32 %f1252, %f1249, %f1251;
|
|
mul.rn.f32 %f1254, %f1229, %f1175;
|
|
mul.rn.f32 %f1256, %f1229, %f1177;
|
|
add.f32 %f1257, %f1254, %f1250;
|
|
sub.f32 %f1258, %f1254, %f1257;
|
|
add.f32 %f1259, %f1250, %f1258;
|
|
add.f32 %f1260, %f1252, %f1259;
|
|
add.f32 %f1261, %f1256, %f1260;
|
|
add.f32 %f1262, %f1257, %f1261;
|
|
sub.f32 %f1263, %f1257, %f1262;
|
|
add.f32 %f1264, %f1261, %f1263;
|
|
mul.rn.f32 %f1266, %f1187, %f1262;
|
|
neg.f32 %f1267, %f1266;
|
|
fma.rn.f32 %f1268, %f1187, %f1262, %f1267;
|
|
fma.rn.f32 %f1269, %f1187, %f1264, %f1268;
|
|
fma.rn.f32 %f1271, %f1192, %f1262, %f1269;
|
|
add.rn.f32 %f1272, %f1266, %f1271;
|
|
neg.f32 %f1273, %f1272;
|
|
add.rn.f32 %f1274, %f1266, %f1273;
|
|
add.rn.f32 %f1275, %f1274, %f1271;
|
|
mov.b32 %r167, %f1272;
|
|
setp.eq.s32 %p101, %r167, 1118925336;
|
|
add.s32 %r168, %r167, -1;
|
|
mov.b32 %f1276, %r168;
|
|
add.f32 %f1277, %f1275, 0f37000000;
|
|
selp.f32 %f1278, %f1276, %f1272, %p101;
|
|
selp.f32 %f245, %f1277, %f1275, %p101;
|
|
mul.f32 %f1279, %f1278, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1280, %f1279;
|
|
fma.rn.f32 %f1282, %f1280, %f1203, %f1278;
|
|
fma.rn.f32 %f1284, %f1280, %f1205, %f1282;
|
|
mul.f32 %f1285, %f1284, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1286, %f1285;
|
|
add.f32 %f1287, %f1280, 0f00000000;
|
|
ex2.approx.f32 %f1288, %f1287;
|
|
mul.f32 %f1289, %f1286, %f1288;
|
|
setp.lt.f32 %p102, %f1278, 0fC2D20000;
|
|
selp.f32 %f1290, 0f00000000, %f1289, %p102;
|
|
setp.gt.f32 %p103, %f1278, 0f42D20000;
|
|
selp.f32 %f1535, 0f7F800000, %f1290, %p103;
|
|
setp.eq.f32 %p104, %f1535, 0f7F800000;
|
|
@%p104 bra BB0_77;
|
|
|
|
fma.rn.f32 %f1535, %f1535, %f245, %f1535;
|
|
|
|
BB0_77:
|
|
setp.lt.f32 %p105, %f1475, 0f00000000;
|
|
and.pred %p6, %p105, %p90;
|
|
mov.b32 %r169, %f1535;
|
|
xor.b32 %r170, %r169, -2147483648;
|
|
mov.b32 %f1291, %r170;
|
|
selp.f32 %f1537, %f1291, %f1535, %p6;
|
|
setp.eq.f32 %p107, %f1475, 0f00000000;
|
|
@%p107 bra BB0_80;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_80:
|
|
add.f32 %f1294, %f1475, %f1475;
|
|
selp.f32 %f1537, %f1294, 0f00000000, %p90;
|
|
bra.uni BB0_81;
|
|
|
|
BB0_78:
|
|
setp.geu.f32 %p108, %f1475, 0f00000000;
|
|
@%p108 bra BB0_81;
|
|
|
|
cvt.rzi.f32.f32 %f1293, %f1187;
|
|
setp.neu.f32 %p109, %f1293, 0f3EE66666;
|
|
selp.f32 %f1537, 0f7FFFFFFF, %f1537, %p109;
|
|
|
|
BB0_81:
|
|
add.f32 %f1295, %f244, 0f3EE66666;
|
|
mov.b32 %r171, %f1295;
|
|
setp.lt.s32 %p111, %r171, 2139095040;
|
|
@%p111 bra BB0_86;
|
|
|
|
setp.gtu.f32 %p112, %f244, 0f7F800000;
|
|
@%p112 bra BB0_85;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_85:
|
|
add.f32 %f1537, %f1475, 0f3EE66666;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_83:
|
|
setp.neu.f32 %p113, %f244, 0f7F800000;
|
|
@%p113 bra BB0_86;
|
|
|
|
selp.f32 %f1537, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_86:
|
|
setp.eq.f32 %p114, %f1475, 0f3F800000;
|
|
selp.f32 %f256, 0f3F800000, %f1537, %p114;
|
|
abs.f32 %f257, %f1474;
|
|
setp.lt.f32 %p115, %f257, 0f00800000;
|
|
mul.f32 %f1298, %f257, 0f4B800000;
|
|
selp.f32 %f1299, 0fC3170000, 0fC2FE0000, %p115;
|
|
selp.f32 %f1300, %f1298, %f257, %p115;
|
|
mov.b32 %r172, %f1300;
|
|
and.b32 %r173, %r172, 8388607;
|
|
or.b32 %r174, %r173, 1065353216;
|
|
mov.b32 %f1301, %r174;
|
|
shr.u32 %r175, %r172, 23;
|
|
cvt.rn.f32.u32 %f1302, %r175;
|
|
add.f32 %f1303, %f1299, %f1302;
|
|
setp.gt.f32 %p116, %f1301, 0f3FB504F3;
|
|
mul.f32 %f1304, %f1301, 0f3F000000;
|
|
add.f32 %f1305, %f1303, 0f3F800000;
|
|
selp.f32 %f1306, %f1304, %f1301, %p116;
|
|
selp.f32 %f1307, %f1305, %f1303, %p116;
|
|
add.f32 %f1308, %f1306, 0fBF800000;
|
|
add.f32 %f1297, %f1306, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1296,%f1297;
|
|
// inline asm
|
|
add.f32 %f1309, %f1308, %f1308;
|
|
mul.f32 %f1310, %f1296, %f1309;
|
|
mul.f32 %f1311, %f1310, %f1310;
|
|
fma.rn.f32 %f1314, %f1157, %f1311, %f1156;
|
|
fma.rn.f32 %f1316, %f1314, %f1311, %f1159;
|
|
mul.rn.f32 %f1317, %f1316, %f1311;
|
|
mul.rn.f32 %f1318, %f1317, %f1310;
|
|
sub.f32 %f1319, %f1308, %f1310;
|
|
neg.f32 %f1320, %f1310;
|
|
add.f32 %f1321, %f1319, %f1319;
|
|
fma.rn.f32 %f1322, %f1320, %f1308, %f1321;
|
|
mul.rn.f32 %f1323, %f1296, %f1322;
|
|
add.f32 %f1324, %f1318, %f1310;
|
|
sub.f32 %f1325, %f1310, %f1324;
|
|
add.f32 %f1326, %f1318, %f1325;
|
|
add.f32 %f1327, %f1323, %f1326;
|
|
add.f32 %f1328, %f1324, %f1327;
|
|
sub.f32 %f1329, %f1324, %f1328;
|
|
add.f32 %f1330, %f1327, %f1329;
|
|
mul.rn.f32 %f1332, %f1307, %f1175;
|
|
mul.rn.f32 %f1334, %f1307, %f1177;
|
|
add.f32 %f1335, %f1332, %f1328;
|
|
sub.f32 %f1336, %f1332, %f1335;
|
|
add.f32 %f1337, %f1328, %f1336;
|
|
add.f32 %f1338, %f1330, %f1337;
|
|
add.f32 %f1339, %f1334, %f1338;
|
|
add.f32 %f1340, %f1335, %f1339;
|
|
sub.f32 %f1341, %f1335, %f1340;
|
|
add.f32 %f1342, %f1339, %f1341;
|
|
mul.rn.f32 %f1344, %f1187, %f1340;
|
|
neg.f32 %f1345, %f1344;
|
|
fma.rn.f32 %f1346, %f1187, %f1340, %f1345;
|
|
fma.rn.f32 %f1347, %f1187, %f1342, %f1346;
|
|
fma.rn.f32 %f1349, %f1192, %f1340, %f1347;
|
|
add.rn.f32 %f1350, %f1344, %f1349;
|
|
neg.f32 %f1351, %f1350;
|
|
add.rn.f32 %f1352, %f1344, %f1351;
|
|
add.rn.f32 %f1353, %f1352, %f1349;
|
|
mov.b32 %r176, %f1350;
|
|
setp.eq.s32 %p117, %r176, 1118925336;
|
|
add.s32 %r177, %r176, -1;
|
|
mov.b32 %f1354, %r177;
|
|
add.f32 %f1355, %f1353, 0f37000000;
|
|
selp.f32 %f1356, %f1354, %f1350, %p117;
|
|
selp.f32 %f258, %f1355, %f1353, %p117;
|
|
mul.f32 %f1357, %f1356, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1358, %f1357;
|
|
fma.rn.f32 %f1360, %f1358, %f1203, %f1356;
|
|
fma.rn.f32 %f1362, %f1358, %f1205, %f1360;
|
|
mul.f32 %f1363, %f1362, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1364, %f1363;
|
|
add.f32 %f1365, %f1358, 0f00000000;
|
|
ex2.approx.f32 %f1366, %f1365;
|
|
mul.f32 %f1367, %f1364, %f1366;
|
|
setp.lt.f32 %p118, %f1356, 0fC2D20000;
|
|
selp.f32 %f1368, 0f00000000, %f1367, %p118;
|
|
setp.gt.f32 %p119, %f1356, 0f42D20000;
|
|
selp.f32 %f1538, 0f7F800000, %f1368, %p119;
|
|
setp.eq.f32 %p120, %f1538, 0f7F800000;
|
|
@%p120 bra BB0_88;
|
|
|
|
fma.rn.f32 %f1538, %f1538, %f258, %f1538;
|
|
|
|
BB0_88:
|
|
setp.lt.f32 %p121, %f1474, 0f00000000;
|
|
and.pred %p7, %p121, %p90;
|
|
mov.b32 %r178, %f1538;
|
|
xor.b32 %r179, %r178, -2147483648;
|
|
mov.b32 %f1369, %r179;
|
|
selp.f32 %f1540, %f1369, %f1538, %p7;
|
|
setp.eq.f32 %p123, %f1474, 0f00000000;
|
|
@%p123 bra BB0_91;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_91:
|
|
add.f32 %f1372, %f1474, %f1474;
|
|
selp.f32 %f1540, %f1372, 0f00000000, %p90;
|
|
bra.uni BB0_92;
|
|
|
|
BB0_89:
|
|
setp.geu.f32 %p124, %f1474, 0f00000000;
|
|
@%p124 bra BB0_92;
|
|
|
|
cvt.rzi.f32.f32 %f1371, %f1187;
|
|
setp.neu.f32 %p125, %f1371, 0f3EE66666;
|
|
selp.f32 %f1540, 0f7FFFFFFF, %f1540, %p125;
|
|
|
|
BB0_92:
|
|
add.f32 %f1373, %f257, 0f3EE66666;
|
|
mov.b32 %r180, %f1373;
|
|
setp.lt.s32 %p127, %r180, 2139095040;
|
|
@%p127 bra BB0_97;
|
|
|
|
setp.gtu.f32 %p128, %f257, 0f7F800000;
|
|
@%p128 bra BB0_96;
|
|
bra.uni BB0_94;
|
|
|
|
BB0_96:
|
|
add.f32 %f1540, %f1474, 0f3EE66666;
|
|
bra.uni BB0_97;
|
|
|
|
BB0_94:
|
|
setp.neu.f32 %p129, %f257, 0f7F800000;
|
|
@%p129 bra BB0_97;
|
|
|
|
selp.f32 %f1540, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_97:
|
|
setp.eq.f32 %p130, %f1474, 0f3F800000;
|
|
selp.f32 %f1374, 0f3F800000, %f1540, %p130;
|
|
cvt.u64.u32 %rd77, %r3;
|
|
cvt.u64.u32 %rd76, %r2;
|
|
mov.u64 %rd80, image;
|
|
cvta.global.u64 %rd75, %rd80;
|
|
// inline asm
|
|
call (%rd74), _rt_buffer_get_64, (%rd75, %r34, %r35, %rd76, %rd77, %rd16, %rd16);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1375, %f1374;
|
|
mul.f32 %f1376, %f1375, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r183, %f1376;
|
|
cvt.sat.f32.f32 %f1377, %f256;
|
|
mul.f32 %f1378, %f1377, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r184, %f1378;
|
|
cvt.sat.f32.f32 %f1379, %f243;
|
|
mul.f32 %f1380, %f1379, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r185, %f1380;
|
|
cvt.u16.u32 %rs45, %r183;
|
|
cvt.u16.u32 %rs46, %r185;
|
|
cvt.u16.u32 %rs47, %r184;
|
|
mov.u16 %rs48, 255;
|
|
st.v4.u8 [%rd74], {%rs45, %rs47, %rs46, %rs48};
|
|
ld.global.u32 %r257, [imageEnabled];
|
|
|
|
BB0_98:
|
|
cvt.u64.u32 %rd7, %r2;
|
|
cvt.u64.u32 %rd8, %r3;
|
|
and.b32 %r186, %r257, 4;
|
|
setp.eq.s32 %p131, %r186, 0;
|
|
@%p131 bra BB0_102;
|
|
|
|
ld.global.u32 %r187, [additive];
|
|
setp.eq.s32 %p132, %r187, 0;
|
|
mov.f32 %f1381, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1381;}
|
|
|
|
// inline asm
|
|
@%p132 bra BB0_101;
|
|
|
|
mov.u64 %rd93, image_HDR;
|
|
cvta.global.u64 %rd82, %rd93;
|
|
mov.u32 %r191, 8;
|
|
// inline asm
|
|
call (%rd81), _rt_buffer_get_64, (%rd82, %r34, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs56, %rs57, %rs58, %rs59}, [%rd81];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1382, %rs56;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1383, %rs57;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1384, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd87), _rt_buffer_get_64, (%rd82, %r34, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1385, %f1476, %f1382;
|
|
add.f32 %f1386, %f1475, %f1383;
|
|
add.f32 %f1387, %f1474, %f1384;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1387;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f1386;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f1385;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd87], {%rs53, %rs54, %rs55, %rs49};
|
|
bra.uni BB0_102;
|
|
|
|
BB0_101:
|
|
mov.u64 %rd100, image_HDR;
|
|
cvta.global.u64 %rd95, %rd100;
|
|
mov.u32 %r193, 8;
|
|
// inline asm
|
|
call (%rd94), _rt_buffer_get_64, (%rd95, %r34, %r193, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f1474;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs61, %f1475;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f1476;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd94], {%rs60, %rs61, %rs62, %rs49};
|
|
|
|
BB0_102:
|
|
ld.global.u32 %r194, [additive];
|
|
setp.eq.s32 %p133, %r194, 0;
|
|
mov.f32 %f1391, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f1391;}
|
|
|
|
// inline asm
|
|
@%p133 bra BB0_104;
|
|
|
|
mov.u64 %rd113, image_RNM0;
|
|
cvta.global.u64 %rd102, %rd113;
|
|
mov.u32 %r198, 8;
|
|
// inline asm
|
|
call (%rd101), _rt_buffer_get_64, (%rd102, %r34, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs70, %rs71, %rs72, %rs73}, [%rd101];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1392, %rs70;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1393, %rs71;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1394, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd107), _rt_buffer_get_64, (%rd102, %r34, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1395, %f1473, %f1392;
|
|
add.f32 %f1396, %f1472, %f1393;
|
|
add.f32 %f1397, %f1471, %f1394;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1397;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs68, %f1396;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f1395;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd107], {%rs67, %rs68, %rs69, %rs63};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd120, image_RNM0;
|
|
cvta.global.u64 %rd115, %rd120;
|
|
mov.u32 %r200, 8;
|
|
// inline asm
|
|
call (%rd114), _rt_buffer_get_64, (%rd115, %r34, %r200, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f1471;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs75, %f1472;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1473;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd114], {%rs74, %rs75, %rs76, %rs63};
|
|
|
|
BB0_105:
|
|
ld.global.u32 %r201, [additive];
|
|
setp.eq.s32 %p134, %r201, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f1391;}
|
|
|
|
// inline asm
|
|
@%p134 bra BB0_107;
|
|
|
|
mov.u64 %rd133, image_RNM1;
|
|
cvta.global.u64 %rd122, %rd133;
|
|
mov.u32 %r205, 8;
|
|
// inline asm
|
|
call (%rd121), _rt_buffer_get_64, (%rd122, %r34, %r205, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs84, %rs85, %rs86, %rs87}, [%rd121];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1402, %rs84;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1403, %rs85;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1404, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd127), _rt_buffer_get_64, (%rd122, %r34, %r205, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1405, %f1470, %f1402;
|
|
add.f32 %f1406, %f1469, %f1403;
|
|
add.f32 %f1407, %f1468, %f1404;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f1407;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f1406;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f1405;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd127], {%rs81, %rs82, %rs83, %rs77};
|
|
bra.uni BB0_108;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd140, image_RNM1;
|
|
cvta.global.u64 %rd135, %rd140;
|
|
mov.u32 %r207, 8;
|
|
// inline asm
|
|
call (%rd134), _rt_buffer_get_64, (%rd135, %r34, %r207, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f1468;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1469;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1470;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd134], {%rs88, %rs89, %rs90, %rs77};
|
|
|
|
BB0_108:
|
|
ld.global.u32 %r208, [additive];
|
|
setp.eq.s32 %p135, %r208, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f1391;}
|
|
|
|
// inline asm
|
|
@%p135 bra BB0_110;
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mov.u64 %rd153, image_RNM2;
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cvta.global.u64 %rd142, %rd153;
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mov.u32 %r212, 8;
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// inline asm
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call (%rd141), _rt_buffer_get_64, (%rd142, %r34, %r212, %rd7, %rd8, %rd16, %rd16);
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// inline asm
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ld.v4.u16 {%rs98, %rs99, %rs100, %rs101}, [%rd141];
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// inline asm
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{ cvt.f32.f16 %f1412, %rs98;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1413, %rs99;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1414, %rs100;}
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|
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// inline asm
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// inline asm
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call (%rd147), _rt_buffer_get_64, (%rd142, %r34, %r212, %rd7, %rd8, %rd16, %rd16);
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// inline asm
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add.f32 %f1415, %f1467, %f1412;
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add.f32 %f1416, %f1466, %f1413;
|
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add.f32 %f1417, %f1465, %f1414;
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// inline asm
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{ cvt.rn.f16.f32 %rs97, %f1417;}
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|
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// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f1416;}
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|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f1415;}
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|
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// inline asm
|
|
st.v4.u16 [%rd147], {%rs95, %rs96, %rs97, %rs91};
|
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bra.uni BB0_128;
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|
|
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BB0_110:
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mov.u64 %rd160, image_RNM2;
|
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cvta.global.u64 %rd155, %rd160;
|
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mov.u32 %r214, 8;
|
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// inline asm
|
|
call (%rd154), _rt_buffer_get_64, (%rd155, %r34, %r214, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1465;}
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|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1466;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1467;}
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|
|
|
// inline asm
|
|
st.v4.u16 [%rd154], {%rs102, %rs103, %rs104, %rs91};
|
|
|
|
BB0_128:
|
|
ret;
|
|
}
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