2613 lines
75 KiB
Plaintext
2613 lines
75 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 image_RNM3[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<165>;
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.reg .b16 %rs<162>;
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.reg .f32 %f<1540>;
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.reg .b32 %r<269>;
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.reg .b64 %rd<272>;
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mov.u64 %rd271, __local_depot0;
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cvta.local.u64 %SP, %rd271;
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ld.global.v2.u32 {%r30, %r31}, [pixelID];
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cvt.u64.u32 %rd10, %r30;
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cvt.u64.u32 %rd11, %r31;
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mov.u64 %rd14, uvnormal;
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cvta.global.u64 %rd9, %rd14;
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mov.u32 %r28, 2;
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mov.u32 %r29, 4;
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mov.u64 %rd13, 0;
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// inline asm
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call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
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// inline asm
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ld.u32 %r1, [%rd8];
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shr.u32 %r34, %r1, 16;
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cvt.u16.u32 %rs1, %r34;
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and.b16 %rs9, %rs1, 255;
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cvt.u16.u32 %rs10, %r1;
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or.b16 %rs11, %rs10, %rs9;
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setp.eq.s16 %p9, %rs11, 0;
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mov.f32 %f1445, 0f00000000;
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mov.f32 %f1446, %f1445;
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mov.f32 %f1447, %f1445;
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@%p9 bra BB0_2;
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ld.u8 %rs12, [%rd8+1];
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and.b16 %rs14, %rs10, 255;
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cvt.rn.f32.u16 %f284, %rs14;
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div.rn.f32 %f285, %f284, 0f437F0000;
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fma.rn.f32 %f286, %f285, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f287, %rs12;
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div.rn.f32 %f288, %f287, 0f437F0000;
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fma.rn.f32 %f289, %f288, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f290, %rs9;
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div.rn.f32 %f291, %f290, 0f437F0000;
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fma.rn.f32 %f292, %f291, 0f40000000, 0fBF800000;
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mul.f32 %f293, %f289, %f289;
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fma.rn.f32 %f294, %f286, %f286, %f293;
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fma.rn.f32 %f295, %f292, %f292, %f294;
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sqrt.rn.f32 %f296, %f295;
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rcp.rn.f32 %f297, %f296;
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mul.f32 %f1445, %f286, %f297;
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mul.f32 %f1446, %f289, %f297;
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mul.f32 %f1447, %f292, %f297;
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BB0_2:
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ld.global.v2.u32 {%r35, %r36}, [pixelID];
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ld.global.v2.u32 {%r38, %r39}, [tileInfo];
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add.s32 %r2, %r35, %r38;
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add.s32 %r3, %r36, %r39;
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setp.eq.f32 %p10, %f1446, 0f00000000;
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setp.eq.f32 %p11, %f1445, 0f00000000;
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and.pred %p12, %p11, %p10;
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setp.eq.f32 %p13, %f1447, 0f00000000;
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and.pred %p14, %p12, %p13;
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@%p14 bra BB0_121;
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bra.uni BB0_3;
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BB0_121:
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ld.global.u32 %r268, [imageEnabled];
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and.b32 %r217, %r268, 1;
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setp.eq.b32 %p156, %r217, 1;
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@!%p156 bra BB0_123;
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bra.uni BB0_122;
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BB0_122:
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cvt.u64.u32 %rd159, %r2;
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cvt.u64.u32 %rd160, %r3;
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mov.u64 %rd163, image;
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cvta.global.u64 %rd158, %rd163;
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// inline asm
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call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13);
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// inline asm
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mov.u16 %rs93, 0;
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st.v4.u8 [%rd157], {%rs93, %rs93, %rs93, %rs93};
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ld.global.u32 %r268, [imageEnabled];
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BB0_123:
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and.b32 %r220, %r268, 8;
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setp.eq.s32 %p157, %r220, 0;
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@%p157 bra BB0_125;
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cvt.u64.u32 %rd167, %r3;
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cvt.u64.u32 %rd166, %r2;
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mov.u64 %rd170, image_Mask;
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cvta.global.u64 %rd165, %rd170;
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// inline asm
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call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13);
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// inline asm
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mov.f32 %f1402, 0f00000000;
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cvt.rzi.u32.f32 %r223, %f1402;
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cvt.u16.u32 %rs94, %r223;
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mov.u16 %rs95, 0;
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st.v2.u8 [%rd164], {%rs94, %rs95};
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ld.global.u32 %r268, [imageEnabled];
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BB0_125:
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cvt.u64.u32 %rd6, %r2;
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cvt.u64.u32 %rd7, %r3;
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and.b32 %r224, %r268, 4;
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setp.eq.s32 %p158, %r224, 0;
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@%p158 bra BB0_129;
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ld.global.u32 %r225, [additive];
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setp.eq.s32 %p159, %r225, 0;
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@%p159 bra BB0_128;
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mov.u64 %rd183, image_HDR;
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cvta.global.u64 %rd172, %rd183;
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mov.u32 %r229, 8;
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// inline asm
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call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r229, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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ld.v4.u16 {%rs102, %rs103, %rs104, %rs105}, [%rd171];
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// inline asm
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{ cvt.f32.f16 %f1403, %rs102;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1404, %rs103;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1405, %rs104;}
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// inline asm
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// inline asm
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call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r229, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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add.f32 %f1406, %f1403, 0f00000000;
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add.f32 %f1407, %f1404, 0f00000000;
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add.f32 %f1408, %f1405, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs101, %f1408;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs100, %f1407;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs99, %f1406;}
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// inline asm
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mov.u16 %rs106, 0;
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st.v4.u16 [%rd177], {%rs99, %rs100, %rs101, %rs106};
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bra.uni BB0_129;
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BB0_3:
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ld.global.v2.u32 {%r47, %r48}, [pixelID];
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cvt.u64.u32 %rd17, %r47;
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cvt.u64.u32 %rd18, %r48;
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mov.u64 %rd26, uvpos;
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cvta.global.u64 %rd16, %rd26;
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mov.u32 %r44, 12;
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// inline asm
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call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
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// inline asm
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ld.f32 %f9, [%rd15+8];
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ld.f32 %f8, [%rd15+4];
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ld.f32 %f7, [%rd15];
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mul.f32 %f314, %f7, 0f3456BF95;
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mul.f32 %f315, %f8, 0f3456BF95;
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mul.f32 %f316, %f9, 0f3456BF95;
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abs.f32 %f317, %f1445;
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div.rn.f32 %f318, %f314, %f317;
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abs.f32 %f319, %f1446;
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div.rn.f32 %f320, %f315, %f319;
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abs.f32 %f321, %f1447;
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div.rn.f32 %f322, %f316, %f321;
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abs.f32 %f323, %f318;
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abs.f32 %f324, %f320;
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abs.f32 %f325, %f322;
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mov.f32 %f326, 0f38D1B717;
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max.f32 %f327, %f323, %f326;
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max.f32 %f328, %f324, %f326;
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max.f32 %f329, %f325, %f326;
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fma.rn.f32 %f10, %f1445, %f327, %f7;
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fma.rn.f32 %f11, %f1446, %f328, %f8;
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fma.rn.f32 %f12, %f1447, %f329, %f9;
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mov.u64 %rd27, localLights;
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cvta.global.u64 %rd25, %rd27;
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mov.u32 %r45, 1;
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mov.u32 %r46, 96;
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// inline asm
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call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
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// inline asm
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cvt.u32.u64 %r4, %rd21;
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setp.eq.s32 %p15, %r4, 0;
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mov.f32 %f1448, 0f00000000;
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mov.f32 %f1449, %f1448;
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mov.f32 %f1450, %f1448;
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mov.f32 %f1451, %f1448;
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mov.f32 %f1452, %f1448;
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mov.f32 %f1453, %f1448;
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mov.f32 %f1454, %f1448;
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mov.f32 %f1455, %f1448;
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mov.f32 %f1456, %f1448;
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mov.f32 %f1457, %f1448;
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mov.f32 %f1458, %f1448;
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mov.f32 %f1459, %f1448;
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mov.f32 %f1460, %f1448;
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mov.f32 %f1461, %f1448;
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mov.f32 %f1462, %f1448;
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mov.f32 %f1463, %f1448;
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@%p15 bra BB0_57;
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mov.f32 %f346, 0f40000000;
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cvt.rzi.f32.f32 %f347, %f346;
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add.f32 %f348, %f347, %f347;
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mov.f32 %f349, 0f40800000;
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sub.f32 %f350, %f349, %f348;
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abs.f32 %f13, %f350;
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mul.f32 %f14, %f10, 0f3456BF95;
|
|
mul.f32 %f15, %f11, 0f3456BF95;
|
|
mul.f32 %f16, %f12, 0f3456BF95;
|
|
mov.f32 %f345, 0f00000000;
|
|
mov.u32 %r260, 0;
|
|
abs.f32 %f543, %f14;
|
|
abs.f32 %f544, %f15;
|
|
max.f32 %f545, %f543, %f544;
|
|
abs.f32 %f546, %f16;
|
|
max.f32 %f547, %f545, %f546;
|
|
mov.f32 %f1448, %f345;
|
|
mov.f32 %f1449, %f345;
|
|
mov.f32 %f1450, %f345;
|
|
mov.f32 %f1451, %f345;
|
|
mov.f32 %f1452, %f345;
|
|
mov.f32 %f1453, %f345;
|
|
mov.f32 %f1454, %f345;
|
|
mov.f32 %f1455, %f345;
|
|
mov.f32 %f1456, %f345;
|
|
mov.f32 %f1457, %f345;
|
|
mov.f32 %f1458, %f345;
|
|
mov.f32 %f1459, %f345;
|
|
mov.f32 %f1460, %f345;
|
|
mov.f32 %f1461, %f345;
|
|
mov.f32 %f1462, %f345;
|
|
mov.f32 %f1463, %f345;
|
|
|
|
BB0_5:
|
|
cvt.u64.u32 %rd30, %r260;
|
|
// inline asm
|
|
call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.f32 {%f353, %f354, %f355, %f356}, [%rd28+80];
|
|
ld.v4.f32 {%f357, %f358, %f359, %f360}, [%rd28+64];
|
|
ld.v4.f32 {%f361, %f362, %f363, %f364}, [%rd28+48];
|
|
ld.v4.f32 {%f365, %f1468, %f1469, %f368}, [%rd28+32];
|
|
ld.v4.f32 {%f369, %f370, %f371, %f372}, [%rd28+16];
|
|
ld.v4.f32 {%f373, %f374, %f375, %f376}, [%rd28];
|
|
mov.b32 %r6, %f356;
|
|
sub.f32 %f378, %f374, %f7;
|
|
sub.f32 %f379, %f375, %f8;
|
|
sub.f32 %f380, %f376, %f9;
|
|
mul.f32 %f381, %f379, %f379;
|
|
fma.rn.f32 %f382, %f378, %f378, %f381;
|
|
fma.rn.f32 %f383, %f380, %f380, %f382;
|
|
sqrt.rn.f32 %f59, %f383;
|
|
rcp.rn.f32 %f384, %f59;
|
|
mul.f32 %f60, %f378, %f384;
|
|
mul.f32 %f61, %f379, %f384;
|
|
mul.f32 %f62, %f380, %f384;
|
|
mul.f32 %f63, %f59, %f372;
|
|
abs.f32 %f64, %f63;
|
|
setp.lt.f32 %p16, %f64, 0f00800000;
|
|
mul.f32 %f385, %f64, 0f4B800000;
|
|
selp.f32 %f386, 0fC3170000, 0fC2FE0000, %p16;
|
|
selp.f32 %f387, %f385, %f64, %p16;
|
|
mov.b32 %r54, %f387;
|
|
and.b32 %r55, %r54, 8388607;
|
|
or.b32 %r56, %r55, 1065353216;
|
|
mov.b32 %f388, %r56;
|
|
shr.u32 %r57, %r54, 23;
|
|
cvt.rn.f32.u32 %f389, %r57;
|
|
add.f32 %f390, %f386, %f389;
|
|
setp.gt.f32 %p17, %f388, 0f3FB504F3;
|
|
mul.f32 %f391, %f388, 0f3F000000;
|
|
add.f32 %f392, %f390, 0f3F800000;
|
|
selp.f32 %f393, %f391, %f388, %p17;
|
|
selp.f32 %f394, %f392, %f390, %p17;
|
|
add.f32 %f395, %f393, 0fBF800000;
|
|
add.f32 %f352, %f393, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f351,%f352;
|
|
// inline asm
|
|
add.f32 %f396, %f395, %f395;
|
|
mul.f32 %f397, %f351, %f396;
|
|
mul.f32 %f398, %f397, %f397;
|
|
mov.f32 %f399, 0f3C4CAF63;
|
|
mov.f32 %f400, 0f3B18F0FE;
|
|
fma.rn.f32 %f401, %f400, %f398, %f399;
|
|
mov.f32 %f402, 0f3DAAAABD;
|
|
fma.rn.f32 %f403, %f401, %f398, %f402;
|
|
mul.rn.f32 %f404, %f403, %f398;
|
|
mul.rn.f32 %f405, %f404, %f397;
|
|
sub.f32 %f406, %f395, %f397;
|
|
neg.f32 %f407, %f397;
|
|
add.f32 %f408, %f406, %f406;
|
|
fma.rn.f32 %f409, %f407, %f395, %f408;
|
|
mul.rn.f32 %f410, %f351, %f409;
|
|
add.f32 %f411, %f405, %f397;
|
|
sub.f32 %f412, %f397, %f411;
|
|
add.f32 %f413, %f405, %f412;
|
|
add.f32 %f414, %f410, %f413;
|
|
add.f32 %f415, %f411, %f414;
|
|
sub.f32 %f416, %f411, %f415;
|
|
add.f32 %f417, %f414, %f416;
|
|
mov.f32 %f418, 0f3F317200;
|
|
mul.rn.f32 %f419, %f394, %f418;
|
|
mov.f32 %f420, 0f35BFBE8E;
|
|
mul.rn.f32 %f421, %f394, %f420;
|
|
add.f32 %f422, %f419, %f415;
|
|
sub.f32 %f423, %f419, %f422;
|
|
add.f32 %f424, %f415, %f423;
|
|
add.f32 %f425, %f417, %f424;
|
|
add.f32 %f426, %f421, %f425;
|
|
add.f32 %f427, %f422, %f426;
|
|
sub.f32 %f428, %f422, %f427;
|
|
add.f32 %f429, %f426, %f428;
|
|
mul.rn.f32 %f65, %f349, %f427;
|
|
neg.f32 %f431, %f65;
|
|
fma.rn.f32 %f432, %f349, %f427, %f431;
|
|
fma.rn.f32 %f433, %f349, %f429, %f432;
|
|
fma.rn.f32 %f66, %f345, %f427, %f433;
|
|
add.rn.f32 %f67, %f65, %f66;
|
|
mov.b32 %r58, %f67;
|
|
setp.eq.s32 %p1, %r58, 1118925336;
|
|
add.s32 %r59, %r58, -1;
|
|
mov.b32 %f435, %r59;
|
|
selp.f32 %f436, %f435, %f67, %p1;
|
|
mul.f32 %f437, %f436, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f438, %f437;
|
|
mov.f32 %f439, 0fBF317200;
|
|
fma.rn.f32 %f440, %f438, %f439, %f436;
|
|
mov.f32 %f441, 0fB5BFBE8E;
|
|
fma.rn.f32 %f442, %f438, %f441, %f440;
|
|
mul.f32 %f443, %f442, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f444, %f443;
|
|
add.f32 %f445, %f438, 0f00000000;
|
|
ex2.approx.f32 %f446, %f445;
|
|
mul.f32 %f447, %f444, %f446;
|
|
setp.lt.f32 %p18, %f436, 0fC2D20000;
|
|
selp.f32 %f448, 0f00000000, %f447, %p18;
|
|
setp.gt.f32 %p19, %f436, 0f42D20000;
|
|
selp.f32 %f1464, 0f7F800000, %f448, %p19;
|
|
setp.eq.f32 %p20, %f1464, 0f7F800000;
|
|
@%p20 bra BB0_7;
|
|
|
|
neg.f32 %f449, %f67;
|
|
add.rn.f32 %f450, %f65, %f449;
|
|
add.rn.f32 %f451, %f450, %f66;
|
|
add.f32 %f452, %f451, 0f37000000;
|
|
selp.f32 %f453, %f452, %f451, %p1;
|
|
fma.rn.f32 %f1464, %f1464, %f453, %f1464;
|
|
|
|
BB0_7:
|
|
setp.lt.f32 %p21, %f63, 0f00000000;
|
|
setp.eq.f32 %p22, %f13, 0f3F800000;
|
|
and.pred %p2, %p21, %p22;
|
|
mov.b32 %r60, %f1464;
|
|
xor.b32 %r61, %r60, -2147483648;
|
|
mov.b32 %f454, %r61;
|
|
selp.f32 %f1466, %f454, %f1464, %p2;
|
|
setp.eq.f32 %p23, %f63, 0f00000000;
|
|
@%p23 bra BB0_10;
|
|
bra.uni BB0_8;
|
|
|
|
BB0_10:
|
|
add.f32 %f457, %f63, %f63;
|
|
selp.f32 %f1466, %f457, 0f00000000, %p22;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_8:
|
|
setp.geu.f32 %p24, %f63, 0f00000000;
|
|
@%p24 bra BB0_11;
|
|
|
|
cvt.rzi.f32.f32 %f456, %f349;
|
|
setp.neu.f32 %p25, %f456, 0f40800000;
|
|
selp.f32 %f1466, 0f7FFFFFFF, %f1466, %p25;
|
|
|
|
BB0_11:
|
|
add.f32 %f458, %f64, 0f40800000;
|
|
mov.b32 %r62, %f458;
|
|
setp.lt.s32 %p27, %r62, 2139095040;
|
|
@%p27 bra BB0_16;
|
|
|
|
setp.gtu.f32 %p28, %f64, 0f7F800000;
|
|
@%p28 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
add.f32 %f1466, %f63, 0f40800000;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p29, %f64, 0f7F800000;
|
|
@%p29 bra BB0_16;
|
|
|
|
selp.f32 %f1466, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_16:
|
|
mul.f32 %f459, %f59, %f370;
|
|
mov.f32 %f1491, 0f3F800000;
|
|
sub.f32 %f461, %f1491, %f1466;
|
|
setp.eq.f32 %p30, %f63, 0f3F800000;
|
|
selp.f32 %f462, 0f00000000, %f461, %p30;
|
|
cvt.sat.f32.f32 %f463, %f462;
|
|
fma.rn.f32 %f464, %f459, %f459, %f371;
|
|
div.rn.f32 %f93, %f463, %f464;
|
|
mul.f32 %f465, %f1446, %f61;
|
|
fma.rn.f32 %f466, %f1445, %f60, %f465;
|
|
fma.rn.f32 %f467, %f1447, %f62, %f466;
|
|
ld.global.u32 %r63, [ignoreNormal];
|
|
setp.eq.s32 %p31, %r63, 0;
|
|
selp.f32 %f94, %f467, 0f3F800000, %p31;
|
|
mul.f32 %f468, %f94, 0f40800000;
|
|
cvt.sat.f32.f32 %f95, %f468;
|
|
setp.eq.f32 %p32, %f373, 0f3F800000;
|
|
@%p32 bra BB0_23;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_23:
|
|
setp.leu.f32 %p36, %f368, 0f00000000;
|
|
@%p36 bra BB0_19;
|
|
|
|
mul.f32 %f499, %f353, %f60;
|
|
mul.f32 %f500, %f354, %f61;
|
|
neg.f32 %f501, %f500;
|
|
sub.f32 %f502, %f501, %f499;
|
|
mul.f32 %f503, %f355, %f62;
|
|
sub.f32 %f504, %f502, %f503;
|
|
setp.gt.f32 %p37, %f504, 0f00000000;
|
|
selp.f32 %f505, 0f3F800000, 0f00000000, %p37;
|
|
mul.f32 %f506, %f362, %f61;
|
|
fma.rn.f32 %f507, %f361, %f60, %f506;
|
|
mul.f32 %f508, %f358, %f61;
|
|
fma.rn.f32 %f509, %f357, %f60, %f508;
|
|
fma.rn.f32 %f510, %f363, %f62, %f507;
|
|
fma.rn.f32 %f511, %f359, %f62, %f509;
|
|
fma.rn.f32 %f512, %f364, %f510, 0f3F000000;
|
|
mov.f32 %f513, 0f3F800000;
|
|
sub.f32 %f495, %f513, %f512;
|
|
fma.rn.f32 %f496, %f364, %f511, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r67, %f368;
|
|
mov.f32 %f498, 0f00000000;
|
|
// inline asm
|
|
call (%f491, %f492, %f493, %f494), _rt_texture_get_f_id, (%r67, %r28, %f495, %f496, %f498, %f498);
|
|
// inline asm
|
|
mul.f32 %f514, %f505, %f491;
|
|
mul.f32 %f515, %f505, %f492;
|
|
mul.f32 %f516, %f505, %f493;
|
|
mul.f32 %f1467, %f365, %f514;
|
|
mul.f32 %f1468, %f1468, %f515;
|
|
mul.f32 %f1469, %f1469, %f516;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p33, %f373, 0f40000000;
|
|
@%p33 bra BB0_21;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_21:
|
|
setp.leu.f32 %p35, %f368, 0f00000000;
|
|
@%p35 bra BB0_19;
|
|
|
|
mul.f32 %f485, %f362, %f61;
|
|
fma.rn.f32 %f486, %f361, %f60, %f485;
|
|
mul.f32 %f487, %f358, %f61;
|
|
fma.rn.f32 %f488, %f357, %f60, %f487;
|
|
mul.f32 %f489, %f354, %f61;
|
|
fma.rn.f32 %f490, %f353, %f60, %f489;
|
|
fma.rn.f32 %f482, %f363, %f62, %f486;
|
|
fma.rn.f32 %f483, %f359, %f62, %f488;
|
|
fma.rn.f32 %f484, %f355, %f62, %f490;
|
|
cvt.rzi.s32.f32 %r64, %f368;
|
|
mov.u32 %r65, 6;
|
|
mov.u32 %r66, 0;
|
|
// inline asm
|
|
call (%f478, %f479, %f480, %f481), _rt_texture_get_base_id, (%r64, %r65, %f482, %f483, %f484, %r66);
|
|
// inline asm
|
|
mul.f32 %f1467, %f365, %f478;
|
|
mul.f32 %f1468, %f1468, %f479;
|
|
mul.f32 %f1469, %f1469, %f480;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_18:
|
|
setp.neu.f32 %p34, %f373, 0f40800000;
|
|
@%p34 bra BB0_19;
|
|
|
|
mul.f32 %f469, %f353, %f60;
|
|
mul.f32 %f470, %f354, %f61;
|
|
neg.f32 %f471, %f470;
|
|
sub.f32 %f472, %f471, %f469;
|
|
mul.f32 %f473, %f355, %f62;
|
|
sub.f32 %f474, %f472, %f473;
|
|
fma.rn.f32 %f475, %f368, %f474, %f364;
|
|
cvt.sat.f32.f32 %f476, %f475;
|
|
mul.f32 %f477, %f476, %f476;
|
|
mul.f32 %f1470, %f93, %f477;
|
|
mov.f32 %f1467, %f365;
|
|
bra.uni BB0_26;
|
|
|
|
BB0_19:
|
|
mov.f32 %f1467, %f365;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1470, %f93;
|
|
|
|
BB0_26:
|
|
max.f32 %f532, %f1467, %f1468;
|
|
max.f32 %f533, %f532, %f1469;
|
|
mul.f32 %f534, %f95, %f1470;
|
|
mul.f32 %f535, %f534, %f533;
|
|
setp.lt.f32 %p39, %f535, 0f3727C5AC;
|
|
mov.pred %p164, -1;
|
|
mov.f32 %f1471, 0f00000000;
|
|
mov.f32 %f1472, %f1471;
|
|
mov.f32 %f1473, %f1471;
|
|
mov.f32 %f125, %f1471;
|
|
mov.f32 %f1475, %f1471;
|
|
mov.f32 %f1476, %f1471;
|
|
mov.f32 %f128, %f1471;
|
|
mov.f32 %f1478, %f1471;
|
|
mov.f32 %f1479, %f1471;
|
|
mov.f32 %f131, %f1471;
|
|
mov.f32 %f1481, %f1471;
|
|
mov.f32 %f1482, %f1471;
|
|
mov.f32 %f134, %f1471;
|
|
mov.f32 %f1484, %f1471;
|
|
mov.f32 %f1485, %f1471;
|
|
@%p39 bra BB0_28;
|
|
|
|
cvt.sat.f32.f32 %f536, %f94;
|
|
mul.f32 %f537, %f1470, %f536;
|
|
mul.f32 %f1471, %f1467, %f537;
|
|
mul.f32 %f1472, %f1468, %f537;
|
|
mul.f32 %f1473, %f1469, %f537;
|
|
mul.f32 %f538, %f1470, 0f3E800000;
|
|
mul.f32 %f539, %f95, %f538;
|
|
mul.f32 %f125, %f1467, %f539;
|
|
mul.f32 %f1475, %f1468, %f539;
|
|
mul.f32 %f1476, %f1469, %f539;
|
|
mul.f32 %f128, %f60, %f125;
|
|
mul.f32 %f1478, %f60, %f1475;
|
|
mul.f32 %f1479, %f60, %f1476;
|
|
mul.f32 %f131, %f61, %f125;
|
|
mul.f32 %f1481, %f61, %f1475;
|
|
mul.f32 %f1482, %f61, %f1476;
|
|
mul.f32 %f134, %f62, %f125;
|
|
mul.f32 %f1484, %f62, %f1475;
|
|
mul.f32 %f1485, %f62, %f1476;
|
|
mov.pred %p164, 0;
|
|
|
|
BB0_28:
|
|
@%p164 bra BB0_56;
|
|
|
|
setp.eq.s32 %p41, %r6, 0;
|
|
mov.u16 %rs161, 0;
|
|
@%p41 bra BB0_40;
|
|
|
|
abs.s32 %r8, %r6;
|
|
mov.f32 %f1490, 0f00000000;
|
|
setp.lt.s32 %p42, %r8, 1;
|
|
@%p42 bra BB0_39;
|
|
|
|
max.f32 %f138, %f547, %f326;
|
|
and.b32 %r9, %r8, 3;
|
|
setp.eq.s32 %p43, %r9, 0;
|
|
add.u64 %rd35, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd35;
|
|
mov.f32 %f1490, 0f00000000;
|
|
mov.u32 %r264, 0;
|
|
@%p43 bra BB0_37;
|
|
|
|
setp.eq.s32 %p44, %r9, 1;
|
|
mov.f32 %f1487, 0f00000000;
|
|
mov.u32 %r262, 0;
|
|
@%p44 bra BB0_36;
|
|
|
|
setp.eq.s32 %p45, %r9, 2;
|
|
mov.f32 %f1486, 0f00000000;
|
|
mov.u32 %r261, 0;
|
|
@%p45 bra BB0_35;
|
|
|
|
sub.f32 %f559, %f374, %f369;
|
|
sub.f32 %f560, %f375, %f369;
|
|
sub.f32 %f561, %f376, %f369;
|
|
sub.f32 %f562, %f559, %f7;
|
|
sub.f32 %f563, %f560, %f8;
|
|
sub.f32 %f564, %f561, %f9;
|
|
mul.f32 %f565, %f563, %f563;
|
|
fma.rn.f32 %f566, %f562, %f562, %f565;
|
|
fma.rn.f32 %f567, %f564, %f564, %f566;
|
|
sqrt.rn.f32 %f558, %f567;
|
|
rcp.rn.f32 %f568, %f558;
|
|
mul.f32 %f554, %f568, %f562;
|
|
mul.f32 %f555, %f568, %f563;
|
|
mul.f32 %f556, %f568, %f564;
|
|
ld.global.u32 %r76, [imageEnabled];
|
|
and.b32 %r77, %r76, 32;
|
|
setp.eq.s32 %p46, %r77, 0;
|
|
selp.f32 %f569, 0f3F800000, 0f41200000, %p46;
|
|
mul.f32 %f557, %f569, %f138;
|
|
mov.u32 %r78, 1065353216;
|
|
st.local.u32 [%rd2], %r78;
|
|
ld.global.u32 %r72, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r72, %f10, %f11, %f12, %f554, %f555, %f556, %r45, %f557, %f558, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f570, [%rd2];
|
|
add.f32 %f1486, %f570, 0f00000000;
|
|
mov.u32 %r261, %r45;
|
|
|
|
BB0_35:
|
|
cvt.rn.f32.s32 %f579, %r261;
|
|
mul.f32 %f580, %f579, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f581, %f580;
|
|
sub.f32 %f582, %f580, %f581;
|
|
mul.f32 %f583, %f579, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f584, %f583;
|
|
sub.f32 %f585, %f583, %f584;
|
|
mul.f32 %f586, %f579, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f587, %f586;
|
|
sub.f32 %f588, %f586, %f587;
|
|
add.f32 %f589, %f585, 0f4199851F;
|
|
add.f32 %f590, %f588, 0f4199851F;
|
|
add.f32 %f591, %f582, 0f4199851F;
|
|
mul.f32 %f592, %f585, %f590;
|
|
fma.rn.f32 %f593, %f582, %f589, %f592;
|
|
fma.rn.f32 %f594, %f591, %f588, %f593;
|
|
add.f32 %f595, %f582, %f594;
|
|
add.f32 %f596, %f585, %f594;
|
|
add.f32 %f597, %f588, %f594;
|
|
add.f32 %f598, %f595, %f596;
|
|
mul.f32 %f599, %f597, %f598;
|
|
cvt.rmi.f32.f32 %f600, %f599;
|
|
sub.f32 %f601, %f599, %f600;
|
|
add.f32 %f602, %f595, %f597;
|
|
mul.f32 %f603, %f596, %f602;
|
|
cvt.rmi.f32.f32 %f604, %f603;
|
|
sub.f32 %f605, %f603, %f604;
|
|
add.f32 %f606, %f596, %f597;
|
|
mul.f32 %f607, %f595, %f606;
|
|
cvt.rmi.f32.f32 %f608, %f607;
|
|
sub.f32 %f609, %f607, %f608;
|
|
fma.rn.f32 %f610, %f601, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f611, %f605, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f612, %f609, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f613, %f369, %f610, %f374;
|
|
fma.rn.f32 %f614, %f369, %f611, %f375;
|
|
fma.rn.f32 %f615, %f369, %f612, %f376;
|
|
sub.f32 %f616, %f613, %f7;
|
|
sub.f32 %f617, %f614, %f8;
|
|
sub.f32 %f618, %f615, %f9;
|
|
mul.f32 %f619, %f617, %f617;
|
|
fma.rn.f32 %f620, %f616, %f616, %f619;
|
|
fma.rn.f32 %f621, %f618, %f618, %f620;
|
|
sqrt.rn.f32 %f578, %f621;
|
|
rcp.rn.f32 %f622, %f578;
|
|
mul.f32 %f574, %f622, %f616;
|
|
mul.f32 %f575, %f622, %f617;
|
|
mul.f32 %f576, %f622, %f618;
|
|
ld.global.u32 %r82, [imageEnabled];
|
|
and.b32 %r83, %r82, 32;
|
|
setp.eq.s32 %p47, %r83, 0;
|
|
selp.f32 %f623, 0f3F800000, 0f41200000, %p47;
|
|
mul.f32 %f577, %f623, %f138;
|
|
mov.u32 %r84, 1065353216;
|
|
st.local.u32 [%rd2], %r84;
|
|
ld.global.u32 %r79, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r79, %f10, %f11, %f12, %f574, %f575, %f576, %r45, %f577, %f578, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f624, [%rd2];
|
|
add.f32 %f1487, %f1486, %f624;
|
|
add.s32 %r262, %r261, 1;
|
|
|
|
BB0_36:
|
|
cvt.rn.f32.s32 %f633, %r262;
|
|
mul.f32 %f634, %f633, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f635, %f634;
|
|
sub.f32 %f636, %f634, %f635;
|
|
mul.f32 %f637, %f633, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f638, %f637;
|
|
sub.f32 %f639, %f637, %f638;
|
|
mul.f32 %f640, %f633, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f641, %f640;
|
|
sub.f32 %f642, %f640, %f641;
|
|
add.f32 %f643, %f639, 0f4199851F;
|
|
add.f32 %f644, %f642, 0f4199851F;
|
|
add.f32 %f645, %f636, 0f4199851F;
|
|
mul.f32 %f646, %f639, %f644;
|
|
fma.rn.f32 %f647, %f636, %f643, %f646;
|
|
fma.rn.f32 %f648, %f645, %f642, %f647;
|
|
add.f32 %f649, %f636, %f648;
|
|
add.f32 %f650, %f639, %f648;
|
|
add.f32 %f651, %f642, %f648;
|
|
add.f32 %f652, %f649, %f650;
|
|
mul.f32 %f653, %f651, %f652;
|
|
cvt.rmi.f32.f32 %f654, %f653;
|
|
sub.f32 %f655, %f653, %f654;
|
|
add.f32 %f656, %f649, %f651;
|
|
mul.f32 %f657, %f650, %f656;
|
|
cvt.rmi.f32.f32 %f658, %f657;
|
|
sub.f32 %f659, %f657, %f658;
|
|
add.f32 %f660, %f650, %f651;
|
|
mul.f32 %f661, %f649, %f660;
|
|
cvt.rmi.f32.f32 %f662, %f661;
|
|
sub.f32 %f663, %f661, %f662;
|
|
fma.rn.f32 %f664, %f655, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f665, %f659, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f666, %f663, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f667, %f369, %f664, %f374;
|
|
fma.rn.f32 %f668, %f369, %f665, %f375;
|
|
fma.rn.f32 %f669, %f369, %f666, %f376;
|
|
sub.f32 %f670, %f667, %f7;
|
|
sub.f32 %f671, %f668, %f8;
|
|
sub.f32 %f672, %f669, %f9;
|
|
mul.f32 %f673, %f671, %f671;
|
|
fma.rn.f32 %f674, %f670, %f670, %f673;
|
|
fma.rn.f32 %f675, %f672, %f672, %f674;
|
|
sqrt.rn.f32 %f632, %f675;
|
|
rcp.rn.f32 %f676, %f632;
|
|
mul.f32 %f628, %f676, %f670;
|
|
mul.f32 %f629, %f676, %f671;
|
|
mul.f32 %f630, %f676, %f672;
|
|
ld.global.u32 %r88, [imageEnabled];
|
|
and.b32 %r89, %r88, 32;
|
|
setp.eq.s32 %p48, %r89, 0;
|
|
selp.f32 %f677, 0f3F800000, 0f41200000, %p48;
|
|
mul.f32 %f631, %f677, %f138;
|
|
mov.u32 %r90, 1065353216;
|
|
st.local.u32 [%rd2], %r90;
|
|
ld.global.u32 %r85, [root];
|
|
mov.u32 %r86, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r85, %f10, %f11, %f12, %f628, %f629, %f630, %r86, %f631, %f632, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f678, [%rd2];
|
|
add.f32 %f1490, %f1487, %f678;
|
|
add.s32 %r264, %r262, 1;
|
|
|
|
BB0_37:
|
|
setp.lt.u32 %p49, %r8, 4;
|
|
@%p49 bra BB0_39;
|
|
|
|
BB0_38:
|
|
cvt.rn.f32.s32 %f711, %r264;
|
|
mul.f32 %f712, %f711, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f713, %f712;
|
|
sub.f32 %f714, %f712, %f713;
|
|
mul.f32 %f715, %f711, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f716, %f715;
|
|
sub.f32 %f717, %f715, %f716;
|
|
mul.f32 %f718, %f711, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f719, %f718;
|
|
sub.f32 %f720, %f718, %f719;
|
|
add.f32 %f721, %f717, 0f4199851F;
|
|
add.f32 %f722, %f720, 0f4199851F;
|
|
add.f32 %f723, %f714, 0f4199851F;
|
|
mul.f32 %f724, %f717, %f722;
|
|
fma.rn.f32 %f725, %f714, %f721, %f724;
|
|
fma.rn.f32 %f726, %f723, %f720, %f725;
|
|
add.f32 %f727, %f714, %f726;
|
|
add.f32 %f728, %f717, %f726;
|
|
add.f32 %f729, %f720, %f726;
|
|
add.f32 %f730, %f727, %f728;
|
|
mul.f32 %f731, %f729, %f730;
|
|
cvt.rmi.f32.f32 %f732, %f731;
|
|
sub.f32 %f733, %f731, %f732;
|
|
add.f32 %f734, %f727, %f729;
|
|
mul.f32 %f735, %f728, %f734;
|
|
cvt.rmi.f32.f32 %f736, %f735;
|
|
sub.f32 %f737, %f735, %f736;
|
|
add.f32 %f738, %f728, %f729;
|
|
mul.f32 %f739, %f727, %f738;
|
|
cvt.rmi.f32.f32 %f740, %f739;
|
|
sub.f32 %f741, %f739, %f740;
|
|
fma.rn.f32 %f742, %f733, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f743, %f737, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f744, %f741, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f745, %f369, %f742, %f374;
|
|
fma.rn.f32 %f746, %f369, %f743, %f375;
|
|
fma.rn.f32 %f747, %f369, %f744, %f376;
|
|
sub.f32 %f748, %f745, %f7;
|
|
sub.f32 %f749, %f746, %f8;
|
|
sub.f32 %f750, %f747, %f9;
|
|
mul.f32 %f751, %f749, %f749;
|
|
fma.rn.f32 %f752, %f748, %f748, %f751;
|
|
fma.rn.f32 %f753, %f750, %f750, %f752;
|
|
sqrt.rn.f32 %f686, %f753;
|
|
rcp.rn.f32 %f754, %f686;
|
|
mul.f32 %f682, %f754, %f748;
|
|
mul.f32 %f683, %f754, %f749;
|
|
mul.f32 %f684, %f754, %f750;
|
|
ld.global.u32 %r103, [imageEnabled];
|
|
and.b32 %r104, %r103, 32;
|
|
setp.eq.s32 %p50, %r104, 0;
|
|
selp.f32 %f755, 0f3F800000, 0f41200000, %p50;
|
|
mul.f32 %f685, %f755, %f138;
|
|
mov.u32 %r105, 1065353216;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r91, [root];
|
|
mov.u32 %r101, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r91, %f10, %f11, %f12, %f682, %f683, %f684, %r101, %f685, %f686, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f756, [%rd2];
|
|
add.f32 %f757, %f1490, %f756;
|
|
add.s32 %r106, %r264, 1;
|
|
cvt.rn.f32.s32 %f758, %r106;
|
|
mul.f32 %f759, %f758, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f760, %f759;
|
|
sub.f32 %f761, %f759, %f760;
|
|
mul.f32 %f762, %f758, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f763, %f762;
|
|
sub.f32 %f764, %f762, %f763;
|
|
mul.f32 %f765, %f758, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f766, %f765;
|
|
sub.f32 %f767, %f765, %f766;
|
|
add.f32 %f768, %f764, 0f4199851F;
|
|
add.f32 %f769, %f767, 0f4199851F;
|
|
add.f32 %f770, %f761, 0f4199851F;
|
|
mul.f32 %f771, %f764, %f769;
|
|
fma.rn.f32 %f772, %f761, %f768, %f771;
|
|
fma.rn.f32 %f773, %f770, %f767, %f772;
|
|
add.f32 %f774, %f761, %f773;
|
|
add.f32 %f775, %f764, %f773;
|
|
add.f32 %f776, %f767, %f773;
|
|
add.f32 %f777, %f774, %f775;
|
|
mul.f32 %f778, %f776, %f777;
|
|
cvt.rmi.f32.f32 %f779, %f778;
|
|
sub.f32 %f780, %f778, %f779;
|
|
add.f32 %f781, %f774, %f776;
|
|
mul.f32 %f782, %f775, %f781;
|
|
cvt.rmi.f32.f32 %f783, %f782;
|
|
sub.f32 %f784, %f782, %f783;
|
|
add.f32 %f785, %f775, %f776;
|
|
mul.f32 %f786, %f774, %f785;
|
|
cvt.rmi.f32.f32 %f787, %f786;
|
|
sub.f32 %f788, %f786, %f787;
|
|
fma.rn.f32 %f789, %f780, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f790, %f784, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f791, %f788, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f792, %f369, %f789, %f374;
|
|
fma.rn.f32 %f793, %f369, %f790, %f375;
|
|
fma.rn.f32 %f794, %f369, %f791, %f376;
|
|
sub.f32 %f795, %f792, %f7;
|
|
sub.f32 %f796, %f793, %f8;
|
|
sub.f32 %f797, %f794, %f9;
|
|
mul.f32 %f798, %f796, %f796;
|
|
fma.rn.f32 %f799, %f795, %f795, %f798;
|
|
fma.rn.f32 %f800, %f797, %f797, %f799;
|
|
sqrt.rn.f32 %f694, %f800;
|
|
rcp.rn.f32 %f801, %f694;
|
|
mul.f32 %f690, %f801, %f795;
|
|
mul.f32 %f691, %f801, %f796;
|
|
mul.f32 %f692, %f801, %f797;
|
|
ld.global.u32 %r107, [imageEnabled];
|
|
and.b32 %r108, %r107, 32;
|
|
setp.eq.s32 %p51, %r108, 0;
|
|
selp.f32 %f802, 0f3F800000, 0f41200000, %p51;
|
|
mul.f32 %f693, %f802, %f138;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r94, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r94, %f10, %f11, %f12, %f690, %f691, %f692, %r101, %f693, %f694, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f803, [%rd2];
|
|
add.f32 %f804, %f757, %f803;
|
|
add.s32 %r109, %r264, 2;
|
|
cvt.rn.f32.s32 %f805, %r109;
|
|
mul.f32 %f806, %f805, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f807, %f806;
|
|
sub.f32 %f808, %f806, %f807;
|
|
mul.f32 %f809, %f805, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f810, %f809;
|
|
sub.f32 %f811, %f809, %f810;
|
|
mul.f32 %f812, %f805, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f813, %f812;
|
|
sub.f32 %f814, %f812, %f813;
|
|
add.f32 %f815, %f811, 0f4199851F;
|
|
add.f32 %f816, %f814, 0f4199851F;
|
|
add.f32 %f817, %f808, 0f4199851F;
|
|
mul.f32 %f818, %f811, %f816;
|
|
fma.rn.f32 %f819, %f808, %f815, %f818;
|
|
fma.rn.f32 %f820, %f817, %f814, %f819;
|
|
add.f32 %f821, %f808, %f820;
|
|
add.f32 %f822, %f811, %f820;
|
|
add.f32 %f823, %f814, %f820;
|
|
add.f32 %f824, %f821, %f822;
|
|
mul.f32 %f825, %f823, %f824;
|
|
cvt.rmi.f32.f32 %f826, %f825;
|
|
sub.f32 %f827, %f825, %f826;
|
|
add.f32 %f828, %f821, %f823;
|
|
mul.f32 %f829, %f822, %f828;
|
|
cvt.rmi.f32.f32 %f830, %f829;
|
|
sub.f32 %f831, %f829, %f830;
|
|
add.f32 %f832, %f822, %f823;
|
|
mul.f32 %f833, %f821, %f832;
|
|
cvt.rmi.f32.f32 %f834, %f833;
|
|
sub.f32 %f835, %f833, %f834;
|
|
fma.rn.f32 %f836, %f827, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f837, %f831, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f838, %f835, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f839, %f369, %f836, %f374;
|
|
fma.rn.f32 %f840, %f369, %f837, %f375;
|
|
fma.rn.f32 %f841, %f369, %f838, %f376;
|
|
sub.f32 %f842, %f839, %f7;
|
|
sub.f32 %f843, %f840, %f8;
|
|
sub.f32 %f844, %f841, %f9;
|
|
mul.f32 %f845, %f843, %f843;
|
|
fma.rn.f32 %f846, %f842, %f842, %f845;
|
|
fma.rn.f32 %f847, %f844, %f844, %f846;
|
|
sqrt.rn.f32 %f702, %f847;
|
|
rcp.rn.f32 %f848, %f702;
|
|
mul.f32 %f698, %f848, %f842;
|
|
mul.f32 %f699, %f848, %f843;
|
|
mul.f32 %f700, %f848, %f844;
|
|
ld.global.u32 %r110, [imageEnabled];
|
|
and.b32 %r111, %r110, 32;
|
|
setp.eq.s32 %p52, %r111, 0;
|
|
selp.f32 %f849, 0f3F800000, 0f41200000, %p52;
|
|
mul.f32 %f701, %f849, %f138;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r97, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r97, %f10, %f11, %f12, %f698, %f699, %f700, %r101, %f701, %f702, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f850, [%rd2];
|
|
add.f32 %f851, %f804, %f850;
|
|
add.s32 %r112, %r264, 3;
|
|
cvt.rn.f32.s32 %f852, %r112;
|
|
mul.f32 %f853, %f852, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f854, %f853;
|
|
sub.f32 %f855, %f853, %f854;
|
|
mul.f32 %f856, %f852, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f857, %f856;
|
|
sub.f32 %f858, %f856, %f857;
|
|
mul.f32 %f859, %f852, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f860, %f859;
|
|
sub.f32 %f861, %f859, %f860;
|
|
add.f32 %f862, %f858, 0f4199851F;
|
|
add.f32 %f863, %f861, 0f4199851F;
|
|
add.f32 %f864, %f855, 0f4199851F;
|
|
mul.f32 %f865, %f858, %f863;
|
|
fma.rn.f32 %f866, %f855, %f862, %f865;
|
|
fma.rn.f32 %f867, %f864, %f861, %f866;
|
|
add.f32 %f868, %f855, %f867;
|
|
add.f32 %f869, %f858, %f867;
|
|
add.f32 %f870, %f861, %f867;
|
|
add.f32 %f871, %f868, %f869;
|
|
mul.f32 %f872, %f870, %f871;
|
|
cvt.rmi.f32.f32 %f873, %f872;
|
|
sub.f32 %f874, %f872, %f873;
|
|
add.f32 %f875, %f868, %f870;
|
|
mul.f32 %f876, %f869, %f875;
|
|
cvt.rmi.f32.f32 %f877, %f876;
|
|
sub.f32 %f878, %f876, %f877;
|
|
add.f32 %f879, %f869, %f870;
|
|
mul.f32 %f880, %f868, %f879;
|
|
cvt.rmi.f32.f32 %f881, %f880;
|
|
sub.f32 %f882, %f880, %f881;
|
|
fma.rn.f32 %f883, %f874, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f884, %f878, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f885, %f882, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f886, %f369, %f883, %f374;
|
|
fma.rn.f32 %f887, %f369, %f884, %f375;
|
|
fma.rn.f32 %f888, %f369, %f885, %f376;
|
|
sub.f32 %f889, %f886, %f7;
|
|
sub.f32 %f890, %f887, %f8;
|
|
sub.f32 %f891, %f888, %f9;
|
|
mul.f32 %f892, %f890, %f890;
|
|
fma.rn.f32 %f893, %f889, %f889, %f892;
|
|
fma.rn.f32 %f894, %f891, %f891, %f893;
|
|
sqrt.rn.f32 %f710, %f894;
|
|
rcp.rn.f32 %f895, %f710;
|
|
mul.f32 %f706, %f895, %f889;
|
|
mul.f32 %f707, %f895, %f890;
|
|
mul.f32 %f708, %f895, %f891;
|
|
ld.global.u32 %r113, [imageEnabled];
|
|
and.b32 %r114, %r113, 32;
|
|
setp.eq.s32 %p53, %r114, 0;
|
|
selp.f32 %f896, 0f3F800000, 0f41200000, %p53;
|
|
mul.f32 %f709, %f896, %f138;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r100, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r100, %f10, %f11, %f12, %f706, %f707, %f708, %r101, %f709, %f710, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f897, [%rd2];
|
|
add.f32 %f1490, %f851, %f897;
|
|
add.s32 %r264, %r264, 4;
|
|
setp.lt.s32 %p54, %r264, %r8;
|
|
@%p54 bra BB0_38;
|
|
|
|
BB0_39:
|
|
cvt.rn.f32.s32 %f898, %r8;
|
|
div.rn.f32 %f1491, %f1490, %f898;
|
|
shr.u32 %r115, %r6, 31;
|
|
cvt.u16.u32 %rs161, %r115;
|
|
|
|
BB0_40:
|
|
fma.rn.f32 %f1463, %f1471, %f1491, %f1463;
|
|
fma.rn.f32 %f1462, %f1472, %f1491, %f1462;
|
|
fma.rn.f32 %f1461, %f1473, %f1491, %f1461;
|
|
fma.rn.f32 %f1460, %f125, %f1491, %f1460;
|
|
fma.rn.f32 %f1459, %f1475, %f1491, %f1459;
|
|
fma.rn.f32 %f1458, %f1476, %f1491, %f1458;
|
|
fma.rn.f32 %f1457, %f128, %f1491, %f1457;
|
|
fma.rn.f32 %f1456, %f1478, %f1491, %f1456;
|
|
fma.rn.f32 %f1455, %f1479, %f1491, %f1455;
|
|
fma.rn.f32 %f1454, %f131, %f1491, %f1454;
|
|
fma.rn.f32 %f1453, %f1481, %f1491, %f1453;
|
|
fma.rn.f32 %f1452, %f1482, %f1491, %f1452;
|
|
fma.rn.f32 %f1451, %f134, %f1491, %f1451;
|
|
fma.rn.f32 %f1450, %f1484, %f1491, %f1450;
|
|
fma.rn.f32 %f1449, %f1485, %f1491, %f1449;
|
|
setp.eq.s16 %p55, %rs161, 0;
|
|
@%p55 bra BB0_55;
|
|
|
|
mov.f32 %f1444, 0fB5BFBE8E;
|
|
mov.f32 %f1443, 0fBF317200;
|
|
mov.f32 %f1442, 0f35BFBE8E;
|
|
mov.f32 %f1441, 0f3F317200;
|
|
mov.f32 %f1440, 0f3DAAAABD;
|
|
mov.f32 %f1439, 0f3C4CAF63;
|
|
mov.f32 %f1438, 0f3B18F0FE;
|
|
mul.f32 %f901, %f128, 0f3F000000;
|
|
mul.f32 %f902, %f131, 0f3F000000;
|
|
mul.f32 %f903, %f902, %f902;
|
|
fma.rn.f32 %f904, %f901, %f901, %f903;
|
|
mul.f32 %f905, %f134, 0f3F000000;
|
|
fma.rn.f32 %f906, %f905, %f905, %f904;
|
|
sqrt.rn.f32 %f907, %f906;
|
|
rcp.rn.f32 %f908, %f907;
|
|
mul.f32 %f909, %f901, %f908;
|
|
mul.f32 %f910, %f902, %f908;
|
|
mul.f32 %f911, %f905, %f908;
|
|
mul.f32 %f912, %f1446, %f910;
|
|
fma.rn.f32 %f913, %f1445, %f909, %f912;
|
|
fma.rn.f32 %f914, %f1447, %f911, %f913;
|
|
fma.rn.f32 %f165, %f914, 0f3F000000, 0f3F000000;
|
|
add.f32 %f915, %f907, %f907;
|
|
div.rn.f32 %f916, %f915, %f125;
|
|
add.f32 %f166, %f916, 0f3F800000;
|
|
div.rn.f32 %f917, %f907, %f125;
|
|
mov.f32 %f918, 0f3F800000;
|
|
sub.f32 %f919, %f918, %f917;
|
|
add.f32 %f920, %f917, 0f3F800000;
|
|
div.rn.f32 %f167, %f919, %f920;
|
|
sub.f32 %f921, %f918, %f167;
|
|
add.f32 %f922, %f166, 0f3F800000;
|
|
mul.f32 %f168, %f922, %f921;
|
|
mul.f32 %f923, %f166, 0f3F000000;
|
|
cvt.rzi.f32.f32 %f924, %f923;
|
|
add.f32 %f925, %f924, %f924;
|
|
sub.f32 %f926, %f166, %f925;
|
|
abs.f32 %f169, %f926;
|
|
abs.f32 %f170, %f165;
|
|
setp.lt.f32 %p56, %f170, 0f00800000;
|
|
mul.f32 %f927, %f170, 0f4B800000;
|
|
selp.f32 %f928, 0fC3170000, 0fC2FE0000, %p56;
|
|
selp.f32 %f929, %f927, %f170, %p56;
|
|
mov.b32 %r116, %f929;
|
|
and.b32 %r117, %r116, 8388607;
|
|
or.b32 %r118, %r117, 1065353216;
|
|
mov.b32 %f930, %r118;
|
|
shr.u32 %r119, %r116, 23;
|
|
cvt.rn.f32.u32 %f931, %r119;
|
|
add.f32 %f932, %f928, %f931;
|
|
setp.gt.f32 %p57, %f930, 0f3FB504F3;
|
|
mul.f32 %f933, %f930, 0f3F000000;
|
|
add.f32 %f934, %f932, 0f3F800000;
|
|
selp.f32 %f935, %f933, %f930, %p57;
|
|
selp.f32 %f936, %f934, %f932, %p57;
|
|
add.f32 %f937, %f935, 0fBF800000;
|
|
add.f32 %f900, %f935, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f899,%f900;
|
|
// inline asm
|
|
add.f32 %f938, %f937, %f937;
|
|
mul.f32 %f939, %f899, %f938;
|
|
mul.f32 %f940, %f939, %f939;
|
|
fma.rn.f32 %f943, %f1438, %f940, %f1439;
|
|
fma.rn.f32 %f945, %f943, %f940, %f1440;
|
|
mul.rn.f32 %f946, %f945, %f940;
|
|
mul.rn.f32 %f947, %f946, %f939;
|
|
sub.f32 %f948, %f937, %f939;
|
|
neg.f32 %f949, %f939;
|
|
add.f32 %f950, %f948, %f948;
|
|
fma.rn.f32 %f951, %f949, %f937, %f950;
|
|
mul.rn.f32 %f952, %f899, %f951;
|
|
add.f32 %f953, %f947, %f939;
|
|
sub.f32 %f954, %f939, %f953;
|
|
add.f32 %f955, %f947, %f954;
|
|
add.f32 %f956, %f952, %f955;
|
|
add.f32 %f957, %f953, %f956;
|
|
sub.f32 %f958, %f953, %f957;
|
|
add.f32 %f959, %f956, %f958;
|
|
mul.rn.f32 %f961, %f936, %f1441;
|
|
mul.rn.f32 %f963, %f936, %f1442;
|
|
add.f32 %f964, %f961, %f957;
|
|
sub.f32 %f965, %f961, %f964;
|
|
add.f32 %f966, %f957, %f965;
|
|
add.f32 %f967, %f959, %f966;
|
|
add.f32 %f968, %f963, %f967;
|
|
add.f32 %f969, %f964, %f968;
|
|
sub.f32 %f970, %f964, %f969;
|
|
add.f32 %f971, %f968, %f970;
|
|
abs.f32 %f171, %f166;
|
|
setp.gt.f32 %p58, %f171, 0f77F684DF;
|
|
mul.f32 %f972, %f166, 0f39000000;
|
|
selp.f32 %f973, %f972, %f166, %p58;
|
|
mul.rn.f32 %f974, %f973, %f969;
|
|
neg.f32 %f975, %f974;
|
|
fma.rn.f32 %f976, %f973, %f969, %f975;
|
|
fma.rn.f32 %f977, %f973, %f971, %f976;
|
|
mov.f32 %f978, 0f00000000;
|
|
fma.rn.f32 %f979, %f978, %f969, %f977;
|
|
add.rn.f32 %f980, %f974, %f979;
|
|
neg.f32 %f981, %f980;
|
|
add.rn.f32 %f982, %f974, %f981;
|
|
add.rn.f32 %f983, %f982, %f979;
|
|
mov.b32 %r120, %f980;
|
|
setp.eq.s32 %p59, %r120, 1118925336;
|
|
add.s32 %r121, %r120, -1;
|
|
mov.b32 %f984, %r121;
|
|
add.f32 %f985, %f983, 0f37000000;
|
|
selp.f32 %f986, %f984, %f980, %p59;
|
|
selp.f32 %f172, %f985, %f983, %p59;
|
|
mul.f32 %f987, %f986, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f988, %f987;
|
|
fma.rn.f32 %f990, %f988, %f1443, %f986;
|
|
fma.rn.f32 %f992, %f988, %f1444, %f990;
|
|
mul.f32 %f993, %f992, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f994, %f993;
|
|
add.f32 %f995, %f988, 0f00000000;
|
|
ex2.approx.f32 %f996, %f995;
|
|
mul.f32 %f997, %f994, %f996;
|
|
setp.lt.f32 %p60, %f986, 0fC2D20000;
|
|
selp.f32 %f998, 0f00000000, %f997, %p60;
|
|
setp.gt.f32 %p61, %f986, 0f42D20000;
|
|
selp.f32 %f1492, 0f7F800000, %f998, %p61;
|
|
setp.eq.f32 %p62, %f1492, 0f7F800000;
|
|
@%p62 bra BB0_43;
|
|
|
|
fma.rn.f32 %f1492, %f1492, %f172, %f1492;
|
|
|
|
BB0_43:
|
|
setp.lt.f32 %p63, %f165, 0f00000000;
|
|
setp.eq.f32 %p64, %f169, 0f3F800000;
|
|
and.pred %p4, %p63, %p64;
|
|
mov.b32 %r122, %f1492;
|
|
xor.b32 %r123, %r122, -2147483648;
|
|
mov.b32 %f999, %r123;
|
|
selp.f32 %f1494, %f999, %f1492, %p4;
|
|
setp.eq.f32 %p65, %f165, 0f00000000;
|
|
@%p65 bra BB0_46;
|
|
bra.uni BB0_44;
|
|
|
|
BB0_46:
|
|
add.f32 %f1001, %f165, %f165;
|
|
mov.b32 %r124, %f1001;
|
|
selp.b32 %r125, %r124, 0, %p64;
|
|
or.b32 %r126, %r125, 2139095040;
|
|
setp.lt.f32 %p69, %f166, 0f00000000;
|
|
selp.b32 %r127, %r126, %r125, %p69;
|
|
mov.b32 %f1494, %r127;
|
|
bra.uni BB0_47;
|
|
|
|
BB0_44:
|
|
setp.geu.f32 %p66, %f165, 0f00000000;
|
|
@%p66 bra BB0_47;
|
|
|
|
cvt.rzi.f32.f32 %f1000, %f166;
|
|
setp.neu.f32 %p67, %f1000, %f166;
|
|
selp.f32 %f1494, 0f7FFFFFFF, %f1494, %p67;
|
|
|
|
BB0_47:
|
|
add.f32 %f1002, %f170, %f171;
|
|
mov.b32 %r128, %f1002;
|
|
setp.lt.s32 %p70, %r128, 2139095040;
|
|
@%p70 bra BB0_54;
|
|
|
|
setp.gtu.f32 %p71, %f170, 0f7F800000;
|
|
setp.gtu.f32 %p72, %f171, 0f7F800000;
|
|
or.pred %p73, %p71, %p72;
|
|
@%p73 bra BB0_53;
|
|
bra.uni BB0_49;
|
|
|
|
BB0_53:
|
|
add.f32 %f1494, %f166, %f165;
|
|
bra.uni BB0_54;
|
|
|
|
BB0_49:
|
|
setp.eq.f32 %p74, %f171, 0f7F800000;
|
|
@%p74 bra BB0_52;
|
|
bra.uni BB0_50;
|
|
|
|
BB0_52:
|
|
setp.gt.f32 %p77, %f170, 0f3F800000;
|
|
selp.b32 %r132, 2139095040, 0, %p77;
|
|
xor.b32 %r133, %r132, 2139095040;
|
|
setp.lt.f32 %p78, %f166, 0f00000000;
|
|
selp.b32 %r134, %r133, %r132, %p78;
|
|
mov.b32 %f1003, %r134;
|
|
setp.eq.f32 %p79, %f165, 0fBF800000;
|
|
selp.f32 %f1494, 0f3F800000, %f1003, %p79;
|
|
bra.uni BB0_54;
|
|
|
|
BB0_50:
|
|
setp.neu.f32 %p75, %f170, 0f7F800000;
|
|
@%p75 bra BB0_54;
|
|
|
|
setp.ltu.f32 %p76, %f166, 0f00000000;
|
|
selp.b32 %r129, 0, 2139095040, %p76;
|
|
or.b32 %r130, %r129, -2147483648;
|
|
selp.b32 %r131, %r130, %r129, %p4;
|
|
mov.b32 %f1494, %r131;
|
|
|
|
BB0_54:
|
|
setp.eq.f32 %p80, %f166, 0f00000000;
|
|
setp.eq.f32 %p81, %f165, 0f3F800000;
|
|
or.pred %p82, %p81, %p80;
|
|
selp.f32 %f1004, 0f3F800000, %f1494, %p82;
|
|
fma.rn.f32 %f1005, %f168, %f1004, %f167;
|
|
mul.f32 %f1006, %f125, %f1005;
|
|
div.rn.f32 %f1007, %f1006, %f365;
|
|
div.rn.f32 %f1008, %f1007, %f93;
|
|
cvt.sat.f32.f32 %f1009, %f1008;
|
|
mul.f32 %f1491, %f1491, %f1009;
|
|
|
|
BB0_55:
|
|
add.f32 %f1448, %f1448, %f1491;
|
|
|
|
BB0_56:
|
|
add.s32 %r260, %r260, 1;
|
|
setp.lt.u32 %p83, %r260, %r4;
|
|
@%p83 bra BB0_5;
|
|
|
|
BB0_57:
|
|
ld.global.u32 %r266, [imageEnabled];
|
|
and.b32 %r135, %r266, 8;
|
|
setp.eq.s32 %p84, %r135, 0;
|
|
@%p84 bra BB0_70;
|
|
|
|
cvt.sat.f32.f32 %f219, %f1448;
|
|
cvt.u64.u32 %rd46, %r3;
|
|
cvt.u64.u32 %rd45, %r2;
|
|
mov.u64 %rd49, image_Mask;
|
|
cvta.global.u64 %rd44, %rd49;
|
|
// inline asm
|
|
call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1012, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1013, %f1012;
|
|
fma.rn.f32 %f1014, %f1013, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f220, %f1014;
|
|
abs.f32 %f221, %f219;
|
|
setp.lt.f32 %p85, %f221, 0f00800000;
|
|
mul.f32 %f1015, %f221, 0f4B800000;
|
|
selp.f32 %f1016, 0fC3170000, 0fC2FE0000, %p85;
|
|
selp.f32 %f1017, %f1015, %f221, %p85;
|
|
mov.b32 %r138, %f1017;
|
|
and.b32 %r139, %r138, 8388607;
|
|
or.b32 %r140, %r139, 1065353216;
|
|
mov.b32 %f1018, %r140;
|
|
shr.u32 %r141, %r138, 23;
|
|
cvt.rn.f32.u32 %f1019, %r141;
|
|
add.f32 %f1020, %f1016, %f1019;
|
|
setp.gt.f32 %p86, %f1018, 0f3FB504F3;
|
|
mul.f32 %f1021, %f1018, 0f3F000000;
|
|
add.f32 %f1022, %f1020, 0f3F800000;
|
|
selp.f32 %f1023, %f1021, %f1018, %p86;
|
|
selp.f32 %f1024, %f1022, %f1020, %p86;
|
|
add.f32 %f1025, %f1023, 0fBF800000;
|
|
add.f32 %f1011, %f1023, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1010,%f1011;
|
|
// inline asm
|
|
add.f32 %f1026, %f1025, %f1025;
|
|
mul.f32 %f1027, %f1010, %f1026;
|
|
mul.f32 %f1028, %f1027, %f1027;
|
|
mov.f32 %f1029, 0f3C4CAF63;
|
|
mov.f32 %f1030, 0f3B18F0FE;
|
|
fma.rn.f32 %f1031, %f1030, %f1028, %f1029;
|
|
mov.f32 %f1032, 0f3DAAAABD;
|
|
fma.rn.f32 %f1033, %f1031, %f1028, %f1032;
|
|
mul.rn.f32 %f1034, %f1033, %f1028;
|
|
mul.rn.f32 %f1035, %f1034, %f1027;
|
|
sub.f32 %f1036, %f1025, %f1027;
|
|
neg.f32 %f1037, %f1027;
|
|
add.f32 %f1038, %f1036, %f1036;
|
|
fma.rn.f32 %f1039, %f1037, %f1025, %f1038;
|
|
mul.rn.f32 %f1040, %f1010, %f1039;
|
|
add.f32 %f1041, %f1035, %f1027;
|
|
sub.f32 %f1042, %f1027, %f1041;
|
|
add.f32 %f1043, %f1035, %f1042;
|
|
add.f32 %f1044, %f1040, %f1043;
|
|
add.f32 %f1045, %f1041, %f1044;
|
|
sub.f32 %f1046, %f1041, %f1045;
|
|
add.f32 %f1047, %f1044, %f1046;
|
|
mov.f32 %f1048, 0f3F317200;
|
|
mul.rn.f32 %f1049, %f1024, %f1048;
|
|
mov.f32 %f1050, 0f35BFBE8E;
|
|
mul.rn.f32 %f1051, %f1024, %f1050;
|
|
add.f32 %f1052, %f1049, %f1045;
|
|
sub.f32 %f1053, %f1049, %f1052;
|
|
add.f32 %f1054, %f1045, %f1053;
|
|
add.f32 %f1055, %f1047, %f1054;
|
|
add.f32 %f1056, %f1051, %f1055;
|
|
add.f32 %f1057, %f1052, %f1056;
|
|
sub.f32 %f1058, %f1052, %f1057;
|
|
add.f32 %f1059, %f1056, %f1058;
|
|
mov.f32 %f1060, 0f3EE8BA2E;
|
|
mul.rn.f32 %f1061, %f1060, %f1057;
|
|
neg.f32 %f1062, %f1061;
|
|
fma.rn.f32 %f1063, %f1060, %f1057, %f1062;
|
|
fma.rn.f32 %f1064, %f1060, %f1059, %f1063;
|
|
mov.f32 %f1065, 0f00000000;
|
|
fma.rn.f32 %f1066, %f1065, %f1057, %f1064;
|
|
add.rn.f32 %f1067, %f1061, %f1066;
|
|
neg.f32 %f1068, %f1067;
|
|
add.rn.f32 %f1069, %f1061, %f1068;
|
|
add.rn.f32 %f1070, %f1069, %f1066;
|
|
mov.b32 %r142, %f1067;
|
|
setp.eq.s32 %p87, %r142, 1118925336;
|
|
add.s32 %r143, %r142, -1;
|
|
mov.b32 %f1071, %r143;
|
|
add.f32 %f1072, %f1070, 0f37000000;
|
|
selp.f32 %f1073, %f1071, %f1067, %p87;
|
|
selp.f32 %f222, %f1072, %f1070, %p87;
|
|
mul.f32 %f1074, %f1073, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1075, %f1074;
|
|
mov.f32 %f1076, 0fBF317200;
|
|
fma.rn.f32 %f1077, %f1075, %f1076, %f1073;
|
|
mov.f32 %f1078, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1079, %f1075, %f1078, %f1077;
|
|
mul.f32 %f1080, %f1079, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1081, %f1080;
|
|
add.f32 %f1082, %f1075, 0f00000000;
|
|
ex2.approx.f32 %f1083, %f1082;
|
|
mul.f32 %f1084, %f1081, %f1083;
|
|
setp.lt.f32 %p88, %f1073, 0fC2D20000;
|
|
selp.f32 %f1085, 0f00000000, %f1084, %p88;
|
|
setp.gt.f32 %p89, %f1073, 0f42D20000;
|
|
selp.f32 %f1528, 0f7F800000, %f1085, %p89;
|
|
setp.eq.f32 %p90, %f1528, 0f7F800000;
|
|
@%p90 bra BB0_60;
|
|
|
|
fma.rn.f32 %f1528, %f1528, %f222, %f1528;
|
|
|
|
BB0_60:
|
|
setp.lt.f32 %p91, %f219, 0f00000000;
|
|
setp.eq.f32 %p92, %f220, 0f3F800000;
|
|
and.pred %p5, %p91, %p92;
|
|
mov.b32 %r144, %f1528;
|
|
xor.b32 %r145, %r144, -2147483648;
|
|
mov.b32 %f1086, %r145;
|
|
selp.f32 %f1530, %f1086, %f1528, %p5;
|
|
setp.eq.f32 %p93, %f219, 0f00000000;
|
|
@%p93 bra BB0_63;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_63:
|
|
add.f32 %f1089, %f219, %f219;
|
|
selp.f32 %f1530, %f1089, 0f00000000, %p92;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_128:
|
|
mov.u64 %rd190, image_HDR;
|
|
cvta.global.u64 %rd185, %rd190;
|
|
mov.u32 %r231, 8;
|
|
// inline asm
|
|
call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r231, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1409, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs107, %f1409;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs108, 0;
|
|
st.v4.u16 [%rd184], {%rs107, %rs107, %rs107, %rs108};
|
|
|
|
BB0_129:
|
|
ld.global.u32 %r232, [additive];
|
|
setp.eq.s32 %p160, %r232, 0;
|
|
@%p160 bra BB0_131;
|
|
|
|
mov.u64 %rd203, image_RNM0;
|
|
cvta.global.u64 %rd192, %rd203;
|
|
mov.u32 %r236, 8;
|
|
// inline asm
|
|
call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r236, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs115, %rs116, %rs117, %rs118}, [%rd191];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1410, %rs115;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1411, %rs116;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1412, %rs117;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r236, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1413, %f1410, 0f00000000;
|
|
add.f32 %f1414, %f1411, 0f00000000;
|
|
add.f32 %f1415, %f1412, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs114, %f1415;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs113, %f1414;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f1413;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs119, 0;
|
|
st.v4.u16 [%rd197], {%rs112, %rs113, %rs114, %rs119};
|
|
bra.uni BB0_132;
|
|
|
|
BB0_131:
|
|
mov.u64 %rd210, image_RNM0;
|
|
cvta.global.u64 %rd205, %rd210;
|
|
mov.u32 %r238, 8;
|
|
// inline asm
|
|
call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r238, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1416, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs120, %f1416;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs121, 0;
|
|
st.v4.u16 [%rd204], {%rs120, %rs120, %rs120, %rs121};
|
|
|
|
BB0_132:
|
|
ld.global.u32 %r239, [additive];
|
|
setp.eq.s32 %p161, %r239, 0;
|
|
@%p161 bra BB0_134;
|
|
|
|
mov.u64 %rd223, image_RNM1;
|
|
cvta.global.u64 %rd212, %rd223;
|
|
mov.u32 %r243, 8;
|
|
// inline asm
|
|
call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r243, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs128, %rs129, %rs130, %rs131}, [%rd211];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1417, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1418, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1419, %rs130;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r243, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1420, %f1417, 0f00000000;
|
|
add.f32 %f1421, %f1418, 0f00000000;
|
|
add.f32 %f1422, %f1419, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f1422;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1421;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1420;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs132, 0;
|
|
st.v4.u16 [%rd217], {%rs125, %rs126, %rs127, %rs132};
|
|
bra.uni BB0_135;
|
|
|
|
BB0_134:
|
|
mov.u64 %rd230, image_RNM1;
|
|
cvta.global.u64 %rd225, %rd230;
|
|
mov.u32 %r245, 8;
|
|
// inline asm
|
|
call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r245, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1423, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f1423;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs134, 0;
|
|
st.v4.u16 [%rd224], {%rs133, %rs133, %rs133, %rs134};
|
|
|
|
BB0_135:
|
|
ld.global.u32 %r246, [additive];
|
|
setp.eq.s32 %p162, %r246, 0;
|
|
@%p162 bra BB0_137;
|
|
|
|
mov.u64 %rd243, image_RNM2;
|
|
cvta.global.u64 %rd232, %rd243;
|
|
mov.u32 %r250, 8;
|
|
// inline asm
|
|
call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r250, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs141, %rs142, %rs143, %rs144}, [%rd231];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1424, %rs141;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1425, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1426, %rs143;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r250, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1427, %f1424, 0f00000000;
|
|
add.f32 %f1428, %f1425, 0f00000000;
|
|
add.f32 %f1429, %f1426, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f1429;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f1428;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1427;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs145, 0;
|
|
st.v4.u16 [%rd237], {%rs138, %rs139, %rs140, %rs145};
|
|
bra.uni BB0_138;
|
|
|
|
BB0_137:
|
|
mov.u64 %rd250, image_RNM2;
|
|
cvta.global.u64 %rd245, %rd250;
|
|
mov.u32 %r252, 8;
|
|
// inline asm
|
|
call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r252, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1430, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f1430;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs147, 0;
|
|
st.v4.u16 [%rd244], {%rs146, %rs146, %rs146, %rs147};
|
|
|
|
BB0_138:
|
|
ld.global.u32 %r253, [additive];
|
|
setp.eq.s32 %p163, %r253, 0;
|
|
@%p163 bra BB0_140;
|
|
|
|
mov.u64 %rd263, image_RNM3;
|
|
cvta.global.u64 %rd252, %rd263;
|
|
mov.u32 %r257, 8;
|
|
// inline asm
|
|
call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r257, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs154, %rs155, %rs156, %rs157}, [%rd251];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1431, %rs154;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1432, %rs155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1433, %rs156;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r257, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1434, %f1431, 0f00000000;
|
|
add.f32 %f1435, %f1432, 0f00000000;
|
|
add.f32 %f1436, %f1433, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs153, %f1436;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1435;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1434;}
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|
|
|
// inline asm
|
|
mov.u16 %rs158, 0;
|
|
st.v4.u16 [%rd257], {%rs151, %rs152, %rs153, %rs158};
|
|
bra.uni BB0_141;
|
|
|
|
BB0_140:
|
|
mov.u64 %rd270, image_RNM3;
|
|
cvta.global.u64 %rd265, %rd270;
|
|
mov.u32 %r259, 8;
|
|
// inline asm
|
|
call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r259, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1437, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1437;}
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|
|
|
// inline asm
|
|
mov.u16 %rs160, 0;
|
|
st.v4.u16 [%rd264], {%rs159, %rs159, %rs159, %rs160};
|
|
bra.uni BB0_141;
|
|
|
|
BB0_61:
|
|
setp.geu.f32 %p94, %f219, 0f00000000;
|
|
@%p94 bra BB0_64;
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|
|
|
cvt.rzi.f32.f32 %f1088, %f1060;
|
|
setp.neu.f32 %p95, %f1088, 0f3EE8BA2E;
|
|
selp.f32 %f1530, 0f7FFFFFFF, %f1530, %p95;
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|
|
|
BB0_64:
|
|
add.f32 %f1090, %f221, 0f3EE8BA2E;
|
|
mov.b32 %r146, %f1090;
|
|
setp.lt.s32 %p97, %r146, 2139095040;
|
|
@%p97 bra BB0_69;
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|
|
|
setp.gtu.f32 %p98, %f221, 0f7F800000;
|
|
@%p98 bra BB0_68;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_68:
|
|
add.f32 %f1530, %f219, 0f3EE8BA2E;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_66:
|
|
setp.neu.f32 %p99, %f221, 0f7F800000;
|
|
@%p99 bra BB0_69;
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|
|
|
selp.f32 %f1530, 0fFF800000, 0f7F800000, %p5;
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|
|
|
BB0_69:
|
|
mul.f32 %f1091, %f1530, 0f437F0000;
|
|
setp.eq.f32 %p100, %f219, 0f3F800000;
|
|
selp.f32 %f1092, 0f437F0000, %f1091, %p100;
|
|
cvt.rzi.u32.f32 %r147, %f1092;
|
|
cvt.u16.u32 %rs17, %r147;
|
|
mov.u16 %rs18, 255;
|
|
st.v2.u8 [%rd43], {%rs17, %rs18};
|
|
ld.global.u32 %r266, [imageEnabled];
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|
|
|
BB0_70:
|
|
and.b32 %r148, %r266, 1;
|
|
setp.eq.b32 %p101, %r148, 1;
|
|
@!%p101 bra BB0_105;
|
|
bra.uni BB0_71;
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|
|
|
BB0_71:
|
|
mov.f32 %f1095, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1096, %f1095;
|
|
fma.rn.f32 %f1097, %f1096, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f233, %f1097;
|
|
abs.f32 %f234, %f1463;
|
|
setp.lt.f32 %p102, %f234, 0f00800000;
|
|
mul.f32 %f1098, %f234, 0f4B800000;
|
|
selp.f32 %f1099, 0fC3170000, 0fC2FE0000, %p102;
|
|
selp.f32 %f1100, %f1098, %f234, %p102;
|
|
mov.b32 %r149, %f1100;
|
|
and.b32 %r150, %r149, 8388607;
|
|
or.b32 %r151, %r150, 1065353216;
|
|
mov.b32 %f1101, %r151;
|
|
shr.u32 %r152, %r149, 23;
|
|
cvt.rn.f32.u32 %f1102, %r152;
|
|
add.f32 %f1103, %f1099, %f1102;
|
|
setp.gt.f32 %p103, %f1101, 0f3FB504F3;
|
|
mul.f32 %f1104, %f1101, 0f3F000000;
|
|
add.f32 %f1105, %f1103, 0f3F800000;
|
|
selp.f32 %f1106, %f1104, %f1101, %p103;
|
|
selp.f32 %f1107, %f1105, %f1103, %p103;
|
|
add.f32 %f1108, %f1106, 0fBF800000;
|
|
add.f32 %f1094, %f1106, 0f3F800000;
|
|
// inline asm
|
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rcp.approx.ftz.f32 %f1093,%f1094;
|
|
// inline asm
|
|
add.f32 %f1109, %f1108, %f1108;
|
|
mul.f32 %f1110, %f1093, %f1109;
|
|
mul.f32 %f1111, %f1110, %f1110;
|
|
mov.f32 %f1112, 0f3C4CAF63;
|
|
mov.f32 %f1113, 0f3B18F0FE;
|
|
fma.rn.f32 %f1114, %f1113, %f1111, %f1112;
|
|
mov.f32 %f1115, 0f3DAAAABD;
|
|
fma.rn.f32 %f1116, %f1114, %f1111, %f1115;
|
|
mul.rn.f32 %f1117, %f1116, %f1111;
|
|
mul.rn.f32 %f1118, %f1117, %f1110;
|
|
sub.f32 %f1119, %f1108, %f1110;
|
|
neg.f32 %f1120, %f1110;
|
|
add.f32 %f1121, %f1119, %f1119;
|
|
fma.rn.f32 %f1122, %f1120, %f1108, %f1121;
|
|
mul.rn.f32 %f1123, %f1093, %f1122;
|
|
add.f32 %f1124, %f1118, %f1110;
|
|
sub.f32 %f1125, %f1110, %f1124;
|
|
add.f32 %f1126, %f1118, %f1125;
|
|
add.f32 %f1127, %f1123, %f1126;
|
|
add.f32 %f1128, %f1124, %f1127;
|
|
sub.f32 %f1129, %f1124, %f1128;
|
|
add.f32 %f1130, %f1127, %f1129;
|
|
mov.f32 %f1131, 0f3F317200;
|
|
mul.rn.f32 %f1132, %f1107, %f1131;
|
|
mov.f32 %f1133, 0f35BFBE8E;
|
|
mul.rn.f32 %f1134, %f1107, %f1133;
|
|
add.f32 %f1135, %f1132, %f1128;
|
|
sub.f32 %f1136, %f1132, %f1135;
|
|
add.f32 %f1137, %f1128, %f1136;
|
|
add.f32 %f1138, %f1130, %f1137;
|
|
add.f32 %f1139, %f1134, %f1138;
|
|
add.f32 %f1140, %f1135, %f1139;
|
|
sub.f32 %f1141, %f1135, %f1140;
|
|
add.f32 %f1142, %f1139, %f1141;
|
|
mov.f32 %f1143, 0f3EE66666;
|
|
mul.rn.f32 %f1144, %f1143, %f1140;
|
|
neg.f32 %f1145, %f1144;
|
|
fma.rn.f32 %f1146, %f1143, %f1140, %f1145;
|
|
fma.rn.f32 %f1147, %f1143, %f1142, %f1146;
|
|
mov.f32 %f1148, 0f00000000;
|
|
fma.rn.f32 %f1149, %f1148, %f1140, %f1147;
|
|
add.rn.f32 %f1150, %f1144, %f1149;
|
|
neg.f32 %f1151, %f1150;
|
|
add.rn.f32 %f1152, %f1144, %f1151;
|
|
add.rn.f32 %f1153, %f1152, %f1149;
|
|
mov.b32 %r153, %f1150;
|
|
setp.eq.s32 %p104, %r153, 1118925336;
|
|
add.s32 %r154, %r153, -1;
|
|
mov.b32 %f1154, %r154;
|
|
add.f32 %f1155, %f1153, 0f37000000;
|
|
selp.f32 %f1156, %f1154, %f1150, %p104;
|
|
selp.f32 %f235, %f1155, %f1153, %p104;
|
|
mul.f32 %f1157, %f1156, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1158, %f1157;
|
|
mov.f32 %f1159, 0fBF317200;
|
|
fma.rn.f32 %f1160, %f1158, %f1159, %f1156;
|
|
mov.f32 %f1161, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1162, %f1158, %f1161, %f1160;
|
|
mul.f32 %f1163, %f1162, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1164, %f1163;
|
|
add.f32 %f1165, %f1158, 0f00000000;
|
|
ex2.approx.f32 %f1166, %f1165;
|
|
mul.f32 %f1167, %f1164, %f1166;
|
|
setp.lt.f32 %p105, %f1156, 0fC2D20000;
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|
selp.f32 %f1168, 0f00000000, %f1167, %p105;
|
|
setp.gt.f32 %p106, %f1156, 0f42D20000;
|
|
selp.f32 %f1531, 0f7F800000, %f1168, %p106;
|
|
setp.eq.f32 %p107, %f1531, 0f7F800000;
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|
@%p107 bra BB0_73;
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|
|
|
fma.rn.f32 %f1531, %f1531, %f235, %f1531;
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|
|
|
BB0_73:
|
|
setp.lt.f32 %p108, %f1463, 0f00000000;
|
|
setp.eq.f32 %p109, %f233, 0f3F800000;
|
|
and.pred %p6, %p108, %p109;
|
|
mov.b32 %r155, %f1531;
|
|
xor.b32 %r156, %r155, -2147483648;
|
|
mov.b32 %f1169, %r156;
|
|
selp.f32 %f1533, %f1169, %f1531, %p6;
|
|
setp.eq.f32 %p110, %f1463, 0f00000000;
|
|
@%p110 bra BB0_76;
|
|
bra.uni BB0_74;
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|
|
|
BB0_76:
|
|
add.f32 %f1172, %f1463, %f1463;
|
|
selp.f32 %f1533, %f1172, 0f00000000, %p109;
|
|
bra.uni BB0_77;
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|
|
|
BB0_74:
|
|
setp.geu.f32 %p111, %f1463, 0f00000000;
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|
@%p111 bra BB0_77;
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|
|
|
cvt.rzi.f32.f32 %f1171, %f1143;
|
|
setp.neu.f32 %p112, %f1171, 0f3EE66666;
|
|
selp.f32 %f1533, 0f7FFFFFFF, %f1533, %p112;
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|
|
|
BB0_77:
|
|
add.f32 %f1173, %f234, 0f3EE66666;
|
|
mov.b32 %r157, %f1173;
|
|
setp.lt.s32 %p114, %r157, 2139095040;
|
|
@%p114 bra BB0_82;
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|
|
|
setp.gtu.f32 %p115, %f234, 0f7F800000;
|
|
@%p115 bra BB0_81;
|
|
bra.uni BB0_79;
|
|
|
|
BB0_81:
|
|
add.f32 %f1533, %f1463, 0f3EE66666;
|
|
bra.uni BB0_82;
|
|
|
|
BB0_79:
|
|
setp.neu.f32 %p116, %f234, 0f7F800000;
|
|
@%p116 bra BB0_82;
|
|
|
|
selp.f32 %f1533, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_82:
|
|
setp.eq.f32 %p117, %f1463, 0f3F800000;
|
|
selp.f32 %f246, 0f3F800000, %f1533, %p117;
|
|
abs.f32 %f247, %f1462;
|
|
setp.lt.f32 %p118, %f247, 0f00800000;
|
|
mul.f32 %f1176, %f247, 0f4B800000;
|
|
selp.f32 %f1177, 0fC3170000, 0fC2FE0000, %p118;
|
|
selp.f32 %f1178, %f1176, %f247, %p118;
|
|
mov.b32 %r158, %f1178;
|
|
and.b32 %r159, %r158, 8388607;
|
|
or.b32 %r160, %r159, 1065353216;
|
|
mov.b32 %f1179, %r160;
|
|
shr.u32 %r161, %r158, 23;
|
|
cvt.rn.f32.u32 %f1180, %r161;
|
|
add.f32 %f1181, %f1177, %f1180;
|
|
setp.gt.f32 %p119, %f1179, 0f3FB504F3;
|
|
mul.f32 %f1182, %f1179, 0f3F000000;
|
|
add.f32 %f1183, %f1181, 0f3F800000;
|
|
selp.f32 %f1184, %f1182, %f1179, %p119;
|
|
selp.f32 %f1185, %f1183, %f1181, %p119;
|
|
add.f32 %f1186, %f1184, 0fBF800000;
|
|
add.f32 %f1175, %f1184, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1174,%f1175;
|
|
// inline asm
|
|
add.f32 %f1187, %f1186, %f1186;
|
|
mul.f32 %f1188, %f1174, %f1187;
|
|
mul.f32 %f1189, %f1188, %f1188;
|
|
fma.rn.f32 %f1192, %f1113, %f1189, %f1112;
|
|
fma.rn.f32 %f1194, %f1192, %f1189, %f1115;
|
|
mul.rn.f32 %f1195, %f1194, %f1189;
|
|
mul.rn.f32 %f1196, %f1195, %f1188;
|
|
sub.f32 %f1197, %f1186, %f1188;
|
|
neg.f32 %f1198, %f1188;
|
|
add.f32 %f1199, %f1197, %f1197;
|
|
fma.rn.f32 %f1200, %f1198, %f1186, %f1199;
|
|
mul.rn.f32 %f1201, %f1174, %f1200;
|
|
add.f32 %f1202, %f1196, %f1188;
|
|
sub.f32 %f1203, %f1188, %f1202;
|
|
add.f32 %f1204, %f1196, %f1203;
|
|
add.f32 %f1205, %f1201, %f1204;
|
|
add.f32 %f1206, %f1202, %f1205;
|
|
sub.f32 %f1207, %f1202, %f1206;
|
|
add.f32 %f1208, %f1205, %f1207;
|
|
mul.rn.f32 %f1210, %f1185, %f1131;
|
|
mul.rn.f32 %f1212, %f1185, %f1133;
|
|
add.f32 %f1213, %f1210, %f1206;
|
|
sub.f32 %f1214, %f1210, %f1213;
|
|
add.f32 %f1215, %f1206, %f1214;
|
|
add.f32 %f1216, %f1208, %f1215;
|
|
add.f32 %f1217, %f1212, %f1216;
|
|
add.f32 %f1218, %f1213, %f1217;
|
|
sub.f32 %f1219, %f1213, %f1218;
|
|
add.f32 %f1220, %f1217, %f1219;
|
|
mul.rn.f32 %f1222, %f1143, %f1218;
|
|
neg.f32 %f1223, %f1222;
|
|
fma.rn.f32 %f1224, %f1143, %f1218, %f1223;
|
|
fma.rn.f32 %f1225, %f1143, %f1220, %f1224;
|
|
fma.rn.f32 %f1227, %f1148, %f1218, %f1225;
|
|
add.rn.f32 %f1228, %f1222, %f1227;
|
|
neg.f32 %f1229, %f1228;
|
|
add.rn.f32 %f1230, %f1222, %f1229;
|
|
add.rn.f32 %f1231, %f1230, %f1227;
|
|
mov.b32 %r162, %f1228;
|
|
setp.eq.s32 %p120, %r162, 1118925336;
|
|
add.s32 %r163, %r162, -1;
|
|
mov.b32 %f1232, %r163;
|
|
add.f32 %f1233, %f1231, 0f37000000;
|
|
selp.f32 %f1234, %f1232, %f1228, %p120;
|
|
selp.f32 %f248, %f1233, %f1231, %p120;
|
|
mul.f32 %f1235, %f1234, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1236, %f1235;
|
|
fma.rn.f32 %f1238, %f1236, %f1159, %f1234;
|
|
fma.rn.f32 %f1240, %f1236, %f1161, %f1238;
|
|
mul.f32 %f1241, %f1240, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1242, %f1241;
|
|
add.f32 %f1243, %f1236, 0f00000000;
|
|
ex2.approx.f32 %f1244, %f1243;
|
|
mul.f32 %f1245, %f1242, %f1244;
|
|
setp.lt.f32 %p121, %f1234, 0fC2D20000;
|
|
selp.f32 %f1246, 0f00000000, %f1245, %p121;
|
|
setp.gt.f32 %p122, %f1234, 0f42D20000;
|
|
selp.f32 %f1534, 0f7F800000, %f1246, %p122;
|
|
setp.eq.f32 %p123, %f1534, 0f7F800000;
|
|
@%p123 bra BB0_84;
|
|
|
|
fma.rn.f32 %f1534, %f1534, %f248, %f1534;
|
|
|
|
BB0_84:
|
|
setp.lt.f32 %p124, %f1462, 0f00000000;
|
|
and.pred %p7, %p124, %p109;
|
|
mov.b32 %r164, %f1534;
|
|
xor.b32 %r165, %r164, -2147483648;
|
|
mov.b32 %f1247, %r165;
|
|
selp.f32 %f1536, %f1247, %f1534, %p7;
|
|
setp.eq.f32 %p126, %f1462, 0f00000000;
|
|
@%p126 bra BB0_87;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_87:
|
|
add.f32 %f1250, %f1462, %f1462;
|
|
selp.f32 %f1536, %f1250, 0f00000000, %p109;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_85:
|
|
setp.geu.f32 %p127, %f1462, 0f00000000;
|
|
@%p127 bra BB0_88;
|
|
|
|
cvt.rzi.f32.f32 %f1249, %f1143;
|
|
setp.neu.f32 %p128, %f1249, 0f3EE66666;
|
|
selp.f32 %f1536, 0f7FFFFFFF, %f1536, %p128;
|
|
|
|
BB0_88:
|
|
add.f32 %f1251, %f247, 0f3EE66666;
|
|
mov.b32 %r166, %f1251;
|
|
setp.lt.s32 %p130, %r166, 2139095040;
|
|
@%p130 bra BB0_93;
|
|
|
|
setp.gtu.f32 %p131, %f247, 0f7F800000;
|
|
@%p131 bra BB0_92;
|
|
bra.uni BB0_90;
|
|
|
|
BB0_92:
|
|
add.f32 %f1536, %f1462, 0f3EE66666;
|
|
bra.uni BB0_93;
|
|
|
|
BB0_90:
|
|
setp.neu.f32 %p132, %f247, 0f7F800000;
|
|
@%p132 bra BB0_93;
|
|
|
|
selp.f32 %f1536, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_93:
|
|
setp.eq.f32 %p133, %f1462, 0f3F800000;
|
|
selp.f32 %f259, 0f3F800000, %f1536, %p133;
|
|
abs.f32 %f260, %f1461;
|
|
setp.lt.f32 %p134, %f260, 0f00800000;
|
|
mul.f32 %f1254, %f260, 0f4B800000;
|
|
selp.f32 %f1255, 0fC3170000, 0fC2FE0000, %p134;
|
|
selp.f32 %f1256, %f1254, %f260, %p134;
|
|
mov.b32 %r167, %f1256;
|
|
and.b32 %r168, %r167, 8388607;
|
|
or.b32 %r169, %r168, 1065353216;
|
|
mov.b32 %f1257, %r169;
|
|
shr.u32 %r170, %r167, 23;
|
|
cvt.rn.f32.u32 %f1258, %r170;
|
|
add.f32 %f1259, %f1255, %f1258;
|
|
setp.gt.f32 %p135, %f1257, 0f3FB504F3;
|
|
mul.f32 %f1260, %f1257, 0f3F000000;
|
|
add.f32 %f1261, %f1259, 0f3F800000;
|
|
selp.f32 %f1262, %f1260, %f1257, %p135;
|
|
selp.f32 %f1263, %f1261, %f1259, %p135;
|
|
add.f32 %f1264, %f1262, 0fBF800000;
|
|
add.f32 %f1253, %f1262, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1252,%f1253;
|
|
// inline asm
|
|
add.f32 %f1265, %f1264, %f1264;
|
|
mul.f32 %f1266, %f1252, %f1265;
|
|
mul.f32 %f1267, %f1266, %f1266;
|
|
fma.rn.f32 %f1270, %f1113, %f1267, %f1112;
|
|
fma.rn.f32 %f1272, %f1270, %f1267, %f1115;
|
|
mul.rn.f32 %f1273, %f1272, %f1267;
|
|
mul.rn.f32 %f1274, %f1273, %f1266;
|
|
sub.f32 %f1275, %f1264, %f1266;
|
|
neg.f32 %f1276, %f1266;
|
|
add.f32 %f1277, %f1275, %f1275;
|
|
fma.rn.f32 %f1278, %f1276, %f1264, %f1277;
|
|
mul.rn.f32 %f1279, %f1252, %f1278;
|
|
add.f32 %f1280, %f1274, %f1266;
|
|
sub.f32 %f1281, %f1266, %f1280;
|
|
add.f32 %f1282, %f1274, %f1281;
|
|
add.f32 %f1283, %f1279, %f1282;
|
|
add.f32 %f1284, %f1280, %f1283;
|
|
sub.f32 %f1285, %f1280, %f1284;
|
|
add.f32 %f1286, %f1283, %f1285;
|
|
mul.rn.f32 %f1288, %f1263, %f1131;
|
|
mul.rn.f32 %f1290, %f1263, %f1133;
|
|
add.f32 %f1291, %f1288, %f1284;
|
|
sub.f32 %f1292, %f1288, %f1291;
|
|
add.f32 %f1293, %f1284, %f1292;
|
|
add.f32 %f1294, %f1286, %f1293;
|
|
add.f32 %f1295, %f1290, %f1294;
|
|
add.f32 %f1296, %f1291, %f1295;
|
|
sub.f32 %f1297, %f1291, %f1296;
|
|
add.f32 %f1298, %f1295, %f1297;
|
|
mul.rn.f32 %f1300, %f1143, %f1296;
|
|
neg.f32 %f1301, %f1300;
|
|
fma.rn.f32 %f1302, %f1143, %f1296, %f1301;
|
|
fma.rn.f32 %f1303, %f1143, %f1298, %f1302;
|
|
fma.rn.f32 %f1305, %f1148, %f1296, %f1303;
|
|
add.rn.f32 %f1306, %f1300, %f1305;
|
|
neg.f32 %f1307, %f1306;
|
|
add.rn.f32 %f1308, %f1300, %f1307;
|
|
add.rn.f32 %f1309, %f1308, %f1305;
|
|
mov.b32 %r171, %f1306;
|
|
setp.eq.s32 %p136, %r171, 1118925336;
|
|
add.s32 %r172, %r171, -1;
|
|
mov.b32 %f1310, %r172;
|
|
add.f32 %f1311, %f1309, 0f37000000;
|
|
selp.f32 %f1312, %f1310, %f1306, %p136;
|
|
selp.f32 %f261, %f1311, %f1309, %p136;
|
|
mul.f32 %f1313, %f1312, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1314, %f1313;
|
|
fma.rn.f32 %f1316, %f1314, %f1159, %f1312;
|
|
fma.rn.f32 %f1318, %f1314, %f1161, %f1316;
|
|
mul.f32 %f1319, %f1318, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1320, %f1319;
|
|
add.f32 %f1321, %f1314, 0f00000000;
|
|
ex2.approx.f32 %f1322, %f1321;
|
|
mul.f32 %f1323, %f1320, %f1322;
|
|
setp.lt.f32 %p137, %f1312, 0fC2D20000;
|
|
selp.f32 %f1324, 0f00000000, %f1323, %p137;
|
|
setp.gt.f32 %p138, %f1312, 0f42D20000;
|
|
selp.f32 %f1537, 0f7F800000, %f1324, %p138;
|
|
setp.eq.f32 %p139, %f1537, 0f7F800000;
|
|
@%p139 bra BB0_95;
|
|
|
|
fma.rn.f32 %f1537, %f1537, %f261, %f1537;
|
|
|
|
BB0_95:
|
|
setp.lt.f32 %p140, %f1461, 0f00000000;
|
|
and.pred %p8, %p140, %p109;
|
|
mov.b32 %r173, %f1537;
|
|
xor.b32 %r174, %r173, -2147483648;
|
|
mov.b32 %f1325, %r174;
|
|
selp.f32 %f1539, %f1325, %f1537, %p8;
|
|
setp.eq.f32 %p142, %f1461, 0f00000000;
|
|
@%p142 bra BB0_98;
|
|
bra.uni BB0_96;
|
|
|
|
BB0_98:
|
|
add.f32 %f1328, %f1461, %f1461;
|
|
selp.f32 %f1539, %f1328, 0f00000000, %p109;
|
|
bra.uni BB0_99;
|
|
|
|
BB0_96:
|
|
setp.geu.f32 %p143, %f1461, 0f00000000;
|
|
@%p143 bra BB0_99;
|
|
|
|
cvt.rzi.f32.f32 %f1327, %f1143;
|
|
setp.neu.f32 %p144, %f1327, 0f3EE66666;
|
|
selp.f32 %f1539, 0f7FFFFFFF, %f1539, %p144;
|
|
|
|
BB0_99:
|
|
add.f32 %f1329, %f260, 0f3EE66666;
|
|
mov.b32 %r175, %f1329;
|
|
setp.lt.s32 %p146, %r175, 2139095040;
|
|
@%p146 bra BB0_104;
|
|
|
|
setp.gtu.f32 %p147, %f260, 0f7F800000;
|
|
@%p147 bra BB0_103;
|
|
bra.uni BB0_101;
|
|
|
|
BB0_103:
|
|
add.f32 %f1539, %f1461, 0f3EE66666;
|
|
bra.uni BB0_104;
|
|
|
|
BB0_101:
|
|
setp.neu.f32 %p148, %f260, 0f7F800000;
|
|
@%p148 bra BB0_104;
|
|
|
|
selp.f32 %f1539, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
BB0_104:
|
|
setp.eq.f32 %p149, %f1461, 0f3F800000;
|
|
selp.f32 %f1330, 0f3F800000, %f1539, %p149;
|
|
cvt.u64.u32 %rd53, %r3;
|
|
cvt.u64.u32 %rd52, %r2;
|
|
mov.u64 %rd56, image;
|
|
cvta.global.u64 %rd51, %rd56;
|
|
// inline asm
|
|
call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1331, %f1330;
|
|
mul.f32 %f1332, %f1331, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r178, %f1332;
|
|
cvt.sat.f32.f32 %f1333, %f259;
|
|
mul.f32 %f1334, %f1333, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r179, %f1334;
|
|
cvt.sat.f32.f32 %f1335, %f246;
|
|
mul.f32 %f1336, %f1335, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r180, %f1336;
|
|
cvt.u16.u32 %rs19, %r178;
|
|
cvt.u16.u32 %rs20, %r180;
|
|
cvt.u16.u32 %rs21, %r179;
|
|
mov.u16 %rs22, 255;
|
|
st.v4.u8 [%rd50], {%rs19, %rs21, %rs20, %rs22};
|
|
ld.global.u32 %r266, [imageEnabled];
|
|
|
|
BB0_105:
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
and.b32 %r181, %r266, 4;
|
|
setp.eq.s32 %p150, %r181, 0;
|
|
@%p150 bra BB0_109;
|
|
|
|
ld.global.u32 %r182, [additive];
|
|
setp.eq.s32 %p151, %r182, 0;
|
|
mov.f32 %f1337, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f1337;}
|
|
|
|
// inline asm
|
|
@%p151 bra BB0_108;
|
|
|
|
mov.u64 %rd69, image_HDR;
|
|
cvta.global.u64 %rd58, %rd69;
|
|
mov.u32 %r186, 8;
|
|
// inline asm
|
|
call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r186, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd57];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1338, %rs30;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1339, %rs31;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1340, %rs32;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r186, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1341, %f1463, %f1338;
|
|
add.f32 %f1342, %f1462, %f1339;
|
|
add.f32 %f1343, %f1461, %f1340;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1343;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1342;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1341;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd63], {%rs27, %rs28, %rs29, %rs23};
|
|
bra.uni BB0_109;
|
|
|
|
BB0_108:
|
|
mov.u64 %rd76, image_HDR;
|
|
cvta.global.u64 %rd71, %rd76;
|
|
mov.u32 %r188, 8;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r188, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1461;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f1462;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f1463;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd70], {%rs34, %rs35, %rs36, %rs23};
|
|
|
|
BB0_109:
|
|
mov.f32 %f1348, 0f34000000;
|
|
max.f32 %f1349, %f1460, %f1348;
|
|
div.rn.f32 %f1350, %f1457, %f1349;
|
|
max.f32 %f1351, %f1459, %f1348;
|
|
div.rn.f32 %f1352, %f1456, %f1351;
|
|
max.f32 %f1353, %f1458, %f1348;
|
|
div.rn.f32 %f1354, %f1455, %f1353;
|
|
fma.rn.f32 %f272, %f1350, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f273, %f1352, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f274, %f1354, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1355, %f1454, %f1349;
|
|
div.rn.f32 %f1356, %f1453, %f1351;
|
|
div.rn.f32 %f1357, %f1452, %f1353;
|
|
fma.rn.f32 %f275, %f1355, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f276, %f1356, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f277, %f1357, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1358, %f1451, %f1349;
|
|
div.rn.f32 %f1359, %f1450, %f1351;
|
|
div.rn.f32 %f1360, %f1449, %f1353;
|
|
fma.rn.f32 %f278, %f1358, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f279, %f1359, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f280, %f1360, 0f3F000000, 0f3F000000;
|
|
ld.global.u32 %r189, [additive];
|
|
setp.eq.s32 %p152, %r189, 0;
|
|
mov.f32 %f1347, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f1347;}
|
|
|
|
// inline asm
|
|
@%p152 bra BB0_111;
|
|
|
|
mov.u64 %rd89, image_RNM0;
|
|
cvta.global.u64 %rd78, %rd89;
|
|
mov.u32 %r193, 8;
|
|
// inline asm
|
|
call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r193, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs44, %rs45, %rs46, %rs47}, [%rd77];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1361, %rs44;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1362, %rs45;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1363, %rs46;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r193, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1364, %f1460, %f1361;
|
|
add.f32 %f1365, %f1459, %f1362;
|
|
add.f32 %f1366, %f1458, %f1363;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f1366;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f1365;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f1364;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd83], {%rs41, %rs42, %rs43, %rs37};
|
|
bra.uni BB0_112;
|
|
|
|
BB0_111:
|
|
mov.u64 %rd96, image_RNM0;
|
|
cvta.global.u64 %rd91, %rd96;
|
|
mov.u32 %r195, 8;
|
|
// inline asm
|
|
call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r195, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f1458;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1459;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f1460;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd90], {%rs48, %rs49, %rs50, %rs37};
|
|
|
|
BB0_112:
|
|
ld.global.u32 %r196, [additive];
|
|
setp.eq.s32 %p153, %r196, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1347;}
|
|
|
|
// inline asm
|
|
@%p153 bra BB0_114;
|
|
|
|
mov.u64 %rd109, image_RNM1;
|
|
cvta.global.u64 %rd98, %rd109;
|
|
mov.u32 %r200, 8;
|
|
// inline asm
|
|
call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r200, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd97];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1371, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1372, %rs59;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1373, %rs60;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r200, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1374, %f272, %f1371;
|
|
add.f32 %f1375, %f273, %f1372;
|
|
add.f32 %f1376, %f274, %f1373;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1376;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1375;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1374;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd103], {%rs55, %rs56, %rs57, %rs51};
|
|
bra.uni BB0_115;
|
|
|
|
BB0_114:
|
|
mov.u64 %rd116, image_RNM1;
|
|
cvta.global.u64 %rd111, %rd116;
|
|
mov.u32 %r202, 8;
|
|
// inline asm
|
|
call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r202, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f274;}
|
|
|
|
// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs63, %f273;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs62, %f272;}
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|
|
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// inline asm
|
|
st.v4.u16 [%rd110], {%rs62, %rs63, %rs64, %rs51};
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|
|
|
BB0_115:
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|
ld.global.u32 %r203, [additive];
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setp.eq.s32 %p154, %r203, 0;
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// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f1347;}
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|
|
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// inline asm
|
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@%p154 bra BB0_117;
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|
|
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mov.u64 %rd129, image_RNM2;
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|
cvta.global.u64 %rd118, %rd129;
|
|
mov.u32 %r207, 8;
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// inline asm
|
|
call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r207, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd117];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1381, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1382, %rs73;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1383, %rs74;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r207, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1384, %f275, %f1381;
|
|
add.f32 %f1385, %f276, %f1382;
|
|
add.f32 %f1386, %f277, %f1383;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1386;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f1385;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1384;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd123], {%rs69, %rs70, %rs71, %rs65};
|
|
bra.uni BB0_118;
|
|
|
|
BB0_117:
|
|
mov.u64 %rd136, image_RNM2;
|
|
cvta.global.u64 %rd131, %rd136;
|
|
mov.u32 %r209, 8;
|
|
// inline asm
|
|
call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r209, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f277;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f276;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f275;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd130], {%rs76, %rs77, %rs78, %rs65};
|
|
|
|
BB0_118:
|
|
ld.global.u32 %r210, [additive];
|
|
setp.eq.s32 %p155, %r210, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f1347;}
|
|
|
|
// inline asm
|
|
@%p155 bra BB0_120;
|
|
|
|
mov.u64 %rd149, image_RNM3;
|
|
cvta.global.u64 %rd138, %rd149;
|
|
mov.u32 %r214, 8;
|
|
// inline asm
|
|
call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r214, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs86, %rs87, %rs88, %rs89}, [%rd137];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1391, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1392, %rs87;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1393, %rs88;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r214, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1394, %f278, %f1391;
|
|
add.f32 %f1395, %f279, %f1392;
|
|
add.f32 %f1396, %f280, %f1393;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f1396;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f1395;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f1394;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd143], {%rs83, %rs84, %rs85, %rs79};
|
|
bra.uni BB0_141;
|
|
|
|
BB0_120:
|
|
mov.u64 %rd156, image_RNM3;
|
|
cvta.global.u64 %rd151, %rd156;
|
|
mov.u32 %r216, 8;
|
|
// inline asm
|
|
call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r216, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f280;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f279;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f278;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd150], {%rs90, %rs91, %rs92, %rs79};
|
|
|
|
BB0_141:
|
|
ret;
|
|
}
|
|
|
|
|