ArabDesert/Assets/Editor/x64/Bakery/lmSSS.ptx

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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//
.version 6.1
.target sm_30
.address_size 64
// .globl _Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .align 4 .u32 samples;
.global .align 4 .u32 addToPrev;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9addToPrevE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename9addToPrevE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9addToPrevE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic9addToPrevE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9addToPrevE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry _Z6oxMainv(
)
{
.local .align 4 .b8 __local_depot0[40];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<96>;
.reg .b16 %rs<27>;
.reg .f32 %f<636>;
.reg .b32 %r<313>;
.reg .b64 %rd<106>;
mov.u64 %rd105, __local_depot0;
cvta.local.u64 %SP, %rd105;
ld.global.v2.u32 {%r97, %r98}, [pixelID];
cvt.u64.u32 %rd18, %r97;
cvt.u64.u32 %rd19, %r98;
mov.u64 %rd22, uvnormal;
cvta.global.u64 %rd17, %rd22;
mov.u32 %r95, 2;
mov.u32 %r96, 4;
mov.u64 %rd21, 0;
// inline asm
call (%rd16), _rt_buffer_get_64, (%rd17, %r95, %r96, %rd18, %rd19, %rd21, %rd21);
// inline asm
ld.u32 %r1, [%rd16];
shr.u32 %r101, %r1, 16;
cvt.u16.u32 %rs1, %r101;
and.b16 %rs2, %rs1, 255;
cvt.u16.u32 %rs3, %r1;
or.b16 %rs4, %rs3, %rs2;
setp.eq.s16 %p4, %rs4, 0;
mov.f32 %f591, 0f00000000;
mov.f32 %f592, %f591;
mov.f32 %f593, %f591;
@%p4 bra BB0_2;
ld.u8 %rs5, [%rd16+1];
and.b16 %rs7, %rs3, 255;
cvt.rn.f32.u16 %f141, %rs7;
div.rn.f32 %f142, %f141, 0f437F0000;
fma.rn.f32 %f143, %f142, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f144, %rs5;
div.rn.f32 %f145, %f144, 0f437F0000;
fma.rn.f32 %f146, %f145, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f147, %rs2;
div.rn.f32 %f148, %f147, 0f437F0000;
fma.rn.f32 %f149, %f148, 0f40000000, 0fBF800000;
mul.f32 %f150, %f146, %f146;
fma.rn.f32 %f151, %f143, %f143, %f150;
fma.rn.f32 %f152, %f149, %f149, %f151;
sqrt.rn.f32 %f153, %f152;
rcp.rn.f32 %f154, %f153;
mul.f32 %f591, %f143, %f154;
mul.f32 %f592, %f146, %f154;
mul.f32 %f593, %f149, %f154;
BB0_2:
ld.global.v2.u32 {%r102, %r103}, [pixelID];
ld.global.v2.u32 {%r105, %r106}, [tileInfo];
add.s32 %r2, %r102, %r105;
add.s32 %r3, %r103, %r106;
setp.eq.f32 %p5, %f592, 0f00000000;
setp.eq.f32 %p6, %f591, 0f00000000;
and.pred %p7, %p6, %p5;
setp.eq.f32 %p8, %f593, 0f00000000;
and.pred %p9, %p7, %p8;
@%p9 bra BB0_99;
bra.uni BB0_3;
BB0_99:
ld.global.u32 %r312, [imageEnabled];
and.b32 %r270, %r312, 1;
setp.eq.b32 %p94, %r270, 1;
@!%p94 bra BB0_101;
bra.uni BB0_100;
BB0_100:
cvt.u64.u32 %rd86, %r2;
cvt.u64.u32 %rd87, %r3;
mov.u64 %rd90, image;
cvta.global.u64 %rd85, %rd90;
mov.u64 %rd89, 0;
// inline asm
call (%rd84), _rt_buffer_get_64, (%rd85, %r95, %r96, %rd86, %rd87, %rd89, %rd89);
// inline asm
mov.u16 %rs24, 0;
st.v4.u8 [%rd84], {%rs24, %rs24, %rs24, %rs24};
ld.global.u32 %r312, [imageEnabled];
BB0_101:
and.b32 %r273, %r312, 4;
setp.eq.s32 %p95, %r273, 0;
@%p95 bra BB0_103;
cvt.u64.u32 %rd93, %r2;
cvt.u64.u32 %rd94, %r3;
mov.u64 %rd97, image_HDR;
cvta.global.u64 %rd92, %rd97;
mov.u32 %r275, 8;
mov.u64 %rd96, 0;
// inline asm
call (%rd91), _rt_buffer_get_64, (%rd92, %r95, %r275, %rd93, %rd94, %rd96, %rd96);
// inline asm
mov.f32 %f561, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs25, %f561;}
// inline asm
mov.u16 %rs26, 0;
st.v4.u16 [%rd91], {%rs25, %rs25, %rs25, %rs26};
bra.uni BB0_103;
BB0_3:
ld.global.v2.u32 {%r115, %r116}, [pixelID];
cvt.u64.u32 %rd25, %r115;
cvt.u64.u32 %rd26, %r116;
mov.u64 %rd30, uvpos;
cvta.global.u64 %rd24, %rd30;
mov.u32 %r114, 12;
// inline asm
call (%rd23), _rt_buffer_get_64, (%rd24, %r95, %r114, %rd25, %rd26, %rd21, %rd21);
// inline asm
ld.f32 %f163, [%rd23+8];
ld.f32 %f164, [%rd23+4];
ld.f32 %f165, [%rd23];
mul.f32 %f166, %f165, 0f3456BF95;
mul.f32 %f167, %f164, 0f3456BF95;
mul.f32 %f168, %f163, 0f3456BF95;
abs.f32 %f169, %f591;
div.rn.f32 %f170, %f166, %f169;
abs.f32 %f171, %f592;
div.rn.f32 %f172, %f167, %f171;
abs.f32 %f173, %f593;
div.rn.f32 %f174, %f168, %f173;
abs.f32 %f175, %f170;
abs.f32 %f176, %f172;
abs.f32 %f177, %f174;
mov.f32 %f178, 0f38D1B717;
max.f32 %f179, %f175, %f178;
max.f32 %f180, %f176, %f178;
max.f32 %f181, %f177, %f178;
fma.rn.f32 %f594, %f591, %f179, %f165;
fma.rn.f32 %f595, %f592, %f180, %f164;
fma.rn.f32 %f596, %f593, %f181, %f163;
add.u64 %rd29, %SP, 28;
cvta.to.local.u64 %rd31, %rd29;
mov.u32 %r113, 0;
st.local.u32 [%rd31+8], %r113;
st.local.u32 [%rd31+4], %r113;
st.local.u32 [%rd31], %r113;
ld.global.u32 %r112, [root];
neg.f32 %f160, %f593;
neg.f32 %f159, %f592;
neg.f32 %f158, %f591;
mov.f32 %f600, 0f00000000;
mov.f32 %f162, 0f6C4ECB8F;
// inline asm
call _rt_trace_64, (%r112, %f594, %f595, %f596, %f158, %f159, %f160, %r113, %f600, %f162, %rd29, %r114);
// inline asm
ld.local.f32 %f13, [%rd31];
abs.f32 %f14, %f158;
abs.f32 %f15, %f160;
setp.geu.f32 %p10, %f13, 0f00000000;
@%p10 bra BB0_5;
fma.rn.f32 %f182, %f591, %f13, %f594;
fma.rn.f32 %f183, %f592, %f13, %f595;
fma.rn.f32 %f184, %f593, %f13, %f596;
mul.f32 %f185, %f182, 0f3456BF95;
mul.f32 %f186, %f183, 0f3456BF95;
mul.f32 %f187, %f184, 0f3456BF95;
div.rn.f32 %f188, %f185, %f14;
abs.f32 %f189, %f159;
div.rn.f32 %f190, %f186, %f189;
div.rn.f32 %f191, %f187, %f15;
abs.f32 %f192, %f188;
abs.f32 %f193, %f190;
abs.f32 %f194, %f191;
max.f32 %f196, %f192, %f178;
max.f32 %f197, %f193, %f178;
max.f32 %f198, %f194, %f178;
fma.rn.f32 %f594, %f196, %f158, %f182;
fma.rn.f32 %f595, %f197, %f159, %f183;
fma.rn.f32 %f596, %f198, %f160, %f184;
BB0_5:
mov.u32 %r281, 4;
mov.u32 %r280, 2;
setp.gt.f32 %p11, %f14, %f15;
selp.f32 %f202, %f592, 0f00000000, %p11;
selp.f32 %f203, %f158, %f593, %p11;
selp.f32 %f204, 0f00000000, %f159, %p11;
mul.f32 %f205, %f203, %f203;
fma.rn.f32 %f206, %f202, %f202, %f205;
fma.rn.f32 %f207, %f204, %f204, %f206;
sqrt.rn.f32 %f208, %f207;
rcp.rn.f32 %f209, %f208;
mul.f32 %f22, %f202, %f209;
mul.f32 %f23, %f203, %f209;
mul.f32 %f24, %f204, %f209;
ld.global.v2.u32 {%r121, %r122}, [pixelID];
cvt.u64.u32 %rd34, %r121;
cvt.u64.u32 %rd35, %r122;
mov.u64 %rd38, rnd_seeds;
cvta.global.u64 %rd33, %rd38;
// inline asm
call (%rd32), _rt_buffer_get_64, (%rd33, %r280, %r281, %rd34, %rd35, %rd21, %rd21);
// inline asm
ld.global.u32 %r283, [samples];
setp.lt.s32 %p12, %r283, 1;
@%p12 bra BB0_6;
mov.u32 %r284, 0;
cvt.rn.f32.s32 %f213, %r283;
rcp.rn.f32 %f25, %f213;
ld.u32 %r309, [%rd32];
mul.f32 %f26, %f594, 0f3456BF95;
mul.f32 %f27, %f595, 0f3456BF95;
mul.f32 %f28, %f596, 0f3456BF95;
mul.f32 %f214, %f23, %f158;
mul.f32 %f215, %f22, %f159;
sub.f32 %f29, %f215, %f214;
mul.f32 %f216, %f22, %f160;
mul.f32 %f217, %f24, %f158;
sub.f32 %f30, %f217, %f216;
mul.f32 %f218, %f24, %f159;
mul.f32 %f219, %f23, %f160;
sub.f32 %f31, %f219, %f218;
mov.f32 %f600, 0f00000000;
abs.f32 %f220, %f27;
abs.f32 %f221, %f26;
max.f32 %f222, %f221, %f220;
abs.f32 %f223, %f28;
max.f32 %f224, %f222, %f223;
mov.f32 %f601, %f600;
mov.f32 %f602, %f600;
BB0_8:
setp.lt.s32 %p13, %r283, 1;
@%p13 bra BB0_59;
max.f32 %f36, %f224, %f178;
mov.u32 %r286, 0;
BB0_10:
cvt.rn.f32.s32 %f587, %r284;
mad.lo.s32 %r127, %r309, 1664525, 1013904223;
and.b32 %r128, %r127, 16777215;
cvt.rn.f32.u32 %f226, %r128;
fma.rn.f32 %f227, %f226, 0f33800000, %f587;
mul.f32 %f228, %f25, %f227;
mad.lo.s32 %r309, %r127, 1664525, 1013904223;
and.b32 %r129, %r309, 16777215;
cvt.rn.f32.u32 %f229, %r129;
cvt.rn.f32.s32 %f230, %r286;
fma.rn.f32 %f231, %f229, 0f33800000, %f230;
mul.f32 %f232, %f25, %f231;
sqrt.rn.f32 %f40, %f228;
mul.f32 %f609, %f232, 0f40C90FDB;
abs.f32 %f42, %f609;
setp.neu.f32 %p14, %f42, 0f7F800000;
mov.f32 %f603, %f609;
@%p14 bra BB0_12;
mov.f32 %f233, 0f00000000;
mul.rn.f32 %f603, %f609, %f233;
BB0_12:
mul.f32 %f234, %f603, 0f3F22F983;
cvt.rni.s32.f32 %r297, %f234;
cvt.rn.f32.s32 %f235, %r297;
neg.f32 %f236, %f235;
mov.f32 %f237, 0f3FC90FDA;
fma.rn.f32 %f238, %f236, %f237, %f603;
mov.f32 %f239, 0f33A22168;
fma.rn.f32 %f240, %f236, %f239, %f238;
mov.f32 %f241, 0f27C234C5;
fma.rn.f32 %f604, %f236, %f241, %f240;
abs.f32 %f242, %f603;
setp.leu.f32 %p15, %f242, 0f47CE4780;
@%p15 bra BB0_23;
add.u64 %rd40, %SP, 0;
cvta.to.local.u64 %rd3, %rd40;
mov.b32 %r13, %f603;
shr.u32 %r14, %r13, 23;
shl.b32 %r132, %r13, 8;
or.b32 %r15, %r132, -2147483648;
mov.u32 %r288, 0;
mov.u64 %rd102, 0;
mov.u64 %rd101, %rd3;
mov.u32 %r289, %r288;
BB0_14:
.pragma "nounroll";
shl.b64 %rd41, %rd102, 2;
mov.u64 %rd42, __cudart_i2opi_f;
add.s64 %rd43, %rd42, %rd41;
ld.const.u32 %r135, [%rd43];
// inline asm
{
mad.lo.cc.u32 %r133, %r135, %r15, %r289;
madc.hi.u32 %r289, %r135, %r15, 0;
}
// inline asm
st.local.u32 [%rd101], %r133;
add.s32 %r288, %r288, 1;
cvt.s64.s32 %rd102, %r288;
mul.wide.s32 %rd46, %r288, 4;
add.s64 %rd101, %rd3, %rd46;
setp.ne.s32 %p16, %r288, 6;
@%p16 bra BB0_14;
and.b32 %r138, %r14, 255;
add.s32 %r139, %r138, -128;
shr.u32 %r140, %r139, 5;
and.b32 %r20, %r13, -2147483648;
cvta.to.local.u64 %rd48, %rd40;
st.local.u32 [%rd48+24], %r289;
mov.u32 %r141, 6;
sub.s32 %r142, %r141, %r140;
mul.wide.s32 %rd49, %r142, 4;
add.s64 %rd8, %rd48, %rd49;
ld.local.u32 %r290, [%rd8];
ld.local.u32 %r291, [%rd8+-4];
and.b32 %r23, %r14, 31;
setp.eq.s32 %p17, %r23, 0;
@%p17 bra BB0_17;
mov.u32 %r143, 32;
sub.s32 %r144, %r143, %r23;
shr.u32 %r145, %r291, %r144;
shl.b32 %r146, %r290, %r23;
add.s32 %r290, %r145, %r146;
ld.local.u32 %r147, [%rd8+-8];
shr.u32 %r148, %r147, %r144;
shl.b32 %r149, %r291, %r23;
add.s32 %r291, %r148, %r149;
BB0_17:
shr.u32 %r150, %r291, 30;
shl.b32 %r151, %r290, 2;
add.s32 %r292, %r150, %r151;
shl.b32 %r29, %r291, 2;
shr.u32 %r152, %r292, 31;
shr.u32 %r153, %r290, 30;
add.s32 %r30, %r152, %r153;
setp.eq.s32 %p18, %r152, 0;
@%p18 bra BB0_18;
bra.uni BB0_19;
BB0_18:
mov.u32 %r293, %r20;
mov.u32 %r294, %r29;
bra.uni BB0_20;
BB0_19:
not.b32 %r154, %r292;
neg.s32 %r294, %r29;
setp.eq.s32 %p19, %r29, 0;
selp.u32 %r155, 1, 0, %p19;
add.s32 %r292, %r155, %r154;
xor.b32 %r293, %r20, -2147483648;
BB0_20:
clz.b32 %r296, %r292;
setp.eq.s32 %p20, %r296, 0;
shl.b32 %r156, %r292, %r296;
mov.u32 %r157, 32;
sub.s32 %r158, %r157, %r296;
shr.u32 %r159, %r294, %r158;
add.s32 %r160, %r159, %r156;
selp.b32 %r38, %r292, %r160, %p20;
mov.u32 %r161, -921707870;
mul.hi.u32 %r295, %r38, %r161;
setp.eq.s32 %p21, %r20, 0;
neg.s32 %r162, %r30;
selp.b32 %r297, %r30, %r162, %p21;
setp.lt.s32 %p22, %r295, 1;
@%p22 bra BB0_22;
mul.lo.s32 %r163, %r38, -921707870;
shr.u32 %r164, %r163, 31;
shl.b32 %r165, %r295, 1;
add.s32 %r295, %r164, %r165;
add.s32 %r296, %r296, 1;
BB0_22:
mov.u32 %r166, 126;
sub.s32 %r167, %r166, %r296;
shl.b32 %r168, %r167, 23;
add.s32 %r169, %r295, 1;
shr.u32 %r170, %r169, 7;
add.s32 %r171, %r170, 1;
shr.u32 %r172, %r171, 1;
add.s32 %r173, %r172, %r168;
or.b32 %r174, %r173, %r293;
mov.b32 %f604, %r174;
BB0_23:
mul.rn.f32 %f48, %f604, %f604;
add.s32 %r46, %r297, 1;
and.b32 %r47, %r46, 1;
setp.eq.s32 %p23, %r47, 0;
@%p23 bra BB0_25;
bra.uni BB0_24;
BB0_25:
mov.f32 %f245, 0f3C08839E;
mov.f32 %f246, 0fB94CA1F9;
fma.rn.f32 %f605, %f246, %f48, %f245;
bra.uni BB0_26;
BB0_24:
mov.f32 %f243, 0fBAB6061A;
mov.f32 %f244, 0f37CCF5CE;
fma.rn.f32 %f605, %f244, %f48, %f243;
BB0_26:
@%p23 bra BB0_28;
bra.uni BB0_27;
BB0_28:
mov.f32 %f250, 0fBE2AAAA3;
fma.rn.f32 %f251, %f605, %f48, %f250;
mov.f32 %f252, 0f00000000;
fma.rn.f32 %f606, %f251, %f48, %f252;
bra.uni BB0_29;
BB0_27:
mov.f32 %f247, 0f3D2AAAA5;
fma.rn.f32 %f248, %f605, %f48, %f247;
mov.f32 %f249, 0fBF000000;
fma.rn.f32 %f606, %f248, %f48, %f249;
BB0_29:
fma.rn.f32 %f607, %f606, %f604, %f604;
@%p23 bra BB0_31;
mov.f32 %f253, 0f3F800000;
fma.rn.f32 %f607, %f606, %f48, %f253;
BB0_31:
and.b32 %r175, %r46, 2;
setp.eq.s32 %p26, %r175, 0;
@%p26 bra BB0_33;
mov.f32 %f254, 0f00000000;
mov.f32 %f255, 0fBF800000;
fma.rn.f32 %f607, %f607, %f255, %f254;
BB0_33:
@%p14 bra BB0_35;
mov.f32 %f256, 0f00000000;
mul.rn.f32 %f609, %f609, %f256;
BB0_35:
mul.f32 %f257, %f609, 0f3F22F983;
cvt.rni.s32.f32 %r307, %f257;
cvt.rn.f32.s32 %f258, %r307;
neg.f32 %f259, %f258;
fma.rn.f32 %f261, %f259, %f237, %f609;
fma.rn.f32 %f263, %f259, %f239, %f261;
fma.rn.f32 %f610, %f259, %f241, %f263;
abs.f32 %f265, %f609;
setp.leu.f32 %p28, %f265, 0f47CE4780;
@%p28 bra BB0_46;
add.u64 %rd51, %SP, 0;
cvta.to.local.u64 %rd9, %rd51;
mov.b32 %r49, %f609;
shr.u32 %r50, %r49, 23;
shl.b32 %r178, %r49, 8;
or.b32 %r51, %r178, -2147483648;
mov.u32 %r298, 0;
mov.u64 %rd103, %rd9;
mov.u64 %rd104, %rd21;
mov.u32 %r299, %r298;
BB0_37:
.pragma "nounroll";
shl.b64 %rd52, %rd104, 2;
mov.u64 %rd53, __cudart_i2opi_f;
add.s64 %rd54, %rd53, %rd52;
ld.const.u32 %r181, [%rd54];
// inline asm
{
mad.lo.cc.u32 %r179, %r181, %r51, %r299;
madc.hi.u32 %r299, %r181, %r51, 0;
}
// inline asm
st.local.u32 [%rd103], %r179;
add.s32 %r298, %r298, 1;
cvt.s64.s32 %rd104, %r298;
mul.wide.s32 %rd55, %r298, 4;
add.s64 %rd103, %rd9, %rd55;
setp.ne.s32 %p29, %r298, 6;
@%p29 bra BB0_37;
and.b32 %r184, %r50, 255;
add.s32 %r185, %r184, -128;
shr.u32 %r186, %r185, 5;
and.b32 %r56, %r49, -2147483648;
cvta.to.local.u64 %rd57, %rd51;
st.local.u32 [%rd57+24], %r299;
mov.u32 %r187, 6;
sub.s32 %r188, %r187, %r186;
mul.wide.s32 %rd58, %r188, 4;
add.s64 %rd15, %rd57, %rd58;
ld.local.u32 %r300, [%rd15];
ld.local.u32 %r301, [%rd15+-4];
and.b32 %r59, %r50, 31;
setp.eq.s32 %p30, %r59, 0;
@%p30 bra BB0_40;
mov.u32 %r189, 32;
sub.s32 %r190, %r189, %r59;
shr.u32 %r191, %r301, %r190;
shl.b32 %r192, %r300, %r59;
add.s32 %r300, %r191, %r192;
ld.local.u32 %r193, [%rd15+-8];
shr.u32 %r194, %r193, %r190;
shl.b32 %r195, %r301, %r59;
add.s32 %r301, %r194, %r195;
BB0_40:
shr.u32 %r196, %r301, 30;
shl.b32 %r197, %r300, 2;
add.s32 %r302, %r196, %r197;
shl.b32 %r65, %r301, 2;
shr.u32 %r198, %r302, 31;
shr.u32 %r199, %r300, 30;
add.s32 %r66, %r198, %r199;
setp.eq.s32 %p31, %r198, 0;
@%p31 bra BB0_41;
bra.uni BB0_42;
BB0_41:
mov.u32 %r303, %r56;
mov.u32 %r304, %r65;
bra.uni BB0_43;
BB0_42:
not.b32 %r200, %r302;
neg.s32 %r304, %r65;
setp.eq.s32 %p32, %r65, 0;
selp.u32 %r201, 1, 0, %p32;
add.s32 %r302, %r201, %r200;
xor.b32 %r303, %r56, -2147483648;
BB0_43:
clz.b32 %r306, %r302;
setp.eq.s32 %p33, %r306, 0;
shl.b32 %r202, %r302, %r306;
mov.u32 %r203, 32;
sub.s32 %r204, %r203, %r306;
shr.u32 %r205, %r304, %r204;
add.s32 %r206, %r205, %r202;
selp.b32 %r74, %r302, %r206, %p33;
mov.u32 %r207, -921707870;
mul.hi.u32 %r305, %r74, %r207;
setp.eq.s32 %p34, %r56, 0;
neg.s32 %r208, %r66;
selp.b32 %r307, %r66, %r208, %p34;
setp.lt.s32 %p35, %r305, 1;
@%p35 bra BB0_45;
mul.lo.s32 %r209, %r74, -921707870;
shr.u32 %r210, %r209, 31;
shl.b32 %r211, %r305, 1;
add.s32 %r305, %r210, %r211;
add.s32 %r306, %r306, 1;
BB0_45:
mov.u32 %r212, 126;
sub.s32 %r213, %r212, %r306;
shl.b32 %r214, %r213, 23;
add.s32 %r215, %r305, 1;
shr.u32 %r216, %r215, 7;
add.s32 %r217, %r216, 1;
shr.u32 %r218, %r217, 1;
add.s32 %r219, %r218, %r214;
or.b32 %r220, %r219, %r303;
mov.b32 %f610, %r220;
BB0_46:
mul.rn.f32 %f65, %f610, %f610;
and.b32 %r82, %r307, 1;
setp.eq.s32 %p36, %r82, 0;
@%p36 bra BB0_48;
bra.uni BB0_47;
BB0_48:
mov.f32 %f268, 0f3C08839E;
mov.f32 %f269, 0fB94CA1F9;
fma.rn.f32 %f611, %f269, %f65, %f268;
bra.uni BB0_49;
BB0_47:
mov.f32 %f266, 0fBAB6061A;
mov.f32 %f267, 0f37CCF5CE;
fma.rn.f32 %f611, %f267, %f65, %f266;
BB0_49:
@%p36 bra BB0_51;
bra.uni BB0_50;
BB0_51:
mov.f32 %f273, 0fBE2AAAA3;
fma.rn.f32 %f274, %f611, %f65, %f273;
mov.f32 %f275, 0f00000000;
fma.rn.f32 %f612, %f274, %f65, %f275;
bra.uni BB0_52;
BB0_50:
mov.f32 %f270, 0f3D2AAAA5;
fma.rn.f32 %f271, %f611, %f65, %f270;
mov.f32 %f272, 0fBF000000;
fma.rn.f32 %f612, %f271, %f65, %f272;
BB0_52:
fma.rn.f32 %f613, %f612, %f610, %f610;
@%p36 bra BB0_54;
mov.f32 %f276, 0f3F800000;
fma.rn.f32 %f613, %f612, %f65, %f276;
BB0_54:
and.b32 %r221, %r307, 2;
setp.eq.s32 %p39, %r221, 0;
@%p39 bra BB0_56;
mov.f32 %f277, 0f00000000;
mov.f32 %f278, 0fBF800000;
fma.rn.f32 %f613, %f613, %f278, %f277;
BB0_56:
mul.f32 %f287, %f40, %f607;
mul.f32 %f288, %f287, %f287;
mov.f32 %f289, 0f3F800000;
sub.f32 %f290, %f289, %f288;
mul.f32 %f291, %f40, %f613;
mul.f32 %f292, %f291, %f291;
sub.f32 %f293, %f290, %f292;
mov.f32 %f294, 0f00000000;
max.f32 %f295, %f294, %f293;
sqrt.rn.f32 %f296, %f295;
mul.f32 %f297, %f22, %f291;
mul.f32 %f298, %f23, %f291;
mul.f32 %f299, %f24, %f291;
fma.rn.f32 %f300, %f31, %f287, %f297;
fma.rn.f32 %f301, %f30, %f287, %f298;
fma.rn.f32 %f302, %f29, %f287, %f299;
fma.rn.f32 %f282, %f296, %f158, %f300;
fma.rn.f32 %f283, %f296, %f159, %f301;
fma.rn.f32 %f284, %f296, %f160, %f302;
mov.u32 %r225, -1082130432;
st.local.u32 [%rd31+8], %r225;
st.local.u32 [%rd31+4], %r225;
st.local.u32 [%rd31], %r225;
ld.global.u32 %r222, [root];
mov.u32 %r223, 0;
// inline asm
call _rt_trace_64, (%r222, %f594, %f595, %f596, %f282, %f283, %f284, %r223, %f36, %f162, %rd29, %r114);
// inline asm
ld.local.f32 %f77, [%rd31];
setp.lt.f32 %p40, %f77, 0f00000000;
@%p40 bra BB0_58;
add.f32 %f602, %f602, %f77;
ld.local.f32 %f303, [%rd31+4];
add.f32 %f601, %f601, %f303;
ld.local.f32 %f304, [%rd31+8];
add.f32 %f600, %f600, %f304;
BB0_58:
ld.global.u32 %r283, [samples];
add.s32 %r286, %r286, 1;
setp.lt.s32 %p41, %r286, %r283;
@%p41 bra BB0_10;
BB0_59:
add.s32 %r284, %r284, 1;
setp.lt.s32 %p42, %r284, %r283;
@%p42 bra BB0_8;
bra.uni BB0_60;
BB0_6:
mov.f32 %f601, %f600;
mov.f32 %f602, %f600;
BB0_60:
mul.lo.s32 %r226, %r283, %r283;
cvt.rn.f32.s32 %f305, %r226;
rcp.rn.f32 %f306, %f305;
mul.f32 %f90, %f602, %f306;
mul.f32 %f91, %f601, %f306;
mul.f32 %f92, %f600, %f306;
ld.global.u32 %r311, [imageEnabled];
and.b32 %r227, %r311, 1;
setp.eq.b32 %p43, %r227, 1;
@!%p43 bra BB0_95;
bra.uni BB0_61;
BB0_61:
mov.f32 %f309, 0f3E666666;
cvt.rzi.f32.f32 %f310, %f309;
fma.rn.f32 %f311, %f310, 0fC0000000, 0f3EE66666;
abs.f32 %f93, %f311;
abs.f32 %f94, %f90;
setp.lt.f32 %p44, %f94, 0f00800000;
mul.f32 %f312, %f94, 0f4B800000;
selp.f32 %f313, 0fC3170000, 0fC2FE0000, %p44;
selp.f32 %f314, %f312, %f94, %p44;
mov.b32 %r228, %f314;
and.b32 %r229, %r228, 8388607;
or.b32 %r230, %r229, 1065353216;
mov.b32 %f315, %r230;
shr.u32 %r231, %r228, 23;
cvt.rn.f32.u32 %f316, %r231;
add.f32 %f317, %f313, %f316;
setp.gt.f32 %p45, %f315, 0f3FB504F3;
mul.f32 %f318, %f315, 0f3F000000;
add.f32 %f319, %f317, 0f3F800000;
selp.f32 %f320, %f318, %f315, %p45;
selp.f32 %f321, %f319, %f317, %p45;
add.f32 %f322, %f320, 0fBF800000;
add.f32 %f308, %f320, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f307,%f308;
// inline asm
add.f32 %f323, %f322, %f322;
mul.f32 %f324, %f307, %f323;
mul.f32 %f325, %f324, %f324;
mov.f32 %f326, 0f3C4CAF63;
mov.f32 %f327, 0f3B18F0FE;
fma.rn.f32 %f328, %f327, %f325, %f326;
mov.f32 %f329, 0f3DAAAABD;
fma.rn.f32 %f330, %f328, %f325, %f329;
mul.rn.f32 %f331, %f330, %f325;
mul.rn.f32 %f332, %f331, %f324;
sub.f32 %f333, %f322, %f324;
neg.f32 %f334, %f324;
add.f32 %f335, %f333, %f333;
fma.rn.f32 %f336, %f334, %f322, %f335;
mul.rn.f32 %f337, %f307, %f336;
add.f32 %f338, %f332, %f324;
sub.f32 %f339, %f324, %f338;
add.f32 %f340, %f332, %f339;
add.f32 %f341, %f337, %f340;
add.f32 %f342, %f338, %f341;
sub.f32 %f343, %f338, %f342;
add.f32 %f344, %f341, %f343;
mov.f32 %f345, 0f3F317200;
mul.rn.f32 %f346, %f321, %f345;
mov.f32 %f347, 0f35BFBE8E;
mul.rn.f32 %f348, %f321, %f347;
add.f32 %f349, %f346, %f342;
sub.f32 %f350, %f346, %f349;
add.f32 %f351, %f342, %f350;
add.f32 %f352, %f344, %f351;
add.f32 %f353, %f348, %f352;
add.f32 %f354, %f349, %f353;
sub.f32 %f355, %f349, %f354;
add.f32 %f356, %f353, %f355;
mov.f32 %f357, 0f3EE66666;
mul.rn.f32 %f358, %f357, %f354;
neg.f32 %f359, %f358;
fma.rn.f32 %f360, %f357, %f354, %f359;
fma.rn.f32 %f361, %f357, %f356, %f360;
mov.f32 %f362, 0f00000000;
fma.rn.f32 %f363, %f362, %f354, %f361;
add.rn.f32 %f364, %f358, %f363;
neg.f32 %f365, %f364;
add.rn.f32 %f366, %f358, %f365;
add.rn.f32 %f367, %f366, %f363;
mov.b32 %r232, %f364;
setp.eq.s32 %p46, %r232, 1118925336;
add.s32 %r233, %r232, -1;
mov.b32 %f368, %r233;
add.f32 %f369, %f367, 0f37000000;
selp.f32 %f370, %f368, %f364, %p46;
selp.f32 %f95, %f369, %f367, %p46;
mul.f32 %f371, %f370, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f372, %f371;
mov.f32 %f373, 0fBF317200;
fma.rn.f32 %f374, %f372, %f373, %f370;
mov.f32 %f375, 0fB5BFBE8E;
fma.rn.f32 %f376, %f372, %f375, %f374;
mul.f32 %f377, %f376, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f378, %f377;
add.f32 %f379, %f372, 0f00000000;
ex2.approx.f32 %f380, %f379;
mul.f32 %f381, %f378, %f380;
setp.lt.f32 %p47, %f370, 0fC2D20000;
selp.f32 %f382, 0f00000000, %f381, %p47;
setp.gt.f32 %p48, %f370, 0f42D20000;
selp.f32 %f624, 0f7F800000, %f382, %p48;
setp.eq.f32 %p49, %f624, 0f7F800000;
@%p49 bra BB0_63;
fma.rn.f32 %f624, %f624, %f95, %f624;
BB0_63:
setp.lt.f32 %p50, %f90, 0f00000000;
setp.eq.f32 %p51, %f93, 0f3F800000;
and.pred %p1, %p50, %p51;
mov.b32 %r234, %f624;
xor.b32 %r235, %r234, -2147483648;
mov.b32 %f383, %r235;
selp.f32 %f626, %f383, %f624, %p1;
setp.eq.f32 %p52, %f90, 0f00000000;
@%p52 bra BB0_66;
bra.uni BB0_64;
BB0_66:
add.f32 %f386, %f90, %f90;
selp.f32 %f626, %f386, 0f00000000, %p51;
bra.uni BB0_67;
BB0_64:
setp.geu.f32 %p53, %f90, 0f00000000;
@%p53 bra BB0_67;
cvt.rzi.f32.f32 %f385, %f357;
setp.neu.f32 %p54, %f385, 0f3EE66666;
selp.f32 %f626, 0f7FFFFFFF, %f626, %p54;
BB0_67:
abs.f32 %f562, %f90;
add.f32 %f387, %f562, 0f3EE66666;
mov.b32 %r236, %f387;
setp.lt.s32 %p56, %r236, 2139095040;
@%p56 bra BB0_72;
abs.f32 %f579, %f90;
setp.gtu.f32 %p57, %f579, 0f7F800000;
@%p57 bra BB0_71;
bra.uni BB0_69;
BB0_71:
add.f32 %f626, %f90, 0f3EE66666;
bra.uni BB0_72;
BB0_69:
abs.f32 %f580, %f90;
setp.neu.f32 %p58, %f580, 0f7F800000;
@%p58 bra BB0_72;
selp.f32 %f626, 0fFF800000, 0f7F800000, %p1;
BB0_72:
mov.f32 %f570, 0fB5BFBE8E;
mov.f32 %f569, 0fBF317200;
mov.f32 %f568, 0f00000000;
mov.f32 %f567, 0f35BFBE8E;
mov.f32 %f566, 0f3F317200;
mov.f32 %f565, 0f3DAAAABD;
mov.f32 %f564, 0f3C4CAF63;
mov.f32 %f563, 0f3B18F0FE;
setp.eq.f32 %p59, %f90, 0f3F800000;
selp.f32 %f106, 0f3F800000, %f626, %p59;
abs.f32 %f107, %f91;
setp.lt.f32 %p60, %f107, 0f00800000;
mul.f32 %f390, %f107, 0f4B800000;
selp.f32 %f391, 0fC3170000, 0fC2FE0000, %p60;
selp.f32 %f392, %f390, %f107, %p60;
mov.b32 %r237, %f392;
and.b32 %r238, %r237, 8388607;
or.b32 %r239, %r238, 1065353216;
mov.b32 %f393, %r239;
shr.u32 %r240, %r237, 23;
cvt.rn.f32.u32 %f394, %r240;
add.f32 %f395, %f391, %f394;
setp.gt.f32 %p61, %f393, 0f3FB504F3;
mul.f32 %f396, %f393, 0f3F000000;
add.f32 %f397, %f395, 0f3F800000;
selp.f32 %f398, %f396, %f393, %p61;
selp.f32 %f399, %f397, %f395, %p61;
add.f32 %f400, %f398, 0fBF800000;
add.f32 %f389, %f398, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f388,%f389;
// inline asm
add.f32 %f401, %f400, %f400;
mul.f32 %f402, %f388, %f401;
mul.f32 %f403, %f402, %f402;
fma.rn.f32 %f406, %f563, %f403, %f564;
fma.rn.f32 %f408, %f406, %f403, %f565;
mul.rn.f32 %f409, %f408, %f403;
mul.rn.f32 %f410, %f409, %f402;
sub.f32 %f411, %f400, %f402;
neg.f32 %f412, %f402;
add.f32 %f413, %f411, %f411;
fma.rn.f32 %f414, %f412, %f400, %f413;
mul.rn.f32 %f415, %f388, %f414;
add.f32 %f416, %f410, %f402;
sub.f32 %f417, %f402, %f416;
add.f32 %f418, %f410, %f417;
add.f32 %f419, %f415, %f418;
add.f32 %f420, %f416, %f419;
sub.f32 %f421, %f416, %f420;
add.f32 %f422, %f419, %f421;
mul.rn.f32 %f424, %f399, %f566;
mul.rn.f32 %f426, %f399, %f567;
add.f32 %f427, %f424, %f420;
sub.f32 %f428, %f424, %f427;
add.f32 %f429, %f420, %f428;
add.f32 %f430, %f422, %f429;
add.f32 %f431, %f426, %f430;
add.f32 %f432, %f427, %f431;
sub.f32 %f433, %f427, %f432;
add.f32 %f434, %f431, %f433;
mul.rn.f32 %f436, %f357, %f432;
neg.f32 %f437, %f436;
fma.rn.f32 %f438, %f357, %f432, %f437;
fma.rn.f32 %f439, %f357, %f434, %f438;
fma.rn.f32 %f441, %f568, %f432, %f439;
add.rn.f32 %f442, %f436, %f441;
neg.f32 %f443, %f442;
add.rn.f32 %f444, %f436, %f443;
add.rn.f32 %f445, %f444, %f441;
mov.b32 %r241, %f442;
setp.eq.s32 %p62, %r241, 1118925336;
add.s32 %r242, %r241, -1;
mov.b32 %f446, %r242;
add.f32 %f447, %f445, 0f37000000;
selp.f32 %f448, %f446, %f442, %p62;
selp.f32 %f108, %f447, %f445, %p62;
mul.f32 %f449, %f448, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f450, %f449;
fma.rn.f32 %f452, %f450, %f569, %f448;
fma.rn.f32 %f454, %f450, %f570, %f452;
mul.f32 %f455, %f454, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f456, %f455;
add.f32 %f457, %f450, 0f00000000;
ex2.approx.f32 %f458, %f457;
mul.f32 %f459, %f456, %f458;
setp.lt.f32 %p63, %f448, 0fC2D20000;
selp.f32 %f460, 0f00000000, %f459, %p63;
setp.gt.f32 %p64, %f448, 0f42D20000;
selp.f32 %f627, 0f7F800000, %f460, %p64;
setp.eq.f32 %p65, %f627, 0f7F800000;
@%p65 bra BB0_74;
fma.rn.f32 %f627, %f627, %f108, %f627;
BB0_74:
setp.lt.f32 %p66, %f91, 0f00000000;
and.pred %p2, %p66, %p51;
mov.b32 %r243, %f627;
xor.b32 %r244, %r243, -2147483648;
mov.b32 %f461, %r244;
selp.f32 %f629, %f461, %f627, %p2;
setp.eq.f32 %p68, %f91, 0f00000000;
@%p68 bra BB0_77;
bra.uni BB0_75;
BB0_77:
add.f32 %f464, %f91, %f91;
selp.f32 %f629, %f464, 0f00000000, %p51;
bra.uni BB0_78;
BB0_75:
setp.geu.f32 %p69, %f91, 0f00000000;
@%p69 bra BB0_78;
mov.f32 %f586, 0f3EE66666;
cvt.rzi.f32.f32 %f463, %f586;
setp.neu.f32 %p70, %f463, 0f3EE66666;
selp.f32 %f629, 0f7FFFFFFF, %f629, %p70;
BB0_78:
abs.f32 %f581, %f91;
add.f32 %f465, %f581, 0f3EE66666;
mov.b32 %r245, %f465;
setp.lt.s32 %p72, %r245, 2139095040;
@%p72 bra BB0_83;
abs.f32 %f584, %f91;
setp.gtu.f32 %p73, %f584, 0f7F800000;
@%p73 bra BB0_82;
bra.uni BB0_80;
BB0_82:
add.f32 %f629, %f91, 0f3EE66666;
bra.uni BB0_83;
BB0_80:
abs.f32 %f585, %f91;
setp.neu.f32 %p74, %f585, 0f7F800000;
@%p74 bra BB0_83;
selp.f32 %f629, 0fFF800000, 0f7F800000, %p2;
BB0_83:
mov.f32 %f582, 0f3EE66666;
mov.f32 %f578, 0fB5BFBE8E;
mov.f32 %f577, 0fBF317200;
mov.f32 %f576, 0f00000000;
mov.f32 %f575, 0f35BFBE8E;
mov.f32 %f574, 0f3F317200;
mov.f32 %f573, 0f3DAAAABD;
mov.f32 %f572, 0f3C4CAF63;
mov.f32 %f571, 0f3B18F0FE;
setp.eq.f32 %p75, %f91, 0f3F800000;
selp.f32 %f119, 0f3F800000, %f629, %p75;
abs.f32 %f120, %f92;
setp.lt.f32 %p76, %f120, 0f00800000;
mul.f32 %f468, %f120, 0f4B800000;
selp.f32 %f469, 0fC3170000, 0fC2FE0000, %p76;
selp.f32 %f470, %f468, %f120, %p76;
mov.b32 %r246, %f470;
and.b32 %r247, %r246, 8388607;
or.b32 %r248, %r247, 1065353216;
mov.b32 %f471, %r248;
shr.u32 %r249, %r246, 23;
cvt.rn.f32.u32 %f472, %r249;
add.f32 %f473, %f469, %f472;
setp.gt.f32 %p77, %f471, 0f3FB504F3;
mul.f32 %f474, %f471, 0f3F000000;
add.f32 %f475, %f473, 0f3F800000;
selp.f32 %f476, %f474, %f471, %p77;
selp.f32 %f477, %f475, %f473, %p77;
add.f32 %f478, %f476, 0fBF800000;
add.f32 %f467, %f476, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f466,%f467;
// inline asm
add.f32 %f479, %f478, %f478;
mul.f32 %f480, %f466, %f479;
mul.f32 %f481, %f480, %f480;
fma.rn.f32 %f484, %f571, %f481, %f572;
fma.rn.f32 %f486, %f484, %f481, %f573;
mul.rn.f32 %f487, %f486, %f481;
mul.rn.f32 %f488, %f487, %f480;
sub.f32 %f489, %f478, %f480;
neg.f32 %f490, %f480;
add.f32 %f491, %f489, %f489;
fma.rn.f32 %f492, %f490, %f478, %f491;
mul.rn.f32 %f493, %f466, %f492;
add.f32 %f494, %f488, %f480;
sub.f32 %f495, %f480, %f494;
add.f32 %f496, %f488, %f495;
add.f32 %f497, %f493, %f496;
add.f32 %f498, %f494, %f497;
sub.f32 %f499, %f494, %f498;
add.f32 %f500, %f497, %f499;
mul.rn.f32 %f502, %f477, %f574;
mul.rn.f32 %f504, %f477, %f575;
add.f32 %f505, %f502, %f498;
sub.f32 %f506, %f502, %f505;
add.f32 %f507, %f498, %f506;
add.f32 %f508, %f500, %f507;
add.f32 %f509, %f504, %f508;
add.f32 %f510, %f505, %f509;
sub.f32 %f511, %f505, %f510;
add.f32 %f512, %f509, %f511;
mul.rn.f32 %f514, %f582, %f510;
neg.f32 %f515, %f514;
fma.rn.f32 %f516, %f582, %f510, %f515;
fma.rn.f32 %f517, %f582, %f512, %f516;
fma.rn.f32 %f519, %f576, %f510, %f517;
add.rn.f32 %f520, %f514, %f519;
neg.f32 %f521, %f520;
add.rn.f32 %f522, %f514, %f521;
add.rn.f32 %f523, %f522, %f519;
mov.b32 %r250, %f520;
setp.eq.s32 %p78, %r250, 1118925336;
add.s32 %r251, %r250, -1;
mov.b32 %f524, %r251;
add.f32 %f525, %f523, 0f37000000;
selp.f32 %f526, %f524, %f520, %p78;
selp.f32 %f121, %f525, %f523, %p78;
mul.f32 %f527, %f526, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f528, %f527;
fma.rn.f32 %f530, %f528, %f577, %f526;
fma.rn.f32 %f532, %f528, %f578, %f530;
mul.f32 %f533, %f532, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f534, %f533;
add.f32 %f535, %f528, 0f00000000;
ex2.approx.f32 %f536, %f535;
mul.f32 %f537, %f534, %f536;
setp.lt.f32 %p79, %f526, 0fC2D20000;
selp.f32 %f538, 0f00000000, %f537, %p79;
setp.gt.f32 %p80, %f526, 0f42D20000;
selp.f32 %f630, 0f7F800000, %f538, %p80;
setp.eq.f32 %p81, %f630, 0f7F800000;
@%p81 bra BB0_85;
fma.rn.f32 %f630, %f630, %f121, %f630;
BB0_85:
setp.lt.f32 %p82, %f92, 0f00000000;
and.pred %p3, %p82, %p51;
mov.b32 %r252, %f630;
xor.b32 %r253, %r252, -2147483648;
mov.b32 %f539, %r253;
selp.f32 %f632, %f539, %f630, %p3;
setp.eq.f32 %p84, %f92, 0f00000000;
@%p84 bra BB0_88;
bra.uni BB0_86;
BB0_88:
add.f32 %f542, %f92, %f92;
selp.f32 %f632, %f542, 0f00000000, %p51;
bra.uni BB0_89;
BB0_86:
setp.geu.f32 %p85, %f92, 0f00000000;
@%p85 bra BB0_89;
mov.f32 %f583, 0f3EE66666;
cvt.rzi.f32.f32 %f541, %f583;
setp.neu.f32 %p86, %f541, 0f3EE66666;
selp.f32 %f632, 0f7FFFFFFF, %f632, %p86;
BB0_89:
abs.f32 %f588, %f92;
add.f32 %f543, %f588, 0f3EE66666;
mov.b32 %r254, %f543;
setp.lt.s32 %p88, %r254, 2139095040;
@%p88 bra BB0_94;
abs.f32 %f589, %f92;
setp.gtu.f32 %p89, %f589, 0f7F800000;
@%p89 bra BB0_93;
bra.uni BB0_91;
BB0_93:
add.f32 %f632, %f92, 0f3EE66666;
bra.uni BB0_94;
BB0_91:
abs.f32 %f590, %f92;
setp.neu.f32 %p90, %f590, 0f7F800000;
@%p90 bra BB0_94;
selp.f32 %f632, 0fFF800000, 0f7F800000, %p3;
BB0_94:
mov.u32 %r277, 4;
mov.u64 %rd98, 0;
mov.u32 %r276, 2;
setp.eq.f32 %p91, %f92, 0f3F800000;
selp.f32 %f544, 0f3F800000, %f632, %p91;
cvt.u64.u32 %rd66, %r3;
cvt.u64.u32 %rd65, %r2;
mov.u64 %rd69, image;
cvta.global.u64 %rd64, %rd69;
// inline asm
call (%rd63), _rt_buffer_get_64, (%rd64, %r276, %r277, %rd65, %rd66, %rd98, %rd98);
// inline asm
cvt.sat.f32.f32 %f545, %f544;
mul.f32 %f546, %f545, 0f437FFD71;
cvt.rzi.u32.f32 %r257, %f546;
cvt.sat.f32.f32 %f547, %f119;
mul.f32 %f548, %f547, 0f437FFD71;
cvt.rzi.u32.f32 %r258, %f548;
cvt.sat.f32.f32 %f549, %f106;
mul.f32 %f550, %f549, 0f437FFD71;
cvt.rzi.u32.f32 %r259, %f550;
cvt.u16.u32 %rs9, %r257;
cvt.u16.u32 %rs10, %r259;
cvt.u16.u32 %rs11, %r258;
mov.u16 %rs12, 255;
st.v4.u8 [%rd63], {%rs9, %rs11, %rs10, %rs12};
ld.global.u32 %r311, [imageEnabled];
BB0_95:
and.b32 %r260, %r311, 4;
setp.eq.s32 %p92, %r260, 0;
@%p92 bra BB0_103;
ld.global.u32 %r261, [addToPrev];
setp.eq.s32 %p93, %r261, 0;
mov.f32 %f633, 0f00000000;
mov.f32 %f634, %f633;
mov.f32 %f635, %f633;
@%p93 bra BB0_98;
mov.u64 %rd99, 0;
mov.u32 %r278, 2;
ld.global.v2.u32 {%r264, %r265}, [pixelID];
cvt.u64.u32 %rd72, %r264;
cvt.u64.u32 %rd73, %r265;
mov.u64 %rd76, lightmapDirect;
cvta.global.u64 %rd71, %rd76;
mov.u32 %r263, 8;
// inline asm
call (%rd70), _rt_buffer_get_64, (%rd71, %r278, %r263, %rd72, %rd73, %rd99, %rd99);
// inline asm
ld.v4.u16 {%rs16, %rs17, %rs18, %rs19}, [%rd70];
// inline asm
{ cvt.f32.f16 %f635, %rs16;}
// inline asm
// inline asm
{ cvt.f32.f16 %f634, %rs17;}
// inline asm
// inline asm
{ cvt.f32.f16 %f633, %rs18;}
// inline asm
BB0_98:
mov.u64 %rd100, 0;
mov.u32 %r279, 2;
cvt.u64.u32 %rd80, %r3;
cvt.u64.u32 %rd79, %r2;
mov.u64 %rd83, image_HDR;
cvta.global.u64 %rd78, %rd83;
mov.u32 %r269, 8;
// inline asm
call (%rd77), _rt_buffer_get_64, (%rd78, %r279, %r269, %rd79, %rd80, %rd100, %rd100);
// inline asm
add.f32 %f557, %f90, %f635;
add.f32 %f558, %f91, %f634;
add.f32 %f559, %f92, %f633;
// inline asm
{ cvt.rn.f16.f32 %rs22, %f559;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs21, %f558;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs20, %f557;}
// inline asm
mov.f32 %f560, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs23, %f560;}
// inline asm
st.v4.u16 [%rd77], {%rs20, %rs21, %rs22, %rs23};
BB0_103:
ret;
}