1467 lines
42 KiB
Plaintext
1467 lines
42 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Dir[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 1 .b8 rnd_seeds[1];
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.global .align 4 .u32 sky;
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.global .align 4 .b8 skyColor[12];
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.global .align 4 .u32 samples;
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.global .align 4 .u32 hemispherical;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo3skyE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8skyColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo13hemisphericalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename3skyE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8skyColorE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename13hemisphericalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum3skyE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8skyColorE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum13hemisphericalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic3skyE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8skyColorE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic13hemisphericalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation3skyE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8skyColorE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation13hemisphericalE[1];
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.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[40];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<99>;
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.reg .b16 %rs<51>;
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.reg .f32 %f<660>;
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.reg .b32 %r<313>;
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.reg .b64 %rd<141>;
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mov.u64 %rd140, __local_depot0;
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cvta.local.u64 %SP, %rd140;
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ld.global.u32 %r1, [samples];
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ld.global.v2.u32 {%r93, %r94}, [pixelID];
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cvt.u64.u32 %rd22, %r93;
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cvt.u64.u32 %rd23, %r94;
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mov.u64 %rd26, uvnormal;
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cvta.global.u64 %rd21, %rd26;
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mov.u32 %r91, 2;
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mov.u32 %r92, 4;
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mov.u64 %rd25, 0;
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// inline asm
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call (%rd20), _rt_buffer_get_64, (%rd21, %r91, %r92, %rd22, %rd23, %rd25, %rd25);
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// inline asm
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ld.u32 %r2, [%rd20];
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shr.u32 %r97, %r2, 16;
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cvt.u16.u32 %rs1, %r97;
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and.b16 %rs3, %rs1, 255;
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cvt.u16.u32 %rs4, %r2;
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or.b16 %rs5, %rs4, %rs3;
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setp.eq.s16 %p4, %rs5, 0;
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mov.f32 %f612, 0f00000000;
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mov.f32 %f613, %f612;
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mov.f32 %f614, %f612;
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@%p4 bra BB0_2;
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ld.u8 %rs6, [%rd20+1];
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and.b16 %rs8, %rs4, 255;
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cvt.rn.f32.u16 %f137, %rs8;
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div.rn.f32 %f138, %f137, 0f437F0000;
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fma.rn.f32 %f139, %f138, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f140, %rs6;
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div.rn.f32 %f141, %f140, 0f437F0000;
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fma.rn.f32 %f142, %f141, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f143, %rs3;
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div.rn.f32 %f144, %f143, 0f437F0000;
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fma.rn.f32 %f145, %f144, 0f40000000, 0fBF800000;
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mul.f32 %f146, %f142, %f142;
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fma.rn.f32 %f147, %f139, %f139, %f146;
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fma.rn.f32 %f148, %f145, %f145, %f147;
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sqrt.rn.f32 %f149, %f148;
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rcp.rn.f32 %f150, %f149;
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mul.f32 %f612, %f139, %f150;
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mul.f32 %f613, %f142, %f150;
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mul.f32 %f614, %f145, %f150;
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BB0_2:
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ld.global.v2.u32 {%r98, %r99}, [pixelID];
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ld.global.v2.u32 {%r101, %r102}, [tileInfo];
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add.s32 %r3, %r98, %r101;
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add.s32 %r4, %r99, %r102;
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setp.eq.f32 %p5, %f613, 0f00000000;
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setp.eq.f32 %p6, %f612, 0f00000000;
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and.pred %p7, %p6, %p5;
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setp.eq.f32 %p8, %f614, 0f00000000;
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and.pred %p9, %p7, %p8;
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@%p9 bra BB0_97;
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bra.uni BB0_3;
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BB0_97:
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ld.global.u32 %r312, [imageEnabled];
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and.b32 %r268, %r312, 1;
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setp.eq.b32 %p95, %r268, 1;
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@!%p95 bra BB0_99;
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bra.uni BB0_98;
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BB0_98:
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cvt.u64.u32 %rd99, %r3;
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cvt.u64.u32 %rd100, %r4;
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mov.u64 %rd103, image;
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cvta.global.u64 %rd98, %rd103;
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mov.u64 %rd102, 0;
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// inline asm
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call (%rd97), _rt_buffer_get_64, (%rd98, %r91, %r92, %rd99, %rd100, %rd102, %rd102);
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// inline asm
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mov.u16 %rs34, 0;
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st.v4.u8 [%rd97], {%rs34, %rs34, %rs34, %rs34};
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ld.global.u32 %r312, [imageEnabled];
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BB0_99:
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and.b32 %r271, %r312, 4;
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setp.eq.s32 %p96, %r271, 0;
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@%p96 bra BB0_103;
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ld.global.u32 %r272, [additive];
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setp.eq.s32 %p97, %r272, 0;
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cvt.u64.u32 %rd18, %r3;
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cvt.u64.u32 %rd19, %r4;
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@%p97 bra BB0_102;
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mov.u64 %rd116, image_HDR;
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cvta.global.u64 %rd105, %rd116;
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mov.u32 %r276, 8;
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mov.u64 %rd115, 0;
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// inline asm
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call (%rd104), _rt_buffer_get_64, (%rd105, %r91, %r276, %rd18, %rd19, %rd115, %rd115);
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// inline asm
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ld.v4.u16 {%rs41, %rs42, %rs43, %rs44}, [%rd104];
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// inline asm
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{ cvt.f32.f16 %f571, %rs41;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f572, %rs42;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f573, %rs43;}
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// inline asm
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// inline asm
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call (%rd110), _rt_buffer_get_64, (%rd105, %r91, %r276, %rd18, %rd19, %rd115, %rd115);
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// inline asm
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add.f32 %f574, %f571, 0f00000000;
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add.f32 %f575, %f572, 0f00000000;
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add.f32 %f576, %f573, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs40, %f576;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs39, %f575;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs38, %f574;}
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// inline asm
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mov.u16 %rs45, 0;
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st.v4.u16 [%rd110], {%rs38, %rs39, %rs40, %rs45};
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bra.uni BB0_103;
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BB0_3:
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ld.global.v2.u32 {%r110, %r111}, [pixelID];
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cvt.u64.u32 %rd29, %r110;
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cvt.u64.u32 %rd30, %r111;
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mov.u64 %rd39, uvpos;
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cvta.global.u64 %rd28, %rd39;
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mov.u32 %r107, 12;
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// inline asm
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call (%rd27), _rt_buffer_get_64, (%rd28, %r91, %r107, %rd29, %rd30, %rd25, %rd25);
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// inline asm
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ld.f32 %f157, [%rd27+8];
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ld.f32 %f158, [%rd27+4];
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ld.f32 %f159, [%rd27];
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mul.f32 %f160, %f159, 0f3456BF95;
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mul.f32 %f161, %f158, 0f3456BF95;
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mul.f32 %f162, %f157, 0f3456BF95;
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abs.f32 %f163, %f612;
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div.rn.f32 %f164, %f160, %f163;
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abs.f32 %f165, %f613;
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div.rn.f32 %f166, %f161, %f165;
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abs.f32 %f167, %f614;
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div.rn.f32 %f168, %f162, %f167;
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abs.f32 %f169, %f164;
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abs.f32 %f170, %f166;
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abs.f32 %f171, %f168;
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mov.f32 %f172, 0f38D1B717;
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max.f32 %f173, %f169, %f172;
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max.f32 %f174, %f170, %f172;
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max.f32 %f175, %f171, %f172;
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fma.rn.f32 %f7, %f612, %f173, %f159;
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fma.rn.f32 %f8, %f613, %f174, %f158;
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fma.rn.f32 %f9, %f614, %f175, %f157;
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ld.global.u32 %r5, [hemispherical];
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setp.gt.f32 %p10, %f163, %f167;
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neg.f32 %f176, %f613;
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selp.f32 %f177, %f176, 0f00000000, %p10;
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neg.f32 %f178, %f614;
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selp.f32 %f179, %f612, %f178, %p10;
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selp.f32 %f180, 0f00000000, %f613, %p10;
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mul.f32 %f181, %f179, %f179;
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fma.rn.f32 %f182, %f177, %f177, %f181;
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fma.rn.f32 %f183, %f180, %f180, %f182;
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sqrt.rn.f32 %f184, %f183;
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rcp.rn.f32 %f185, %f184;
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mul.f32 %f10, %f177, %f185;
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mul.f32 %f11, %f179, %f185;
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mul.f32 %f12, %f180, %f185;
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ld.global.v2.u32 {%r114, %r115}, [pixelID];
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cvt.u64.u32 %rd35, %r114;
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cvt.u64.u32 %rd36, %r115;
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mov.u64 %rd40, rnd_seeds;
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|
cvta.global.u64 %rd34, %rd40;
|
|
// inline asm
|
|
call (%rd33), _rt_buffer_get_64, (%rd34, %r91, %r92, %rd35, %rd36, %rd25, %rd25);
|
|
// inline asm
|
|
mov.f32 %f644, 0f00000000;
|
|
setp.lt.s32 %p11, %r1, 1;
|
|
mov.f32 %f643, %f644;
|
|
mov.f32 %f642, %f644;
|
|
mov.f32 %f641, %f644;
|
|
mov.f32 %f640, %f644;
|
|
mov.f32 %f639, %f644;
|
|
@%p11 bra BB0_56;
|
|
|
|
cvt.rn.f32.s32 %f192, %r1;
|
|
rcp.rn.f32 %f13, %f192;
|
|
ld.u32 %r290, [%rd33];
|
|
mul.f32 %f14, %f7, 0f3456BF95;
|
|
mul.f32 %f15, %f8, 0f3456BF95;
|
|
mul.f32 %f16, %f9, 0f3456BF95;
|
|
mul.f32 %f193, %f612, %f11;
|
|
mul.f32 %f194, %f613, %f10;
|
|
sub.f32 %f17, %f194, %f193;
|
|
mul.f32 %f195, %f614, %f10;
|
|
mul.f32 %f196, %f612, %f12;
|
|
sub.f32 %f18, %f196, %f195;
|
|
mul.f32 %f197, %f613, %f12;
|
|
mul.f32 %f198, %f614, %f11;
|
|
sub.f32 %f19, %f198, %f197;
|
|
mov.f32 %f644, 0f00000000;
|
|
mov.u32 %r118, 0;
|
|
abs.f32 %f279, %f15;
|
|
abs.f32 %f280, %f14;
|
|
max.f32 %f281, %f280, %f279;
|
|
abs.f32 %f282, %f16;
|
|
max.f32 %f283, %f281, %f282;
|
|
mov.u32 %r287, %r118;
|
|
mov.f32 %f643, %f644;
|
|
mov.f32 %f642, %f644;
|
|
mov.f32 %f641, %f644;
|
|
mov.f32 %f640, %f644;
|
|
mov.f32 %f639, %f644;
|
|
|
|
BB0_5:
|
|
mov.u32 %r289, %r118;
|
|
|
|
BB0_6:
|
|
cvt.rn.f32.s32 %f605, %r287;
|
|
mad.lo.s32 %r120, %r290, 1664525, 1013904223;
|
|
and.b32 %r121, %r120, 16777215;
|
|
cvt.rn.f32.u32 %f199, %r121;
|
|
fma.rn.f32 %f200, %f199, 0f33800000, %f605;
|
|
mul.f32 %f33, %f13, %f200;
|
|
mad.lo.s32 %r290, %r120, 1664525, 1013904223;
|
|
and.b32 %r122, %r290, 16777215;
|
|
cvt.rn.f32.u32 %f201, %r122;
|
|
cvt.rn.f32.s32 %f202, %r289;
|
|
fma.rn.f32 %f203, %f201, 0f33800000, %f202;
|
|
mul.f32 %f204, %f13, %f203;
|
|
mul.f32 %f205, %f33, %f33;
|
|
mov.f32 %f206, 0f3F800000;
|
|
sub.f32 %f207, %f206, %f205;
|
|
mov.f32 %f208, 0f00000000;
|
|
max.f32 %f209, %f208, %f207;
|
|
sqrt.rn.f32 %f34, %f209;
|
|
mul.f32 %f633, %f204, 0f40C90FDB;
|
|
abs.f32 %f36, %f633;
|
|
setp.neu.f32 %p12, %f36, 0f7F800000;
|
|
mov.f32 %f627, %f633;
|
|
@%p12 bra BB0_8;
|
|
|
|
mul.rn.f32 %f627, %f633, %f208;
|
|
|
|
BB0_8:
|
|
mul.f32 %f211, %f627, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r300, %f211;
|
|
cvt.rn.f32.s32 %f212, %r300;
|
|
neg.f32 %f213, %f212;
|
|
mov.f32 %f214, 0f3FC90FDA;
|
|
fma.rn.f32 %f215, %f213, %f214, %f627;
|
|
mov.f32 %f216, 0f33A22168;
|
|
fma.rn.f32 %f217, %f213, %f216, %f215;
|
|
mov.f32 %f218, 0f27C234C5;
|
|
fma.rn.f32 %f628, %f213, %f218, %f217;
|
|
abs.f32 %f219, %f627;
|
|
setp.leu.f32 %p13, %f219, 0f47CE4780;
|
|
@%p13 bra BB0_19;
|
|
|
|
add.u64 %rd42, %SP, 0;
|
|
cvta.to.local.u64 %rd3, %rd42;
|
|
mov.b32 %r13, %f627;
|
|
shr.u32 %r14, %r13, 23;
|
|
shl.b32 %r125, %r13, 8;
|
|
or.b32 %r15, %r125, -2147483648;
|
|
mov.u32 %r291, 0;
|
|
mov.u64 %rd137, 0;
|
|
mov.u64 %rd136, %rd3;
|
|
mov.u32 %r292, %r291;
|
|
|
|
BB0_10:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd43, %rd137, 2;
|
|
mov.u64 %rd44, __cudart_i2opi_f;
|
|
add.s64 %rd45, %rd44, %rd43;
|
|
ld.const.u32 %r128, [%rd45];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r126, %r128, %r15, %r292;
|
|
madc.hi.u32 %r292, %r128, %r15, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd136], %r126;
|
|
add.s32 %r291, %r291, 1;
|
|
cvt.s64.s32 %rd137, %r291;
|
|
mul.wide.s32 %rd48, %r291, 4;
|
|
add.s64 %rd136, %rd3, %rd48;
|
|
setp.ne.s32 %p14, %r291, 6;
|
|
@%p14 bra BB0_10;
|
|
|
|
add.u64 %rd135, %SP, 0;
|
|
and.b32 %r131, %r14, 255;
|
|
add.s32 %r132, %r131, -128;
|
|
shr.u32 %r133, %r132, 5;
|
|
and.b32 %r20, %r13, -2147483648;
|
|
cvta.to.local.u64 %rd50, %rd135;
|
|
st.local.u32 [%rd50+24], %r292;
|
|
mov.u32 %r134, 6;
|
|
sub.s32 %r135, %r134, %r133;
|
|
mul.wide.s32 %rd51, %r135, 4;
|
|
add.s64 %rd8, %rd50, %rd51;
|
|
ld.local.u32 %r293, [%rd8];
|
|
ld.local.u32 %r294, [%rd8+-4];
|
|
and.b32 %r23, %r14, 31;
|
|
setp.eq.s32 %p15, %r23, 0;
|
|
@%p15 bra BB0_13;
|
|
|
|
mov.u32 %r136, 32;
|
|
sub.s32 %r137, %r136, %r23;
|
|
shr.u32 %r138, %r294, %r137;
|
|
shl.b32 %r139, %r293, %r23;
|
|
add.s32 %r293, %r138, %r139;
|
|
ld.local.u32 %r140, [%rd8+-8];
|
|
shr.u32 %r141, %r140, %r137;
|
|
shl.b32 %r142, %r294, %r23;
|
|
add.s32 %r294, %r141, %r142;
|
|
|
|
BB0_13:
|
|
shr.u32 %r143, %r294, 30;
|
|
shl.b32 %r144, %r293, 2;
|
|
add.s32 %r295, %r143, %r144;
|
|
shl.b32 %r29, %r294, 2;
|
|
shr.u32 %r145, %r295, 31;
|
|
shr.u32 %r146, %r293, 30;
|
|
add.s32 %r30, %r145, %r146;
|
|
setp.eq.s32 %p16, %r145, 0;
|
|
@%p16 bra BB0_14;
|
|
bra.uni BB0_15;
|
|
|
|
BB0_14:
|
|
mov.u32 %r296, %r20;
|
|
mov.u32 %r297, %r29;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_15:
|
|
not.b32 %r147, %r295;
|
|
neg.s32 %r297, %r29;
|
|
setp.eq.s32 %p17, %r29, 0;
|
|
selp.u32 %r148, 1, 0, %p17;
|
|
add.s32 %r295, %r148, %r147;
|
|
xor.b32 %r296, %r20, -2147483648;
|
|
|
|
BB0_16:
|
|
clz.b32 %r299, %r295;
|
|
setp.eq.s32 %p18, %r299, 0;
|
|
shl.b32 %r149, %r295, %r299;
|
|
mov.u32 %r150, 32;
|
|
sub.s32 %r151, %r150, %r299;
|
|
shr.u32 %r152, %r297, %r151;
|
|
add.s32 %r153, %r152, %r149;
|
|
selp.b32 %r38, %r295, %r153, %p18;
|
|
mov.u32 %r154, -921707870;
|
|
mul.hi.u32 %r298, %r38, %r154;
|
|
setp.eq.s32 %p19, %r20, 0;
|
|
neg.s32 %r155, %r30;
|
|
selp.b32 %r300, %r30, %r155, %p19;
|
|
setp.lt.s32 %p20, %r298, 1;
|
|
@%p20 bra BB0_18;
|
|
|
|
mul.lo.s32 %r156, %r38, -921707870;
|
|
shr.u32 %r157, %r156, 31;
|
|
shl.b32 %r158, %r298, 1;
|
|
add.s32 %r298, %r157, %r158;
|
|
add.s32 %r299, %r299, 1;
|
|
|
|
BB0_18:
|
|
mov.u32 %r159, 126;
|
|
sub.s32 %r160, %r159, %r299;
|
|
shl.b32 %r161, %r160, 23;
|
|
add.s32 %r162, %r298, 1;
|
|
shr.u32 %r163, %r162, 7;
|
|
add.s32 %r164, %r163, 1;
|
|
shr.u32 %r165, %r164, 1;
|
|
add.s32 %r166, %r165, %r161;
|
|
or.b32 %r167, %r166, %r296;
|
|
mov.b32 %f628, %r167;
|
|
|
|
BB0_19:
|
|
mul.rn.f32 %f42, %f628, %f628;
|
|
add.s32 %r46, %r300, 1;
|
|
and.b32 %r47, %r46, 1;
|
|
setp.eq.s32 %p21, %r47, 0;
|
|
@%p21 bra BB0_21;
|
|
bra.uni BB0_20;
|
|
|
|
BB0_21:
|
|
mov.f32 %f222, 0f3C08839E;
|
|
mov.f32 %f223, 0fB94CA1F9;
|
|
fma.rn.f32 %f629, %f223, %f42, %f222;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_20:
|
|
mov.f32 %f220, 0fBAB6061A;
|
|
mov.f32 %f221, 0f37CCF5CE;
|
|
fma.rn.f32 %f629, %f221, %f42, %f220;
|
|
|
|
BB0_22:
|
|
@%p21 bra BB0_24;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_24:
|
|
mov.f32 %f227, 0fBE2AAAA3;
|
|
fma.rn.f32 %f228, %f629, %f42, %f227;
|
|
fma.rn.f32 %f630, %f228, %f42, %f208;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_23:
|
|
mov.f32 %f224, 0f3D2AAAA5;
|
|
fma.rn.f32 %f225, %f629, %f42, %f224;
|
|
mov.f32 %f226, 0fBF000000;
|
|
fma.rn.f32 %f630, %f225, %f42, %f226;
|
|
|
|
BB0_25:
|
|
fma.rn.f32 %f631, %f630, %f628, %f628;
|
|
@%p21 bra BB0_27;
|
|
|
|
fma.rn.f32 %f631, %f630, %f42, %f206;
|
|
|
|
BB0_27:
|
|
and.b32 %r168, %r46, 2;
|
|
setp.eq.s32 %p24, %r168, 0;
|
|
@%p24 bra BB0_29;
|
|
|
|
mov.f32 %f232, 0fBF800000;
|
|
fma.rn.f32 %f631, %f631, %f232, %f208;
|
|
|
|
BB0_29:
|
|
@%p12 bra BB0_31;
|
|
|
|
mul.rn.f32 %f633, %f633, %f208;
|
|
|
|
BB0_31:
|
|
mov.f32 %f608, 0f27C234C5;
|
|
mov.f32 %f607, 0f33A22168;
|
|
mov.f32 %f606, 0f3FC90FDA;
|
|
mul.f32 %f234, %f633, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r310, %f234;
|
|
cvt.rn.f32.s32 %f235, %r310;
|
|
neg.f32 %f236, %f235;
|
|
fma.rn.f32 %f238, %f236, %f606, %f633;
|
|
fma.rn.f32 %f240, %f236, %f607, %f238;
|
|
fma.rn.f32 %f634, %f236, %f608, %f240;
|
|
abs.f32 %f242, %f633;
|
|
setp.leu.f32 %p26, %f242, 0f47CE4780;
|
|
@%p26 bra BB0_42;
|
|
|
|
add.u64 %rd53, %SP, 0;
|
|
cvta.to.local.u64 %rd9, %rd53;
|
|
mov.b32 %r49, %f633;
|
|
shr.u32 %r50, %r49, 23;
|
|
shl.b32 %r171, %r49, 8;
|
|
or.b32 %r51, %r171, -2147483648;
|
|
mov.u32 %r301, 0;
|
|
mov.u64 %rd138, %rd9;
|
|
mov.u64 %rd139, %rd25;
|
|
mov.u32 %r302, %r301;
|
|
|
|
BB0_33:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd54, %rd139, 2;
|
|
mov.u64 %rd55, __cudart_i2opi_f;
|
|
add.s64 %rd56, %rd55, %rd54;
|
|
ld.const.u32 %r174, [%rd56];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r172, %r174, %r51, %r302;
|
|
madc.hi.u32 %r302, %r174, %r51, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd138], %r172;
|
|
add.s32 %r301, %r301, 1;
|
|
cvt.s64.s32 %rd139, %r301;
|
|
mul.wide.s32 %rd57, %r301, 4;
|
|
add.s64 %rd138, %rd9, %rd57;
|
|
setp.ne.s32 %p27, %r301, 6;
|
|
@%p27 bra BB0_33;
|
|
|
|
and.b32 %r177, %r50, 255;
|
|
add.s32 %r178, %r177, -128;
|
|
shr.u32 %r179, %r178, 5;
|
|
and.b32 %r56, %r49, -2147483648;
|
|
cvta.to.local.u64 %rd59, %rd53;
|
|
st.local.u32 [%rd59+24], %r302;
|
|
mov.u32 %r180, 6;
|
|
sub.s32 %r181, %r180, %r179;
|
|
mul.wide.s32 %rd60, %r181, 4;
|
|
add.s64 %rd15, %rd59, %rd60;
|
|
ld.local.u32 %r303, [%rd15];
|
|
ld.local.u32 %r304, [%rd15+-4];
|
|
and.b32 %r59, %r50, 31;
|
|
setp.eq.s32 %p28, %r59, 0;
|
|
@%p28 bra BB0_36;
|
|
|
|
mov.u32 %r182, 32;
|
|
sub.s32 %r183, %r182, %r59;
|
|
shr.u32 %r184, %r304, %r183;
|
|
shl.b32 %r185, %r303, %r59;
|
|
add.s32 %r303, %r184, %r185;
|
|
ld.local.u32 %r186, [%rd15+-8];
|
|
shr.u32 %r187, %r186, %r183;
|
|
shl.b32 %r188, %r304, %r59;
|
|
add.s32 %r304, %r187, %r188;
|
|
|
|
BB0_36:
|
|
shr.u32 %r189, %r304, 30;
|
|
shl.b32 %r190, %r303, 2;
|
|
add.s32 %r305, %r189, %r190;
|
|
shl.b32 %r65, %r304, 2;
|
|
shr.u32 %r191, %r305, 31;
|
|
shr.u32 %r192, %r303, 30;
|
|
add.s32 %r66, %r191, %r192;
|
|
setp.eq.s32 %p29, %r191, 0;
|
|
@%p29 bra BB0_37;
|
|
bra.uni BB0_38;
|
|
|
|
BB0_37:
|
|
mov.u32 %r306, %r56;
|
|
mov.u32 %r307, %r65;
|
|
bra.uni BB0_39;
|
|
|
|
BB0_38:
|
|
not.b32 %r193, %r305;
|
|
neg.s32 %r307, %r65;
|
|
setp.eq.s32 %p30, %r65, 0;
|
|
selp.u32 %r194, 1, 0, %p30;
|
|
add.s32 %r305, %r194, %r193;
|
|
xor.b32 %r306, %r56, -2147483648;
|
|
|
|
BB0_39:
|
|
clz.b32 %r309, %r305;
|
|
setp.eq.s32 %p31, %r309, 0;
|
|
shl.b32 %r195, %r305, %r309;
|
|
mov.u32 %r196, 32;
|
|
sub.s32 %r197, %r196, %r309;
|
|
shr.u32 %r198, %r307, %r197;
|
|
add.s32 %r199, %r198, %r195;
|
|
selp.b32 %r74, %r305, %r199, %p31;
|
|
mov.u32 %r200, -921707870;
|
|
mul.hi.u32 %r308, %r74, %r200;
|
|
setp.eq.s32 %p32, %r56, 0;
|
|
neg.s32 %r201, %r66;
|
|
selp.b32 %r310, %r66, %r201, %p32;
|
|
setp.lt.s32 %p33, %r308, 1;
|
|
@%p33 bra BB0_41;
|
|
|
|
mul.lo.s32 %r202, %r74, -921707870;
|
|
shr.u32 %r203, %r202, 31;
|
|
shl.b32 %r204, %r308, 1;
|
|
add.s32 %r308, %r203, %r204;
|
|
add.s32 %r309, %r309, 1;
|
|
|
|
BB0_41:
|
|
mov.u32 %r205, 126;
|
|
sub.s32 %r206, %r205, %r309;
|
|
shl.b32 %r207, %r206, 23;
|
|
add.s32 %r208, %r308, 1;
|
|
shr.u32 %r209, %r208, 7;
|
|
add.s32 %r210, %r209, 1;
|
|
shr.u32 %r211, %r210, 1;
|
|
add.s32 %r212, %r211, %r207;
|
|
or.b32 %r213, %r212, %r306;
|
|
mov.b32 %f634, %r213;
|
|
|
|
BB0_42:
|
|
mul.rn.f32 %f59, %f634, %f634;
|
|
and.b32 %r82, %r310, 1;
|
|
setp.eq.s32 %p34, %r82, 0;
|
|
@%p34 bra BB0_44;
|
|
bra.uni BB0_43;
|
|
|
|
BB0_44:
|
|
mov.f32 %f245, 0f3C08839E;
|
|
mov.f32 %f246, 0fB94CA1F9;
|
|
fma.rn.f32 %f635, %f246, %f59, %f245;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_43:
|
|
mov.f32 %f243, 0fBAB6061A;
|
|
mov.f32 %f244, 0f37CCF5CE;
|
|
fma.rn.f32 %f635, %f244, %f59, %f243;
|
|
|
|
BB0_45:
|
|
@%p34 bra BB0_47;
|
|
bra.uni BB0_46;
|
|
|
|
BB0_47:
|
|
mov.f32 %f250, 0fBE2AAAA3;
|
|
fma.rn.f32 %f251, %f635, %f59, %f250;
|
|
fma.rn.f32 %f636, %f251, %f59, %f208;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_46:
|
|
mov.f32 %f247, 0f3D2AAAA5;
|
|
fma.rn.f32 %f248, %f635, %f59, %f247;
|
|
mov.f32 %f249, 0fBF000000;
|
|
fma.rn.f32 %f636, %f248, %f59, %f249;
|
|
|
|
BB0_48:
|
|
fma.rn.f32 %f637, %f636, %f634, %f634;
|
|
@%p34 bra BB0_50;
|
|
|
|
fma.rn.f32 %f637, %f636, %f59, %f206;
|
|
|
|
BB0_50:
|
|
and.b32 %r214, %r310, 2;
|
|
setp.eq.s32 %p37, %r214, 0;
|
|
@%p37 bra BB0_52;
|
|
|
|
mov.f32 %f255, 0fBF800000;
|
|
fma.rn.f32 %f637, %f637, %f255, %f208;
|
|
|
|
BB0_52:
|
|
mul.f32 %f256, %f34, %f631;
|
|
mul.f32 %f257, %f34, %f637;
|
|
mul.f32 %f258, %f10, %f257;
|
|
mul.f32 %f259, %f11, %f257;
|
|
mul.f32 %f260, %f12, %f257;
|
|
fma.rn.f32 %f261, %f19, %f256, %f258;
|
|
fma.rn.f32 %f262, %f18, %f256, %f259;
|
|
fma.rn.f32 %f263, %f17, %f256, %f260;
|
|
fma.rn.f32 %f71, %f612, %f33, %f261;
|
|
fma.rn.f32 %f72, %f613, %f33, %f262;
|
|
fma.rn.f32 %f73, %f614, %f33, %f263;
|
|
setp.gt.f32 %p38, %f72, 0f00000000;
|
|
setp.eq.s32 %p39, %r5, 0;
|
|
or.pred %p40, %p39, %p38;
|
|
@!%p40 bra BB0_54;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_53:
|
|
add.u64 %rd61, %SP, 28;
|
|
cvta.to.local.u64 %rd62, %rd61;
|
|
max.f32 %f277, %f283, %f172;
|
|
ld.global.u32 %r215, [sky];
|
|
neg.f32 %f270, %f71;
|
|
neg.f32 %f269, %f72;
|
|
neg.f32 %f268, %f73;
|
|
mov.u32 %r216, 6;
|
|
mov.u32 %r217, 0;
|
|
// inline asm
|
|
call (%f264, %f265, %f266, %f267), _rt_texture_get_base_id, (%r215, %r216, %f268, %f269, %f270, %r217);
|
|
// inline asm
|
|
st.local.f32 [%rd62], %f264;
|
|
st.local.f32 [%rd62+4], %f265;
|
|
st.local.f32 [%rd62+8], %f266;
|
|
ld.global.u32 %r218, [root];
|
|
mov.u32 %r219, 1;
|
|
mov.f32 %f278, 0f6C4ECB8F;
|
|
// inline asm
|
|
call _rt_trace_64, (%r218, %f7, %f8, %f9, %f71, %f72, %f73, %r219, %f277, %f278, %rd61, %r107);
|
|
// inline asm
|
|
ld.local.f32 %f285, [%rd62];
|
|
ld.local.f32 %f286, [%rd62+4];
|
|
ld.local.f32 %f287, [%rd62+8];
|
|
fma.rn.f32 %f639, %f71, %f285, %f639;
|
|
fma.rn.f32 %f640, %f72, %f286, %f640;
|
|
fma.rn.f32 %f641, %f73, %f287, %f641;
|
|
mul.f32 %f288, %f613, %f72;
|
|
fma.rn.f32 %f289, %f612, %f71, %f288;
|
|
fma.rn.f32 %f290, %f614, %f73, %f289;
|
|
cvt.sat.f32.f32 %f291, %f290;
|
|
fma.rn.f32 %f642, %f291, %f285, %f642;
|
|
fma.rn.f32 %f643, %f291, %f286, %f643;
|
|
fma.rn.f32 %f644, %f291, %f287, %f644;
|
|
|
|
BB0_54:
|
|
add.s32 %r289, %r289, 1;
|
|
setp.lt.s32 %p41, %r289, %r1;
|
|
@%p41 bra BB0_6;
|
|
|
|
add.s32 %r287, %r287, 1;
|
|
setp.lt.s32 %p42, %r287, %r1;
|
|
@%p42 bra BB0_5;
|
|
|
|
BB0_56:
|
|
mul.lo.s32 %r221, %r1, %r1;
|
|
cvt.rn.f32.s32 %f292, %r221;
|
|
rcp.rn.f32 %f293, %f292;
|
|
mul.f32 %f294, %f642, %f293;
|
|
mul.f32 %f295, %f643, %f293;
|
|
mul.f32 %f296, %f644, %f293;
|
|
fma.rn.f32 %f297, %f642, %f293, %f294;
|
|
fma.rn.f32 %f298, %f643, %f293, %f295;
|
|
fma.rn.f32 %f299, %f644, %f293, %f296;
|
|
ld.global.f32 %f300, [skyColor];
|
|
mul.f32 %f92, %f300, %f297;
|
|
ld.global.f32 %f301, [skyColor+4];
|
|
mul.f32 %f93, %f298, %f301;
|
|
ld.global.f32 %f302, [skyColor+8];
|
|
mul.f32 %f94, %f299, %f302;
|
|
ld.global.u32 %r311, [imageEnabled];
|
|
and.b32 %r222, %r311, 1;
|
|
setp.eq.b32 %p43, %r222, 1;
|
|
@!%p43 bra BB0_91;
|
|
bra.uni BB0_57;
|
|
|
|
BB0_57:
|
|
mov.f32 %f305, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f306, %f305;
|
|
fma.rn.f32 %f307, %f306, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f95, %f307;
|
|
abs.f32 %f96, %f92;
|
|
setp.lt.f32 %p44, %f96, 0f00800000;
|
|
mul.f32 %f308, %f96, 0f4B800000;
|
|
selp.f32 %f309, 0fC3170000, 0fC2FE0000, %p44;
|
|
selp.f32 %f310, %f308, %f96, %p44;
|
|
mov.b32 %r223, %f310;
|
|
and.b32 %r224, %r223, 8388607;
|
|
or.b32 %r225, %r224, 1065353216;
|
|
mov.b32 %f311, %r225;
|
|
shr.u32 %r226, %r223, 23;
|
|
cvt.rn.f32.u32 %f312, %r226;
|
|
add.f32 %f313, %f309, %f312;
|
|
setp.gt.f32 %p45, %f311, 0f3FB504F3;
|
|
mul.f32 %f314, %f311, 0f3F000000;
|
|
add.f32 %f315, %f313, 0f3F800000;
|
|
selp.f32 %f316, %f314, %f311, %p45;
|
|
selp.f32 %f317, %f315, %f313, %p45;
|
|
add.f32 %f318, %f316, 0fBF800000;
|
|
add.f32 %f304, %f316, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f303,%f304;
|
|
// inline asm
|
|
add.f32 %f319, %f318, %f318;
|
|
mul.f32 %f320, %f303, %f319;
|
|
mul.f32 %f321, %f320, %f320;
|
|
mov.f32 %f322, 0f3C4CAF63;
|
|
mov.f32 %f323, 0f3B18F0FE;
|
|
fma.rn.f32 %f324, %f323, %f321, %f322;
|
|
mov.f32 %f325, 0f3DAAAABD;
|
|
fma.rn.f32 %f326, %f324, %f321, %f325;
|
|
mul.rn.f32 %f327, %f326, %f321;
|
|
mul.rn.f32 %f328, %f327, %f320;
|
|
sub.f32 %f329, %f318, %f320;
|
|
neg.f32 %f330, %f320;
|
|
add.f32 %f331, %f329, %f329;
|
|
fma.rn.f32 %f332, %f330, %f318, %f331;
|
|
mul.rn.f32 %f333, %f303, %f332;
|
|
add.f32 %f334, %f328, %f320;
|
|
sub.f32 %f335, %f320, %f334;
|
|
add.f32 %f336, %f328, %f335;
|
|
add.f32 %f337, %f333, %f336;
|
|
add.f32 %f338, %f334, %f337;
|
|
sub.f32 %f339, %f334, %f338;
|
|
add.f32 %f340, %f337, %f339;
|
|
mov.f32 %f341, 0f3F317200;
|
|
mul.rn.f32 %f342, %f317, %f341;
|
|
mov.f32 %f343, 0f35BFBE8E;
|
|
mul.rn.f32 %f344, %f317, %f343;
|
|
add.f32 %f345, %f342, %f338;
|
|
sub.f32 %f346, %f342, %f345;
|
|
add.f32 %f347, %f338, %f346;
|
|
add.f32 %f348, %f340, %f347;
|
|
add.f32 %f349, %f344, %f348;
|
|
add.f32 %f350, %f345, %f349;
|
|
sub.f32 %f351, %f345, %f350;
|
|
add.f32 %f352, %f349, %f351;
|
|
mov.f32 %f353, 0f3EE66666;
|
|
mul.rn.f32 %f354, %f353, %f350;
|
|
neg.f32 %f355, %f354;
|
|
fma.rn.f32 %f356, %f353, %f350, %f355;
|
|
fma.rn.f32 %f357, %f353, %f352, %f356;
|
|
mov.f32 %f358, 0f00000000;
|
|
fma.rn.f32 %f359, %f358, %f350, %f357;
|
|
add.rn.f32 %f360, %f354, %f359;
|
|
neg.f32 %f361, %f360;
|
|
add.rn.f32 %f362, %f354, %f361;
|
|
add.rn.f32 %f363, %f362, %f359;
|
|
mov.b32 %r227, %f360;
|
|
setp.eq.s32 %p46, %r227, 1118925336;
|
|
add.s32 %r228, %r227, -1;
|
|
mov.b32 %f364, %r228;
|
|
add.f32 %f365, %f363, 0f37000000;
|
|
selp.f32 %f366, %f364, %f360, %p46;
|
|
selp.f32 %f97, %f365, %f363, %p46;
|
|
mul.f32 %f367, %f366, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f368, %f367;
|
|
mov.f32 %f369, 0fBF317200;
|
|
fma.rn.f32 %f370, %f368, %f369, %f366;
|
|
mov.f32 %f371, 0fB5BFBE8E;
|
|
fma.rn.f32 %f372, %f368, %f371, %f370;
|
|
mul.f32 %f373, %f372, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f374, %f373;
|
|
add.f32 %f375, %f368, 0f00000000;
|
|
ex2.approx.f32 %f376, %f375;
|
|
mul.f32 %f377, %f374, %f376;
|
|
setp.lt.f32 %p47, %f366, 0fC2D20000;
|
|
selp.f32 %f378, 0f00000000, %f377, %p47;
|
|
setp.gt.f32 %p48, %f366, 0f42D20000;
|
|
selp.f32 %f651, 0f7F800000, %f378, %p48;
|
|
setp.eq.f32 %p49, %f651, 0f7F800000;
|
|
@%p49 bra BB0_59;
|
|
|
|
fma.rn.f32 %f651, %f651, %f97, %f651;
|
|
|
|
BB0_59:
|
|
setp.lt.f32 %p50, %f92, 0f00000000;
|
|
setp.eq.f32 %p51, %f95, 0f3F800000;
|
|
and.pred %p1, %p50, %p51;
|
|
mov.b32 %r229, %f651;
|
|
xor.b32 %r230, %r229, -2147483648;
|
|
mov.b32 %f379, %r230;
|
|
selp.f32 %f653, %f379, %f651, %p1;
|
|
setp.eq.f32 %p52, %f92, 0f00000000;
|
|
@%p52 bra BB0_62;
|
|
bra.uni BB0_60;
|
|
|
|
BB0_62:
|
|
add.f32 %f382, %f92, %f92;
|
|
selp.f32 %f653, %f382, 0f00000000, %p51;
|
|
bra.uni BB0_63;
|
|
|
|
BB0_102:
|
|
mov.u64 %rd123, image_HDR;
|
|
cvta.global.u64 %rd118, %rd123;
|
|
mov.u32 %r278, 8;
|
|
mov.u64 %rd122, 0;
|
|
// inline asm
|
|
call (%rd117), _rt_buffer_get_64, (%rd118, %r91, %r278, %rd18, %rd19, %rd122, %rd122);
|
|
// inline asm
|
|
mov.f32 %f577, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f577;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs47, 0;
|
|
st.v4.u16 [%rd117], {%rs46, %rs46, %rs46, %rs47};
|
|
|
|
BB0_103:
|
|
ld.global.u8 %rs48, [imageEnabled];
|
|
and.b16 %rs49, %rs48, 64;
|
|
setp.eq.s16 %p98, %rs49, 0;
|
|
@%p98 bra BB0_105;
|
|
|
|
cvt.u64.u32 %rd126, %r3;
|
|
cvt.u64.u32 %rd127, %r4;
|
|
mov.u64 %rd130, image_Dir;
|
|
cvta.global.u64 %rd125, %rd130;
|
|
mov.u64 %rd129, 0;
|
|
// inline asm
|
|
call (%rd124), _rt_buffer_get_64, (%rd125, %r91, %r92, %rd126, %rd127, %rd129, %rd129);
|
|
// inline asm
|
|
mov.u16 %rs50, 0;
|
|
st.v4.u8 [%rd124], {%rs50, %rs50, %rs50, %rs50};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_60:
|
|
setp.geu.f32 %p53, %f92, 0f00000000;
|
|
@%p53 bra BB0_63;
|
|
|
|
mov.f32 %f601, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f381, %f601;
|
|
setp.neu.f32 %p54, %f381, 0f3EE66666;
|
|
selp.f32 %f653, 0f7FFFFFFF, %f653, %p54;
|
|
|
|
BB0_63:
|
|
abs.f32 %f578, %f92;
|
|
add.f32 %f383, %f578, 0f3EE66666;
|
|
mov.b32 %r231, %f383;
|
|
setp.lt.s32 %p56, %r231, 2139095040;
|
|
@%p56 bra BB0_68;
|
|
|
|
abs.f32 %f599, %f92;
|
|
setp.gtu.f32 %p57, %f599, 0f7F800000;
|
|
@%p57 bra BB0_67;
|
|
bra.uni BB0_65;
|
|
|
|
BB0_67:
|
|
add.f32 %f653, %f92, 0f3EE66666;
|
|
bra.uni BB0_68;
|
|
|
|
BB0_65:
|
|
abs.f32 %f600, %f92;
|
|
setp.neu.f32 %p58, %f600, 0f7F800000;
|
|
@%p58 bra BB0_68;
|
|
|
|
selp.f32 %f653, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_68:
|
|
mov.f32 %f587, 0fB5BFBE8E;
|
|
mov.f32 %f586, 0fBF317200;
|
|
mov.f32 %f585, 0f00000000;
|
|
mov.f32 %f584, 0f35BFBE8E;
|
|
mov.f32 %f583, 0f3F317200;
|
|
mov.f32 %f582, 0f3DAAAABD;
|
|
mov.f32 %f581, 0f3C4CAF63;
|
|
mov.f32 %f580, 0f3B18F0FE;
|
|
mov.f32 %f579, 0f3EE66666;
|
|
setp.eq.f32 %p59, %f92, 0f3F800000;
|
|
selp.f32 %f108, 0f3F800000, %f653, %p59;
|
|
abs.f32 %f109, %f93;
|
|
setp.lt.f32 %p60, %f109, 0f00800000;
|
|
mul.f32 %f386, %f109, 0f4B800000;
|
|
selp.f32 %f387, 0fC3170000, 0fC2FE0000, %p60;
|
|
selp.f32 %f388, %f386, %f109, %p60;
|
|
mov.b32 %r232, %f388;
|
|
and.b32 %r233, %r232, 8388607;
|
|
or.b32 %r234, %r233, 1065353216;
|
|
mov.b32 %f389, %r234;
|
|
shr.u32 %r235, %r232, 23;
|
|
cvt.rn.f32.u32 %f390, %r235;
|
|
add.f32 %f391, %f387, %f390;
|
|
setp.gt.f32 %p61, %f389, 0f3FB504F3;
|
|
mul.f32 %f392, %f389, 0f3F000000;
|
|
add.f32 %f393, %f391, 0f3F800000;
|
|
selp.f32 %f394, %f392, %f389, %p61;
|
|
selp.f32 %f395, %f393, %f391, %p61;
|
|
add.f32 %f396, %f394, 0fBF800000;
|
|
add.f32 %f385, %f394, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f384,%f385;
|
|
// inline asm
|
|
add.f32 %f397, %f396, %f396;
|
|
mul.f32 %f398, %f384, %f397;
|
|
mul.f32 %f399, %f398, %f398;
|
|
fma.rn.f32 %f402, %f580, %f399, %f581;
|
|
fma.rn.f32 %f404, %f402, %f399, %f582;
|
|
mul.rn.f32 %f405, %f404, %f399;
|
|
mul.rn.f32 %f406, %f405, %f398;
|
|
sub.f32 %f407, %f396, %f398;
|
|
neg.f32 %f408, %f398;
|
|
add.f32 %f409, %f407, %f407;
|
|
fma.rn.f32 %f410, %f408, %f396, %f409;
|
|
mul.rn.f32 %f411, %f384, %f410;
|
|
add.f32 %f412, %f406, %f398;
|
|
sub.f32 %f413, %f398, %f412;
|
|
add.f32 %f414, %f406, %f413;
|
|
add.f32 %f415, %f411, %f414;
|
|
add.f32 %f416, %f412, %f415;
|
|
sub.f32 %f417, %f412, %f416;
|
|
add.f32 %f418, %f415, %f417;
|
|
mul.rn.f32 %f420, %f395, %f583;
|
|
mul.rn.f32 %f422, %f395, %f584;
|
|
add.f32 %f423, %f420, %f416;
|
|
sub.f32 %f424, %f420, %f423;
|
|
add.f32 %f425, %f416, %f424;
|
|
add.f32 %f426, %f418, %f425;
|
|
add.f32 %f427, %f422, %f426;
|
|
add.f32 %f428, %f423, %f427;
|
|
sub.f32 %f429, %f423, %f428;
|
|
add.f32 %f430, %f427, %f429;
|
|
mul.rn.f32 %f432, %f579, %f428;
|
|
neg.f32 %f433, %f432;
|
|
fma.rn.f32 %f434, %f579, %f428, %f433;
|
|
fma.rn.f32 %f435, %f579, %f430, %f434;
|
|
fma.rn.f32 %f437, %f585, %f428, %f435;
|
|
add.rn.f32 %f438, %f432, %f437;
|
|
neg.f32 %f439, %f438;
|
|
add.rn.f32 %f440, %f432, %f439;
|
|
add.rn.f32 %f441, %f440, %f437;
|
|
mov.b32 %r236, %f438;
|
|
setp.eq.s32 %p62, %r236, 1118925336;
|
|
add.s32 %r237, %r236, -1;
|
|
mov.b32 %f442, %r237;
|
|
add.f32 %f443, %f441, 0f37000000;
|
|
selp.f32 %f444, %f442, %f438, %p62;
|
|
selp.f32 %f110, %f443, %f441, %p62;
|
|
mul.f32 %f445, %f444, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f446, %f445;
|
|
fma.rn.f32 %f448, %f446, %f586, %f444;
|
|
fma.rn.f32 %f450, %f446, %f587, %f448;
|
|
mul.f32 %f451, %f450, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f452, %f451;
|
|
add.f32 %f453, %f446, 0f00000000;
|
|
ex2.approx.f32 %f454, %f453;
|
|
mul.f32 %f455, %f452, %f454;
|
|
setp.lt.f32 %p63, %f444, 0fC2D20000;
|
|
selp.f32 %f456, 0f00000000, %f455, %p63;
|
|
setp.gt.f32 %p64, %f444, 0f42D20000;
|
|
selp.f32 %f654, 0f7F800000, %f456, %p64;
|
|
setp.eq.f32 %p65, %f654, 0f7F800000;
|
|
@%p65 bra BB0_70;
|
|
|
|
fma.rn.f32 %f654, %f654, %f110, %f654;
|
|
|
|
BB0_70:
|
|
setp.lt.f32 %p66, %f93, 0f00000000;
|
|
and.pred %p2, %p66, %p51;
|
|
mov.b32 %r238, %f654;
|
|
xor.b32 %r239, %r238, -2147483648;
|
|
mov.b32 %f457, %r239;
|
|
selp.f32 %f656, %f457, %f654, %p2;
|
|
setp.eq.f32 %p68, %f93, 0f00000000;
|
|
@%p68 bra BB0_73;
|
|
bra.uni BB0_71;
|
|
|
|
BB0_73:
|
|
add.f32 %f460, %f93, %f93;
|
|
selp.f32 %f656, %f460, 0f00000000, %p51;
|
|
bra.uni BB0_74;
|
|
|
|
BB0_71:
|
|
setp.geu.f32 %p69, %f93, 0f00000000;
|
|
@%p69 bra BB0_74;
|
|
|
|
mov.f32 %f598, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f459, %f598;
|
|
setp.neu.f32 %p70, %f459, 0f3EE66666;
|
|
selp.f32 %f656, 0f7FFFFFFF, %f656, %p70;
|
|
|
|
BB0_74:
|
|
abs.f32 %f602, %f93;
|
|
add.f32 %f461, %f602, 0f3EE66666;
|
|
mov.b32 %r240, %f461;
|
|
setp.lt.s32 %p72, %r240, 2139095040;
|
|
@%p72 bra BB0_79;
|
|
|
|
abs.f32 %f603, %f93;
|
|
setp.gtu.f32 %p73, %f603, 0f7F800000;
|
|
@%p73 bra BB0_78;
|
|
bra.uni BB0_76;
|
|
|
|
BB0_78:
|
|
add.f32 %f656, %f93, 0f3EE66666;
|
|
bra.uni BB0_79;
|
|
|
|
BB0_76:
|
|
abs.f32 %f604, %f93;
|
|
setp.neu.f32 %p74, %f604, 0f7F800000;
|
|
@%p74 bra BB0_79;
|
|
|
|
selp.f32 %f656, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_79:
|
|
mov.f32 %f596, 0fB5BFBE8E;
|
|
mov.f32 %f595, 0fBF317200;
|
|
mov.f32 %f594, 0f00000000;
|
|
mov.f32 %f593, 0f35BFBE8E;
|
|
mov.f32 %f592, 0f3F317200;
|
|
mov.f32 %f591, 0f3DAAAABD;
|
|
mov.f32 %f590, 0f3C4CAF63;
|
|
mov.f32 %f589, 0f3B18F0FE;
|
|
mov.f32 %f588, 0f3EE66666;
|
|
setp.eq.f32 %p75, %f93, 0f3F800000;
|
|
selp.f32 %f121, 0f3F800000, %f656, %p75;
|
|
abs.f32 %f122, %f94;
|
|
setp.lt.f32 %p76, %f122, 0f00800000;
|
|
mul.f32 %f464, %f122, 0f4B800000;
|
|
selp.f32 %f465, 0fC3170000, 0fC2FE0000, %p76;
|
|
selp.f32 %f466, %f464, %f122, %p76;
|
|
mov.b32 %r241, %f466;
|
|
and.b32 %r242, %r241, 8388607;
|
|
or.b32 %r243, %r242, 1065353216;
|
|
mov.b32 %f467, %r243;
|
|
shr.u32 %r244, %r241, 23;
|
|
cvt.rn.f32.u32 %f468, %r244;
|
|
add.f32 %f469, %f465, %f468;
|
|
setp.gt.f32 %p77, %f467, 0f3FB504F3;
|
|
mul.f32 %f470, %f467, 0f3F000000;
|
|
add.f32 %f471, %f469, 0f3F800000;
|
|
selp.f32 %f472, %f470, %f467, %p77;
|
|
selp.f32 %f473, %f471, %f469, %p77;
|
|
add.f32 %f474, %f472, 0fBF800000;
|
|
add.f32 %f463, %f472, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f462,%f463;
|
|
// inline asm
|
|
add.f32 %f475, %f474, %f474;
|
|
mul.f32 %f476, %f462, %f475;
|
|
mul.f32 %f477, %f476, %f476;
|
|
fma.rn.f32 %f480, %f589, %f477, %f590;
|
|
fma.rn.f32 %f482, %f480, %f477, %f591;
|
|
mul.rn.f32 %f483, %f482, %f477;
|
|
mul.rn.f32 %f484, %f483, %f476;
|
|
sub.f32 %f485, %f474, %f476;
|
|
neg.f32 %f486, %f476;
|
|
add.f32 %f487, %f485, %f485;
|
|
fma.rn.f32 %f488, %f486, %f474, %f487;
|
|
mul.rn.f32 %f489, %f462, %f488;
|
|
add.f32 %f490, %f484, %f476;
|
|
sub.f32 %f491, %f476, %f490;
|
|
add.f32 %f492, %f484, %f491;
|
|
add.f32 %f493, %f489, %f492;
|
|
add.f32 %f494, %f490, %f493;
|
|
sub.f32 %f495, %f490, %f494;
|
|
add.f32 %f496, %f493, %f495;
|
|
mul.rn.f32 %f498, %f473, %f592;
|
|
mul.rn.f32 %f500, %f473, %f593;
|
|
add.f32 %f501, %f498, %f494;
|
|
sub.f32 %f502, %f498, %f501;
|
|
add.f32 %f503, %f494, %f502;
|
|
add.f32 %f504, %f496, %f503;
|
|
add.f32 %f505, %f500, %f504;
|
|
add.f32 %f506, %f501, %f505;
|
|
sub.f32 %f507, %f501, %f506;
|
|
add.f32 %f508, %f505, %f507;
|
|
mul.rn.f32 %f510, %f588, %f506;
|
|
neg.f32 %f511, %f510;
|
|
fma.rn.f32 %f512, %f588, %f506, %f511;
|
|
fma.rn.f32 %f513, %f588, %f508, %f512;
|
|
fma.rn.f32 %f515, %f594, %f506, %f513;
|
|
add.rn.f32 %f516, %f510, %f515;
|
|
neg.f32 %f517, %f516;
|
|
add.rn.f32 %f518, %f510, %f517;
|
|
add.rn.f32 %f519, %f518, %f515;
|
|
mov.b32 %r245, %f516;
|
|
setp.eq.s32 %p78, %r245, 1118925336;
|
|
add.s32 %r246, %r245, -1;
|
|
mov.b32 %f520, %r246;
|
|
add.f32 %f521, %f519, 0f37000000;
|
|
selp.f32 %f522, %f520, %f516, %p78;
|
|
selp.f32 %f123, %f521, %f519, %p78;
|
|
mul.f32 %f523, %f522, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f524, %f523;
|
|
fma.rn.f32 %f526, %f524, %f595, %f522;
|
|
fma.rn.f32 %f528, %f524, %f596, %f526;
|
|
mul.f32 %f529, %f528, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f530, %f529;
|
|
add.f32 %f531, %f524, 0f00000000;
|
|
ex2.approx.f32 %f532, %f531;
|
|
mul.f32 %f533, %f530, %f532;
|
|
setp.lt.f32 %p79, %f522, 0fC2D20000;
|
|
selp.f32 %f534, 0f00000000, %f533, %p79;
|
|
setp.gt.f32 %p80, %f522, 0f42D20000;
|
|
selp.f32 %f657, 0f7F800000, %f534, %p80;
|
|
setp.eq.f32 %p81, %f657, 0f7F800000;
|
|
@%p81 bra BB0_81;
|
|
|
|
fma.rn.f32 %f657, %f657, %f123, %f657;
|
|
|
|
BB0_81:
|
|
setp.lt.f32 %p82, %f94, 0f00000000;
|
|
and.pred %p3, %p82, %p51;
|
|
mov.b32 %r247, %f657;
|
|
xor.b32 %r248, %r247, -2147483648;
|
|
mov.b32 %f535, %r248;
|
|
selp.f32 %f659, %f535, %f657, %p3;
|
|
setp.eq.f32 %p84, %f94, 0f00000000;
|
|
@%p84 bra BB0_84;
|
|
bra.uni BB0_82;
|
|
|
|
BB0_84:
|
|
add.f32 %f538, %f94, %f94;
|
|
selp.f32 %f659, %f538, 0f00000000, %p51;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_82:
|
|
setp.geu.f32 %p85, %f94, 0f00000000;
|
|
@%p85 bra BB0_85;
|
|
|
|
mov.f32 %f597, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f537, %f597;
|
|
setp.neu.f32 %p86, %f537, 0f3EE66666;
|
|
selp.f32 %f659, 0f7FFFFFFF, %f659, %p86;
|
|
|
|
BB0_85:
|
|
abs.f32 %f609, %f94;
|
|
add.f32 %f539, %f609, 0f3EE66666;
|
|
mov.b32 %r249, %f539;
|
|
setp.lt.s32 %p88, %r249, 2139095040;
|
|
@%p88 bra BB0_90;
|
|
|
|
abs.f32 %f610, %f94;
|
|
setp.gtu.f32 %p89, %f610, 0f7F800000;
|
|
@%p89 bra BB0_89;
|
|
bra.uni BB0_87;
|
|
|
|
BB0_89:
|
|
add.f32 %f659, %f94, 0f3EE66666;
|
|
bra.uni BB0_90;
|
|
|
|
BB0_87:
|
|
abs.f32 %f611, %f94;
|
|
setp.neu.f32 %p90, %f611, 0f7F800000;
|
|
@%p90 bra BB0_90;
|
|
|
|
selp.f32 %f659, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_90:
|
|
mov.u32 %r282, 4;
|
|
mov.u64 %rd131, 0;
|
|
mov.u32 %r281, 2;
|
|
setp.eq.f32 %p91, %f94, 0f3F800000;
|
|
selp.f32 %f540, 0f3F800000, %f659, %p91;
|
|
cvt.u64.u32 %rd66, %r4;
|
|
cvt.u64.u32 %rd65, %r3;
|
|
mov.u64 %rd69, image;
|
|
cvta.global.u64 %rd64, %rd69;
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd64, %r281, %r282, %rd65, %rd66, %rd131, %rd131);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f541, %f540;
|
|
mul.f32 %f542, %f541, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r252, %f542;
|
|
cvt.sat.f32.f32 %f543, %f121;
|
|
mul.f32 %f544, %f543, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r253, %f544;
|
|
cvt.sat.f32.f32 %f545, %f108;
|
|
mul.f32 %f546, %f545, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r254, %f546;
|
|
cvt.u16.u32 %rs10, %r252;
|
|
cvt.u16.u32 %rs11, %r254;
|
|
cvt.u16.u32 %rs12, %r253;
|
|
mov.u16 %rs13, 255;
|
|
st.v4.u8 [%rd63], {%rs10, %rs12, %rs11, %rs13};
|
|
ld.global.u32 %r311, [imageEnabled];
|
|
|
|
BB0_91:
|
|
and.b32 %r255, %r311, 4;
|
|
setp.eq.s32 %p92, %r255, 0;
|
|
@%p92 bra BB0_95;
|
|
|
|
ld.global.u32 %r256, [additive];
|
|
setp.eq.s32 %p93, %r256, 0;
|
|
cvt.u64.u32 %rd16, %r3;
|
|
cvt.u64.u32 %rd17, %r4;
|
|
mov.f32 %f547, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs14, %f547;}
|
|
|
|
// inline asm
|
|
@%p93 bra BB0_94;
|
|
|
|
mov.u64 %rd132, 0;
|
|
mov.u32 %r283, 2;
|
|
mov.u64 %rd82, image_HDR;
|
|
cvta.global.u64 %rd71, %rd82;
|
|
mov.u32 %r260, 8;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r283, %r260, %rd16, %rd17, %rd132, %rd132);
|
|
// inline asm
|
|
ld.v4.u16 {%rs21, %rs22, %rs23, %rs24}, [%rd70];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f548, %rs21;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f549, %rs22;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f550, %rs23;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd76), _rt_buffer_get_64, (%rd71, %r283, %r260, %rd16, %rd17, %rd132, %rd132);
|
|
// inline asm
|
|
add.f32 %f551, %f92, %f548;
|
|
add.f32 %f552, %f93, %f549;
|
|
add.f32 %f553, %f94, %f550;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs20, %f553;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs19, %f552;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs18, %f551;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd76], {%rs18, %rs19, %rs20, %rs14};
|
|
bra.uni BB0_95;
|
|
|
|
BB0_94:
|
|
mov.u64 %rd133, 0;
|
|
mov.u32 %r284, 2;
|
|
mov.u64 %rd89, image_HDR;
|
|
cvta.global.u64 %rd84, %rd89;
|
|
mov.u32 %r262, 8;
|
|
// inline asm
|
|
call (%rd83), _rt_buffer_get_64, (%rd84, %r284, %r262, %rd16, %rd17, %rd133, %rd133);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f94;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f93;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f92;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd83], {%rs25, %rs26, %rs27, %rs14};
|
|
|
|
BB0_95:
|
|
ld.global.u8 %rs28, [imageEnabled];
|
|
and.b16 %rs29, %rs28, 64;
|
|
setp.eq.s16 %p94, %rs29, 0;
|
|
@%p94 bra BB0_105;
|
|
|
|
mov.u32 %r286, 4;
|
|
mov.u64 %rd134, 0;
|
|
mov.u32 %r285, 2;
|
|
mul.f32 %f557, %f640, %f640;
|
|
fma.rn.f32 %f558, %f639, %f639, %f557;
|
|
fma.rn.f32 %f559, %f641, %f641, %f558;
|
|
sqrt.rn.f32 %f560, %f559;
|
|
rcp.rn.f32 %f561, %f560;
|
|
mul.f32 %f562, %f639, %f561;
|
|
mul.f32 %f563, %f640, %f561;
|
|
mul.f32 %f564, %f641, %f561;
|
|
cvt.u64.u32 %rd93, %r4;
|
|
cvt.u64.u32 %rd92, %r3;
|
|
mov.u64 %rd96, image_Dir;
|
|
cvta.global.u64 %rd91, %rd96;
|
|
// inline asm
|
|
call (%rd90), _rt_buffer_get_64, (%rd91, %r285, %r286, %rd92, %rd93, %rd134, %rd134);
|
|
// inline asm
|
|
fma.rn.f32 %f565, %f562, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f566, %f565, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r265, %f566;
|
|
fma.rn.f32 %f567, %f563, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f568, %f567, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r266, %f568;
|
|
fma.rn.f32 %f569, %f564, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f570, %f569, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r267, %f570;
|
|
cvt.u16.u32 %rs30, %r267;
|
|
cvt.u16.u32 %rs31, %r266;
|
|
cvt.u16.u32 %rs32, %r265;
|
|
mov.u16 %rs33, 255;
|
|
st.v4.u8 [%rd90], {%rs32, %rs31, %rs30, %rs33};
|
|
|
|
BB0_105:
|
|
ret;
|
|
}
|
|
|
|
|