2026 lines
56 KiB
Plaintext
2026 lines
56 KiB
Plaintext
//
|
|
// Generated by NVIDIA NVVM Compiler
|
|
//
|
|
// Compiler Build ID: CL-23083092
|
|
// Cuda compilation tools, release 9.1, V9.1.85
|
|
// Based on LLVM 3.4svn
|
|
//
|
|
|
|
.version 6.1
|
|
.target sm_30
|
|
.address_size 64
|
|
|
|
// .globl _Z6oxMainv
|
|
.global .align 8 .b8 pixelID[8];
|
|
.global .align 8 .b8 resolution[8];
|
|
.global .align 4 .b8 normal[12];
|
|
.global .align 4 .b8 camPos[12];
|
|
.global .align 4 .b8 root[4];
|
|
.global .align 4 .u32 imageEnabled;
|
|
.global .texref lightmap;
|
|
.global .align 16 .b8 tileInfo[16];
|
|
.global .align 4 .u32 additive;
|
|
.global .align 1 .b8 image[1];
|
|
.global .align 1 .b8 image_HDR[1];
|
|
.global .align 1 .b8 image_HDR2[1];
|
|
.global .align 1 .b8 image_RNM0[1];
|
|
.global .align 1 .b8 image_RNM1[1];
|
|
.global .align 1 .b8 image_RNM2[1];
|
|
.global .align 1 .b8 uvtangent[1];
|
|
.global .align 1 .b8 uvpos[1];
|
|
.global .align 1 .b8 uvnormal[1];
|
|
.global .align 1 .b8 rnd_seeds[1];
|
|
.global .texref sky;
|
|
.global .align 4 .b8 skyColor[12];
|
|
.global .align 4 .u32 samples;
|
|
.global .align 4 .u32 hemispherical;
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8skyColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo13hemisphericalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
|
|
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename8skyColorE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename13hemisphericalE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8skyColorE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum13hemisphericalE = 4919;
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8skyColorE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic13hemisphericalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8skyColorE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation13hemisphericalE[1];
|
|
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
|
|
|
|
.visible .entry _Z6oxMainv(
|
|
|
|
)
|
|
{
|
|
.local .align 4 .b8 __local_depot0[32];
|
|
.reg .b64 %SP;
|
|
.reg .b64 %SPL;
|
|
.reg .pred %p<110>;
|
|
.reg .b16 %rs<153>;
|
|
.reg .f32 %f<847>;
|
|
.reg .b32 %r<375>;
|
|
.reg .b64 %rd<276>;
|
|
|
|
|
|
mov.u64 %rd275, __local_depot0;
|
|
cvta.local.u64 %SP, %rd275;
|
|
ld.global.u32 %r1, [samples];
|
|
ld.global.v2.u32 {%r99, %r100}, [pixelID];
|
|
cvt.u64.u32 %rd24, %r99;
|
|
cvt.u64.u32 %rd25, %r100;
|
|
mov.u64 %rd28, uvnormal;
|
|
cvta.global.u64 %rd23, %rd28;
|
|
mov.u32 %r97, 2;
|
|
mov.u32 %r98, 4;
|
|
mov.u64 %rd27, 0;
|
|
// inline asm
|
|
call (%rd22), _rt_buffer_get_64, (%rd23, %r97, %r98, %rd24, %rd25, %rd27, %rd27);
|
|
// inline asm
|
|
ld.u32 %r2, [%rd22];
|
|
shr.u32 %r103, %r2, 16;
|
|
cvt.u16.u32 %rs1, %r103;
|
|
and.b16 %rs6, %rs1, 255;
|
|
cvt.u16.u32 %rs7, %r2;
|
|
or.b16 %rs8, %rs7, %rs6;
|
|
setp.eq.s16 %p4, %rs8, 0;
|
|
mov.f32 %f798, 0f00000000;
|
|
mov.f32 %f799, %f798;
|
|
mov.f32 %f800, %f798;
|
|
@%p4 bra BB0_2;
|
|
|
|
ld.u8 %rs9, [%rd22+1];
|
|
and.b16 %rs11, %rs7, 255;
|
|
cvt.rn.f32.u16 %f170, %rs11;
|
|
div.rn.f32 %f171, %f170, 0f437F0000;
|
|
fma.rn.f32 %f172, %f171, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f173, %rs9;
|
|
div.rn.f32 %f174, %f173, 0f437F0000;
|
|
fma.rn.f32 %f175, %f174, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f176, %rs6;
|
|
div.rn.f32 %f177, %f176, 0f437F0000;
|
|
fma.rn.f32 %f178, %f177, 0f40000000, 0fBF800000;
|
|
mul.f32 %f179, %f175, %f175;
|
|
fma.rn.f32 %f180, %f172, %f172, %f179;
|
|
fma.rn.f32 %f181, %f178, %f178, %f180;
|
|
sqrt.rn.f32 %f182, %f181;
|
|
rcp.rn.f32 %f183, %f182;
|
|
mul.f32 %f798, %f172, %f183;
|
|
mul.f32 %f799, %f175, %f183;
|
|
mul.f32 %f800, %f178, %f183;
|
|
|
|
BB0_2:
|
|
ld.global.v2.u32 {%r104, %r105}, [pixelID];
|
|
ld.global.v2.u32 {%r107, %r108}, [tileInfo];
|
|
add.s32 %r3, %r104, %r107;
|
|
add.s32 %r4, %r105, %r108;
|
|
setp.eq.f32 %p5, %f799, 0f00000000;
|
|
setp.eq.f32 %p6, %f798, 0f00000000;
|
|
and.pred %p7, %p6, %p5;
|
|
setp.eq.f32 %p8, %f800, 0f00000000;
|
|
and.pred %p9, %p7, %p8;
|
|
@%p9 bra BB0_110;
|
|
bra.uni BB0_3;
|
|
|
|
BB0_110:
|
|
ld.global.u32 %r374, [imageEnabled];
|
|
and.b32 %r306, %r374, 1;
|
|
setp.eq.b32 %p104, %r306, 1;
|
|
@!%p104 bra BB0_112;
|
|
bra.uni BB0_111;
|
|
|
|
BB0_111:
|
|
cvt.u64.u32 %rd176, %r4;
|
|
cvt.u64.u32 %rd175, %r3;
|
|
mov.u64 %rd179, image;
|
|
cvta.global.u64 %rd174, %rd179;
|
|
mov.u64 %rd178, 0;
|
|
// inline asm
|
|
call (%rd173), _rt_buffer_get_64, (%rd174, %r97, %r98, %rd175, %rd176, %rd178, %rd178);
|
|
// inline asm
|
|
mov.u16 %rs100, 0;
|
|
st.v4.u8 [%rd173], {%rs100, %rs100, %rs100, %rs100};
|
|
ld.global.u32 %r374, [imageEnabled];
|
|
|
|
BB0_112:
|
|
cvt.u64.u32 %rd20, %r3;
|
|
cvt.u64.u32 %rd21, %r4;
|
|
and.b32 %r309, %r374, 4;
|
|
setp.eq.s32 %p105, %r309, 0;
|
|
@%p105 bra BB0_116;
|
|
|
|
ld.global.u32 %r310, [additive];
|
|
setp.eq.s32 %p106, %r310, 0;
|
|
@%p106 bra BB0_115;
|
|
|
|
mov.u64 %rd192, image_HDR;
|
|
cvta.global.u64 %rd181, %rd192;
|
|
mov.u32 %r314, 8;
|
|
mov.u64 %rd191, 0;
|
|
// inline asm
|
|
call (%rd180), _rt_buffer_get_64, (%rd181, %r97, %r314, %rd20, %rd21, %rd191, %rd191);
|
|
// inline asm
|
|
ld.v4.u16 {%rs107, %rs108, %rs109, %rs110}, [%rd180];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f732, %rs107;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f733, %rs108;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f734, %rs109;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd186), _rt_buffer_get_64, (%rd181, %r97, %r314, %rd20, %rd21, %rd191, %rd191);
|
|
// inline asm
|
|
add.f32 %f735, %f732, 0f00000000;
|
|
add.f32 %f736, %f733, 0f00000000;
|
|
add.f32 %f737, %f734, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs106, %f737;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs105, %f736;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f735;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs111, 0;
|
|
st.v4.u16 [%rd186], {%rs104, %rs105, %rs106, %rs111};
|
|
bra.uni BB0_116;
|
|
|
|
BB0_3:
|
|
ld.global.v2.u32 {%r118, %r119}, [pixelID];
|
|
cvt.u64.u32 %rd31, %r118;
|
|
cvt.u64.u32 %rd32, %r119;
|
|
mov.u64 %rd47, uvpos;
|
|
cvta.global.u64 %rd30, %rd47;
|
|
mov.u32 %r113, 12;
|
|
// inline asm
|
|
call (%rd29), _rt_buffer_get_64, (%rd30, %r97, %r113, %rd31, %rd32, %rd27, %rd27);
|
|
// inline asm
|
|
ld.f32 %f187, [%rd29+8];
|
|
ld.f32 %f188, [%rd29+4];
|
|
ld.f32 %f189, [%rd29];
|
|
mul.f32 %f190, %f189, 0f3456BF95;
|
|
mul.f32 %f191, %f188, 0f3456BF95;
|
|
mul.f32 %f192, %f187, 0f3456BF95;
|
|
abs.f32 %f193, %f798;
|
|
div.rn.f32 %f194, %f190, %f193;
|
|
abs.f32 %f195, %f799;
|
|
div.rn.f32 %f196, %f191, %f195;
|
|
abs.f32 %f197, %f800;
|
|
div.rn.f32 %f198, %f192, %f197;
|
|
abs.f32 %f199, %f194;
|
|
abs.f32 %f200, %f196;
|
|
abs.f32 %f201, %f198;
|
|
mov.f32 %f202, 0f38D1B717;
|
|
max.f32 %f203, %f199, %f202;
|
|
max.f32 %f204, %f200, %f202;
|
|
max.f32 %f205, %f201, %f202;
|
|
fma.rn.f32 %f7, %f798, %f203, %f189;
|
|
fma.rn.f32 %f8, %f799, %f204, %f188;
|
|
fma.rn.f32 %f9, %f800, %f205, %f187;
|
|
ld.global.u32 %r5, [hemispherical];
|
|
setp.gt.f32 %p10, %f193, %f197;
|
|
neg.f32 %f206, %f799;
|
|
selp.f32 %f207, %f206, 0f00000000, %p10;
|
|
neg.f32 %f208, %f800;
|
|
selp.f32 %f209, %f798, %f208, %p10;
|
|
selp.f32 %f210, 0f00000000, %f799, %p10;
|
|
mul.f32 %f211, %f209, %f209;
|
|
fma.rn.f32 %f212, %f207, %f207, %f211;
|
|
fma.rn.f32 %f213, %f210, %f210, %f212;
|
|
sqrt.rn.f32 %f214, %f213;
|
|
rcp.rn.f32 %f215, %f214;
|
|
mul.f32 %f10, %f207, %f215;
|
|
mul.f32 %f11, %f209, %f215;
|
|
mul.f32 %f12, %f210, %f215;
|
|
ld.global.v2.u32 {%r122, %r123}, [pixelID];
|
|
cvt.u64.u32 %rd37, %r122;
|
|
cvt.u64.u32 %rd38, %r123;
|
|
mov.u64 %rd48, rnd_seeds;
|
|
cvta.global.u64 %rd36, %rd48;
|
|
// inline asm
|
|
call (%rd35), _rt_buffer_get_64, (%rd36, %r97, %r98, %rd37, %rd38, %rd27, %rd27);
|
|
// inline asm
|
|
ld.u32 %r352, [%rd35];
|
|
ld.global.v2.u32 {%r126, %r127}, [pixelID];
|
|
cvt.u64.u32 %rd43, %r126;
|
|
cvt.u64.u32 %rd44, %r127;
|
|
mov.u64 %rd49, uvtangent;
|
|
cvta.global.u64 %rd42, %rd49;
|
|
// inline asm
|
|
call (%rd41), _rt_buffer_get_64, (%rd42, %r97, %r98, %rd43, %rd44, %rd27, %rd27);
|
|
// inline asm
|
|
ld.u32 %r7, [%rd41];
|
|
shr.u32 %r8, %r7, 16;
|
|
cvt.u16.u32 %rs13, %r8;
|
|
and.b16 %rs14, %rs13, 255;
|
|
cvt.u16.u32 %rs15, %r7;
|
|
or.b16 %rs16, %rs15, %rs14;
|
|
setp.eq.s16 %p11, %rs16, 0;
|
|
mov.f32 %f833, 0f00000000;
|
|
mov.f32 %f801, %f833;
|
|
mov.f32 %f802, %f833;
|
|
mov.f32 %f803, %f833;
|
|
@%p11 bra BB0_5;
|
|
|
|
ld.u8 %rs17, [%rd41+1];
|
|
and.b16 %rs19, %rs15, 255;
|
|
cvt.rn.f32.u16 %f216, %rs19;
|
|
div.rn.f32 %f217, %f216, 0f437F0000;
|
|
fma.rn.f32 %f218, %f217, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f219, %rs17;
|
|
div.rn.f32 %f220, %f219, 0f437F0000;
|
|
fma.rn.f32 %f221, %f220, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f222, %rs14;
|
|
div.rn.f32 %f223, %f222, 0f437F0000;
|
|
fma.rn.f32 %f224, %f223, 0f40000000, 0fBF800000;
|
|
mul.f32 %f225, %f221, %f221;
|
|
fma.rn.f32 %f226, %f218, %f218, %f225;
|
|
fma.rn.f32 %f227, %f224, %f224, %f226;
|
|
sqrt.rn.f32 %f228, %f227;
|
|
rcp.rn.f32 %f229, %f228;
|
|
mul.f32 %f801, %f218, %f229;
|
|
mul.f32 %f802, %f221, %f229;
|
|
mul.f32 %f803, %f224, %f229;
|
|
|
|
BB0_5:
|
|
mul.f32 %f233, %f800, %f802;
|
|
mul.f32 %f234, %f799, %f803;
|
|
sub.f32 %f235, %f234, %f233;
|
|
mul.f32 %f236, %f798, %f803;
|
|
mul.f32 %f237, %f800, %f801;
|
|
sub.f32 %f238, %f237, %f236;
|
|
mul.f32 %f239, %f799, %f801;
|
|
mul.f32 %f240, %f798, %f802;
|
|
sub.f32 %f241, %f240, %f239;
|
|
setp.lt.u32 %p12, %r7, 16777216;
|
|
selp.f32 %f242, 0fBF800000, 0f3F800000, %p12;
|
|
mul.f32 %f243, %f235, %f242;
|
|
mul.f32 %f244, %f238, %f242;
|
|
mul.f32 %f245, %f241, %f242;
|
|
mul.f32 %f246, %f243, 0f00000000;
|
|
mul.f32 %f247, %f244, 0f00000000;
|
|
mul.f32 %f248, %f245, 0f00000000;
|
|
fma.rn.f32 %f249, %f801, 0f3F5105EC, %f246;
|
|
fma.rn.f32 %f250, %f802, 0f3F5105EC, %f247;
|
|
fma.rn.f32 %f251, %f803, 0f3F5105EC, %f248;
|
|
mul.f32 %f19, %f798, 0f3F13CD3A;
|
|
add.f32 %f20, %f19, %f249;
|
|
mul.f32 %f21, %f799, 0f3F13CD3A;
|
|
add.f32 %f22, %f21, %f250;
|
|
mul.f32 %f23, %f800, 0f3F13CD3A;
|
|
add.f32 %f24, %f23, %f251;
|
|
ld.global.v2.u32 {%r132, %r133}, [pixelID];
|
|
cvt.u64.u32 %rd52, %r132;
|
|
cvt.u64.u32 %rd53, %r133;
|
|
// inline asm
|
|
call (%rd50), _rt_buffer_get_64, (%rd42, %r97, %r98, %rd52, %rd53, %rd27, %rd27);
|
|
// inline asm
|
|
ld.u32 %r9, [%rd50];
|
|
shr.u32 %r10, %r9, 16;
|
|
cvt.u16.u32 %rs22, %r10;
|
|
and.b16 %rs23, %rs22, 255;
|
|
cvt.u16.u32 %rs24, %r9;
|
|
or.b16 %rs25, %rs24, %rs23;
|
|
setp.eq.s16 %p13, %rs25, 0;
|
|
mov.f32 %f804, %f833;
|
|
mov.f32 %f805, %f833;
|
|
mov.f32 %f806, %f833;
|
|
@%p13 bra BB0_7;
|
|
|
|
ld.u8 %rs26, [%rd50+1];
|
|
and.b16 %rs28, %rs24, 255;
|
|
cvt.rn.f32.u16 %f252, %rs28;
|
|
div.rn.f32 %f253, %f252, 0f437F0000;
|
|
fma.rn.f32 %f254, %f253, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f255, %rs26;
|
|
div.rn.f32 %f256, %f255, 0f437F0000;
|
|
fma.rn.f32 %f257, %f256, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f258, %rs23;
|
|
div.rn.f32 %f259, %f258, 0f437F0000;
|
|
fma.rn.f32 %f260, %f259, 0f40000000, 0fBF800000;
|
|
mul.f32 %f261, %f257, %f257;
|
|
fma.rn.f32 %f262, %f254, %f254, %f261;
|
|
fma.rn.f32 %f263, %f260, %f260, %f262;
|
|
sqrt.rn.f32 %f264, %f263;
|
|
rcp.rn.f32 %f265, %f264;
|
|
mul.f32 %f804, %f254, %f265;
|
|
mul.f32 %f805, %f257, %f265;
|
|
mul.f32 %f806, %f260, %f265;
|
|
|
|
BB0_7:
|
|
mul.f32 %f269, %f800, %f805;
|
|
mul.f32 %f270, %f799, %f806;
|
|
sub.f32 %f271, %f270, %f269;
|
|
mul.f32 %f272, %f798, %f806;
|
|
mul.f32 %f273, %f800, %f804;
|
|
sub.f32 %f274, %f273, %f272;
|
|
mul.f32 %f275, %f799, %f804;
|
|
mul.f32 %f276, %f798, %f805;
|
|
sub.f32 %f277, %f276, %f275;
|
|
setp.lt.u32 %p14, %r9, 16777216;
|
|
selp.f32 %f278, 0fBF800000, 0f3F800000, %p14;
|
|
mul.f32 %f279, %f271, %f278;
|
|
mul.f32 %f280, %f274, %f278;
|
|
mul.f32 %f281, %f277, %f278;
|
|
mul.f32 %f282, %f279, 0f3F3504F3;
|
|
mul.f32 %f283, %f280, 0f3F3504F3;
|
|
mul.f32 %f284, %f281, 0f3F3504F3;
|
|
fma.rn.f32 %f285, %f804, 0fBED105EC, %f282;
|
|
fma.rn.f32 %f286, %f805, 0fBED105EC, %f283;
|
|
fma.rn.f32 %f287, %f806, 0fBED105EC, %f284;
|
|
add.f32 %f31, %f19, %f285;
|
|
add.f32 %f32, %f21, %f286;
|
|
add.f32 %f33, %f23, %f287;
|
|
ld.global.v2.u32 {%r138, %r139}, [pixelID];
|
|
cvt.u64.u32 %rd59, %r138;
|
|
cvt.u64.u32 %rd60, %r139;
|
|
// inline asm
|
|
call (%rd57), _rt_buffer_get_64, (%rd42, %r97, %r98, %rd59, %rd60, %rd27, %rd27);
|
|
// inline asm
|
|
ld.u32 %r11, [%rd57];
|
|
shr.u32 %r12, %r11, 16;
|
|
cvt.u16.u32 %rs31, %r12;
|
|
and.b16 %rs32, %rs31, 255;
|
|
cvt.u16.u32 %rs33, %r11;
|
|
or.b16 %rs34, %rs33, %rs32;
|
|
setp.eq.s16 %p15, %rs34, 0;
|
|
mov.f32 %f807, %f833;
|
|
mov.f32 %f808, %f833;
|
|
mov.f32 %f809, %f833;
|
|
@%p15 bra BB0_9;
|
|
|
|
ld.u8 %rs35, [%rd57+1];
|
|
and.b16 %rs37, %rs33, 255;
|
|
cvt.rn.f32.u16 %f288, %rs37;
|
|
div.rn.f32 %f289, %f288, 0f437F0000;
|
|
fma.rn.f32 %f290, %f289, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f291, %rs35;
|
|
div.rn.f32 %f292, %f291, 0f437F0000;
|
|
fma.rn.f32 %f293, %f292, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f294, %rs32;
|
|
div.rn.f32 %f295, %f294, 0f437F0000;
|
|
fma.rn.f32 %f296, %f295, 0f40000000, 0fBF800000;
|
|
mul.f32 %f297, %f293, %f293;
|
|
fma.rn.f32 %f298, %f290, %f290, %f297;
|
|
fma.rn.f32 %f299, %f296, %f296, %f298;
|
|
sqrt.rn.f32 %f300, %f299;
|
|
rcp.rn.f32 %f301, %f300;
|
|
mul.f32 %f807, %f290, %f301;
|
|
mul.f32 %f808, %f293, %f301;
|
|
mul.f32 %f809, %f296, %f301;
|
|
|
|
BB0_9:
|
|
mul.f32 %f306, %f800, %f808;
|
|
mul.f32 %f307, %f799, %f809;
|
|
sub.f32 %f308, %f307, %f306;
|
|
mul.f32 %f309, %f798, %f809;
|
|
mul.f32 %f310, %f800, %f807;
|
|
sub.f32 %f311, %f310, %f309;
|
|
mul.f32 %f312, %f799, %f807;
|
|
mul.f32 %f313, %f798, %f808;
|
|
sub.f32 %f314, %f313, %f312;
|
|
setp.lt.u32 %p16, %r11, 16777216;
|
|
selp.f32 %f315, 0fBF800000, 0f3F800000, %p16;
|
|
mul.f32 %f316, %f308, %f315;
|
|
mul.f32 %f317, %f311, %f315;
|
|
mul.f32 %f318, %f314, %f315;
|
|
mul.f32 %f319, %f316, 0fBF3504F3;
|
|
mul.f32 %f320, %f317, 0fBF3504F3;
|
|
mul.f32 %f321, %f318, 0fBF3504F3;
|
|
fma.rn.f32 %f322, %f807, 0fBED105EC, %f319;
|
|
fma.rn.f32 %f323, %f808, 0fBED105EC, %f320;
|
|
fma.rn.f32 %f324, %f809, 0fBED105EC, %f321;
|
|
add.f32 %f40, %f19, %f322;
|
|
add.f32 %f41, %f21, %f323;
|
|
add.f32 %f42, %f23, %f324;
|
|
setp.lt.s32 %p17, %r1, 1;
|
|
mov.f32 %f832, %f833;
|
|
mov.f32 %f831, %f833;
|
|
mov.f32 %f830, %f833;
|
|
@%p17 bra BB0_62;
|
|
|
|
cvt.rn.f32.s32 %f329, %r1;
|
|
rcp.rn.f32 %f43, %f329;
|
|
mul.f32 %f44, %f7, 0f3456BF95;
|
|
mul.f32 %f45, %f8, 0f3456BF95;
|
|
mul.f32 %f46, %f9, 0f3456BF95;
|
|
mul.f32 %f330, %f800, %f11;
|
|
mul.f32 %f331, %f799, %f12;
|
|
sub.f32 %f47, %f330, %f331;
|
|
mul.f32 %f332, %f798, %f12;
|
|
mul.f32 %f333, %f800, %f10;
|
|
sub.f32 %f48, %f332, %f333;
|
|
mul.f32 %f334, %f799, %f10;
|
|
mul.f32 %f335, %f798, %f11;
|
|
sub.f32 %f49, %f334, %f335;
|
|
mov.f32 %f833, 0f00000000;
|
|
mov.u32 %r142, 0;
|
|
abs.f32 %f409, %f45;
|
|
abs.f32 %f410, %f44;
|
|
max.f32 %f411, %f410, %f409;
|
|
abs.f32 %f412, %f46;
|
|
max.f32 %f413, %f411, %f412;
|
|
mov.u32 %r349, %r142;
|
|
mov.f32 %f832, %f833;
|
|
mov.f32 %f831, %f833;
|
|
mov.f32 %f830, %f833;
|
|
|
|
BB0_11:
|
|
mov.u32 %r351, %r142;
|
|
|
|
BB0_12:
|
|
cvt.rn.f32.s32 %f794, %r349;
|
|
mad.lo.s32 %r144, %r352, 1664525, 1013904223;
|
|
and.b32 %r145, %r144, 16777215;
|
|
cvt.rn.f32.u32 %f336, %r145;
|
|
fma.rn.f32 %f337, %f336, 0f33800000, %f794;
|
|
mul.f32 %f59, %f43, %f337;
|
|
mad.lo.s32 %r352, %r144, 1664525, 1013904223;
|
|
and.b32 %r146, %r352, 16777215;
|
|
cvt.rn.f32.u32 %f338, %r146;
|
|
cvt.rn.f32.s32 %f339, %r351;
|
|
fma.rn.f32 %f340, %f338, 0f33800000, %f339;
|
|
mul.f32 %f341, %f43, %f340;
|
|
mul.f32 %f342, %f59, %f59;
|
|
mov.f32 %f343, 0f3F800000;
|
|
sub.f32 %f344, %f343, %f342;
|
|
mov.f32 %f345, 0f00000000;
|
|
max.f32 %f346, %f345, %f344;
|
|
sqrt.rn.f32 %f60, %f346;
|
|
mul.f32 %f824, %f341, 0f40C90FDB;
|
|
abs.f32 %f62, %f824;
|
|
setp.neu.f32 %p18, %f62, 0f7F800000;
|
|
mov.f32 %f818, %f824;
|
|
@%p18 bra BB0_14;
|
|
|
|
mul.rn.f32 %f818, %f824, %f345;
|
|
|
|
BB0_14:
|
|
mul.f32 %f348, %f818, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r362, %f348;
|
|
cvt.rn.f32.s32 %f349, %r362;
|
|
neg.f32 %f350, %f349;
|
|
mov.f32 %f351, 0f3FC90FDA;
|
|
fma.rn.f32 %f352, %f350, %f351, %f818;
|
|
mov.f32 %f353, 0f33A22168;
|
|
fma.rn.f32 %f354, %f350, %f353, %f352;
|
|
mov.f32 %f355, 0f27C234C5;
|
|
fma.rn.f32 %f819, %f350, %f355, %f354;
|
|
abs.f32 %f356, %f818;
|
|
setp.leu.f32 %p19, %f356, 0f47CE4780;
|
|
@%p19 bra BB0_25;
|
|
|
|
add.u64 %rd65, %SP, 4;
|
|
cvta.to.local.u64 %rd5, %rd65;
|
|
mov.b32 %r19, %f818;
|
|
shr.u32 %r20, %r19, 23;
|
|
shl.b32 %r149, %r19, 8;
|
|
or.b32 %r21, %r149, -2147483648;
|
|
mov.u32 %r353, 0;
|
|
mov.u64 %rd272, 0;
|
|
mov.u64 %rd271, %rd5;
|
|
mov.u32 %r354, %r353;
|
|
|
|
BB0_16:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd66, %rd272, 2;
|
|
mov.u64 %rd67, __cudart_i2opi_f;
|
|
add.s64 %rd68, %rd67, %rd66;
|
|
ld.const.u32 %r152, [%rd68];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r150, %r152, %r21, %r354;
|
|
madc.hi.u32 %r354, %r152, %r21, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd271], %r150;
|
|
add.s32 %r353, %r353, 1;
|
|
cvt.s64.s32 %rd272, %r353;
|
|
mul.wide.s32 %rd71, %r353, 4;
|
|
add.s64 %rd271, %rd5, %rd71;
|
|
setp.ne.s32 %p20, %r353, 6;
|
|
@%p20 bra BB0_16;
|
|
|
|
add.u64 %rd269, %SP, 4;
|
|
and.b32 %r155, %r20, 255;
|
|
add.s32 %r156, %r155, -128;
|
|
shr.u32 %r157, %r156, 5;
|
|
and.b32 %r26, %r19, -2147483648;
|
|
cvta.to.local.u64 %rd73, %rd269;
|
|
st.local.u32 [%rd73+24], %r354;
|
|
mov.u32 %r158, 6;
|
|
sub.s32 %r159, %r158, %r157;
|
|
mul.wide.s32 %rd74, %r159, 4;
|
|
add.s64 %rd10, %rd73, %rd74;
|
|
ld.local.u32 %r355, [%rd10];
|
|
ld.local.u32 %r356, [%rd10+-4];
|
|
and.b32 %r29, %r20, 31;
|
|
setp.eq.s32 %p21, %r29, 0;
|
|
@%p21 bra BB0_19;
|
|
|
|
mov.u32 %r160, 32;
|
|
sub.s32 %r161, %r160, %r29;
|
|
shr.u32 %r162, %r356, %r161;
|
|
shl.b32 %r163, %r355, %r29;
|
|
add.s32 %r355, %r162, %r163;
|
|
ld.local.u32 %r164, [%rd10+-8];
|
|
shr.u32 %r165, %r164, %r161;
|
|
shl.b32 %r166, %r356, %r29;
|
|
add.s32 %r356, %r165, %r166;
|
|
|
|
BB0_19:
|
|
shr.u32 %r167, %r356, 30;
|
|
shl.b32 %r168, %r355, 2;
|
|
add.s32 %r357, %r167, %r168;
|
|
shl.b32 %r35, %r356, 2;
|
|
shr.u32 %r169, %r357, 31;
|
|
shr.u32 %r170, %r355, 30;
|
|
add.s32 %r36, %r169, %r170;
|
|
setp.eq.s32 %p22, %r169, 0;
|
|
@%p22 bra BB0_20;
|
|
bra.uni BB0_21;
|
|
|
|
BB0_20:
|
|
mov.u32 %r358, %r26;
|
|
mov.u32 %r359, %r35;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_21:
|
|
not.b32 %r171, %r357;
|
|
neg.s32 %r359, %r35;
|
|
setp.eq.s32 %p23, %r35, 0;
|
|
selp.u32 %r172, 1, 0, %p23;
|
|
add.s32 %r357, %r172, %r171;
|
|
xor.b32 %r358, %r26, -2147483648;
|
|
|
|
BB0_22:
|
|
clz.b32 %r361, %r357;
|
|
setp.eq.s32 %p24, %r361, 0;
|
|
shl.b32 %r173, %r357, %r361;
|
|
mov.u32 %r174, 32;
|
|
sub.s32 %r175, %r174, %r361;
|
|
shr.u32 %r176, %r359, %r175;
|
|
add.s32 %r177, %r176, %r173;
|
|
selp.b32 %r44, %r357, %r177, %p24;
|
|
mov.u32 %r178, -921707870;
|
|
mul.hi.u32 %r360, %r44, %r178;
|
|
setp.eq.s32 %p25, %r26, 0;
|
|
neg.s32 %r179, %r36;
|
|
selp.b32 %r362, %r36, %r179, %p25;
|
|
setp.lt.s32 %p26, %r360, 1;
|
|
@%p26 bra BB0_24;
|
|
|
|
mul.lo.s32 %r180, %r44, -921707870;
|
|
shr.u32 %r181, %r180, 31;
|
|
shl.b32 %r182, %r360, 1;
|
|
add.s32 %r360, %r181, %r182;
|
|
add.s32 %r361, %r361, 1;
|
|
|
|
BB0_24:
|
|
mov.u32 %r183, 126;
|
|
sub.s32 %r184, %r183, %r361;
|
|
shl.b32 %r185, %r184, 23;
|
|
add.s32 %r186, %r360, 1;
|
|
shr.u32 %r187, %r186, 7;
|
|
add.s32 %r188, %r187, 1;
|
|
shr.u32 %r189, %r188, 1;
|
|
add.s32 %r190, %r189, %r185;
|
|
or.b32 %r191, %r190, %r358;
|
|
mov.b32 %f819, %r191;
|
|
|
|
BB0_25:
|
|
mul.rn.f32 %f68, %f819, %f819;
|
|
add.s32 %r52, %r362, 1;
|
|
and.b32 %r53, %r52, 1;
|
|
setp.eq.s32 %p27, %r53, 0;
|
|
@%p27 bra BB0_27;
|
|
bra.uni BB0_26;
|
|
|
|
BB0_27:
|
|
mov.f32 %f359, 0f3C08839E;
|
|
mov.f32 %f360, 0fB94CA1F9;
|
|
fma.rn.f32 %f820, %f360, %f68, %f359;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_26:
|
|
mov.f32 %f357, 0fBAB6061A;
|
|
mov.f32 %f358, 0f37CCF5CE;
|
|
fma.rn.f32 %f820, %f358, %f68, %f357;
|
|
|
|
BB0_28:
|
|
@%p27 bra BB0_30;
|
|
bra.uni BB0_29;
|
|
|
|
BB0_30:
|
|
mov.f32 %f364, 0fBE2AAAA3;
|
|
fma.rn.f32 %f365, %f820, %f68, %f364;
|
|
fma.rn.f32 %f821, %f365, %f68, %f345;
|
|
bra.uni BB0_31;
|
|
|
|
BB0_29:
|
|
mov.f32 %f361, 0f3D2AAAA5;
|
|
fma.rn.f32 %f362, %f820, %f68, %f361;
|
|
mov.f32 %f363, 0fBF000000;
|
|
fma.rn.f32 %f821, %f362, %f68, %f363;
|
|
|
|
BB0_31:
|
|
fma.rn.f32 %f822, %f821, %f819, %f819;
|
|
@%p27 bra BB0_33;
|
|
|
|
fma.rn.f32 %f822, %f821, %f68, %f343;
|
|
|
|
BB0_33:
|
|
and.b32 %r192, %r52, 2;
|
|
setp.eq.s32 %p30, %r192, 0;
|
|
@%p30 bra BB0_35;
|
|
|
|
mov.f32 %f369, 0fBF800000;
|
|
fma.rn.f32 %f822, %f822, %f369, %f345;
|
|
|
|
BB0_35:
|
|
@%p18 bra BB0_37;
|
|
|
|
mul.rn.f32 %f824, %f824, %f345;
|
|
|
|
BB0_37:
|
|
mov.f32 %f793, 0f27C234C5;
|
|
mov.f32 %f792, 0f33A22168;
|
|
mov.f32 %f791, 0f3FC90FDA;
|
|
mul.f32 %f371, %f824, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r372, %f371;
|
|
cvt.rn.f32.s32 %f372, %r372;
|
|
neg.f32 %f373, %f372;
|
|
fma.rn.f32 %f375, %f373, %f791, %f824;
|
|
fma.rn.f32 %f377, %f373, %f792, %f375;
|
|
fma.rn.f32 %f825, %f373, %f793, %f377;
|
|
abs.f32 %f379, %f824;
|
|
setp.leu.f32 %p32, %f379, 0f47CE4780;
|
|
@%p32 bra BB0_48;
|
|
|
|
mov.u64 %rd274, 0;
|
|
add.u64 %rd76, %SP, 4;
|
|
cvta.to.local.u64 %rd11, %rd76;
|
|
mov.b32 %r55, %f824;
|
|
shr.u32 %r56, %r55, 23;
|
|
shl.b32 %r195, %r55, 8;
|
|
or.b32 %r57, %r195, -2147483648;
|
|
mov.u32 %r363, 0;
|
|
mov.u64 %rd273, %rd11;
|
|
mov.u32 %r364, %r363;
|
|
|
|
BB0_39:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd77, %rd274, 2;
|
|
mov.u64 %rd78, __cudart_i2opi_f;
|
|
add.s64 %rd79, %rd78, %rd77;
|
|
ld.const.u32 %r198, [%rd79];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r196, %r198, %r57, %r364;
|
|
madc.hi.u32 %r364, %r198, %r57, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd273], %r196;
|
|
add.s32 %r363, %r363, 1;
|
|
cvt.s64.s32 %rd274, %r363;
|
|
mul.wide.s32 %rd80, %r363, 4;
|
|
add.s64 %rd273, %rd11, %rd80;
|
|
setp.ne.s32 %p33, %r363, 6;
|
|
@%p33 bra BB0_39;
|
|
|
|
and.b32 %r201, %r56, 255;
|
|
add.s32 %r202, %r201, -128;
|
|
shr.u32 %r203, %r202, 5;
|
|
and.b32 %r62, %r55, -2147483648;
|
|
cvta.to.local.u64 %rd82, %rd76;
|
|
st.local.u32 [%rd82+24], %r364;
|
|
mov.u32 %r204, 6;
|
|
sub.s32 %r205, %r204, %r203;
|
|
mul.wide.s32 %rd83, %r205, 4;
|
|
add.s64 %rd17, %rd82, %rd83;
|
|
ld.local.u32 %r365, [%rd17];
|
|
ld.local.u32 %r366, [%rd17+-4];
|
|
and.b32 %r65, %r56, 31;
|
|
setp.eq.s32 %p34, %r65, 0;
|
|
@%p34 bra BB0_42;
|
|
|
|
mov.u32 %r206, 32;
|
|
sub.s32 %r207, %r206, %r65;
|
|
shr.u32 %r208, %r366, %r207;
|
|
shl.b32 %r209, %r365, %r65;
|
|
add.s32 %r365, %r208, %r209;
|
|
ld.local.u32 %r210, [%rd17+-8];
|
|
shr.u32 %r211, %r210, %r207;
|
|
shl.b32 %r212, %r366, %r65;
|
|
add.s32 %r366, %r211, %r212;
|
|
|
|
BB0_42:
|
|
shr.u32 %r213, %r366, 30;
|
|
shl.b32 %r214, %r365, 2;
|
|
add.s32 %r367, %r213, %r214;
|
|
shl.b32 %r71, %r366, 2;
|
|
shr.u32 %r215, %r367, 31;
|
|
shr.u32 %r216, %r365, 30;
|
|
add.s32 %r72, %r215, %r216;
|
|
setp.eq.s32 %p35, %r215, 0;
|
|
@%p35 bra BB0_43;
|
|
bra.uni BB0_44;
|
|
|
|
BB0_43:
|
|
mov.u32 %r368, %r62;
|
|
mov.u32 %r369, %r71;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_44:
|
|
not.b32 %r217, %r367;
|
|
neg.s32 %r369, %r71;
|
|
setp.eq.s32 %p36, %r71, 0;
|
|
selp.u32 %r218, 1, 0, %p36;
|
|
add.s32 %r367, %r218, %r217;
|
|
xor.b32 %r368, %r62, -2147483648;
|
|
|
|
BB0_45:
|
|
clz.b32 %r371, %r367;
|
|
setp.eq.s32 %p37, %r371, 0;
|
|
shl.b32 %r219, %r367, %r371;
|
|
mov.u32 %r220, 32;
|
|
sub.s32 %r221, %r220, %r371;
|
|
shr.u32 %r222, %r369, %r221;
|
|
add.s32 %r223, %r222, %r219;
|
|
selp.b32 %r80, %r367, %r223, %p37;
|
|
mov.u32 %r224, -921707870;
|
|
mul.hi.u32 %r370, %r80, %r224;
|
|
setp.eq.s32 %p38, %r62, 0;
|
|
neg.s32 %r225, %r72;
|
|
selp.b32 %r372, %r72, %r225, %p38;
|
|
setp.lt.s32 %p39, %r370, 1;
|
|
@%p39 bra BB0_47;
|
|
|
|
mul.lo.s32 %r226, %r80, -921707870;
|
|
shr.u32 %r227, %r226, 31;
|
|
shl.b32 %r228, %r370, 1;
|
|
add.s32 %r370, %r227, %r228;
|
|
add.s32 %r371, %r371, 1;
|
|
|
|
BB0_47:
|
|
mov.u32 %r229, 126;
|
|
sub.s32 %r230, %r229, %r371;
|
|
shl.b32 %r231, %r230, 23;
|
|
add.s32 %r232, %r370, 1;
|
|
shr.u32 %r233, %r232, 7;
|
|
add.s32 %r234, %r233, 1;
|
|
shr.u32 %r235, %r234, 1;
|
|
add.s32 %r236, %r235, %r231;
|
|
or.b32 %r237, %r236, %r368;
|
|
mov.b32 %f825, %r237;
|
|
|
|
BB0_48:
|
|
mul.rn.f32 %f85, %f825, %f825;
|
|
and.b32 %r88, %r372, 1;
|
|
setp.eq.s32 %p40, %r88, 0;
|
|
@%p40 bra BB0_50;
|
|
bra.uni BB0_49;
|
|
|
|
BB0_50:
|
|
mov.f32 %f382, 0f3C08839E;
|
|
mov.f32 %f383, 0fB94CA1F9;
|
|
fma.rn.f32 %f826, %f383, %f85, %f382;
|
|
bra.uni BB0_51;
|
|
|
|
BB0_49:
|
|
mov.f32 %f380, 0fBAB6061A;
|
|
mov.f32 %f381, 0f37CCF5CE;
|
|
fma.rn.f32 %f826, %f381, %f85, %f380;
|
|
|
|
BB0_51:
|
|
@%p40 bra BB0_53;
|
|
bra.uni BB0_52;
|
|
|
|
BB0_53:
|
|
mov.f32 %f387, 0fBE2AAAA3;
|
|
fma.rn.f32 %f388, %f826, %f85, %f387;
|
|
fma.rn.f32 %f827, %f388, %f85, %f345;
|
|
bra.uni BB0_54;
|
|
|
|
BB0_52:
|
|
mov.f32 %f384, 0f3D2AAAA5;
|
|
fma.rn.f32 %f385, %f826, %f85, %f384;
|
|
mov.f32 %f386, 0fBF000000;
|
|
fma.rn.f32 %f827, %f385, %f85, %f386;
|
|
|
|
BB0_54:
|
|
fma.rn.f32 %f828, %f827, %f825, %f825;
|
|
@%p40 bra BB0_56;
|
|
|
|
fma.rn.f32 %f828, %f827, %f85, %f343;
|
|
|
|
BB0_56:
|
|
and.b32 %r238, %r372, 2;
|
|
setp.eq.s32 %p43, %r238, 0;
|
|
@%p43 bra BB0_58;
|
|
|
|
mov.f32 %f392, 0fBF800000;
|
|
fma.rn.f32 %f828, %f828, %f392, %f345;
|
|
|
|
BB0_58:
|
|
mul.f32 %f393, %f60, %f822;
|
|
mul.f32 %f394, %f60, %f828;
|
|
mul.f32 %f395, %f10, %f394;
|
|
mul.f32 %f396, %f11, %f394;
|
|
mul.f32 %f397, %f12, %f394;
|
|
fma.rn.f32 %f398, %f47, %f393, %f395;
|
|
fma.rn.f32 %f399, %f48, %f393, %f396;
|
|
fma.rn.f32 %f400, %f49, %f393, %f397;
|
|
fma.rn.f32 %f97, %f798, %f59, %f398;
|
|
fma.rn.f32 %f98, %f799, %f59, %f399;
|
|
fma.rn.f32 %f99, %f800, %f59, %f400;
|
|
setp.gt.f32 %p44, %f98, 0f00000000;
|
|
setp.eq.s32 %p45, %r5, 0;
|
|
or.pred %p46, %p45, %p44;
|
|
@!%p46 bra BB0_60;
|
|
bra.uni BB0_59;
|
|
|
|
BB0_59:
|
|
mov.u32 %r348, 4;
|
|
add.u64 %rd84, %SP, 0;
|
|
cvta.to.local.u64 %rd85, %rd84;
|
|
max.f32 %f407, %f413, %f202;
|
|
mov.u32 %r242, 1065353216;
|
|
st.local.u32 [%rd85], %r242;
|
|
ld.global.u32 %r239, [root];
|
|
mov.u32 %r240, 1;
|
|
mov.f32 %f408, 0f6C4ECB8F;
|
|
// inline asm
|
|
call _rt_trace_64, (%r239, %f7, %f8, %f9, %f97, %f98, %f99, %r240, %f407, %f408, %rd84, %r348);
|
|
// inline asm
|
|
mul.f32 %f415, %f22, %f98;
|
|
fma.rn.f32 %f416, %f20, %f97, %f415;
|
|
fma.rn.f32 %f417, %f24, %f99, %f416;
|
|
cvt.sat.f32.f32 %f418, %f417;
|
|
ld.local.f32 %f419, [%rd85];
|
|
fma.rn.f32 %f831, %f418, %f419, %f831;
|
|
mul.f32 %f420, %f32, %f98;
|
|
fma.rn.f32 %f421, %f31, %f97, %f420;
|
|
fma.rn.f32 %f422, %f33, %f99, %f421;
|
|
cvt.sat.f32.f32 %f423, %f422;
|
|
fma.rn.f32 %f832, %f423, %f419, %f832;
|
|
mul.f32 %f424, %f41, %f98;
|
|
fma.rn.f32 %f425, %f40, %f97, %f424;
|
|
fma.rn.f32 %f426, %f42, %f99, %f425;
|
|
cvt.sat.f32.f32 %f427, %f426;
|
|
fma.rn.f32 %f833, %f427, %f419, %f833;
|
|
mul.f32 %f428, %f799, %f98;
|
|
fma.rn.f32 %f429, %f798, %f97, %f428;
|
|
fma.rn.f32 %f430, %f800, %f99, %f429;
|
|
cvt.sat.f32.f32 %f431, %f430;
|
|
fma.rn.f32 %f830, %f431, %f419, %f830;
|
|
|
|
BB0_60:
|
|
add.s32 %r351, %r351, 1;
|
|
setp.lt.s32 %p47, %r351, %r1;
|
|
@%p47 bra BB0_12;
|
|
|
|
add.s32 %r349, %r349, 1;
|
|
setp.lt.s32 %p48, %r349, %r1;
|
|
@%p48 bra BB0_11;
|
|
|
|
BB0_62:
|
|
mul.lo.s32 %r243, %r1, %r1;
|
|
cvt.rn.f32.s32 %f432, %r243;
|
|
div.rn.f32 %f433, %f830, %f432;
|
|
div.rn.f32 %f112, %f831, %f432;
|
|
div.rn.f32 %f113, %f832, %f432;
|
|
div.rn.f32 %f114, %f833, %f432;
|
|
add.f32 %f115, %f433, %f433;
|
|
ld.global.f32 %f434, [skyColor];
|
|
mul.f32 %f116, %f115, %f434;
|
|
ld.global.f32 %f435, [skyColor+4];
|
|
mul.f32 %f117, %f115, %f435;
|
|
ld.global.f32 %f436, [skyColor+8];
|
|
mul.f32 %f118, %f115, %f436;
|
|
ld.global.u32 %r373, [imageEnabled];
|
|
and.b32 %r244, %r373, 1;
|
|
setp.eq.b32 %p49, %r244, 1;
|
|
@!%p49 bra BB0_97;
|
|
bra.uni BB0_63;
|
|
|
|
BB0_63:
|
|
abs.f32 %f120, %f116;
|
|
setp.lt.f32 %p50, %f120, 0f00800000;
|
|
mul.f32 %f442, %f120, 0f4B800000;
|
|
selp.f32 %f443, 0fC3170000, 0fC2FE0000, %p50;
|
|
selp.f32 %f444, %f442, %f120, %p50;
|
|
mov.b32 %r245, %f444;
|
|
and.b32 %r246, %r245, 8388607;
|
|
or.b32 %r247, %r246, 1065353216;
|
|
mov.b32 %f445, %r247;
|
|
shr.u32 %r248, %r245, 23;
|
|
cvt.rn.f32.u32 %f446, %r248;
|
|
add.f32 %f447, %f443, %f446;
|
|
setp.gt.f32 %p51, %f445, 0f3FB504F3;
|
|
mul.f32 %f448, %f445, 0f3F000000;
|
|
add.f32 %f449, %f447, 0f3F800000;
|
|
selp.f32 %f450, %f448, %f445, %p51;
|
|
selp.f32 %f451, %f449, %f447, %p51;
|
|
add.f32 %f452, %f450, 0fBF800000;
|
|
add.f32 %f438, %f450, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f437,%f438;
|
|
// inline asm
|
|
add.f32 %f453, %f452, %f452;
|
|
mul.f32 %f454, %f437, %f453;
|
|
mul.f32 %f455, %f454, %f454;
|
|
mov.f32 %f456, 0f3C4CAF63;
|
|
mov.f32 %f457, 0f3B18F0FE;
|
|
fma.rn.f32 %f458, %f457, %f455, %f456;
|
|
mov.f32 %f459, 0f3DAAAABD;
|
|
fma.rn.f32 %f460, %f458, %f455, %f459;
|
|
mul.rn.f32 %f461, %f460, %f455;
|
|
mul.rn.f32 %f462, %f461, %f454;
|
|
sub.f32 %f463, %f452, %f454;
|
|
neg.f32 %f464, %f454;
|
|
add.f32 %f465, %f463, %f463;
|
|
fma.rn.f32 %f466, %f464, %f452, %f465;
|
|
mul.rn.f32 %f467, %f437, %f466;
|
|
add.f32 %f468, %f462, %f454;
|
|
sub.f32 %f469, %f454, %f468;
|
|
add.f32 %f470, %f462, %f469;
|
|
add.f32 %f471, %f467, %f470;
|
|
add.f32 %f472, %f468, %f471;
|
|
sub.f32 %f473, %f468, %f472;
|
|
add.f32 %f474, %f471, %f473;
|
|
mov.f32 %f475, 0f3F317200;
|
|
mul.rn.f32 %f476, %f451, %f475;
|
|
mov.f32 %f477, 0f35BFBE8E;
|
|
mul.rn.f32 %f478, %f451, %f477;
|
|
add.f32 %f479, %f476, %f472;
|
|
sub.f32 %f480, %f476, %f479;
|
|
add.f32 %f481, %f472, %f480;
|
|
add.f32 %f482, %f474, %f481;
|
|
add.f32 %f483, %f478, %f482;
|
|
add.f32 %f484, %f479, %f483;
|
|
sub.f32 %f485, %f479, %f484;
|
|
add.f32 %f486, %f483, %f485;
|
|
mov.f32 %f487, 0f3EE66666;
|
|
mul.rn.f32 %f488, %f487, %f484;
|
|
neg.f32 %f489, %f488;
|
|
fma.rn.f32 %f490, %f487, %f484, %f489;
|
|
fma.rn.f32 %f491, %f487, %f486, %f490;
|
|
mov.f32 %f492, 0f00000000;
|
|
fma.rn.f32 %f493, %f492, %f484, %f491;
|
|
add.rn.f32 %f494, %f488, %f493;
|
|
neg.f32 %f495, %f494;
|
|
add.rn.f32 %f496, %f488, %f495;
|
|
add.rn.f32 %f497, %f496, %f493;
|
|
mov.b32 %r249, %f494;
|
|
setp.eq.s32 %p52, %r249, 1118925336;
|
|
add.s32 %r250, %r249, -1;
|
|
mov.b32 %f498, %r250;
|
|
add.f32 %f499, %f497, 0f37000000;
|
|
selp.f32 %f500, %f498, %f494, %p52;
|
|
selp.f32 %f121, %f499, %f497, %p52;
|
|
mul.f32 %f501, %f500, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f502, %f501;
|
|
mov.f32 %f503, 0fBF317200;
|
|
fma.rn.f32 %f504, %f502, %f503, %f500;
|
|
mov.f32 %f505, 0fB5BFBE8E;
|
|
fma.rn.f32 %f506, %f502, %f505, %f504;
|
|
mul.f32 %f507, %f506, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f508, %f507;
|
|
add.f32 %f509, %f502, 0f00000000;
|
|
ex2.approx.f32 %f510, %f509;
|
|
mul.f32 %f511, %f508, %f510;
|
|
setp.lt.f32 %p53, %f500, 0fC2D20000;
|
|
selp.f32 %f512, 0f00000000, %f511, %p53;
|
|
setp.gt.f32 %p54, %f500, 0f42D20000;
|
|
selp.f32 %f838, 0f7F800000, %f512, %p54;
|
|
setp.eq.f32 %p55, %f838, 0f7F800000;
|
|
@%p55 bra BB0_65;
|
|
|
|
fma.rn.f32 %f838, %f838, %f121, %f838;
|
|
|
|
BB0_65:
|
|
mov.f32 %f763, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f762, %f763;
|
|
fma.rn.f32 %f761, %f762, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f760, %f761;
|
|
setp.lt.f32 %p56, %f116, 0f00000000;
|
|
setp.eq.f32 %p57, %f760, 0f3F800000;
|
|
and.pred %p1, %p56, %p57;
|
|
mov.b32 %r251, %f838;
|
|
xor.b32 %r252, %r251, -2147483648;
|
|
mov.b32 %f513, %r252;
|
|
selp.f32 %f840, %f513, %f838, %p1;
|
|
setp.eq.f32 %p58, %f116, 0f00000000;
|
|
@%p58 bra BB0_68;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_68:
|
|
add.f32 %f516, %f116, %f116;
|
|
selp.f32 %f840, %f516, 0f00000000, %p57;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_115:
|
|
mov.u64 %rd199, image_HDR;
|
|
cvta.global.u64 %rd194, %rd199;
|
|
mov.u32 %r316, 8;
|
|
mov.u64 %rd198, 0;
|
|
// inline asm
|
|
call (%rd193), _rt_buffer_get_64, (%rd194, %r97, %r316, %rd20, %rd21, %rd198, %rd198);
|
|
// inline asm
|
|
mov.f32 %f738, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f738;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs113, 0;
|
|
st.v4.u16 [%rd193], {%rs112, %rs112, %rs112, %rs113};
|
|
|
|
BB0_116:
|
|
ld.global.u32 %r317, [additive];
|
|
setp.eq.s32 %p107, %r317, 0;
|
|
@%p107 bra BB0_118;
|
|
|
|
mov.u64 %rd212, image_RNM0;
|
|
cvta.global.u64 %rd201, %rd212;
|
|
mov.u32 %r321, 8;
|
|
mov.u64 %rd211, 0;
|
|
// inline asm
|
|
call (%rd200), _rt_buffer_get_64, (%rd201, %r97, %r321, %rd20, %rd21, %rd211, %rd211);
|
|
// inline asm
|
|
ld.v4.u16 {%rs120, %rs121, %rs122, %rs123}, [%rd200];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f739, %rs120;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f740, %rs121;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f741, %rs122;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd206), _rt_buffer_get_64, (%rd201, %r97, %r321, %rd20, %rd21, %rd211, %rd211);
|
|
// inline asm
|
|
add.f32 %f742, %f739, 0f00000000;
|
|
add.f32 %f743, %f740, 0f00000000;
|
|
add.f32 %f744, %f741, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs119, %f744;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs118, %f743;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs117, %f742;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs124, 0;
|
|
st.v4.u16 [%rd206], {%rs117, %rs118, %rs119, %rs124};
|
|
bra.uni BB0_119;
|
|
|
|
BB0_118:
|
|
mov.u64 %rd219, image_RNM0;
|
|
cvta.global.u64 %rd214, %rd219;
|
|
mov.u32 %r323, 8;
|
|
mov.u64 %rd218, 0;
|
|
// inline asm
|
|
call (%rd213), _rt_buffer_get_64, (%rd214, %r97, %r323, %rd20, %rd21, %rd218, %rd218);
|
|
// inline asm
|
|
mov.f32 %f745, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f745;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs126, 0;
|
|
st.v4.u16 [%rd213], {%rs125, %rs125, %rs125, %rs126};
|
|
|
|
BB0_119:
|
|
ld.global.u32 %r324, [additive];
|
|
setp.eq.s32 %p108, %r324, 0;
|
|
@%p108 bra BB0_121;
|
|
|
|
mov.u64 %rd232, image_RNM1;
|
|
cvta.global.u64 %rd221, %rd232;
|
|
mov.u32 %r328, 8;
|
|
mov.u64 %rd231, 0;
|
|
// inline asm
|
|
call (%rd220), _rt_buffer_get_64, (%rd221, %r97, %r328, %rd20, %rd21, %rd231, %rd231);
|
|
// inline asm
|
|
ld.v4.u16 {%rs133, %rs134, %rs135, %rs136}, [%rd220];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f746, %rs133;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f747, %rs134;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f748, %rs135;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd226), _rt_buffer_get_64, (%rd221, %r97, %r328, %rd20, %rd21, %rd231, %rd231);
|
|
// inline asm
|
|
add.f32 %f749, %f746, 0f00000000;
|
|
add.f32 %f750, %f747, 0f00000000;
|
|
add.f32 %f751, %f748, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f751;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs131, %f750;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs130, %f749;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs137, 0;
|
|
st.v4.u16 [%rd226], {%rs130, %rs131, %rs132, %rs137};
|
|
bra.uni BB0_122;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd239, image_RNM1;
|
|
cvta.global.u64 %rd234, %rd239;
|
|
mov.u32 %r330, 8;
|
|
mov.u64 %rd238, 0;
|
|
// inline asm
|
|
call (%rd233), _rt_buffer_get_64, (%rd234, %r97, %r330, %rd20, %rd21, %rd238, %rd238);
|
|
// inline asm
|
|
mov.f32 %f752, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f752;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs139, 0;
|
|
st.v4.u16 [%rd233], {%rs138, %rs138, %rs138, %rs139};
|
|
|
|
BB0_122:
|
|
ld.global.u32 %r331, [additive];
|
|
setp.eq.s32 %p109, %r331, 0;
|
|
@%p109 bra BB0_124;
|
|
|
|
mov.u64 %rd252, image_RNM2;
|
|
cvta.global.u64 %rd241, %rd252;
|
|
mov.u32 %r335, 8;
|
|
mov.u64 %rd251, 0;
|
|
// inline asm
|
|
call (%rd240), _rt_buffer_get_64, (%rd241, %r97, %r335, %rd20, %rd21, %rd251, %rd251);
|
|
// inline asm
|
|
ld.v4.u16 {%rs146, %rs147, %rs148, %rs149}, [%rd240];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f753, %rs146;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f754, %rs147;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f755, %rs148;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd246), _rt_buffer_get_64, (%rd241, %r97, %r335, %rd20, %rd21, %rd251, %rd251);
|
|
// inline asm
|
|
add.f32 %f756, %f753, 0f00000000;
|
|
add.f32 %f757, %f754, 0f00000000;
|
|
add.f32 %f758, %f755, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f758;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs144, %f757;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs143, %f756;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs150, 0;
|
|
st.v4.u16 [%rd246], {%rs143, %rs144, %rs145, %rs150};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_124:
|
|
mov.u64 %rd259, image_RNM2;
|
|
cvta.global.u64 %rd254, %rd259;
|
|
mov.u32 %r337, 8;
|
|
mov.u64 %rd258, 0;
|
|
// inline asm
|
|
call (%rd253), _rt_buffer_get_64, (%rd254, %r97, %r337, %rd20, %rd21, %rd258, %rd258);
|
|
// inline asm
|
|
mov.f32 %f759, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f759;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs152, 0;
|
|
st.v4.u16 [%rd253], {%rs151, %rs151, %rs151, %rs152};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_66:
|
|
setp.geu.f32 %p59, %f116, 0f00000000;
|
|
@%p59 bra BB0_69;
|
|
|
|
mov.f32 %f787, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f515, %f787;
|
|
setp.neu.f32 %p60, %f515, 0f3EE66666;
|
|
selp.f32 %f840, 0f7FFFFFFF, %f840, %p60;
|
|
|
|
BB0_69:
|
|
abs.f32 %f764, %f116;
|
|
add.f32 %f517, %f764, 0f3EE66666;
|
|
mov.b32 %r253, %f517;
|
|
setp.lt.s32 %p62, %r253, 2139095040;
|
|
@%p62 bra BB0_74;
|
|
|
|
abs.f32 %f785, %f116;
|
|
setp.gtu.f32 %p63, %f785, 0f7F800000;
|
|
@%p63 bra BB0_73;
|
|
bra.uni BB0_71;
|
|
|
|
BB0_73:
|
|
add.f32 %f840, %f116, 0f3EE66666;
|
|
bra.uni BB0_74;
|
|
|
|
BB0_71:
|
|
abs.f32 %f786, %f116;
|
|
setp.neu.f32 %p64, %f786, 0f7F800000;
|
|
@%p64 bra BB0_74;
|
|
|
|
selp.f32 %f840, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_74:
|
|
mov.f32 %f773, 0fB5BFBE8E;
|
|
mov.f32 %f772, 0fBF317200;
|
|
mov.f32 %f771, 0f00000000;
|
|
mov.f32 %f770, 0f35BFBE8E;
|
|
mov.f32 %f769, 0f3F317200;
|
|
mov.f32 %f768, 0f3DAAAABD;
|
|
mov.f32 %f767, 0f3C4CAF63;
|
|
mov.f32 %f766, 0f3B18F0FE;
|
|
mov.f32 %f765, 0f3EE66666;
|
|
setp.eq.f32 %p65, %f116, 0f3F800000;
|
|
selp.f32 %f132, 0f3F800000, %f840, %p65;
|
|
abs.f32 %f133, %f117;
|
|
setp.lt.f32 %p66, %f133, 0f00800000;
|
|
mul.f32 %f520, %f133, 0f4B800000;
|
|
selp.f32 %f521, 0fC3170000, 0fC2FE0000, %p66;
|
|
selp.f32 %f522, %f520, %f133, %p66;
|
|
mov.b32 %r254, %f522;
|
|
and.b32 %r255, %r254, 8388607;
|
|
or.b32 %r256, %r255, 1065353216;
|
|
mov.b32 %f523, %r256;
|
|
shr.u32 %r257, %r254, 23;
|
|
cvt.rn.f32.u32 %f524, %r257;
|
|
add.f32 %f525, %f521, %f524;
|
|
setp.gt.f32 %p67, %f523, 0f3FB504F3;
|
|
mul.f32 %f526, %f523, 0f3F000000;
|
|
add.f32 %f527, %f525, 0f3F800000;
|
|
selp.f32 %f528, %f526, %f523, %p67;
|
|
selp.f32 %f529, %f527, %f525, %p67;
|
|
add.f32 %f530, %f528, 0fBF800000;
|
|
add.f32 %f519, %f528, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f518,%f519;
|
|
// inline asm
|
|
add.f32 %f531, %f530, %f530;
|
|
mul.f32 %f532, %f518, %f531;
|
|
mul.f32 %f533, %f532, %f532;
|
|
fma.rn.f32 %f536, %f766, %f533, %f767;
|
|
fma.rn.f32 %f538, %f536, %f533, %f768;
|
|
mul.rn.f32 %f539, %f538, %f533;
|
|
mul.rn.f32 %f540, %f539, %f532;
|
|
sub.f32 %f541, %f530, %f532;
|
|
neg.f32 %f542, %f532;
|
|
add.f32 %f543, %f541, %f541;
|
|
fma.rn.f32 %f544, %f542, %f530, %f543;
|
|
mul.rn.f32 %f545, %f518, %f544;
|
|
add.f32 %f546, %f540, %f532;
|
|
sub.f32 %f547, %f532, %f546;
|
|
add.f32 %f548, %f540, %f547;
|
|
add.f32 %f549, %f545, %f548;
|
|
add.f32 %f550, %f546, %f549;
|
|
sub.f32 %f551, %f546, %f550;
|
|
add.f32 %f552, %f549, %f551;
|
|
mul.rn.f32 %f554, %f529, %f769;
|
|
mul.rn.f32 %f556, %f529, %f770;
|
|
add.f32 %f557, %f554, %f550;
|
|
sub.f32 %f558, %f554, %f557;
|
|
add.f32 %f559, %f550, %f558;
|
|
add.f32 %f560, %f552, %f559;
|
|
add.f32 %f561, %f556, %f560;
|
|
add.f32 %f562, %f557, %f561;
|
|
sub.f32 %f563, %f557, %f562;
|
|
add.f32 %f564, %f561, %f563;
|
|
mul.rn.f32 %f566, %f765, %f562;
|
|
neg.f32 %f567, %f566;
|
|
fma.rn.f32 %f568, %f765, %f562, %f567;
|
|
fma.rn.f32 %f569, %f765, %f564, %f568;
|
|
fma.rn.f32 %f571, %f771, %f562, %f569;
|
|
add.rn.f32 %f572, %f566, %f571;
|
|
neg.f32 %f573, %f572;
|
|
add.rn.f32 %f574, %f566, %f573;
|
|
add.rn.f32 %f575, %f574, %f571;
|
|
mov.b32 %r258, %f572;
|
|
setp.eq.s32 %p68, %r258, 1118925336;
|
|
add.s32 %r259, %r258, -1;
|
|
mov.b32 %f576, %r259;
|
|
add.f32 %f577, %f575, 0f37000000;
|
|
selp.f32 %f578, %f576, %f572, %p68;
|
|
selp.f32 %f134, %f577, %f575, %p68;
|
|
mul.f32 %f579, %f578, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f580, %f579;
|
|
fma.rn.f32 %f582, %f580, %f772, %f578;
|
|
fma.rn.f32 %f584, %f580, %f773, %f582;
|
|
mul.f32 %f585, %f584, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f586, %f585;
|
|
add.f32 %f587, %f580, 0f00000000;
|
|
ex2.approx.f32 %f588, %f587;
|
|
mul.f32 %f589, %f586, %f588;
|
|
setp.lt.f32 %p69, %f578, 0fC2D20000;
|
|
selp.f32 %f590, 0f00000000, %f589, %p69;
|
|
setp.gt.f32 %p70, %f578, 0f42D20000;
|
|
selp.f32 %f841, 0f7F800000, %f590, %p70;
|
|
setp.eq.f32 %p71, %f841, 0f7F800000;
|
|
@%p71 bra BB0_76;
|
|
|
|
fma.rn.f32 %f841, %f841, %f134, %f841;
|
|
|
|
BB0_76:
|
|
setp.lt.f32 %p72, %f117, 0f00000000;
|
|
and.pred %p2, %p72, %p57;
|
|
mov.b32 %r260, %f841;
|
|
xor.b32 %r261, %r260, -2147483648;
|
|
mov.b32 %f591, %r261;
|
|
selp.f32 %f843, %f591, %f841, %p2;
|
|
setp.eq.f32 %p74, %f117, 0f00000000;
|
|
@%p74 bra BB0_79;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_79:
|
|
add.f32 %f594, %f117, %f117;
|
|
selp.f32 %f843, %f594, 0f00000000, %p57;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_77:
|
|
setp.geu.f32 %p75, %f117, 0f00000000;
|
|
@%p75 bra BB0_80;
|
|
|
|
mov.f32 %f784, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f593, %f784;
|
|
setp.neu.f32 %p76, %f593, 0f3EE66666;
|
|
selp.f32 %f843, 0f7FFFFFFF, %f843, %p76;
|
|
|
|
BB0_80:
|
|
abs.f32 %f788, %f117;
|
|
add.f32 %f595, %f788, 0f3EE66666;
|
|
mov.b32 %r262, %f595;
|
|
setp.lt.s32 %p78, %r262, 2139095040;
|
|
@%p78 bra BB0_85;
|
|
|
|
abs.f32 %f789, %f117;
|
|
setp.gtu.f32 %p79, %f789, 0f7F800000;
|
|
@%p79 bra BB0_84;
|
|
bra.uni BB0_82;
|
|
|
|
BB0_84:
|
|
add.f32 %f843, %f117, 0f3EE66666;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_82:
|
|
abs.f32 %f790, %f117;
|
|
setp.neu.f32 %p80, %f790, 0f7F800000;
|
|
@%p80 bra BB0_85;
|
|
|
|
selp.f32 %f843, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_85:
|
|
mov.f32 %f782, 0fB5BFBE8E;
|
|
mov.f32 %f781, 0fBF317200;
|
|
mov.f32 %f780, 0f00000000;
|
|
mov.f32 %f779, 0f35BFBE8E;
|
|
mov.f32 %f778, 0f3F317200;
|
|
mov.f32 %f777, 0f3DAAAABD;
|
|
mov.f32 %f776, 0f3C4CAF63;
|
|
mov.f32 %f775, 0f3B18F0FE;
|
|
mov.f32 %f774, 0f3EE66666;
|
|
setp.eq.f32 %p81, %f117, 0f3F800000;
|
|
selp.f32 %f145, 0f3F800000, %f843, %p81;
|
|
abs.f32 %f146, %f118;
|
|
setp.lt.f32 %p82, %f146, 0f00800000;
|
|
mul.f32 %f598, %f146, 0f4B800000;
|
|
selp.f32 %f599, 0fC3170000, 0fC2FE0000, %p82;
|
|
selp.f32 %f600, %f598, %f146, %p82;
|
|
mov.b32 %r263, %f600;
|
|
and.b32 %r264, %r263, 8388607;
|
|
or.b32 %r265, %r264, 1065353216;
|
|
mov.b32 %f601, %r265;
|
|
shr.u32 %r266, %r263, 23;
|
|
cvt.rn.f32.u32 %f602, %r266;
|
|
add.f32 %f603, %f599, %f602;
|
|
setp.gt.f32 %p83, %f601, 0f3FB504F3;
|
|
mul.f32 %f604, %f601, 0f3F000000;
|
|
add.f32 %f605, %f603, 0f3F800000;
|
|
selp.f32 %f606, %f604, %f601, %p83;
|
|
selp.f32 %f607, %f605, %f603, %p83;
|
|
add.f32 %f608, %f606, 0fBF800000;
|
|
add.f32 %f597, %f606, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f596,%f597;
|
|
// inline asm
|
|
add.f32 %f609, %f608, %f608;
|
|
mul.f32 %f610, %f596, %f609;
|
|
mul.f32 %f611, %f610, %f610;
|
|
fma.rn.f32 %f614, %f775, %f611, %f776;
|
|
fma.rn.f32 %f616, %f614, %f611, %f777;
|
|
mul.rn.f32 %f617, %f616, %f611;
|
|
mul.rn.f32 %f618, %f617, %f610;
|
|
sub.f32 %f619, %f608, %f610;
|
|
neg.f32 %f620, %f610;
|
|
add.f32 %f621, %f619, %f619;
|
|
fma.rn.f32 %f622, %f620, %f608, %f621;
|
|
mul.rn.f32 %f623, %f596, %f622;
|
|
add.f32 %f624, %f618, %f610;
|
|
sub.f32 %f625, %f610, %f624;
|
|
add.f32 %f626, %f618, %f625;
|
|
add.f32 %f627, %f623, %f626;
|
|
add.f32 %f628, %f624, %f627;
|
|
sub.f32 %f629, %f624, %f628;
|
|
add.f32 %f630, %f627, %f629;
|
|
mul.rn.f32 %f632, %f607, %f778;
|
|
mul.rn.f32 %f634, %f607, %f779;
|
|
add.f32 %f635, %f632, %f628;
|
|
sub.f32 %f636, %f632, %f635;
|
|
add.f32 %f637, %f628, %f636;
|
|
add.f32 %f638, %f630, %f637;
|
|
add.f32 %f639, %f634, %f638;
|
|
add.f32 %f640, %f635, %f639;
|
|
sub.f32 %f641, %f635, %f640;
|
|
add.f32 %f642, %f639, %f641;
|
|
mul.rn.f32 %f644, %f774, %f640;
|
|
neg.f32 %f645, %f644;
|
|
fma.rn.f32 %f646, %f774, %f640, %f645;
|
|
fma.rn.f32 %f647, %f774, %f642, %f646;
|
|
fma.rn.f32 %f649, %f780, %f640, %f647;
|
|
add.rn.f32 %f650, %f644, %f649;
|
|
neg.f32 %f651, %f650;
|
|
add.rn.f32 %f652, %f644, %f651;
|
|
add.rn.f32 %f653, %f652, %f649;
|
|
mov.b32 %r267, %f650;
|
|
setp.eq.s32 %p84, %r267, 1118925336;
|
|
add.s32 %r268, %r267, -1;
|
|
mov.b32 %f654, %r268;
|
|
add.f32 %f655, %f653, 0f37000000;
|
|
selp.f32 %f656, %f654, %f650, %p84;
|
|
selp.f32 %f147, %f655, %f653, %p84;
|
|
mul.f32 %f657, %f656, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f658, %f657;
|
|
fma.rn.f32 %f660, %f658, %f781, %f656;
|
|
fma.rn.f32 %f662, %f658, %f782, %f660;
|
|
mul.f32 %f663, %f662, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f664, %f663;
|
|
add.f32 %f665, %f658, 0f00000000;
|
|
ex2.approx.f32 %f666, %f665;
|
|
mul.f32 %f667, %f664, %f666;
|
|
setp.lt.f32 %p85, %f656, 0fC2D20000;
|
|
selp.f32 %f668, 0f00000000, %f667, %p85;
|
|
setp.gt.f32 %p86, %f656, 0f42D20000;
|
|
selp.f32 %f844, 0f7F800000, %f668, %p86;
|
|
setp.eq.f32 %p87, %f844, 0f7F800000;
|
|
@%p87 bra BB0_87;
|
|
|
|
fma.rn.f32 %f844, %f844, %f147, %f844;
|
|
|
|
BB0_87:
|
|
setp.lt.f32 %p88, %f118, 0f00000000;
|
|
and.pred %p3, %p88, %p57;
|
|
mov.b32 %r269, %f844;
|
|
xor.b32 %r270, %r269, -2147483648;
|
|
mov.b32 %f669, %r270;
|
|
selp.f32 %f846, %f669, %f844, %p3;
|
|
setp.eq.f32 %p90, %f118, 0f00000000;
|
|
@%p90 bra BB0_90;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_90:
|
|
add.f32 %f672, %f118, %f118;
|
|
selp.f32 %f846, %f672, 0f00000000, %p57;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_88:
|
|
setp.geu.f32 %p91, %f118, 0f00000000;
|
|
@%p91 bra BB0_91;
|
|
|
|
mov.f32 %f783, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f671, %f783;
|
|
setp.neu.f32 %p92, %f671, 0f3EE66666;
|
|
selp.f32 %f846, 0f7FFFFFFF, %f846, %p92;
|
|
|
|
BB0_91:
|
|
abs.f32 %f795, %f118;
|
|
add.f32 %f673, %f795, 0f3EE66666;
|
|
mov.b32 %r271, %f673;
|
|
setp.lt.s32 %p94, %r271, 2139095040;
|
|
@%p94 bra BB0_96;
|
|
|
|
abs.f32 %f796, %f118;
|
|
setp.gtu.f32 %p95, %f796, 0f7F800000;
|
|
@%p95 bra BB0_95;
|
|
bra.uni BB0_93;
|
|
|
|
BB0_95:
|
|
add.f32 %f846, %f118, 0f3EE66666;
|
|
bra.uni BB0_96;
|
|
|
|
BB0_93:
|
|
abs.f32 %f797, %f118;
|
|
setp.neu.f32 %p96, %f797, 0f7F800000;
|
|
@%p96 bra BB0_96;
|
|
|
|
selp.f32 %f846, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_96:
|
|
mov.u32 %r339, 4;
|
|
mov.u64 %rd260, 0;
|
|
mov.u32 %r338, 2;
|
|
setp.eq.f32 %p97, %f118, 0f3F800000;
|
|
selp.f32 %f674, 0f3F800000, %f846, %p97;
|
|
cvt.u64.u32 %rd89, %r4;
|
|
cvt.u64.u32 %rd88, %r3;
|
|
mov.u64 %rd92, image;
|
|
cvta.global.u64 %rd87, %rd92;
|
|
// inline asm
|
|
call (%rd86), _rt_buffer_get_64, (%rd87, %r338, %r339, %rd88, %rd89, %rd260, %rd260);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f675, %f674;
|
|
mul.f32 %f676, %f675, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r274, %f676;
|
|
cvt.sat.f32.f32 %f677, %f145;
|
|
mul.f32 %f678, %f677, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r275, %f678;
|
|
cvt.sat.f32.f32 %f679, %f132;
|
|
mul.f32 %f680, %f679, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r276, %f680;
|
|
cvt.u16.u32 %rs40, %r274;
|
|
cvt.u16.u32 %rs41, %r276;
|
|
cvt.u16.u32 %rs42, %r275;
|
|
mov.u16 %rs43, 255;
|
|
st.v4.u8 [%rd86], {%rs40, %rs42, %rs41, %rs43};
|
|
ld.global.u32 %r373, [imageEnabled];
|
|
|
|
BB0_97:
|
|
cvt.u64.u32 %rd18, %r3;
|
|
cvt.u64.u32 %rd19, %r4;
|
|
and.b32 %r277, %r373, 4;
|
|
setp.eq.s32 %p98, %r277, 0;
|
|
@%p98 bra BB0_101;
|
|
|
|
ld.global.u32 %r278, [additive];
|
|
setp.eq.s32 %p99, %r278, 0;
|
|
mov.f32 %f681, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs44, %f681;}
|
|
|
|
// inline asm
|
|
@%p99 bra BB0_100;
|
|
|
|
mov.u64 %rd261, 0;
|
|
mov.u32 %r340, 2;
|
|
mov.u64 %rd105, image_HDR;
|
|
cvta.global.u64 %rd94, %rd105;
|
|
mov.u32 %r282, 8;
|
|
// inline asm
|
|
call (%rd93), _rt_buffer_get_64, (%rd94, %r340, %r282, %rd18, %rd19, %rd261, %rd261);
|
|
// inline asm
|
|
ld.v4.u16 {%rs51, %rs52, %rs53, %rs54}, [%rd93];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f682, %rs51;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f683, %rs52;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f684, %rs53;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd99), _rt_buffer_get_64, (%rd94, %r340, %r282, %rd18, %rd19, %rd261, %rd261);
|
|
// inline asm
|
|
add.f32 %f685, %f116, %f682;
|
|
add.f32 %f686, %f117, %f683;
|
|
add.f32 %f687, %f118, %f684;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f687;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f686;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f685;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd99], {%rs48, %rs49, %rs50, %rs44};
|
|
bra.uni BB0_101;
|
|
|
|
BB0_100:
|
|
mov.u64 %rd262, 0;
|
|
mov.u32 %r341, 2;
|
|
mov.u64 %rd112, image_HDR;
|
|
cvta.global.u64 %rd107, %rd112;
|
|
mov.u32 %r284, 8;
|
|
// inline asm
|
|
call (%rd106), _rt_buffer_get_64, (%rd107, %r341, %r284, %rd18, %rd19, %rd262, %rd262);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f118;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f117;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f116;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd106], {%rs55, %rs56, %rs57, %rs44};
|
|
|
|
BB0_101:
|
|
add.f32 %f692, %f112, %f113;
|
|
add.f32 %f693, %f692, %f114;
|
|
mul.f32 %f694, %f693, 0f3F13CD3A;
|
|
div.rn.f32 %f695, %f115, %f694;
|
|
setp.eq.f32 %p100, %f115, 0f00000000;
|
|
selp.f32 %f696, 0f00000000, %f695, %p100;
|
|
mul.f32 %f697, %f112, %f696;
|
|
mul.f32 %f698, %f113, %f696;
|
|
mul.f32 %f699, %f114, %f696;
|
|
ld.global.f32 %f700, [skyColor];
|
|
mul.f32 %f158, %f700, %f697;
|
|
ld.global.f32 %f701, [skyColor+4];
|
|
mul.f32 %f159, %f701, %f697;
|
|
ld.global.f32 %f702, [skyColor+8];
|
|
mul.f32 %f160, %f697, %f702;
|
|
mul.f32 %f161, %f700, %f698;
|
|
mul.f32 %f162, %f701, %f698;
|
|
mul.f32 %f163, %f698, %f702;
|
|
mul.f32 %f164, %f699, %f700;
|
|
mul.f32 %f165, %f699, %f701;
|
|
mul.f32 %f166, %f699, %f702;
|
|
ld.global.u32 %r285, [additive];
|
|
setp.eq.s32 %p101, %r285, 0;
|
|
mov.f32 %f691, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f691;}
|
|
|
|
// inline asm
|
|
@%p101 bra BB0_103;
|
|
|
|
mov.u64 %rd263, 0;
|
|
mov.u32 %r342, 2;
|
|
mov.u64 %rd125, image_RNM0;
|
|
cvta.global.u64 %rd114, %rd125;
|
|
mov.u32 %r289, 8;
|
|
// inline asm
|
|
call (%rd113), _rt_buffer_get_64, (%rd114, %r342, %r289, %rd18, %rd19, %rd263, %rd263);
|
|
// inline asm
|
|
ld.v4.u16 {%rs65, %rs66, %rs67, %rs68}, [%rd113];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f703, %rs65;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f704, %rs66;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f705, %rs67;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd119), _rt_buffer_get_64, (%rd114, %r342, %r289, %rd18, %rd19, %rd263, %rd263);
|
|
// inline asm
|
|
add.f32 %f706, %f158, %f703;
|
|
add.f32 %f707, %f159, %f704;
|
|
add.f32 %f708, %f160, %f705;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f708;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f707;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f706;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd119], {%rs62, %rs63, %rs64, %rs58};
|
|
bra.uni BB0_104;
|
|
|
|
BB0_103:
|
|
mov.u64 %rd268, 0;
|
|
mov.u32 %r347, 2;
|
|
mov.u64 %rd132, image_RNM0;
|
|
cvta.global.u64 %rd127, %rd132;
|
|
mov.u32 %r291, 8;
|
|
// inline asm
|
|
call (%rd126), _rt_buffer_get_64, (%rd127, %r347, %r291, %rd18, %rd19, %rd268, %rd268);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f160;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f159;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f158;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd126], {%rs69, %rs70, %rs71, %rs58};
|
|
|
|
BB0_104:
|
|
ld.global.u32 %r292, [additive];
|
|
setp.eq.s32 %p102, %r292, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f691;}
|
|
|
|
// inline asm
|
|
@%p102 bra BB0_106;
|
|
|
|
mov.u64 %rd264, 0;
|
|
mov.u32 %r343, 2;
|
|
mov.u64 %rd145, image_RNM1;
|
|
cvta.global.u64 %rd134, %rd145;
|
|
mov.u32 %r296, 8;
|
|
// inline asm
|
|
call (%rd133), _rt_buffer_get_64, (%rd134, %r343, %r296, %rd18, %rd19, %rd264, %rd264);
|
|
// inline asm
|
|
ld.v4.u16 {%rs79, %rs80, %rs81, %rs82}, [%rd133];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f713, %rs79;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f714, %rs80;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f715, %rs81;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd139), _rt_buffer_get_64, (%rd134, %r343, %r296, %rd18, %rd19, %rd264, %rd264);
|
|
// inline asm
|
|
add.f32 %f716, %f161, %f713;
|
|
add.f32 %f717, %f162, %f714;
|
|
add.f32 %f718, %f163, %f715;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f718;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f717;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f716;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd139], {%rs76, %rs77, %rs78, %rs72};
|
|
bra.uni BB0_107;
|
|
|
|
BB0_106:
|
|
mov.u64 %rd267, 0;
|
|
mov.u32 %r346, 2;
|
|
mov.u64 %rd152, image_RNM1;
|
|
cvta.global.u64 %rd147, %rd152;
|
|
mov.u32 %r298, 8;
|
|
// inline asm
|
|
call (%rd146), _rt_buffer_get_64, (%rd147, %r346, %r298, %rd18, %rd19, %rd267, %rd267);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f163;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f162;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f161;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd146], {%rs83, %rs84, %rs85, %rs72};
|
|
|
|
BB0_107:
|
|
ld.global.u32 %r299, [additive];
|
|
setp.eq.s32 %p103, %r299, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f691;}
|
|
|
|
// inline asm
|
|
@%p103 bra BB0_109;
|
|
|
|
mov.u64 %rd265, 0;
|
|
mov.u32 %r344, 2;
|
|
mov.u64 %rd165, image_RNM2;
|
|
cvta.global.u64 %rd154, %rd165;
|
|
mov.u32 %r303, 8;
|
|
// inline asm
|
|
call (%rd153), _rt_buffer_get_64, (%rd154, %r344, %r303, %rd18, %rd19, %rd265, %rd265);
|
|
// inline asm
|
|
ld.v4.u16 {%rs93, %rs94, %rs95, %rs96}, [%rd153];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f723, %rs93;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f724, %rs94;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f725, %rs95;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd159), _rt_buffer_get_64, (%rd154, %r344, %r303, %rd18, %rd19, %rd265, %rd265);
|
|
// inline asm
|
|
add.f32 %f726, %f164, %f723;
|
|
add.f32 %f727, %f165, %f724;
|
|
add.f32 %f728, %f166, %f725;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f728;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f727;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f726;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd159], {%rs90, %rs91, %rs92, %rs86};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_109:
|
|
mov.u64 %rd266, 0;
|
|
mov.u32 %r345, 2;
|
|
mov.u64 %rd172, image_RNM2;
|
|
cvta.global.u64 %rd167, %rd172;
|
|
mov.u32 %r305, 8;
|
|
// inline asm
|
|
call (%rd166), _rt_buffer_get_64, (%rd167, %r345, %r305, %rd18, %rd19, %rd266, %rd266);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f166;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs98, %f165;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f164;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd166], {%rs97, %rs98, %rs99, %rs86};
|
|
|
|
BB0_125:
|
|
ret;
|
|
}
|
|
|
|
|