1907 lines
58 KiB
Plaintext
1907 lines
58 KiB
Plaintext
//
|
|
// Generated by NVIDIA NVVM Compiler
|
|
//
|
|
// Compiler Build ID: CL-23083092
|
|
// Cuda compilation tools, release 9.1, V9.1.85
|
|
// Based on LLVM 3.4svn
|
|
//
|
|
|
|
.version 6.1
|
|
.target sm_30
|
|
.address_size 64
|
|
|
|
// .globl _Z6oxMainv
|
|
.global .align 8 .b8 pixelID[8];
|
|
.global .align 8 .b8 resolution[8];
|
|
.global .align 4 .b8 normal[12];
|
|
.global .align 4 .b8 camPos[12];
|
|
.global .align 4 .b8 root[4];
|
|
.global .align 4 .u32 imageEnabled;
|
|
.global .texref lightmap;
|
|
.global .align 16 .b8 tileInfo[16];
|
|
.global .align 4 .u32 additive;
|
|
.global .align 1 .b8 image[1];
|
|
.global .align 1 .b8 image_HDR[1];
|
|
.global .align 1 .b8 image_HDR2[1];
|
|
.global .align 1 .b8 image_Mask[1];
|
|
.global .align 1 .b8 image_Dir[1];
|
|
.global .align 1 .b8 uvpos[1];
|
|
.global .align 1 .b8 uvnormal[1];
|
|
.global .align 4 .u32 ignoreNormal;
|
|
.global .align 1 .b8 localLights[1];
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
|
|
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
|
|
|
|
.visible .entry _Z6oxMainv(
|
|
|
|
)
|
|
{
|
|
.local .align 4 .b8 __local_depot0[4];
|
|
.reg .b64 %SP;
|
|
.reg .b64 %SPL;
|
|
.reg .pred %p<133>;
|
|
.reg .b16 %rs<63>;
|
|
.reg .f32 %f<1249>;
|
|
.reg .b32 %r<205>;
|
|
.reg .b64 %rd<126>;
|
|
|
|
|
|
mov.u64 %rd125, __local_depot0;
|
|
cvta.local.u64 %SP, %rd125;
|
|
ld.global.v2.u32 {%r30, %r31}, [pixelID];
|
|
cvt.u64.u32 %rd10, %r30;
|
|
cvt.u64.u32 %rd11, %r31;
|
|
mov.u64 %rd14, uvnormal;
|
|
cvta.global.u64 %rd9, %rd14;
|
|
mov.u32 %r28, 2;
|
|
mov.u32 %r29, 4;
|
|
mov.u64 %rd13, 0;
|
|
// inline asm
|
|
call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
|
|
// inline asm
|
|
ld.u32 %r1, [%rd8];
|
|
shr.u32 %r34, %r1, 16;
|
|
cvt.u16.u32 %rs1, %r34;
|
|
and.b16 %rs5, %rs1, 255;
|
|
cvt.u16.u32 %rs6, %r1;
|
|
or.b16 %rs7, %rs6, %rs5;
|
|
setp.eq.s16 %p8, %rs7, 0;
|
|
mov.f32 %f1190, 0f00000000;
|
|
mov.f32 %f1191, %f1190;
|
|
mov.f32 %f1192, %f1190;
|
|
@%p8 bra BB0_2;
|
|
|
|
ld.u8 %rs8, [%rd8+1];
|
|
and.b16 %rs10, %rs6, 255;
|
|
cvt.rn.f32.u16 %f209, %rs10;
|
|
div.rn.f32 %f210, %f209, 0f437F0000;
|
|
fma.rn.f32 %f211, %f210, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f212, %rs8;
|
|
div.rn.f32 %f213, %f212, 0f437F0000;
|
|
fma.rn.f32 %f214, %f213, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f215, %rs5;
|
|
div.rn.f32 %f216, %f215, 0f437F0000;
|
|
fma.rn.f32 %f217, %f216, 0f40000000, 0fBF800000;
|
|
mul.f32 %f218, %f214, %f214;
|
|
fma.rn.f32 %f219, %f211, %f211, %f218;
|
|
fma.rn.f32 %f220, %f217, %f217, %f219;
|
|
sqrt.rn.f32 %f221, %f220;
|
|
rcp.rn.f32 %f222, %f221;
|
|
mul.f32 %f1190, %f211, %f222;
|
|
mul.f32 %f1191, %f214, %f222;
|
|
mul.f32 %f1192, %f217, %f222;
|
|
|
|
BB0_2:
|
|
ld.global.v2.u32 {%r35, %r36}, [pixelID];
|
|
ld.global.v2.u32 {%r38, %r39}, [tileInfo];
|
|
add.s32 %r2, %r35, %r38;
|
|
add.s32 %r3, %r36, %r39;
|
|
setp.eq.f32 %p9, %f1191, 0f00000000;
|
|
setp.eq.f32 %p10, %f1190, 0f00000000;
|
|
and.pred %p11, %p10, %p9;
|
|
setp.eq.f32 %p12, %f1192, 0f00000000;
|
|
and.pred %p13, %p11, %p12;
|
|
@%p13 bra BB0_100;
|
|
bra.uni BB0_3;
|
|
|
|
BB0_100:
|
|
ld.global.u32 %r204, [imageEnabled];
|
|
and.b32 %r179, %r204, 1;
|
|
setp.eq.b32 %p127, %r179, 1;
|
|
@!%p127 bra BB0_102;
|
|
bra.uni BB0_101;
|
|
|
|
BB0_101:
|
|
cvt.u64.u32 %rd86, %r2;
|
|
cvt.u64.u32 %rd87, %r3;
|
|
mov.u64 %rd90, image;
|
|
cvta.global.u64 %rd85, %rd90;
|
|
// inline asm
|
|
call (%rd84), _rt_buffer_get_64, (%rd85, %r28, %r29, %rd86, %rd87, %rd13, %rd13);
|
|
// inline asm
|
|
mov.u16 %rs43, 0;
|
|
st.v4.u8 [%rd84], {%rs43, %rs43, %rs43, %rs43};
|
|
ld.global.u32 %r204, [imageEnabled];
|
|
|
|
BB0_102:
|
|
and.b32 %r182, %r204, 8;
|
|
setp.eq.s32 %p128, %r182, 0;
|
|
@%p128 bra BB0_104;
|
|
|
|
cvt.u64.u32 %rd93, %r2;
|
|
cvt.u64.u32 %rd94, %r3;
|
|
mov.u64 %rd97, image_Mask;
|
|
cvta.global.u64 %rd92, %rd97;
|
|
// inline asm
|
|
call (%rd91), _rt_buffer_get_64, (%rd92, %r28, %r28, %rd93, %rd94, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1182, 0f00000000;
|
|
cvt.rzi.u32.f32 %r185, %f1182;
|
|
cvt.u16.u32 %rs44, %r185;
|
|
mov.u16 %rs45, 0;
|
|
st.v2.u8 [%rd91], {%rs44, %rs45};
|
|
ld.global.u32 %r204, [imageEnabled];
|
|
|
|
BB0_104:
|
|
and.b32 %r186, %r204, 4;
|
|
setp.eq.s32 %p129, %r186, 0;
|
|
@%p129 bra BB0_108;
|
|
|
|
ld.global.u32 %r187, [additive];
|
|
setp.eq.s32 %p130, %r187, 0;
|
|
cvt.u64.u32 %rd6, %r2;
|
|
cvt.u64.u32 %rd7, %r3;
|
|
@%p130 bra BB0_107;
|
|
|
|
mov.u64 %rd110, image_HDR;
|
|
cvta.global.u64 %rd99, %rd110;
|
|
mov.u32 %r191, 8;
|
|
// inline asm
|
|
call (%rd98), _rt_buffer_get_64, (%rd99, %r28, %r191, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs52, %rs53, %rs54, %rs55}, [%rd98];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1183, %rs52;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1184, %rs53;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1185, %rs54;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd104), _rt_buffer_get_64, (%rd99, %r28, %r191, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1186, %f1183, 0f00000000;
|
|
add.f32 %f1187, %f1184, 0f00000000;
|
|
add.f32 %f1188, %f1185, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1188;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f1187;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1186;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs56, 0;
|
|
st.v4.u16 [%rd104], {%rs49, %rs50, %rs51, %rs56};
|
|
bra.uni BB0_108;
|
|
|
|
BB0_3:
|
|
ld.global.v2.u32 {%r47, %r48}, [pixelID];
|
|
cvt.u64.u32 %rd17, %r47;
|
|
cvt.u64.u32 %rd18, %r48;
|
|
mov.u64 %rd26, uvpos;
|
|
cvta.global.u64 %rd16, %rd26;
|
|
mov.u32 %r44, 12;
|
|
// inline asm
|
|
call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
|
|
// inline asm
|
|
ld.f32 %f9, [%rd15+8];
|
|
ld.f32 %f8, [%rd15+4];
|
|
ld.f32 %f7, [%rd15];
|
|
mul.f32 %f230, %f7, 0f3456BF95;
|
|
mul.f32 %f231, %f8, 0f3456BF95;
|
|
mul.f32 %f232, %f9, 0f3456BF95;
|
|
abs.f32 %f233, %f1190;
|
|
div.rn.f32 %f234, %f230, %f233;
|
|
abs.f32 %f235, %f1191;
|
|
div.rn.f32 %f236, %f231, %f235;
|
|
abs.f32 %f237, %f1192;
|
|
div.rn.f32 %f238, %f232, %f237;
|
|
abs.f32 %f239, %f234;
|
|
abs.f32 %f240, %f236;
|
|
abs.f32 %f241, %f238;
|
|
mov.f32 %f242, 0f38D1B717;
|
|
max.f32 %f243, %f239, %f242;
|
|
max.f32 %f244, %f240, %f242;
|
|
max.f32 %f245, %f241, %f242;
|
|
fma.rn.f32 %f10, %f1190, %f243, %f7;
|
|
fma.rn.f32 %f11, %f1191, %f244, %f8;
|
|
fma.rn.f32 %f12, %f1192, %f245, %f9;
|
|
ld.global.v2.u32 {%r51, %r52}, [pixelID];
|
|
cvt.rn.f32.u32 %f13, %r51;
|
|
cvt.rn.f32.u32 %f14, %r52;
|
|
mov.u64 %rd27, localLights;
|
|
cvta.global.u64 %rd25, %rd27;
|
|
mov.u32 %r45, 1;
|
|
mov.u32 %r46, 96;
|
|
// inline asm
|
|
call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
|
|
// inline asm
|
|
cvt.u32.u64 %r4, %rd21;
|
|
setp.eq.s32 %p14, %r4, 0;
|
|
mov.f32 %f1193, 0f00000000;
|
|
mov.f32 %f22, %f1193;
|
|
mov.f32 %f23, %f1193;
|
|
mov.f32 %f24, %f1193;
|
|
mov.f32 %f1197, %f1193;
|
|
mov.f32 %f1198, %f1193;
|
|
mov.f32 %f1199, %f1193;
|
|
@%p14 bra BB0_46;
|
|
|
|
mov.f32 %f253, 0f40000000;
|
|
cvt.rzi.f32.f32 %f254, %f253;
|
|
add.f32 %f255, %f254, %f254;
|
|
mov.f32 %f256, 0f40800000;
|
|
sub.f32 %f257, %f256, %f255;
|
|
abs.f32 %f15, %f257;
|
|
mul.f32 %f16, %f10, 0f3456BF95;
|
|
mul.f32 %f17, %f11, 0f3456BF95;
|
|
mul.f32 %f18, %f12, 0f3456BF95;
|
|
mul.f32 %f19, %f13, 0f3DD32618;
|
|
mul.f32 %f20, %f14, 0f3DD2F1AA;
|
|
mov.f32 %f252, 0f00000000;
|
|
mov.u32 %r196, 0;
|
|
abs.f32 %f436, %f16;
|
|
abs.f32 %f437, %f17;
|
|
max.f32 %f438, %f436, %f437;
|
|
abs.f32 %f439, %f18;
|
|
max.f32 %f440, %f438, %f439;
|
|
mov.f32 %f1193, %f252;
|
|
mov.f32 %f22, %f252;
|
|
mov.f32 %f23, %f252;
|
|
mov.f32 %f24, %f252;
|
|
mov.f32 %f1197, %f252;
|
|
mov.f32 %f1198, %f252;
|
|
mov.f32 %f1199, %f252;
|
|
|
|
BB0_5:
|
|
cvt.u64.u32 %rd30, %r196;
|
|
// inline asm
|
|
call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.f32 {%f260, %f261, %f262, %f263}, [%rd28+80];
|
|
ld.v4.f32 {%f264, %f265, %f266, %f267}, [%rd28+64];
|
|
ld.v4.f32 {%f268, %f269, %f270, %f271}, [%rd28+48];
|
|
ld.v4.f32 {%f272, %f1204, %f1205, %f275}, [%rd28+32];
|
|
ld.v4.f32 {%f276, %f277, %f278, %f279}, [%rd28+16];
|
|
ld.v4.f32 {%f280, %f281, %f282, %f283}, [%rd28];
|
|
mov.b32 %r6, %f263;
|
|
sub.f32 %f285, %f281, %f7;
|
|
sub.f32 %f286, %f282, %f8;
|
|
sub.f32 %f287, %f283, %f9;
|
|
mul.f32 %f288, %f286, %f286;
|
|
fma.rn.f32 %f289, %f285, %f285, %f288;
|
|
fma.rn.f32 %f290, %f287, %f287, %f289;
|
|
sqrt.rn.f32 %f54, %f290;
|
|
rcp.rn.f32 %f291, %f54;
|
|
mul.f32 %f55, %f285, %f291;
|
|
mul.f32 %f56, %f286, %f291;
|
|
mul.f32 %f57, %f287, %f291;
|
|
mul.f32 %f58, %f54, %f279;
|
|
abs.f32 %f59, %f58;
|
|
setp.lt.f32 %p15, %f59, 0f00800000;
|
|
mul.f32 %f292, %f59, 0f4B800000;
|
|
selp.f32 %f293, 0fC3170000, 0fC2FE0000, %p15;
|
|
selp.f32 %f294, %f292, %f59, %p15;
|
|
mov.b32 %r58, %f294;
|
|
and.b32 %r59, %r58, 8388607;
|
|
or.b32 %r60, %r59, 1065353216;
|
|
mov.b32 %f295, %r60;
|
|
shr.u32 %r61, %r58, 23;
|
|
cvt.rn.f32.u32 %f296, %r61;
|
|
add.f32 %f297, %f293, %f296;
|
|
setp.gt.f32 %p16, %f295, 0f3FB504F3;
|
|
mul.f32 %f298, %f295, 0f3F000000;
|
|
add.f32 %f299, %f297, 0f3F800000;
|
|
selp.f32 %f300, %f298, %f295, %p16;
|
|
selp.f32 %f301, %f299, %f297, %p16;
|
|
add.f32 %f302, %f300, 0fBF800000;
|
|
add.f32 %f259, %f300, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f258,%f259;
|
|
// inline asm
|
|
add.f32 %f303, %f302, %f302;
|
|
mul.f32 %f304, %f258, %f303;
|
|
mul.f32 %f305, %f304, %f304;
|
|
mov.f32 %f306, 0f3C4CAF63;
|
|
mov.f32 %f307, 0f3B18F0FE;
|
|
fma.rn.f32 %f308, %f307, %f305, %f306;
|
|
mov.f32 %f309, 0f3DAAAABD;
|
|
fma.rn.f32 %f310, %f308, %f305, %f309;
|
|
mul.rn.f32 %f311, %f310, %f305;
|
|
mul.rn.f32 %f312, %f311, %f304;
|
|
sub.f32 %f313, %f302, %f304;
|
|
neg.f32 %f314, %f304;
|
|
add.f32 %f315, %f313, %f313;
|
|
fma.rn.f32 %f316, %f314, %f302, %f315;
|
|
mul.rn.f32 %f317, %f258, %f316;
|
|
add.f32 %f318, %f312, %f304;
|
|
sub.f32 %f319, %f304, %f318;
|
|
add.f32 %f320, %f312, %f319;
|
|
add.f32 %f321, %f317, %f320;
|
|
add.f32 %f322, %f318, %f321;
|
|
sub.f32 %f323, %f318, %f322;
|
|
add.f32 %f324, %f321, %f323;
|
|
mov.f32 %f325, 0f3F317200;
|
|
mul.rn.f32 %f326, %f301, %f325;
|
|
mov.f32 %f327, 0f35BFBE8E;
|
|
mul.rn.f32 %f328, %f301, %f327;
|
|
add.f32 %f329, %f326, %f322;
|
|
sub.f32 %f330, %f326, %f329;
|
|
add.f32 %f331, %f322, %f330;
|
|
add.f32 %f332, %f324, %f331;
|
|
add.f32 %f333, %f328, %f332;
|
|
add.f32 %f334, %f329, %f333;
|
|
sub.f32 %f335, %f329, %f334;
|
|
add.f32 %f336, %f333, %f335;
|
|
mul.rn.f32 %f60, %f256, %f334;
|
|
neg.f32 %f338, %f60;
|
|
fma.rn.f32 %f339, %f256, %f334, %f338;
|
|
fma.rn.f32 %f340, %f256, %f336, %f339;
|
|
fma.rn.f32 %f61, %f252, %f334, %f340;
|
|
add.rn.f32 %f62, %f60, %f61;
|
|
mov.b32 %r62, %f62;
|
|
setp.eq.s32 %p1, %r62, 1118925336;
|
|
add.s32 %r63, %r62, -1;
|
|
mov.b32 %f342, %r63;
|
|
selp.f32 %f343, %f342, %f62, %p1;
|
|
mul.f32 %f344, %f343, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f345, %f344;
|
|
mov.f32 %f346, 0fBF317200;
|
|
fma.rn.f32 %f347, %f345, %f346, %f343;
|
|
mov.f32 %f348, 0fB5BFBE8E;
|
|
fma.rn.f32 %f349, %f345, %f348, %f347;
|
|
mul.f32 %f350, %f349, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f351, %f350;
|
|
add.f32 %f352, %f345, 0f00000000;
|
|
ex2.approx.f32 %f353, %f352;
|
|
mul.f32 %f354, %f351, %f353;
|
|
setp.lt.f32 %p17, %f343, 0fC2D20000;
|
|
selp.f32 %f355, 0f00000000, %f354, %p17;
|
|
setp.gt.f32 %p18, %f343, 0f42D20000;
|
|
selp.f32 %f1200, 0f7F800000, %f355, %p18;
|
|
setp.eq.f32 %p19, %f1200, 0f7F800000;
|
|
@%p19 bra BB0_7;
|
|
|
|
neg.f32 %f356, %f62;
|
|
add.rn.f32 %f357, %f60, %f356;
|
|
add.rn.f32 %f358, %f357, %f61;
|
|
add.f32 %f359, %f358, 0f37000000;
|
|
selp.f32 %f360, %f359, %f358, %p1;
|
|
fma.rn.f32 %f1200, %f1200, %f360, %f1200;
|
|
|
|
BB0_7:
|
|
setp.lt.f32 %p20, %f58, 0f00000000;
|
|
setp.eq.f32 %p21, %f15, 0f3F800000;
|
|
and.pred %p2, %p20, %p21;
|
|
mov.b32 %r64, %f1200;
|
|
xor.b32 %r65, %r64, -2147483648;
|
|
mov.b32 %f361, %r65;
|
|
selp.f32 %f1202, %f361, %f1200, %p2;
|
|
setp.eq.f32 %p22, %f58, 0f00000000;
|
|
@%p22 bra BB0_10;
|
|
bra.uni BB0_8;
|
|
|
|
BB0_10:
|
|
add.f32 %f364, %f58, %f58;
|
|
selp.f32 %f1202, %f364, 0f00000000, %p21;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_8:
|
|
setp.geu.f32 %p23, %f58, 0f00000000;
|
|
@%p23 bra BB0_11;
|
|
|
|
cvt.rzi.f32.f32 %f363, %f256;
|
|
setp.neu.f32 %p24, %f363, 0f40800000;
|
|
selp.f32 %f1202, 0f7FFFFFFF, %f1202, %p24;
|
|
|
|
BB0_11:
|
|
add.f32 %f365, %f59, 0f40800000;
|
|
mov.b32 %r66, %f365;
|
|
setp.lt.s32 %p26, %r66, 2139095040;
|
|
@%p26 bra BB0_16;
|
|
|
|
setp.gtu.f32 %p27, %f59, 0f7F800000;
|
|
@%p27 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
add.f32 %f1202, %f58, 0f40800000;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p28, %f59, 0f7F800000;
|
|
@%p28 bra BB0_16;
|
|
|
|
selp.f32 %f1202, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_16:
|
|
mul.f32 %f366, %f54, %f277;
|
|
mov.f32 %f1218, 0f3F800000;
|
|
sub.f32 %f368, %f1218, %f1202;
|
|
setp.eq.f32 %p29, %f58, 0f3F800000;
|
|
selp.f32 %f369, 0f00000000, %f368, %p29;
|
|
cvt.sat.f32.f32 %f370, %f369;
|
|
fma.rn.f32 %f371, %f366, %f366, %f278;
|
|
div.rn.f32 %f88, %f370, %f371;
|
|
mul.f32 %f372, %f1191, %f56;
|
|
fma.rn.f32 %f373, %f1190, %f55, %f372;
|
|
fma.rn.f32 %f374, %f1192, %f57, %f373;
|
|
ld.global.u32 %r67, [ignoreNormal];
|
|
setp.eq.s32 %p30, %r67, 0;
|
|
selp.f32 %f375, %f374, 0f3F800000, %p30;
|
|
cvt.sat.f32.f32 %f89, %f375;
|
|
setp.eq.f32 %p31, %f280, 0f3F800000;
|
|
@%p31 bra BB0_23;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_23:
|
|
setp.leu.f32 %p35, %f275, 0f00000000;
|
|
@%p35 bra BB0_19;
|
|
|
|
mul.f32 %f406, %f260, %f55;
|
|
mul.f32 %f407, %f261, %f56;
|
|
neg.f32 %f408, %f407;
|
|
sub.f32 %f409, %f408, %f406;
|
|
mul.f32 %f410, %f262, %f57;
|
|
sub.f32 %f411, %f409, %f410;
|
|
setp.gt.f32 %p36, %f411, 0f00000000;
|
|
selp.f32 %f412, 0f3F800000, 0f00000000, %p36;
|
|
mul.f32 %f413, %f269, %f56;
|
|
fma.rn.f32 %f414, %f268, %f55, %f413;
|
|
mul.f32 %f415, %f265, %f56;
|
|
fma.rn.f32 %f416, %f264, %f55, %f415;
|
|
fma.rn.f32 %f417, %f270, %f57, %f414;
|
|
fma.rn.f32 %f418, %f266, %f57, %f416;
|
|
fma.rn.f32 %f419, %f271, %f417, 0f3F000000;
|
|
mov.f32 %f420, 0f3F800000;
|
|
sub.f32 %f402, %f420, %f419;
|
|
fma.rn.f32 %f403, %f271, %f418, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r71, %f275;
|
|
mov.f32 %f405, 0f00000000;
|
|
// inline asm
|
|
call (%f398, %f399, %f400, %f401), _rt_texture_get_f_id, (%r71, %r28, %f402, %f403, %f405, %f405);
|
|
// inline asm
|
|
mul.f32 %f421, %f412, %f398;
|
|
mul.f32 %f422, %f412, %f399;
|
|
mul.f32 %f423, %f412, %f400;
|
|
mul.f32 %f1203, %f272, %f421;
|
|
mul.f32 %f1204, %f1204, %f422;
|
|
mul.f32 %f1205, %f1205, %f423;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p32, %f280, 0f40000000;
|
|
@%p32 bra BB0_21;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_21:
|
|
setp.leu.f32 %p34, %f275, 0f00000000;
|
|
@%p34 bra BB0_19;
|
|
|
|
mul.f32 %f392, %f269, %f56;
|
|
fma.rn.f32 %f393, %f268, %f55, %f392;
|
|
mul.f32 %f394, %f265, %f56;
|
|
fma.rn.f32 %f395, %f264, %f55, %f394;
|
|
mul.f32 %f396, %f261, %f56;
|
|
fma.rn.f32 %f397, %f260, %f55, %f396;
|
|
fma.rn.f32 %f389, %f270, %f57, %f393;
|
|
fma.rn.f32 %f390, %f266, %f57, %f395;
|
|
fma.rn.f32 %f391, %f262, %f57, %f397;
|
|
cvt.rzi.s32.f32 %r68, %f275;
|
|
mov.u32 %r69, 6;
|
|
mov.u32 %r70, 0;
|
|
// inline asm
|
|
call (%f385, %f386, %f387, %f388), _rt_texture_get_base_id, (%r68, %r69, %f389, %f390, %f391, %r70);
|
|
// inline asm
|
|
mul.f32 %f1203, %f272, %f385;
|
|
mul.f32 %f1204, %f1204, %f386;
|
|
mul.f32 %f1205, %f1205, %f387;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_18:
|
|
setp.neu.f32 %p33, %f280, 0f40800000;
|
|
@%p33 bra BB0_19;
|
|
|
|
mul.f32 %f376, %f260, %f55;
|
|
mul.f32 %f377, %f261, %f56;
|
|
neg.f32 %f378, %f377;
|
|
sub.f32 %f379, %f378, %f376;
|
|
mul.f32 %f380, %f262, %f57;
|
|
sub.f32 %f381, %f379, %f380;
|
|
fma.rn.f32 %f382, %f275, %f381, %f271;
|
|
cvt.sat.f32.f32 %f383, %f382;
|
|
mul.f32 %f384, %f383, %f383;
|
|
mul.f32 %f1206, %f88, %f384;
|
|
mov.f32 %f1203, %f272;
|
|
bra.uni BB0_26;
|
|
|
|
BB0_19:
|
|
mov.f32 %f1203, %f272;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1206, %f88;
|
|
|
|
BB0_26:
|
|
max.f32 %f430, %f1203, %f1204;
|
|
max.f32 %f431, %f430, %f1205;
|
|
mul.f32 %f101, %f89, %f1206;
|
|
mul.f32 %f432, %f101, %f431;
|
|
setp.lt.f32 %p38, %f432, 0f3727C5AC;
|
|
mov.pred %p132, -1;
|
|
mov.f32 %f108, 0f00000000;
|
|
mov.f32 %f109, %f108;
|
|
mov.f32 %f110, %f108;
|
|
mov.f32 %f111, %f108;
|
|
mov.f32 %f112, %f108;
|
|
mov.f32 %f113, %f108;
|
|
@%p38 bra BB0_28;
|
|
|
|
mul.f32 %f108, %f1203, %f101;
|
|
mul.f32 %f109, %f1204, %f101;
|
|
mul.f32 %f110, %f1205, %f101;
|
|
ld.global.u8 %rs12, [imageEnabled];
|
|
and.b16 %rs13, %rs12, 64;
|
|
setp.eq.s16 %p40, %rs13, 0;
|
|
selp.f32 %f111, 0f00000000, %f55, %p40;
|
|
selp.f32 %f112, 0f00000000, %f56, %p40;
|
|
selp.f32 %f113, 0f00000000, %f57, %p40;
|
|
mov.pred %p132, 0;
|
|
|
|
BB0_28:
|
|
@%p132 bra BB0_45;
|
|
|
|
setp.eq.s32 %p41, %r6, 0;
|
|
mov.u16 %rs62, 0;
|
|
@%p41 bra BB0_40;
|
|
|
|
abs.s32 %r8, %r6;
|
|
mov.f32 %f1217, 0f00000000;
|
|
setp.lt.s32 %p42, %r8, 1;
|
|
@%p42 bra BB0_39;
|
|
|
|
max.f32 %f115, %f440, %f242;
|
|
and.b32 %r9, %r8, 3;
|
|
setp.eq.s32 %p43, %r9, 0;
|
|
add.u64 %rd35, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd35;
|
|
mov.f32 %f1217, 0f00000000;
|
|
mov.u32 %r200, 0;
|
|
@%p43 bra BB0_37;
|
|
|
|
setp.eq.s32 %p44, %r9, 1;
|
|
mov.f32 %f1214, 0f00000000;
|
|
mov.u32 %r198, 0;
|
|
@%p44 bra BB0_36;
|
|
|
|
setp.eq.s32 %p45, %r9, 2;
|
|
mov.f32 %f1213, 0f00000000;
|
|
mov.u32 %r197, 0;
|
|
@%p45 bra BB0_35;
|
|
|
|
cvt.rmi.f32.f32 %f452, %f19;
|
|
sub.f32 %f453, %f19, %f452;
|
|
cvt.rmi.f32.f32 %f454, %f20;
|
|
sub.f32 %f455, %f20, %f454;
|
|
add.f32 %f456, %f455, 0f420551EC;
|
|
add.f32 %f457, %f453, 0f420551EC;
|
|
mul.f32 %f458, %f453, %f456;
|
|
fma.rn.f32 %f459, %f455, %f457, %f458;
|
|
add.f32 %f460, %f459, 0f00000000;
|
|
add.f32 %f461, %f453, %f460;
|
|
add.f32 %f462, %f455, %f460;
|
|
add.f32 %f463, %f461, %f462;
|
|
mul.f32 %f464, %f460, %f463;
|
|
cvt.rmi.f32.f32 %f465, %f464;
|
|
sub.f32 %f466, %f464, %f465;
|
|
add.f32 %f467, %f461, %f461;
|
|
mul.f32 %f468, %f462, %f467;
|
|
cvt.rmi.f32.f32 %f469, %f468;
|
|
sub.f32 %f470, %f468, %f469;
|
|
mul.f32 %f471, %f461, %f463;
|
|
cvt.rmi.f32.f32 %f472, %f471;
|
|
sub.f32 %f473, %f471, %f472;
|
|
fma.rn.f32 %f474, %f466, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f475, %f470, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f476, %f473, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f477, %f276, %f474, %f281;
|
|
fma.rn.f32 %f478, %f276, %f475, %f282;
|
|
fma.rn.f32 %f479, %f276, %f476, %f283;
|
|
sub.f32 %f480, %f477, %f7;
|
|
sub.f32 %f481, %f478, %f8;
|
|
sub.f32 %f482, %f479, %f9;
|
|
mul.f32 %f483, %f481, %f481;
|
|
fma.rn.f32 %f484, %f480, %f480, %f483;
|
|
fma.rn.f32 %f485, %f482, %f482, %f484;
|
|
sqrt.rn.f32 %f451, %f485;
|
|
rcp.rn.f32 %f486, %f451;
|
|
mul.f32 %f447, %f486, %f480;
|
|
mul.f32 %f448, %f486, %f481;
|
|
mul.f32 %f449, %f486, %f482;
|
|
ld.global.u32 %r80, [imageEnabled];
|
|
and.b32 %r81, %r80, 32;
|
|
setp.eq.s32 %p46, %r81, 0;
|
|
selp.f32 %f487, 0f3F800000, 0f41200000, %p46;
|
|
mul.f32 %f450, %f487, %f115;
|
|
mov.u32 %r82, 1065353216;
|
|
st.local.u32 [%rd2], %r82;
|
|
ld.global.u32 %r76, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r76, %f10, %f11, %f12, %f447, %f448, %f449, %r45, %f450, %f451, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f488, [%rd2];
|
|
add.f32 %f1213, %f488, 0f00000000;
|
|
mov.u32 %r197, %r45;
|
|
|
|
BB0_35:
|
|
cvt.rn.f32.s32 %f497, %r197;
|
|
add.f32 %f498, %f13, %f497;
|
|
sub.f32 %f499, %f14, %f497;
|
|
mul.f32 %f500, %f498, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f501, %f500;
|
|
sub.f32 %f502, %f500, %f501;
|
|
mul.f32 %f503, %f499, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f504, %f503;
|
|
sub.f32 %f505, %f503, %f504;
|
|
mul.f32 %f506, %f497, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f507, %f506;
|
|
sub.f32 %f508, %f506, %f507;
|
|
add.f32 %f509, %f505, 0f420551EC;
|
|
add.f32 %f510, %f502, 0f420551EC;
|
|
add.f32 %f511, %f508, 0f420551EC;
|
|
mul.f32 %f512, %f502, %f509;
|
|
fma.rn.f32 %f513, %f505, %f510, %f512;
|
|
fma.rn.f32 %f514, %f508, %f511, %f513;
|
|
add.f32 %f515, %f502, %f514;
|
|
add.f32 %f516, %f505, %f514;
|
|
add.f32 %f517, %f508, %f514;
|
|
add.f32 %f518, %f515, %f516;
|
|
mul.f32 %f519, %f517, %f518;
|
|
cvt.rmi.f32.f32 %f520, %f519;
|
|
sub.f32 %f521, %f519, %f520;
|
|
add.f32 %f522, %f515, %f515;
|
|
mul.f32 %f523, %f516, %f522;
|
|
cvt.rmi.f32.f32 %f524, %f523;
|
|
sub.f32 %f525, %f523, %f524;
|
|
mul.f32 %f526, %f515, %f518;
|
|
cvt.rmi.f32.f32 %f527, %f526;
|
|
sub.f32 %f528, %f526, %f527;
|
|
fma.rn.f32 %f529, %f521, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f530, %f525, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f531, %f528, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f532, %f276, %f529, %f281;
|
|
fma.rn.f32 %f533, %f276, %f530, %f282;
|
|
fma.rn.f32 %f534, %f276, %f531, %f283;
|
|
sub.f32 %f535, %f532, %f7;
|
|
sub.f32 %f536, %f533, %f8;
|
|
sub.f32 %f537, %f534, %f9;
|
|
mul.f32 %f538, %f536, %f536;
|
|
fma.rn.f32 %f539, %f535, %f535, %f538;
|
|
fma.rn.f32 %f540, %f537, %f537, %f539;
|
|
sqrt.rn.f32 %f496, %f540;
|
|
rcp.rn.f32 %f541, %f496;
|
|
mul.f32 %f492, %f541, %f535;
|
|
mul.f32 %f493, %f541, %f536;
|
|
mul.f32 %f494, %f541, %f537;
|
|
ld.global.u32 %r86, [imageEnabled];
|
|
and.b32 %r87, %r86, 32;
|
|
setp.eq.s32 %p47, %r87, 0;
|
|
selp.f32 %f542, 0f3F800000, 0f41200000, %p47;
|
|
mul.f32 %f495, %f542, %f115;
|
|
mov.u32 %r88, 1065353216;
|
|
st.local.u32 [%rd2], %r88;
|
|
ld.global.u32 %r83, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r83, %f10, %f11, %f12, %f492, %f493, %f494, %r45, %f495, %f496, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f543, [%rd2];
|
|
add.f32 %f1214, %f1213, %f543;
|
|
add.s32 %r198, %r197, 1;
|
|
|
|
BB0_36:
|
|
cvt.rn.f32.s32 %f552, %r198;
|
|
add.f32 %f553, %f13, %f552;
|
|
sub.f32 %f554, %f14, %f552;
|
|
mul.f32 %f555, %f553, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f556, %f555;
|
|
sub.f32 %f557, %f555, %f556;
|
|
mul.f32 %f558, %f554, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f559, %f558;
|
|
sub.f32 %f560, %f558, %f559;
|
|
mul.f32 %f561, %f552, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f562, %f561;
|
|
sub.f32 %f563, %f561, %f562;
|
|
add.f32 %f564, %f560, 0f420551EC;
|
|
add.f32 %f565, %f557, 0f420551EC;
|
|
add.f32 %f566, %f563, 0f420551EC;
|
|
mul.f32 %f567, %f557, %f564;
|
|
fma.rn.f32 %f568, %f560, %f565, %f567;
|
|
fma.rn.f32 %f569, %f563, %f566, %f568;
|
|
add.f32 %f570, %f557, %f569;
|
|
add.f32 %f571, %f560, %f569;
|
|
add.f32 %f572, %f563, %f569;
|
|
add.f32 %f573, %f570, %f571;
|
|
mul.f32 %f574, %f572, %f573;
|
|
cvt.rmi.f32.f32 %f575, %f574;
|
|
sub.f32 %f576, %f574, %f575;
|
|
add.f32 %f577, %f570, %f570;
|
|
mul.f32 %f578, %f571, %f577;
|
|
cvt.rmi.f32.f32 %f579, %f578;
|
|
sub.f32 %f580, %f578, %f579;
|
|
mul.f32 %f581, %f570, %f573;
|
|
cvt.rmi.f32.f32 %f582, %f581;
|
|
sub.f32 %f583, %f581, %f582;
|
|
fma.rn.f32 %f584, %f576, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f585, %f580, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f586, %f583, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f587, %f276, %f584, %f281;
|
|
fma.rn.f32 %f588, %f276, %f585, %f282;
|
|
fma.rn.f32 %f589, %f276, %f586, %f283;
|
|
sub.f32 %f590, %f587, %f7;
|
|
sub.f32 %f591, %f588, %f8;
|
|
sub.f32 %f592, %f589, %f9;
|
|
mul.f32 %f593, %f591, %f591;
|
|
fma.rn.f32 %f594, %f590, %f590, %f593;
|
|
fma.rn.f32 %f595, %f592, %f592, %f594;
|
|
sqrt.rn.f32 %f551, %f595;
|
|
rcp.rn.f32 %f596, %f551;
|
|
mul.f32 %f547, %f596, %f590;
|
|
mul.f32 %f548, %f596, %f591;
|
|
mul.f32 %f549, %f596, %f592;
|
|
ld.global.u32 %r92, [imageEnabled];
|
|
and.b32 %r93, %r92, 32;
|
|
setp.eq.s32 %p48, %r93, 0;
|
|
selp.f32 %f597, 0f3F800000, 0f41200000, %p48;
|
|
mul.f32 %f550, %f597, %f115;
|
|
mov.u32 %r94, 1065353216;
|
|
st.local.u32 [%rd2], %r94;
|
|
ld.global.u32 %r89, [root];
|
|
mov.u32 %r90, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r89, %f10, %f11, %f12, %f547, %f548, %f549, %r90, %f550, %f551, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f598, [%rd2];
|
|
add.f32 %f1217, %f1214, %f598;
|
|
add.s32 %r200, %r198, 1;
|
|
|
|
BB0_37:
|
|
setp.lt.u32 %p49, %r8, 4;
|
|
@%p49 bra BB0_39;
|
|
|
|
BB0_38:
|
|
cvt.rn.f32.s32 %f631, %r200;
|
|
add.f32 %f632, %f13, %f631;
|
|
sub.f32 %f633, %f14, %f631;
|
|
mul.f32 %f634, %f632, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f635, %f634;
|
|
sub.f32 %f636, %f634, %f635;
|
|
mul.f32 %f637, %f633, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f638, %f637;
|
|
sub.f32 %f639, %f637, %f638;
|
|
mul.f32 %f640, %f631, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f641, %f640;
|
|
sub.f32 %f642, %f640, %f641;
|
|
add.f32 %f643, %f639, 0f420551EC;
|
|
add.f32 %f644, %f636, 0f420551EC;
|
|
add.f32 %f645, %f642, 0f420551EC;
|
|
mul.f32 %f646, %f636, %f643;
|
|
fma.rn.f32 %f647, %f639, %f644, %f646;
|
|
fma.rn.f32 %f648, %f642, %f645, %f647;
|
|
add.f32 %f649, %f636, %f648;
|
|
add.f32 %f650, %f639, %f648;
|
|
add.f32 %f651, %f642, %f648;
|
|
add.f32 %f652, %f649, %f650;
|
|
mul.f32 %f653, %f651, %f652;
|
|
cvt.rmi.f32.f32 %f654, %f653;
|
|
sub.f32 %f655, %f653, %f654;
|
|
add.f32 %f656, %f649, %f649;
|
|
mul.f32 %f657, %f650, %f656;
|
|
cvt.rmi.f32.f32 %f658, %f657;
|
|
sub.f32 %f659, %f657, %f658;
|
|
mul.f32 %f660, %f649, %f652;
|
|
cvt.rmi.f32.f32 %f661, %f660;
|
|
sub.f32 %f662, %f660, %f661;
|
|
fma.rn.f32 %f663, %f655, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f664, %f659, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f665, %f662, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f666, %f276, %f663, %f281;
|
|
fma.rn.f32 %f667, %f276, %f664, %f282;
|
|
fma.rn.f32 %f668, %f276, %f665, %f283;
|
|
sub.f32 %f669, %f666, %f7;
|
|
sub.f32 %f670, %f667, %f8;
|
|
sub.f32 %f671, %f668, %f9;
|
|
mul.f32 %f672, %f670, %f670;
|
|
fma.rn.f32 %f673, %f669, %f669, %f672;
|
|
fma.rn.f32 %f674, %f671, %f671, %f673;
|
|
sqrt.rn.f32 %f606, %f674;
|
|
rcp.rn.f32 %f675, %f606;
|
|
mul.f32 %f602, %f675, %f669;
|
|
mul.f32 %f603, %f675, %f670;
|
|
mul.f32 %f604, %f675, %f671;
|
|
ld.global.u32 %r107, [imageEnabled];
|
|
and.b32 %r108, %r107, 32;
|
|
setp.eq.s32 %p50, %r108, 0;
|
|
selp.f32 %f676, 0f3F800000, 0f41200000, %p50;
|
|
mul.f32 %f605, %f676, %f115;
|
|
mov.u32 %r109, 1065353216;
|
|
st.local.u32 [%rd2], %r109;
|
|
ld.global.u32 %r95, [root];
|
|
mov.u32 %r105, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r95, %f10, %f11, %f12, %f602, %f603, %f604, %r105, %f605, %f606, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f677, [%rd2];
|
|
add.f32 %f678, %f1217, %f677;
|
|
add.s32 %r110, %r200, 1;
|
|
cvt.rn.f32.s32 %f679, %r110;
|
|
add.f32 %f680, %f13, %f679;
|
|
sub.f32 %f681, %f14, %f679;
|
|
mul.f32 %f682, %f680, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f683, %f682;
|
|
sub.f32 %f684, %f682, %f683;
|
|
mul.f32 %f685, %f681, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f686, %f685;
|
|
sub.f32 %f687, %f685, %f686;
|
|
mul.f32 %f688, %f679, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f689, %f688;
|
|
sub.f32 %f690, %f688, %f689;
|
|
add.f32 %f691, %f687, 0f420551EC;
|
|
add.f32 %f692, %f684, 0f420551EC;
|
|
add.f32 %f693, %f690, 0f420551EC;
|
|
mul.f32 %f694, %f684, %f691;
|
|
fma.rn.f32 %f695, %f687, %f692, %f694;
|
|
fma.rn.f32 %f696, %f690, %f693, %f695;
|
|
add.f32 %f697, %f684, %f696;
|
|
add.f32 %f698, %f687, %f696;
|
|
add.f32 %f699, %f690, %f696;
|
|
add.f32 %f700, %f697, %f698;
|
|
mul.f32 %f701, %f699, %f700;
|
|
cvt.rmi.f32.f32 %f702, %f701;
|
|
sub.f32 %f703, %f701, %f702;
|
|
add.f32 %f704, %f697, %f697;
|
|
mul.f32 %f705, %f698, %f704;
|
|
cvt.rmi.f32.f32 %f706, %f705;
|
|
sub.f32 %f707, %f705, %f706;
|
|
mul.f32 %f708, %f697, %f700;
|
|
cvt.rmi.f32.f32 %f709, %f708;
|
|
sub.f32 %f710, %f708, %f709;
|
|
fma.rn.f32 %f711, %f703, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f712, %f707, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f713, %f710, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f714, %f276, %f711, %f281;
|
|
fma.rn.f32 %f715, %f276, %f712, %f282;
|
|
fma.rn.f32 %f716, %f276, %f713, %f283;
|
|
sub.f32 %f717, %f714, %f7;
|
|
sub.f32 %f718, %f715, %f8;
|
|
sub.f32 %f719, %f716, %f9;
|
|
mul.f32 %f720, %f718, %f718;
|
|
fma.rn.f32 %f721, %f717, %f717, %f720;
|
|
fma.rn.f32 %f722, %f719, %f719, %f721;
|
|
sqrt.rn.f32 %f614, %f722;
|
|
rcp.rn.f32 %f723, %f614;
|
|
mul.f32 %f610, %f723, %f717;
|
|
mul.f32 %f611, %f723, %f718;
|
|
mul.f32 %f612, %f723, %f719;
|
|
ld.global.u32 %r111, [imageEnabled];
|
|
and.b32 %r112, %r111, 32;
|
|
setp.eq.s32 %p51, %r112, 0;
|
|
selp.f32 %f724, 0f3F800000, 0f41200000, %p51;
|
|
mul.f32 %f613, %f724, %f115;
|
|
st.local.u32 [%rd2], %r109;
|
|
ld.global.u32 %r98, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r98, %f10, %f11, %f12, %f610, %f611, %f612, %r105, %f613, %f614, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f725, [%rd2];
|
|
add.f32 %f726, %f678, %f725;
|
|
add.s32 %r113, %r200, 2;
|
|
cvt.rn.f32.s32 %f727, %r113;
|
|
add.f32 %f728, %f13, %f727;
|
|
sub.f32 %f729, %f14, %f727;
|
|
mul.f32 %f730, %f728, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f731, %f730;
|
|
sub.f32 %f732, %f730, %f731;
|
|
mul.f32 %f733, %f729, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f734, %f733;
|
|
sub.f32 %f735, %f733, %f734;
|
|
mul.f32 %f736, %f727, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f737, %f736;
|
|
sub.f32 %f738, %f736, %f737;
|
|
add.f32 %f739, %f735, 0f420551EC;
|
|
add.f32 %f740, %f732, 0f420551EC;
|
|
add.f32 %f741, %f738, 0f420551EC;
|
|
mul.f32 %f742, %f732, %f739;
|
|
fma.rn.f32 %f743, %f735, %f740, %f742;
|
|
fma.rn.f32 %f744, %f738, %f741, %f743;
|
|
add.f32 %f745, %f732, %f744;
|
|
add.f32 %f746, %f735, %f744;
|
|
add.f32 %f747, %f738, %f744;
|
|
add.f32 %f748, %f745, %f746;
|
|
mul.f32 %f749, %f747, %f748;
|
|
cvt.rmi.f32.f32 %f750, %f749;
|
|
sub.f32 %f751, %f749, %f750;
|
|
add.f32 %f752, %f745, %f745;
|
|
mul.f32 %f753, %f746, %f752;
|
|
cvt.rmi.f32.f32 %f754, %f753;
|
|
sub.f32 %f755, %f753, %f754;
|
|
mul.f32 %f756, %f745, %f748;
|
|
cvt.rmi.f32.f32 %f757, %f756;
|
|
sub.f32 %f758, %f756, %f757;
|
|
fma.rn.f32 %f759, %f751, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f760, %f755, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f761, %f758, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f762, %f276, %f759, %f281;
|
|
fma.rn.f32 %f763, %f276, %f760, %f282;
|
|
fma.rn.f32 %f764, %f276, %f761, %f283;
|
|
sub.f32 %f765, %f762, %f7;
|
|
sub.f32 %f766, %f763, %f8;
|
|
sub.f32 %f767, %f764, %f9;
|
|
mul.f32 %f768, %f766, %f766;
|
|
fma.rn.f32 %f769, %f765, %f765, %f768;
|
|
fma.rn.f32 %f770, %f767, %f767, %f769;
|
|
sqrt.rn.f32 %f622, %f770;
|
|
rcp.rn.f32 %f771, %f622;
|
|
mul.f32 %f618, %f771, %f765;
|
|
mul.f32 %f619, %f771, %f766;
|
|
mul.f32 %f620, %f771, %f767;
|
|
ld.global.u32 %r114, [imageEnabled];
|
|
and.b32 %r115, %r114, 32;
|
|
setp.eq.s32 %p52, %r115, 0;
|
|
selp.f32 %f772, 0f3F800000, 0f41200000, %p52;
|
|
mul.f32 %f621, %f772, %f115;
|
|
st.local.u32 [%rd2], %r109;
|
|
ld.global.u32 %r101, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r101, %f10, %f11, %f12, %f618, %f619, %f620, %r105, %f621, %f622, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f773, [%rd2];
|
|
add.f32 %f774, %f726, %f773;
|
|
add.s32 %r116, %r200, 3;
|
|
cvt.rn.f32.s32 %f775, %r116;
|
|
add.f32 %f776, %f13, %f775;
|
|
sub.f32 %f777, %f14, %f775;
|
|
mul.f32 %f778, %f776, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f779, %f778;
|
|
sub.f32 %f780, %f778, %f779;
|
|
mul.f32 %f781, %f777, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f782, %f781;
|
|
sub.f32 %f783, %f781, %f782;
|
|
mul.f32 %f784, %f775, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f785, %f784;
|
|
sub.f32 %f786, %f784, %f785;
|
|
add.f32 %f787, %f783, 0f420551EC;
|
|
add.f32 %f788, %f780, 0f420551EC;
|
|
add.f32 %f789, %f786, 0f420551EC;
|
|
mul.f32 %f790, %f780, %f787;
|
|
fma.rn.f32 %f791, %f783, %f788, %f790;
|
|
fma.rn.f32 %f792, %f786, %f789, %f791;
|
|
add.f32 %f793, %f780, %f792;
|
|
add.f32 %f794, %f783, %f792;
|
|
add.f32 %f795, %f786, %f792;
|
|
add.f32 %f796, %f793, %f794;
|
|
mul.f32 %f797, %f795, %f796;
|
|
cvt.rmi.f32.f32 %f798, %f797;
|
|
sub.f32 %f799, %f797, %f798;
|
|
add.f32 %f800, %f793, %f793;
|
|
mul.f32 %f801, %f794, %f800;
|
|
cvt.rmi.f32.f32 %f802, %f801;
|
|
sub.f32 %f803, %f801, %f802;
|
|
mul.f32 %f804, %f793, %f796;
|
|
cvt.rmi.f32.f32 %f805, %f804;
|
|
sub.f32 %f806, %f804, %f805;
|
|
fma.rn.f32 %f807, %f799, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f808, %f803, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f809, %f806, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f810, %f276, %f807, %f281;
|
|
fma.rn.f32 %f811, %f276, %f808, %f282;
|
|
fma.rn.f32 %f812, %f276, %f809, %f283;
|
|
sub.f32 %f813, %f810, %f7;
|
|
sub.f32 %f814, %f811, %f8;
|
|
sub.f32 %f815, %f812, %f9;
|
|
mul.f32 %f816, %f814, %f814;
|
|
fma.rn.f32 %f817, %f813, %f813, %f816;
|
|
fma.rn.f32 %f818, %f815, %f815, %f817;
|
|
sqrt.rn.f32 %f630, %f818;
|
|
rcp.rn.f32 %f819, %f630;
|
|
mul.f32 %f626, %f819, %f813;
|
|
mul.f32 %f627, %f819, %f814;
|
|
mul.f32 %f628, %f819, %f815;
|
|
ld.global.u32 %r117, [imageEnabled];
|
|
and.b32 %r118, %r117, 32;
|
|
setp.eq.s32 %p53, %r118, 0;
|
|
selp.f32 %f820, 0f3F800000, 0f41200000, %p53;
|
|
mul.f32 %f629, %f820, %f115;
|
|
st.local.u32 [%rd2], %r109;
|
|
ld.global.u32 %r104, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r104, %f10, %f11, %f12, %f626, %f627, %f628, %r105, %f629, %f630, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f821, [%rd2];
|
|
add.f32 %f1217, %f774, %f821;
|
|
add.s32 %r200, %r200, 4;
|
|
setp.lt.s32 %p54, %r200, %r8;
|
|
@%p54 bra BB0_38;
|
|
|
|
BB0_39:
|
|
cvt.rn.f32.s32 %f822, %r8;
|
|
div.rn.f32 %f1218, %f1217, %f822;
|
|
shr.u32 %r119, %r6, 31;
|
|
cvt.u16.u32 %rs62, %r119;
|
|
|
|
BB0_40:
|
|
fma.rn.f32 %f1199, %f108, %f1218, %f1199;
|
|
fma.rn.f32 %f1198, %f109, %f1218, %f1198;
|
|
fma.rn.f32 %f1197, %f110, %f1218, %f1197;
|
|
ld.global.u8 %rs15, [imageEnabled];
|
|
and.b16 %rs16, %rs15, 64;
|
|
setp.eq.s16 %p55, %rs16, 0;
|
|
@%p55 bra BB0_42;
|
|
|
|
mul.f32 %f823, %f109, 0f3F372474;
|
|
fma.rn.f32 %f824, %f108, 0f3E59999A, %f823;
|
|
fma.rn.f32 %f825, %f110, 0f3D93A92A, %f824;
|
|
fma.rn.f32 %f24, %f111, %f825, %f24;
|
|
fma.rn.f32 %f23, %f112, %f825, %f23;
|
|
fma.rn.f32 %f22, %f825, %f113, %f22;
|
|
|
|
BB0_42:
|
|
setp.eq.s16 %p56, %rs62, 0;
|
|
@%p56 bra BB0_44;
|
|
|
|
div.rn.f32 %f826, %f108, %f272;
|
|
div.rn.f32 %f827, %f826, %f88;
|
|
cvt.sat.f32.f32 %f828, %f827;
|
|
mul.f32 %f1218, %f1218, %f828;
|
|
|
|
BB0_44:
|
|
add.f32 %f1193, %f1193, %f1218;
|
|
|
|
BB0_45:
|
|
add.s32 %r196, %r196, 1;
|
|
setp.lt.u32 %p57, %r196, %r4;
|
|
@%p57 bra BB0_5;
|
|
|
|
BB0_46:
|
|
ld.global.u32 %r202, [imageEnabled];
|
|
and.b32 %r120, %r202, 8;
|
|
setp.eq.s32 %p58, %r120, 0;
|
|
@%p58 bra BB0_59;
|
|
|
|
cvt.sat.f32.f32 %f153, %f1193;
|
|
cvt.u64.u32 %rd46, %r3;
|
|
cvt.u64.u32 %rd45, %r2;
|
|
mov.u64 %rd49, image_Mask;
|
|
cvta.global.u64 %rd44, %rd49;
|
|
// inline asm
|
|
call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f831, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f832, %f831;
|
|
fma.rn.f32 %f833, %f832, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f154, %f833;
|
|
abs.f32 %f155, %f153;
|
|
setp.lt.f32 %p59, %f155, 0f00800000;
|
|
mul.f32 %f834, %f155, 0f4B800000;
|
|
selp.f32 %f835, 0fC3170000, 0fC2FE0000, %p59;
|
|
selp.f32 %f836, %f834, %f155, %p59;
|
|
mov.b32 %r123, %f836;
|
|
and.b32 %r124, %r123, 8388607;
|
|
or.b32 %r125, %r124, 1065353216;
|
|
mov.b32 %f837, %r125;
|
|
shr.u32 %r126, %r123, 23;
|
|
cvt.rn.f32.u32 %f838, %r126;
|
|
add.f32 %f839, %f835, %f838;
|
|
setp.gt.f32 %p60, %f837, 0f3FB504F3;
|
|
mul.f32 %f840, %f837, 0f3F000000;
|
|
add.f32 %f841, %f839, 0f3F800000;
|
|
selp.f32 %f842, %f840, %f837, %p60;
|
|
selp.f32 %f843, %f841, %f839, %p60;
|
|
add.f32 %f844, %f842, 0fBF800000;
|
|
add.f32 %f830, %f842, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f829,%f830;
|
|
// inline asm
|
|
add.f32 %f845, %f844, %f844;
|
|
mul.f32 %f846, %f829, %f845;
|
|
mul.f32 %f847, %f846, %f846;
|
|
mov.f32 %f848, 0f3C4CAF63;
|
|
mov.f32 %f849, 0f3B18F0FE;
|
|
fma.rn.f32 %f850, %f849, %f847, %f848;
|
|
mov.f32 %f851, 0f3DAAAABD;
|
|
fma.rn.f32 %f852, %f850, %f847, %f851;
|
|
mul.rn.f32 %f853, %f852, %f847;
|
|
mul.rn.f32 %f854, %f853, %f846;
|
|
sub.f32 %f855, %f844, %f846;
|
|
neg.f32 %f856, %f846;
|
|
add.f32 %f857, %f855, %f855;
|
|
fma.rn.f32 %f858, %f856, %f844, %f857;
|
|
mul.rn.f32 %f859, %f829, %f858;
|
|
add.f32 %f860, %f854, %f846;
|
|
sub.f32 %f861, %f846, %f860;
|
|
add.f32 %f862, %f854, %f861;
|
|
add.f32 %f863, %f859, %f862;
|
|
add.f32 %f864, %f860, %f863;
|
|
sub.f32 %f865, %f860, %f864;
|
|
add.f32 %f866, %f863, %f865;
|
|
mov.f32 %f867, 0f3F317200;
|
|
mul.rn.f32 %f868, %f843, %f867;
|
|
mov.f32 %f869, 0f35BFBE8E;
|
|
mul.rn.f32 %f870, %f843, %f869;
|
|
add.f32 %f871, %f868, %f864;
|
|
sub.f32 %f872, %f868, %f871;
|
|
add.f32 %f873, %f864, %f872;
|
|
add.f32 %f874, %f866, %f873;
|
|
add.f32 %f875, %f870, %f874;
|
|
add.f32 %f876, %f871, %f875;
|
|
sub.f32 %f877, %f871, %f876;
|
|
add.f32 %f878, %f875, %f877;
|
|
mov.f32 %f879, 0f3EE8BA2E;
|
|
mul.rn.f32 %f880, %f879, %f876;
|
|
neg.f32 %f881, %f880;
|
|
fma.rn.f32 %f882, %f879, %f876, %f881;
|
|
fma.rn.f32 %f883, %f879, %f878, %f882;
|
|
mov.f32 %f884, 0f00000000;
|
|
fma.rn.f32 %f885, %f884, %f876, %f883;
|
|
add.rn.f32 %f886, %f880, %f885;
|
|
neg.f32 %f887, %f886;
|
|
add.rn.f32 %f888, %f880, %f887;
|
|
add.rn.f32 %f889, %f888, %f885;
|
|
mov.b32 %r127, %f886;
|
|
setp.eq.s32 %p61, %r127, 1118925336;
|
|
add.s32 %r128, %r127, -1;
|
|
mov.b32 %f890, %r128;
|
|
add.f32 %f891, %f889, 0f37000000;
|
|
selp.f32 %f892, %f890, %f886, %p61;
|
|
selp.f32 %f156, %f891, %f889, %p61;
|
|
mul.f32 %f893, %f892, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f894, %f893;
|
|
mov.f32 %f895, 0fBF317200;
|
|
fma.rn.f32 %f896, %f894, %f895, %f892;
|
|
mov.f32 %f897, 0fB5BFBE8E;
|
|
fma.rn.f32 %f898, %f894, %f897, %f896;
|
|
mul.f32 %f899, %f898, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f900, %f899;
|
|
add.f32 %f901, %f894, 0f00000000;
|
|
ex2.approx.f32 %f902, %f901;
|
|
mul.f32 %f903, %f900, %f902;
|
|
setp.lt.f32 %p62, %f892, 0fC2D20000;
|
|
selp.f32 %f904, 0f00000000, %f903, %p62;
|
|
setp.gt.f32 %p63, %f892, 0f42D20000;
|
|
selp.f32 %f1237, 0f7F800000, %f904, %p63;
|
|
setp.eq.f32 %p64, %f1237, 0f7F800000;
|
|
@%p64 bra BB0_49;
|
|
|
|
fma.rn.f32 %f1237, %f1237, %f156, %f1237;
|
|
|
|
BB0_49:
|
|
setp.lt.f32 %p65, %f153, 0f00000000;
|
|
setp.eq.f32 %p66, %f154, 0f3F800000;
|
|
and.pred %p4, %p65, %p66;
|
|
mov.b32 %r129, %f1237;
|
|
xor.b32 %r130, %r129, -2147483648;
|
|
mov.b32 %f905, %r130;
|
|
selp.f32 %f1239, %f905, %f1237, %p4;
|
|
setp.eq.f32 %p67, %f153, 0f00000000;
|
|
@%p67 bra BB0_52;
|
|
bra.uni BB0_50;
|
|
|
|
BB0_52:
|
|
add.f32 %f908, %f153, %f153;
|
|
selp.f32 %f1239, %f908, 0f00000000, %p66;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd117, image_HDR;
|
|
cvta.global.u64 %rd112, %rd117;
|
|
mov.u32 %r193, 8;
|
|
// inline asm
|
|
call (%rd111), _rt_buffer_get_64, (%rd112, %r28, %r193, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1189, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1189;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs58, 0;
|
|
st.v4.u16 [%rd111], {%rs57, %rs57, %rs57, %rs58};
|
|
|
|
BB0_108:
|
|
ld.global.u8 %rs59, [imageEnabled];
|
|
and.b16 %rs60, %rs59, 64;
|
|
setp.eq.s16 %p131, %rs60, 0;
|
|
@%p131 bra BB0_110;
|
|
|
|
cvt.u64.u32 %rd120, %r2;
|
|
cvt.u64.u32 %rd121, %r3;
|
|
mov.u64 %rd124, image_Dir;
|
|
cvta.global.u64 %rd119, %rd124;
|
|
// inline asm
|
|
call (%rd118), _rt_buffer_get_64, (%rd119, %r28, %r29, %rd120, %rd121, %rd13, %rd13);
|
|
// inline asm
|
|
mov.u16 %rs61, 0;
|
|
st.v4.u8 [%rd118], {%rs61, %rs61, %rs61, %rs61};
|
|
bra.uni BB0_110;
|
|
|
|
BB0_50:
|
|
setp.geu.f32 %p68, %f153, 0f00000000;
|
|
@%p68 bra BB0_53;
|
|
|
|
cvt.rzi.f32.f32 %f907, %f879;
|
|
setp.neu.f32 %p69, %f907, 0f3EE8BA2E;
|
|
selp.f32 %f1239, 0f7FFFFFFF, %f1239, %p69;
|
|
|
|
BB0_53:
|
|
add.f32 %f909, %f155, 0f3EE8BA2E;
|
|
mov.b32 %r131, %f909;
|
|
setp.lt.s32 %p71, %r131, 2139095040;
|
|
@%p71 bra BB0_58;
|
|
|
|
setp.gtu.f32 %p72, %f155, 0f7F800000;
|
|
@%p72 bra BB0_57;
|
|
bra.uni BB0_55;
|
|
|
|
BB0_57:
|
|
add.f32 %f1239, %f153, 0f3EE8BA2E;
|
|
bra.uni BB0_58;
|
|
|
|
BB0_55:
|
|
setp.neu.f32 %p73, %f155, 0f7F800000;
|
|
@%p73 bra BB0_58;
|
|
|
|
selp.f32 %f1239, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_58:
|
|
mul.f32 %f910, %f1239, 0f437F0000;
|
|
setp.eq.f32 %p74, %f153, 0f3F800000;
|
|
selp.f32 %f911, 0f437F0000, %f910, %p74;
|
|
cvt.rzi.u32.f32 %r132, %f911;
|
|
cvt.u16.u32 %rs17, %r132;
|
|
mov.u16 %rs18, 255;
|
|
st.v2.u8 [%rd43], {%rs17, %rs18};
|
|
ld.global.u32 %r202, [imageEnabled];
|
|
|
|
BB0_59:
|
|
and.b32 %r133, %r202, 1;
|
|
setp.eq.b32 %p75, %r133, 1;
|
|
@!%p75 bra BB0_94;
|
|
bra.uni BB0_60;
|
|
|
|
BB0_60:
|
|
mov.f32 %f914, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f915, %f914;
|
|
fma.rn.f32 %f916, %f915, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f167, %f916;
|
|
abs.f32 %f168, %f1199;
|
|
setp.lt.f32 %p76, %f168, 0f00800000;
|
|
mul.f32 %f917, %f168, 0f4B800000;
|
|
selp.f32 %f918, 0fC3170000, 0fC2FE0000, %p76;
|
|
selp.f32 %f919, %f917, %f168, %p76;
|
|
mov.b32 %r134, %f919;
|
|
and.b32 %r135, %r134, 8388607;
|
|
or.b32 %r136, %r135, 1065353216;
|
|
mov.b32 %f920, %r136;
|
|
shr.u32 %r137, %r134, 23;
|
|
cvt.rn.f32.u32 %f921, %r137;
|
|
add.f32 %f922, %f918, %f921;
|
|
setp.gt.f32 %p77, %f920, 0f3FB504F3;
|
|
mul.f32 %f923, %f920, 0f3F000000;
|
|
add.f32 %f924, %f922, 0f3F800000;
|
|
selp.f32 %f925, %f923, %f920, %p77;
|
|
selp.f32 %f926, %f924, %f922, %p77;
|
|
add.f32 %f927, %f925, 0fBF800000;
|
|
add.f32 %f913, %f925, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f912,%f913;
|
|
// inline asm
|
|
add.f32 %f928, %f927, %f927;
|
|
mul.f32 %f929, %f912, %f928;
|
|
mul.f32 %f930, %f929, %f929;
|
|
mov.f32 %f931, 0f3C4CAF63;
|
|
mov.f32 %f932, 0f3B18F0FE;
|
|
fma.rn.f32 %f933, %f932, %f930, %f931;
|
|
mov.f32 %f934, 0f3DAAAABD;
|
|
fma.rn.f32 %f935, %f933, %f930, %f934;
|
|
mul.rn.f32 %f936, %f935, %f930;
|
|
mul.rn.f32 %f937, %f936, %f929;
|
|
sub.f32 %f938, %f927, %f929;
|
|
neg.f32 %f939, %f929;
|
|
add.f32 %f940, %f938, %f938;
|
|
fma.rn.f32 %f941, %f939, %f927, %f940;
|
|
mul.rn.f32 %f942, %f912, %f941;
|
|
add.f32 %f943, %f937, %f929;
|
|
sub.f32 %f944, %f929, %f943;
|
|
add.f32 %f945, %f937, %f944;
|
|
add.f32 %f946, %f942, %f945;
|
|
add.f32 %f947, %f943, %f946;
|
|
sub.f32 %f948, %f943, %f947;
|
|
add.f32 %f949, %f946, %f948;
|
|
mov.f32 %f950, 0f3F317200;
|
|
mul.rn.f32 %f951, %f926, %f950;
|
|
mov.f32 %f952, 0f35BFBE8E;
|
|
mul.rn.f32 %f953, %f926, %f952;
|
|
add.f32 %f954, %f951, %f947;
|
|
sub.f32 %f955, %f951, %f954;
|
|
add.f32 %f956, %f947, %f955;
|
|
add.f32 %f957, %f949, %f956;
|
|
add.f32 %f958, %f953, %f957;
|
|
add.f32 %f959, %f954, %f958;
|
|
sub.f32 %f960, %f954, %f959;
|
|
add.f32 %f961, %f958, %f960;
|
|
mov.f32 %f962, 0f3EE66666;
|
|
mul.rn.f32 %f963, %f962, %f959;
|
|
neg.f32 %f964, %f963;
|
|
fma.rn.f32 %f965, %f962, %f959, %f964;
|
|
fma.rn.f32 %f966, %f962, %f961, %f965;
|
|
mov.f32 %f967, 0f00000000;
|
|
fma.rn.f32 %f968, %f967, %f959, %f966;
|
|
add.rn.f32 %f969, %f963, %f968;
|
|
neg.f32 %f970, %f969;
|
|
add.rn.f32 %f971, %f963, %f970;
|
|
add.rn.f32 %f972, %f971, %f968;
|
|
mov.b32 %r138, %f969;
|
|
setp.eq.s32 %p78, %r138, 1118925336;
|
|
add.s32 %r139, %r138, -1;
|
|
mov.b32 %f973, %r139;
|
|
add.f32 %f974, %f972, 0f37000000;
|
|
selp.f32 %f975, %f973, %f969, %p78;
|
|
selp.f32 %f169, %f974, %f972, %p78;
|
|
mul.f32 %f976, %f975, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f977, %f976;
|
|
mov.f32 %f978, 0fBF317200;
|
|
fma.rn.f32 %f979, %f977, %f978, %f975;
|
|
mov.f32 %f980, 0fB5BFBE8E;
|
|
fma.rn.f32 %f981, %f977, %f980, %f979;
|
|
mul.f32 %f982, %f981, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f983, %f982;
|
|
add.f32 %f984, %f977, 0f00000000;
|
|
ex2.approx.f32 %f985, %f984;
|
|
mul.f32 %f986, %f983, %f985;
|
|
setp.lt.f32 %p79, %f975, 0fC2D20000;
|
|
selp.f32 %f987, 0f00000000, %f986, %p79;
|
|
setp.gt.f32 %p80, %f975, 0f42D20000;
|
|
selp.f32 %f1240, 0f7F800000, %f987, %p80;
|
|
setp.eq.f32 %p81, %f1240, 0f7F800000;
|
|
@%p81 bra BB0_62;
|
|
|
|
fma.rn.f32 %f1240, %f1240, %f169, %f1240;
|
|
|
|
BB0_62:
|
|
setp.lt.f32 %p82, %f1199, 0f00000000;
|
|
setp.eq.f32 %p83, %f167, 0f3F800000;
|
|
and.pred %p5, %p82, %p83;
|
|
mov.b32 %r140, %f1240;
|
|
xor.b32 %r141, %r140, -2147483648;
|
|
mov.b32 %f988, %r141;
|
|
selp.f32 %f1242, %f988, %f1240, %p5;
|
|
setp.eq.f32 %p84, %f1199, 0f00000000;
|
|
@%p84 bra BB0_65;
|
|
bra.uni BB0_63;
|
|
|
|
BB0_65:
|
|
add.f32 %f991, %f1199, %f1199;
|
|
selp.f32 %f1242, %f991, 0f00000000, %p83;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_63:
|
|
setp.geu.f32 %p85, %f1199, 0f00000000;
|
|
@%p85 bra BB0_66;
|
|
|
|
cvt.rzi.f32.f32 %f990, %f962;
|
|
setp.neu.f32 %p86, %f990, 0f3EE66666;
|
|
selp.f32 %f1242, 0f7FFFFFFF, %f1242, %p86;
|
|
|
|
BB0_66:
|
|
add.f32 %f992, %f168, 0f3EE66666;
|
|
mov.b32 %r142, %f992;
|
|
setp.lt.s32 %p88, %r142, 2139095040;
|
|
@%p88 bra BB0_71;
|
|
|
|
setp.gtu.f32 %p89, %f168, 0f7F800000;
|
|
@%p89 bra BB0_70;
|
|
bra.uni BB0_68;
|
|
|
|
BB0_70:
|
|
add.f32 %f1242, %f1199, 0f3EE66666;
|
|
bra.uni BB0_71;
|
|
|
|
BB0_68:
|
|
setp.neu.f32 %p90, %f168, 0f7F800000;
|
|
@%p90 bra BB0_71;
|
|
|
|
selp.f32 %f1242, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_71:
|
|
setp.eq.f32 %p91, %f1199, 0f3F800000;
|
|
selp.f32 %f180, 0f3F800000, %f1242, %p91;
|
|
abs.f32 %f181, %f1198;
|
|
setp.lt.f32 %p92, %f181, 0f00800000;
|
|
mul.f32 %f995, %f181, 0f4B800000;
|
|
selp.f32 %f996, 0fC3170000, 0fC2FE0000, %p92;
|
|
selp.f32 %f997, %f995, %f181, %p92;
|
|
mov.b32 %r143, %f997;
|
|
and.b32 %r144, %r143, 8388607;
|
|
or.b32 %r145, %r144, 1065353216;
|
|
mov.b32 %f998, %r145;
|
|
shr.u32 %r146, %r143, 23;
|
|
cvt.rn.f32.u32 %f999, %r146;
|
|
add.f32 %f1000, %f996, %f999;
|
|
setp.gt.f32 %p93, %f998, 0f3FB504F3;
|
|
mul.f32 %f1001, %f998, 0f3F000000;
|
|
add.f32 %f1002, %f1000, 0f3F800000;
|
|
selp.f32 %f1003, %f1001, %f998, %p93;
|
|
selp.f32 %f1004, %f1002, %f1000, %p93;
|
|
add.f32 %f1005, %f1003, 0fBF800000;
|
|
add.f32 %f994, %f1003, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f993,%f994;
|
|
// inline asm
|
|
add.f32 %f1006, %f1005, %f1005;
|
|
mul.f32 %f1007, %f993, %f1006;
|
|
mul.f32 %f1008, %f1007, %f1007;
|
|
fma.rn.f32 %f1011, %f932, %f1008, %f931;
|
|
fma.rn.f32 %f1013, %f1011, %f1008, %f934;
|
|
mul.rn.f32 %f1014, %f1013, %f1008;
|
|
mul.rn.f32 %f1015, %f1014, %f1007;
|
|
sub.f32 %f1016, %f1005, %f1007;
|
|
neg.f32 %f1017, %f1007;
|
|
add.f32 %f1018, %f1016, %f1016;
|
|
fma.rn.f32 %f1019, %f1017, %f1005, %f1018;
|
|
mul.rn.f32 %f1020, %f993, %f1019;
|
|
add.f32 %f1021, %f1015, %f1007;
|
|
sub.f32 %f1022, %f1007, %f1021;
|
|
add.f32 %f1023, %f1015, %f1022;
|
|
add.f32 %f1024, %f1020, %f1023;
|
|
add.f32 %f1025, %f1021, %f1024;
|
|
sub.f32 %f1026, %f1021, %f1025;
|
|
add.f32 %f1027, %f1024, %f1026;
|
|
mul.rn.f32 %f1029, %f1004, %f950;
|
|
mul.rn.f32 %f1031, %f1004, %f952;
|
|
add.f32 %f1032, %f1029, %f1025;
|
|
sub.f32 %f1033, %f1029, %f1032;
|
|
add.f32 %f1034, %f1025, %f1033;
|
|
add.f32 %f1035, %f1027, %f1034;
|
|
add.f32 %f1036, %f1031, %f1035;
|
|
add.f32 %f1037, %f1032, %f1036;
|
|
sub.f32 %f1038, %f1032, %f1037;
|
|
add.f32 %f1039, %f1036, %f1038;
|
|
mul.rn.f32 %f1041, %f962, %f1037;
|
|
neg.f32 %f1042, %f1041;
|
|
fma.rn.f32 %f1043, %f962, %f1037, %f1042;
|
|
fma.rn.f32 %f1044, %f962, %f1039, %f1043;
|
|
fma.rn.f32 %f1046, %f967, %f1037, %f1044;
|
|
add.rn.f32 %f1047, %f1041, %f1046;
|
|
neg.f32 %f1048, %f1047;
|
|
add.rn.f32 %f1049, %f1041, %f1048;
|
|
add.rn.f32 %f1050, %f1049, %f1046;
|
|
mov.b32 %r147, %f1047;
|
|
setp.eq.s32 %p94, %r147, 1118925336;
|
|
add.s32 %r148, %r147, -1;
|
|
mov.b32 %f1051, %r148;
|
|
add.f32 %f1052, %f1050, 0f37000000;
|
|
selp.f32 %f1053, %f1051, %f1047, %p94;
|
|
selp.f32 %f182, %f1052, %f1050, %p94;
|
|
mul.f32 %f1054, %f1053, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1055, %f1054;
|
|
fma.rn.f32 %f1057, %f1055, %f978, %f1053;
|
|
fma.rn.f32 %f1059, %f1055, %f980, %f1057;
|
|
mul.f32 %f1060, %f1059, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1061, %f1060;
|
|
add.f32 %f1062, %f1055, 0f00000000;
|
|
ex2.approx.f32 %f1063, %f1062;
|
|
mul.f32 %f1064, %f1061, %f1063;
|
|
setp.lt.f32 %p95, %f1053, 0fC2D20000;
|
|
selp.f32 %f1065, 0f00000000, %f1064, %p95;
|
|
setp.gt.f32 %p96, %f1053, 0f42D20000;
|
|
selp.f32 %f1243, 0f7F800000, %f1065, %p96;
|
|
setp.eq.f32 %p97, %f1243, 0f7F800000;
|
|
@%p97 bra BB0_73;
|
|
|
|
fma.rn.f32 %f1243, %f1243, %f182, %f1243;
|
|
|
|
BB0_73:
|
|
setp.lt.f32 %p98, %f1198, 0f00000000;
|
|
and.pred %p6, %p98, %p83;
|
|
mov.b32 %r149, %f1243;
|
|
xor.b32 %r150, %r149, -2147483648;
|
|
mov.b32 %f1066, %r150;
|
|
selp.f32 %f1245, %f1066, %f1243, %p6;
|
|
setp.eq.f32 %p100, %f1198, 0f00000000;
|
|
@%p100 bra BB0_76;
|
|
bra.uni BB0_74;
|
|
|
|
BB0_76:
|
|
add.f32 %f1069, %f1198, %f1198;
|
|
selp.f32 %f1245, %f1069, 0f00000000, %p83;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_74:
|
|
setp.geu.f32 %p101, %f1198, 0f00000000;
|
|
@%p101 bra BB0_77;
|
|
|
|
cvt.rzi.f32.f32 %f1068, %f962;
|
|
setp.neu.f32 %p102, %f1068, 0f3EE66666;
|
|
selp.f32 %f1245, 0f7FFFFFFF, %f1245, %p102;
|
|
|
|
BB0_77:
|
|
add.f32 %f1070, %f181, 0f3EE66666;
|
|
mov.b32 %r151, %f1070;
|
|
setp.lt.s32 %p104, %r151, 2139095040;
|
|
@%p104 bra BB0_82;
|
|
|
|
setp.gtu.f32 %p105, %f181, 0f7F800000;
|
|
@%p105 bra BB0_81;
|
|
bra.uni BB0_79;
|
|
|
|
BB0_81:
|
|
add.f32 %f1245, %f1198, 0f3EE66666;
|
|
bra.uni BB0_82;
|
|
|
|
BB0_79:
|
|
setp.neu.f32 %p106, %f181, 0f7F800000;
|
|
@%p106 bra BB0_82;
|
|
|
|
selp.f32 %f1245, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_82:
|
|
setp.eq.f32 %p107, %f1198, 0f3F800000;
|
|
selp.f32 %f193, 0f3F800000, %f1245, %p107;
|
|
abs.f32 %f194, %f1197;
|
|
setp.lt.f32 %p108, %f194, 0f00800000;
|
|
mul.f32 %f1073, %f194, 0f4B800000;
|
|
selp.f32 %f1074, 0fC3170000, 0fC2FE0000, %p108;
|
|
selp.f32 %f1075, %f1073, %f194, %p108;
|
|
mov.b32 %r152, %f1075;
|
|
and.b32 %r153, %r152, 8388607;
|
|
or.b32 %r154, %r153, 1065353216;
|
|
mov.b32 %f1076, %r154;
|
|
shr.u32 %r155, %r152, 23;
|
|
cvt.rn.f32.u32 %f1077, %r155;
|
|
add.f32 %f1078, %f1074, %f1077;
|
|
setp.gt.f32 %p109, %f1076, 0f3FB504F3;
|
|
mul.f32 %f1079, %f1076, 0f3F000000;
|
|
add.f32 %f1080, %f1078, 0f3F800000;
|
|
selp.f32 %f1081, %f1079, %f1076, %p109;
|
|
selp.f32 %f1082, %f1080, %f1078, %p109;
|
|
add.f32 %f1083, %f1081, 0fBF800000;
|
|
add.f32 %f1072, %f1081, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1071,%f1072;
|
|
// inline asm
|
|
add.f32 %f1084, %f1083, %f1083;
|
|
mul.f32 %f1085, %f1071, %f1084;
|
|
mul.f32 %f1086, %f1085, %f1085;
|
|
fma.rn.f32 %f1089, %f932, %f1086, %f931;
|
|
fma.rn.f32 %f1091, %f1089, %f1086, %f934;
|
|
mul.rn.f32 %f1092, %f1091, %f1086;
|
|
mul.rn.f32 %f1093, %f1092, %f1085;
|
|
sub.f32 %f1094, %f1083, %f1085;
|
|
neg.f32 %f1095, %f1085;
|
|
add.f32 %f1096, %f1094, %f1094;
|
|
fma.rn.f32 %f1097, %f1095, %f1083, %f1096;
|
|
mul.rn.f32 %f1098, %f1071, %f1097;
|
|
add.f32 %f1099, %f1093, %f1085;
|
|
sub.f32 %f1100, %f1085, %f1099;
|
|
add.f32 %f1101, %f1093, %f1100;
|
|
add.f32 %f1102, %f1098, %f1101;
|
|
add.f32 %f1103, %f1099, %f1102;
|
|
sub.f32 %f1104, %f1099, %f1103;
|
|
add.f32 %f1105, %f1102, %f1104;
|
|
mul.rn.f32 %f1107, %f1082, %f950;
|
|
mul.rn.f32 %f1109, %f1082, %f952;
|
|
add.f32 %f1110, %f1107, %f1103;
|
|
sub.f32 %f1111, %f1107, %f1110;
|
|
add.f32 %f1112, %f1103, %f1111;
|
|
add.f32 %f1113, %f1105, %f1112;
|
|
add.f32 %f1114, %f1109, %f1113;
|
|
add.f32 %f1115, %f1110, %f1114;
|
|
sub.f32 %f1116, %f1110, %f1115;
|
|
add.f32 %f1117, %f1114, %f1116;
|
|
mul.rn.f32 %f1119, %f962, %f1115;
|
|
neg.f32 %f1120, %f1119;
|
|
fma.rn.f32 %f1121, %f962, %f1115, %f1120;
|
|
fma.rn.f32 %f1122, %f962, %f1117, %f1121;
|
|
fma.rn.f32 %f1124, %f967, %f1115, %f1122;
|
|
add.rn.f32 %f1125, %f1119, %f1124;
|
|
neg.f32 %f1126, %f1125;
|
|
add.rn.f32 %f1127, %f1119, %f1126;
|
|
add.rn.f32 %f1128, %f1127, %f1124;
|
|
mov.b32 %r156, %f1125;
|
|
setp.eq.s32 %p110, %r156, 1118925336;
|
|
add.s32 %r157, %r156, -1;
|
|
mov.b32 %f1129, %r157;
|
|
add.f32 %f1130, %f1128, 0f37000000;
|
|
selp.f32 %f1131, %f1129, %f1125, %p110;
|
|
selp.f32 %f195, %f1130, %f1128, %p110;
|
|
mul.f32 %f1132, %f1131, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1133, %f1132;
|
|
fma.rn.f32 %f1135, %f1133, %f978, %f1131;
|
|
fma.rn.f32 %f1137, %f1133, %f980, %f1135;
|
|
mul.f32 %f1138, %f1137, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1139, %f1138;
|
|
add.f32 %f1140, %f1133, 0f00000000;
|
|
ex2.approx.f32 %f1141, %f1140;
|
|
mul.f32 %f1142, %f1139, %f1141;
|
|
setp.lt.f32 %p111, %f1131, 0fC2D20000;
|
|
selp.f32 %f1143, 0f00000000, %f1142, %p111;
|
|
setp.gt.f32 %p112, %f1131, 0f42D20000;
|
|
selp.f32 %f1246, 0f7F800000, %f1143, %p112;
|
|
setp.eq.f32 %p113, %f1246, 0f7F800000;
|
|
@%p113 bra BB0_84;
|
|
|
|
fma.rn.f32 %f1246, %f1246, %f195, %f1246;
|
|
|
|
BB0_84:
|
|
setp.lt.f32 %p114, %f1197, 0f00000000;
|
|
and.pred %p7, %p114, %p83;
|
|
mov.b32 %r158, %f1246;
|
|
xor.b32 %r159, %r158, -2147483648;
|
|
mov.b32 %f1144, %r159;
|
|
selp.f32 %f1248, %f1144, %f1246, %p7;
|
|
setp.eq.f32 %p116, %f1197, 0f00000000;
|
|
@%p116 bra BB0_87;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_87:
|
|
add.f32 %f1147, %f1197, %f1197;
|
|
selp.f32 %f1248, %f1147, 0f00000000, %p83;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_85:
|
|
setp.geu.f32 %p117, %f1197, 0f00000000;
|
|
@%p117 bra BB0_88;
|
|
|
|
cvt.rzi.f32.f32 %f1146, %f962;
|
|
setp.neu.f32 %p118, %f1146, 0f3EE66666;
|
|
selp.f32 %f1248, 0f7FFFFFFF, %f1248, %p118;
|
|
|
|
BB0_88:
|
|
add.f32 %f1148, %f194, 0f3EE66666;
|
|
mov.b32 %r160, %f1148;
|
|
setp.lt.s32 %p120, %r160, 2139095040;
|
|
@%p120 bra BB0_93;
|
|
|
|
setp.gtu.f32 %p121, %f194, 0f7F800000;
|
|
@%p121 bra BB0_92;
|
|
bra.uni BB0_90;
|
|
|
|
BB0_92:
|
|
add.f32 %f1248, %f1197, 0f3EE66666;
|
|
bra.uni BB0_93;
|
|
|
|
BB0_90:
|
|
setp.neu.f32 %p122, %f194, 0f7F800000;
|
|
@%p122 bra BB0_93;
|
|
|
|
selp.f32 %f1248, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_93:
|
|
setp.eq.f32 %p123, %f1197, 0f3F800000;
|
|
selp.f32 %f1149, 0f3F800000, %f1248, %p123;
|
|
cvt.u64.u32 %rd53, %r3;
|
|
cvt.u64.u32 %rd52, %r2;
|
|
mov.u64 %rd56, image;
|
|
cvta.global.u64 %rd51, %rd56;
|
|
// inline asm
|
|
call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1150, %f1149;
|
|
mul.f32 %f1151, %f1150, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r163, %f1151;
|
|
cvt.sat.f32.f32 %f1152, %f193;
|
|
mul.f32 %f1153, %f1152, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r164, %f1153;
|
|
cvt.sat.f32.f32 %f1154, %f180;
|
|
mul.f32 %f1155, %f1154, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r165, %f1155;
|
|
cvt.u16.u32 %rs19, %r163;
|
|
cvt.u16.u32 %rs20, %r165;
|
|
cvt.u16.u32 %rs21, %r164;
|
|
mov.u16 %rs22, 255;
|
|
st.v4.u8 [%rd50], {%rs19, %rs21, %rs20, %rs22};
|
|
ld.global.u32 %r202, [imageEnabled];
|
|
|
|
BB0_94:
|
|
and.b32 %r166, %r202, 4;
|
|
setp.eq.s32 %p124, %r166, 0;
|
|
@%p124 bra BB0_98;
|
|
|
|
ld.global.u32 %r167, [additive];
|
|
setp.eq.s32 %p125, %r167, 0;
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
mov.f32 %f1156, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f1156;}
|
|
|
|
// inline asm
|
|
@%p125 bra BB0_97;
|
|
|
|
mov.u64 %rd69, image_HDR;
|
|
cvta.global.u64 %rd58, %rd69;
|
|
mov.u32 %r171, 8;
|
|
// inline asm
|
|
call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd57];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1157, %rs30;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1158, %rs31;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1159, %rs32;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r171, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1160, %f1199, %f1157;
|
|
add.f32 %f1161, %f1198, %f1158;
|
|
add.f32 %f1162, %f1197, %f1159;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1162;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1161;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1160;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd63], {%rs27, %rs28, %rs29, %rs23};
|
|
bra.uni BB0_98;
|
|
|
|
BB0_97:
|
|
mov.u64 %rd76, image_HDR;
|
|
cvta.global.u64 %rd71, %rd76;
|
|
mov.u32 %r173, 8;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r173, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1197;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f1198;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f1199;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd70], {%rs34, %rs35, %rs36, %rs23};
|
|
|
|
BB0_98:
|
|
ld.global.u8 %rs37, [imageEnabled];
|
|
and.b16 %rs38, %rs37, 64;
|
|
setp.eq.s16 %p126, %rs38, 0;
|
|
@%p126 bra BB0_110;
|
|
|
|
mul.f32 %f1166, %f23, %f23;
|
|
fma.rn.f32 %f1167, %f24, %f24, %f1166;
|
|
fma.rn.f32 %f1168, %f22, %f22, %f1167;
|
|
sqrt.rn.f32 %f1169, %f1168;
|
|
rcp.rn.f32 %f1170, %f1169;
|
|
mul.f32 %f1171, %f24, %f1170;
|
|
mul.f32 %f1172, %f23, %f1170;
|
|
mul.f32 %f1173, %f22, %f1170;
|
|
cvt.u64.u32 %rd80, %r3;
|
|
cvt.u64.u32 %rd79, %r2;
|
|
mov.u64 %rd83, image_Dir;
|
|
cvta.global.u64 %rd78, %rd83;
|
|
// inline asm
|
|
call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r29, %rd79, %rd80, %rd13, %rd13);
|
|
// inline asm
|
|
fma.rn.f32 %f1174, %f1171, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1175, %f1174, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r176, %f1175;
|
|
fma.rn.f32 %f1176, %f1172, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1177, %f1176, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r177, %f1177;
|
|
fma.rn.f32 %f1178, %f1173, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1179, %f1178, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r178, %f1179;
|
|
cvt.u16.u32 %rs39, %r178;
|
|
cvt.u16.u32 %rs40, %r177;
|
|
cvt.u16.u32 %rs41, %r176;
|
|
mov.u16 %rs42, 255;
|
|
st.v4.u8 [%rd77], {%rs41, %rs40, %rs39, %rs42};
|
|
|
|
BB0_110:
|
|
ret;
|
|
}
|
|
|
|
|