1592 lines
49 KiB
Plaintext
1592 lines
49 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_Dir[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 samples;
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.global .align 4 .f32 lightInvCutoff;
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.global .align 4 .f32 lightRadius;
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.global .align 4 .b8 lightPos[12];
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.global .align 4 .b8 lightColor[12];
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.global .align 4 .u32 ignoreNormal;
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.global .align 4 .u32 lightCookie;
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.global .align 4 .b8 lightMatrix[36];
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.global .align 4 .f32 lightFOV;
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.global .align 4 .f32 lightFalloffFakeDistanceMult;
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.global .align 4 .f32 lightFalloffMinRadiusSq;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightCookieE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightMatrixE[8] = {82, 97, 121, 0, 36, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightFOVE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename11lightCookieE[4] = {105, 110, 116, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename11lightMatrixE[10] = {77, 97, 116, 114, 105, 120, 51, 120, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8lightFOVE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11lightCookieE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11lightMatrixE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8lightFOVE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11lightCookieE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11lightMatrixE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8lightFOVE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11lightCookieE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11lightMatrixE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8lightFOVE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<114>;
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.reg .b16 %rs<76>;
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.reg .f32 %f<787>;
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.reg .b32 %r<168>;
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.reg .b64 %rd<150>;
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mov.u64 %rd149, __local_depot0;
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cvta.local.u64 %SP, %rd149;
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ld.global.v2.u32 {%r26, %r27}, [pixelID];
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cvt.u64.u32 %rd12, %r26;
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cvt.u64.u32 %rd13, %r27;
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mov.u64 %rd16, uvnormal;
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cvta.global.u64 %rd11, %rd16;
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mov.u32 %r24, 2;
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mov.u32 %r25, 4;
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mov.u64 %rd15, 0;
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// inline asm
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call (%rd10), _rt_buffer_get_64, (%rd11, %r24, %r25, %rd12, %rd13, %rd15, %rd15);
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// inline asm
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ld.u32 %r1, [%rd10];
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shr.u32 %r30, %r1, 16;
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cvt.u16.u32 %rs1, %r30;
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and.b16 %rs4, %rs1, 255;
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cvt.u16.u32 %rs5, %r1;
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or.b16 %rs6, %rs5, %rs4;
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setp.eq.s16 %p6, %rs6, 0;
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mov.f32 %f766, 0f00000000;
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mov.f32 %f767, %f766;
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mov.f32 %f768, %f766;
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@%p6 bra BB0_2;
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ld.u8 %rs7, [%rd10+1];
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and.b16 %rs9, %rs5, 255;
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cvt.rn.f32.u16 %f99, %rs9;
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div.rn.f32 %f100, %f99, 0f437F0000;
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fma.rn.f32 %f101, %f100, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f102, %rs7;
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div.rn.f32 %f103, %f102, 0f437F0000;
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fma.rn.f32 %f104, %f103, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f105, %rs4;
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div.rn.f32 %f106, %f105, 0f437F0000;
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fma.rn.f32 %f107, %f106, 0f40000000, 0fBF800000;
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mul.f32 %f108, %f104, %f104;
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fma.rn.f32 %f109, %f101, %f101, %f108;
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fma.rn.f32 %f110, %f107, %f107, %f109;
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sqrt.rn.f32 %f111, %f110;
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rcp.rn.f32 %f112, %f111;
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mul.f32 %f766, %f101, %f112;
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mul.f32 %f767, %f104, %f112;
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mul.f32 %f768, %f107, %f112;
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BB0_2:
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ld.global.v2.u32 {%r31, %r32}, [pixelID];
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ld.global.v2.u32 {%r34, %r35}, [tileInfo];
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add.s32 %r2, %r31, %r34;
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add.s32 %r3, %r32, %r35;
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setp.eq.f32 %p7, %f767, 0f00000000;
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setp.eq.f32 %p8, %f766, 0f00000000;
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and.pred %p9, %p8, %p7;
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setp.eq.f32 %p10, %f768, 0f00000000;
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and.pred %p11, %p9, %p10;
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@%p11 bra BB0_84;
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bra.uni BB0_3;
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BB0_84:
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ld.global.u32 %r167, [imageEnabled];
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and.b32 %r143, %r167, 1;
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setp.eq.b32 %p109, %r143, 1;
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@!%p109 bra BB0_86;
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bra.uni BB0_85;
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BB0_85:
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cvt.u64.u32 %rd110, %r2;
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cvt.u64.u32 %rd111, %r3;
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mov.u64 %rd114, image;
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cvta.global.u64 %rd109, %rd114;
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// inline asm
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call (%rd108), _rt_buffer_get_64, (%rd109, %r24, %r25, %rd110, %rd111, %rd15, %rd15);
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// inline asm
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mov.u16 %rs57, 0;
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st.v4.u8 [%rd108], {%rs57, %rs57, %rs57, %rs57};
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ld.global.u32 %r167, [imageEnabled];
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BB0_86:
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and.b32 %r146, %r167, 8;
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setp.eq.s32 %p110, %r146, 0;
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@%p110 bra BB0_88;
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cvt.u64.u32 %rd117, %r2;
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cvt.u64.u32 %rd118, %r3;
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mov.u64 %rd121, image_Mask;
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cvta.global.u64 %rd116, %rd121;
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// inline asm
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call (%rd115), _rt_buffer_get_64, (%rd116, %r24, %r24, %rd117, %rd118, %rd15, %rd15);
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// inline asm
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mov.f32 %f718, 0f00000000;
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cvt.rzi.u32.f32 %r149, %f718;
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cvt.u16.u32 %rs58, %r149;
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mov.u16 %rs59, 0;
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st.v2.u8 [%rd115], {%rs58, %rs59};
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ld.global.u32 %r167, [imageEnabled];
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BB0_88:
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and.b32 %r150, %r167, 4;
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setp.eq.s32 %p111, %r150, 0;
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@%p111 bra BB0_92;
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ld.global.u32 %r151, [additive];
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setp.eq.s32 %p112, %r151, 0;
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cvt.u64.u32 %rd8, %r2;
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cvt.u64.u32 %rd9, %r3;
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@%p112 bra BB0_91;
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mov.u64 %rd134, image_HDR;
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cvta.global.u64 %rd123, %rd134;
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mov.u32 %r155, 8;
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// inline asm
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|
call (%rd122), _rt_buffer_get_64, (%rd123, %r24, %r155, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs66, %rs67, %rs68, %rs69}, [%rd122];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f719, %rs66;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f720, %rs67;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f721, %rs68;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd128), _rt_buffer_get_64, (%rd123, %r24, %r155, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f722, %f719, 0f00000000;
|
|
add.f32 %f723, %f720, 0f00000000;
|
|
add.f32 %f724, %f721, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f724;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f723;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f722;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs70, 0;
|
|
st.v4.u16 [%rd128], {%rs63, %rs64, %rs65, %rs70};
|
|
bra.uni BB0_92;
|
|
|
|
BB0_3:
|
|
ld.global.v2.u32 {%r41, %r42}, [pixelID];
|
|
cvt.u64.u32 %rd19, %r41;
|
|
cvt.u64.u32 %rd20, %r42;
|
|
mov.u64 %rd23, uvpos;
|
|
cvta.global.u64 %rd18, %rd23;
|
|
mov.u32 %r40, 12;
|
|
// inline asm
|
|
call (%rd17), _rt_buffer_get_64, (%rd18, %r24, %r40, %rd19, %rd20, %rd15, %rd15);
|
|
// inline asm
|
|
ld.global.f32 %f115, [lightPos];
|
|
ld.f32 %f9, [%rd17+8];
|
|
ld.f32 %f8, [%rd17+4];
|
|
ld.f32 %f7, [%rd17];
|
|
sub.f32 %f116, %f115, %f7;
|
|
ld.global.f32 %f117, [lightPos+4];
|
|
sub.f32 %f118, %f117, %f8;
|
|
ld.global.f32 %f119, [lightPos+8];
|
|
sub.f32 %f120, %f119, %f9;
|
|
mul.f32 %f121, %f118, %f118;
|
|
fma.rn.f32 %f122, %f116, %f116, %f121;
|
|
fma.rn.f32 %f123, %f120, %f120, %f122;
|
|
sqrt.rn.f32 %f124, %f123;
|
|
rcp.rn.f32 %f125, %f124;
|
|
mul.f32 %f10, %f116, %f125;
|
|
mul.f32 %f11, %f118, %f125;
|
|
mul.f32 %f12, %f120, %f125;
|
|
ld.global.f32 %f126, [lightFalloffFakeDistanceMult];
|
|
mul.f32 %f13, %f124, %f126;
|
|
ld.global.f32 %f127, [lightInvCutoff];
|
|
mul.f32 %f14, %f124, %f127;
|
|
mov.f32 %f131, 0f40800000;
|
|
abs.f32 %f16, %f14;
|
|
setp.lt.f32 %p12, %f16, 0f00800000;
|
|
mul.f32 %f133, %f16, 0f4B800000;
|
|
selp.f32 %f134, 0fC3170000, 0fC2FE0000, %p12;
|
|
selp.f32 %f135, %f133, %f16, %p12;
|
|
mov.b32 %r45, %f135;
|
|
and.b32 %r46, %r45, 8388607;
|
|
or.b32 %r47, %r46, 1065353216;
|
|
mov.b32 %f136, %r47;
|
|
shr.u32 %r48, %r45, 23;
|
|
cvt.rn.f32.u32 %f137, %r48;
|
|
add.f32 %f138, %f134, %f137;
|
|
setp.gt.f32 %p13, %f136, 0f3FB504F3;
|
|
mul.f32 %f139, %f136, 0f3F000000;
|
|
add.f32 %f140, %f138, 0f3F800000;
|
|
selp.f32 %f141, %f139, %f136, %p13;
|
|
selp.f32 %f142, %f140, %f138, %p13;
|
|
add.f32 %f143, %f141, 0fBF800000;
|
|
add.f32 %f114, %f141, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f113,%f114;
|
|
// inline asm
|
|
add.f32 %f144, %f143, %f143;
|
|
mul.f32 %f145, %f113, %f144;
|
|
mul.f32 %f146, %f145, %f145;
|
|
mov.f32 %f147, 0f3C4CAF63;
|
|
mov.f32 %f148, 0f3B18F0FE;
|
|
fma.rn.f32 %f149, %f148, %f146, %f147;
|
|
mov.f32 %f150, 0f3DAAAABD;
|
|
fma.rn.f32 %f151, %f149, %f146, %f150;
|
|
mul.rn.f32 %f152, %f151, %f146;
|
|
mul.rn.f32 %f153, %f152, %f145;
|
|
sub.f32 %f154, %f143, %f145;
|
|
neg.f32 %f155, %f145;
|
|
add.f32 %f156, %f154, %f154;
|
|
fma.rn.f32 %f157, %f155, %f143, %f156;
|
|
mul.rn.f32 %f158, %f113, %f157;
|
|
add.f32 %f159, %f153, %f145;
|
|
sub.f32 %f160, %f145, %f159;
|
|
add.f32 %f161, %f153, %f160;
|
|
add.f32 %f162, %f158, %f161;
|
|
add.f32 %f163, %f159, %f162;
|
|
sub.f32 %f164, %f159, %f163;
|
|
add.f32 %f165, %f162, %f164;
|
|
mov.f32 %f166, 0f3F317200;
|
|
mul.rn.f32 %f167, %f142, %f166;
|
|
mov.f32 %f168, 0f35BFBE8E;
|
|
mul.rn.f32 %f169, %f142, %f168;
|
|
add.f32 %f170, %f167, %f163;
|
|
sub.f32 %f171, %f167, %f170;
|
|
add.f32 %f172, %f163, %f171;
|
|
add.f32 %f173, %f165, %f172;
|
|
add.f32 %f174, %f169, %f173;
|
|
add.f32 %f175, %f170, %f174;
|
|
sub.f32 %f176, %f170, %f175;
|
|
add.f32 %f177, %f174, %f176;
|
|
mul.rn.f32 %f178, %f131, %f175;
|
|
neg.f32 %f179, %f178;
|
|
fma.rn.f32 %f180, %f131, %f175, %f179;
|
|
fma.rn.f32 %f181, %f131, %f177, %f180;
|
|
mov.f32 %f182, 0f00000000;
|
|
fma.rn.f32 %f183, %f182, %f175, %f181;
|
|
add.rn.f32 %f184, %f178, %f183;
|
|
neg.f32 %f185, %f184;
|
|
add.rn.f32 %f186, %f178, %f185;
|
|
add.rn.f32 %f187, %f186, %f183;
|
|
mov.b32 %r49, %f184;
|
|
setp.eq.s32 %p14, %r49, 1118925336;
|
|
add.s32 %r50, %r49, -1;
|
|
mov.b32 %f188, %r50;
|
|
add.f32 %f189, %f187, 0f37000000;
|
|
selp.f32 %f190, %f188, %f184, %p14;
|
|
selp.f32 %f17, %f189, %f187, %p14;
|
|
mul.f32 %f191, %f190, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f192, %f191;
|
|
mov.f32 %f193, 0fBF317200;
|
|
fma.rn.f32 %f194, %f192, %f193, %f190;
|
|
mov.f32 %f195, 0fB5BFBE8E;
|
|
fma.rn.f32 %f196, %f192, %f195, %f194;
|
|
mul.f32 %f197, %f196, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f198, %f197;
|
|
add.f32 %f199, %f192, 0f00000000;
|
|
ex2.approx.f32 %f200, %f199;
|
|
mul.f32 %f201, %f198, %f200;
|
|
setp.lt.f32 %p15, %f190, 0fC2D20000;
|
|
selp.f32 %f202, 0f00000000, %f201, %p15;
|
|
setp.gt.f32 %p16, %f190, 0f42D20000;
|
|
selp.f32 %f769, 0f7F800000, %f202, %p16;
|
|
setp.eq.f32 %p17, %f769, 0f7F800000;
|
|
@%p17 bra BB0_5;
|
|
|
|
fma.rn.f32 %f769, %f769, %f17, %f769;
|
|
|
|
BB0_5:
|
|
mov.f32 %f731, 0f40000000;
|
|
cvt.rzi.f32.f32 %f730, %f731;
|
|
add.f32 %f729, %f730, %f730;
|
|
mov.f32 %f728, 0f40800000;
|
|
sub.f32 %f727, %f728, %f729;
|
|
abs.f32 %f726, %f727;
|
|
setp.lt.f32 %p18, %f14, 0f00000000;
|
|
setp.eq.f32 %p19, %f726, 0f3F800000;
|
|
and.pred %p1, %p18, %p19;
|
|
mov.b32 %r51, %f769;
|
|
xor.b32 %r52, %r51, -2147483648;
|
|
mov.b32 %f203, %r52;
|
|
selp.f32 %f771, %f203, %f769, %p1;
|
|
setp.eq.f32 %p20, %f14, 0f00000000;
|
|
@%p20 bra BB0_8;
|
|
bra.uni BB0_6;
|
|
|
|
BB0_8:
|
|
add.f32 %f206, %f14, %f14;
|
|
selp.f32 %f771, %f206, 0f00000000, %p19;
|
|
bra.uni BB0_9;
|
|
|
|
BB0_6:
|
|
setp.geu.f32 %p21, %f14, 0f00000000;
|
|
@%p21 bra BB0_9;
|
|
|
|
mov.f32 %f765, 0f40800000;
|
|
cvt.rzi.f32.f32 %f205, %f765;
|
|
setp.neu.f32 %p22, %f205, 0f40800000;
|
|
selp.f32 %f771, 0f7FFFFFFF, %f771, %p22;
|
|
|
|
BB0_9:
|
|
abs.f32 %f732, %f14;
|
|
add.f32 %f207, %f732, 0f40800000;
|
|
mov.b32 %r53, %f207;
|
|
setp.lt.s32 %p24, %r53, 2139095040;
|
|
@%p24 bra BB0_14;
|
|
|
|
abs.f32 %f763, %f14;
|
|
setp.gtu.f32 %p25, %f763, 0f7F800000;
|
|
@%p25 bra BB0_13;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_13:
|
|
add.f32 %f771, %f14, 0f40800000;
|
|
bra.uni BB0_14;
|
|
|
|
BB0_11:
|
|
abs.f32 %f764, %f14;
|
|
setp.neu.f32 %p26, %f764, 0f7F800000;
|
|
@%p26 bra BB0_14;
|
|
|
|
selp.f32 %f771, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_14:
|
|
mov.f32 %f733, 0f00000000;
|
|
mov.f32 %f774, 0f3F800000;
|
|
sub.f32 %f217, %f774, %f771;
|
|
setp.eq.f32 %p27, %f14, 0f3F800000;
|
|
selp.f32 %f218, 0f00000000, %f217, %p27;
|
|
cvt.sat.f32.f32 %f219, %f218;
|
|
ld.global.f32 %f220, [lightFalloffMinRadiusSq];
|
|
fma.rn.f32 %f221, %f13, %f13, %f220;
|
|
div.rn.f32 %f222, %f219, %f221;
|
|
mul.f32 %f223, %f767, %f11;
|
|
fma.rn.f32 %f224, %f766, %f10, %f223;
|
|
fma.rn.f32 %f225, %f768, %f12, %f224;
|
|
ld.global.u32 %r56, [imageEnabled];
|
|
and.b32 %r57, %r56, 32;
|
|
ld.global.u32 %r58, [ignoreNormal];
|
|
or.b32 %r59, %r57, %r58;
|
|
setp.eq.s32 %p28, %r59, 0;
|
|
selp.f32 %f226, %f225, 0f3F800000, %p28;
|
|
cvt.sat.f32.f32 %f227, %f226;
|
|
ld.global.f32 %f228, [lightMatrix+24];
|
|
mul.f32 %f229, %f10, %f228;
|
|
ld.global.f32 %f230, [lightMatrix+28];
|
|
mul.f32 %f231, %f11, %f230;
|
|
neg.f32 %f232, %f231;
|
|
sub.f32 %f233, %f232, %f229;
|
|
ld.global.f32 %f234, [lightMatrix+32];
|
|
mul.f32 %f235, %f12, %f234;
|
|
sub.f32 %f236, %f233, %f235;
|
|
setp.gt.f32 %p29, %f236, 0f00000000;
|
|
ld.global.f32 %f237, [lightMatrix];
|
|
mul.f32 %f238, %f237, %f10;
|
|
sub.f32 %f239, %f733, %f238;
|
|
ld.global.f32 %f240, [lightMatrix+4];
|
|
mul.f32 %f241, %f240, %f11;
|
|
sub.f32 %f242, %f239, %f241;
|
|
ld.global.f32 %f243, [lightMatrix+8];
|
|
mul.f32 %f244, %f243, %f12;
|
|
sub.f32 %f245, %f242, %f244;
|
|
selp.f32 %f246, 0f3F800000, 0f00000000, %p29;
|
|
ld.global.f32 %f247, [lightMatrix+12];
|
|
mul.f32 %f248, %f247, %f10;
|
|
sub.f32 %f249, %f733, %f248;
|
|
ld.global.f32 %f250, [lightMatrix+16];
|
|
mul.f32 %f251, %f250, %f11;
|
|
sub.f32 %f252, %f249, %f251;
|
|
ld.global.f32 %f253, [lightMatrix+20];
|
|
mul.f32 %f254, %f253, %f12;
|
|
sub.f32 %f255, %f252, %f254;
|
|
ld.global.u32 %r54, [lightCookie];
|
|
ld.global.f32 %f256, [lightFOV];
|
|
fma.rn.f32 %f257, %f245, %f256, 0f3F000000;
|
|
sub.f32 %f212, %f774, %f257;
|
|
fma.rn.f32 %f213, %f255, %f256, 0f3F000000;
|
|
// inline asm
|
|
call (%f208, %f209, %f210, %f211), _rt_texture_get_f_id, (%r54, %r24, %f212, %f213, %f733, %f733);
|
|
// inline asm
|
|
max.f32 %f258, %f208, %f209;
|
|
max.f32 %f259, %f258, %f210;
|
|
mul.f32 %f260, %f246, %f259;
|
|
mul.f32 %f31, %f222, %f227;
|
|
mul.f32 %f261, %f31, %f260;
|
|
ld.global.f32 %f262, [lightColor+4];
|
|
ld.global.f32 %f263, [lightColor];
|
|
max.f32 %f264, %f263, %f262;
|
|
ld.global.f32 %f265, [lightColor+8];
|
|
max.f32 %f266, %f264, %f265;
|
|
mul.f32 %f267, %f261, %f266;
|
|
setp.lt.f32 %p30, %f267, 0f3727C5AC;
|
|
@%p30 bra BB0_74;
|
|
bra.uni BB0_15;
|
|
|
|
BB0_74:
|
|
ld.global.u32 %r165, [imageEnabled];
|
|
and.b32 %r126, %r165, 1;
|
|
setp.eq.b32 %p104, %r126, 1;
|
|
@!%p104 bra BB0_76;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_75:
|
|
cvt.u64.u32 %rd69, %r2;
|
|
cvt.u64.u32 %rd70, %r3;
|
|
mov.u64 %rd73, image;
|
|
cvta.global.u64 %rd68, %rd73;
|
|
// inline asm
|
|
call (%rd67), _rt_buffer_get_64, (%rd68, %r24, %r25, %rd69, %rd70, %rd15, %rd15);
|
|
// inline asm
|
|
mov.u16 %rs37, 1;
|
|
mov.u16 %rs38, 0;
|
|
st.v4.u8 [%rd67], {%rs38, %rs38, %rs38, %rs37};
|
|
ld.global.u32 %r165, [imageEnabled];
|
|
|
|
BB0_76:
|
|
and.b32 %r129, %r165, 8;
|
|
setp.eq.s32 %p105, %r129, 0;
|
|
@%p105 bra BB0_78;
|
|
|
|
cvt.u64.u32 %rd76, %r2;
|
|
cvt.u64.u32 %rd77, %r3;
|
|
mov.u64 %rd80, image_Mask;
|
|
cvta.global.u64 %rd75, %rd80;
|
|
// inline asm
|
|
call (%rd74), _rt_buffer_get_64, (%rd75, %r24, %r24, %rd76, %rd77, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f707, 0f00000000;
|
|
cvt.rzi.u32.f32 %r132, %f707;
|
|
cvt.u16.u32 %rs39, %r132;
|
|
mov.u16 %rs40, 255;
|
|
st.v2.u8 [%rd74], {%rs39, %rs40};
|
|
ld.global.u32 %r165, [imageEnabled];
|
|
|
|
BB0_78:
|
|
and.b32 %r133, %r165, 4;
|
|
setp.eq.s32 %p106, %r133, 0;
|
|
@%p106 bra BB0_82;
|
|
|
|
ld.global.u32 %r134, [additive];
|
|
setp.eq.s32 %p107, %r134, 0;
|
|
cvt.u64.u32 %rd6, %r2;
|
|
cvt.u64.u32 %rd7, %r3;
|
|
mov.f32 %f708, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f708;}
|
|
|
|
// inline asm
|
|
@%p107 bra BB0_81;
|
|
|
|
mov.u64 %rd93, image_HDR;
|
|
cvta.global.u64 %rd82, %rd93;
|
|
mov.u32 %r138, 8;
|
|
// inline asm
|
|
call (%rd81), _rt_buffer_get_64, (%rd82, %r24, %r138, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs48, %rs49, %rs50, %rs51}, [%rd81];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f709, %rs48;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f710, %rs49;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f711, %rs50;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd87), _rt_buffer_get_64, (%rd82, %r24, %r138, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f712, %f709, 0f00000000;
|
|
add.f32 %f713, %f710, 0f00000000;
|
|
add.f32 %f714, %f711, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs47, %f714;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f713;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs45, %f712;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd87], {%rs45, %rs46, %rs47, %rs41};
|
|
bra.uni BB0_82;
|
|
|
|
BB0_15:
|
|
mov.f32 %f773, 0f00000000;
|
|
mul.f32 %f269, %f7, 0f3456BF95;
|
|
abs.f32 %f270, %f766;
|
|
div.rn.f32 %f271, %f269, %f270;
|
|
abs.f32 %f272, %f767;
|
|
mul.f32 %f273, %f8, 0f3456BF95;
|
|
div.rn.f32 %f274, %f273, %f272;
|
|
abs.f32 %f275, %f768;
|
|
mul.f32 %f276, %f9, 0f3456BF95;
|
|
div.rn.f32 %f277, %f276, %f275;
|
|
abs.f32 %f278, %f271;
|
|
abs.f32 %f279, %f274;
|
|
abs.f32 %f280, %f277;
|
|
mov.f32 %f281, 0f38D1B717;
|
|
max.f32 %f282, %f278, %f281;
|
|
max.f32 %f283, %f279, %f281;
|
|
max.f32 %f284, %f280, %f281;
|
|
fma.rn.f32 %f32, %f766, %f282, %f7;
|
|
fma.rn.f32 %f33, %f767, %f283, %f8;
|
|
fma.rn.f32 %f34, %f768, %f284, %f9;
|
|
ld.global.u32 %r161, [samples];
|
|
setp.lt.s32 %p31, %r161, 1;
|
|
@%p31 bra BB0_18;
|
|
|
|
mul.f32 %f286, %f32, 0f3456BF95;
|
|
abs.f32 %f287, %f286;
|
|
mul.f32 %f288, %f33, 0f3456BF95;
|
|
abs.f32 %f289, %f288;
|
|
mul.f32 %f290, %f34, 0f3456BF95;
|
|
abs.f32 %f291, %f290;
|
|
max.f32 %f292, %f287, %f289;
|
|
max.f32 %f293, %f292, %f291;
|
|
max.f32 %f35, %f293, %f281;
|
|
add.u64 %rd24, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd24;
|
|
mov.f32 %f773, 0f00000000;
|
|
mov.u32 %r160, 0;
|
|
|
|
BB0_17:
|
|
cvt.rn.f32.s32 %f303, %r160;
|
|
mul.f32 %f304, %f303, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f305, %f304;
|
|
sub.f32 %f306, %f304, %f305;
|
|
mul.f32 %f307, %f303, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f308, %f307;
|
|
sub.f32 %f309, %f307, %f308;
|
|
mul.f32 %f310, %f303, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f311, %f310;
|
|
sub.f32 %f312, %f310, %f311;
|
|
add.f32 %f313, %f309, 0f4199851F;
|
|
add.f32 %f314, %f312, 0f4199851F;
|
|
add.f32 %f315, %f306, 0f4199851F;
|
|
mul.f32 %f316, %f309, %f314;
|
|
fma.rn.f32 %f317, %f306, %f313, %f316;
|
|
fma.rn.f32 %f318, %f315, %f312, %f317;
|
|
add.f32 %f319, %f306, %f318;
|
|
add.f32 %f320, %f309, %f318;
|
|
add.f32 %f321, %f312, %f318;
|
|
add.f32 %f322, %f319, %f320;
|
|
mul.f32 %f323, %f321, %f322;
|
|
cvt.rmi.f32.f32 %f324, %f323;
|
|
sub.f32 %f325, %f323, %f324;
|
|
add.f32 %f326, %f319, %f321;
|
|
mul.f32 %f327, %f320, %f326;
|
|
cvt.rmi.f32.f32 %f328, %f327;
|
|
sub.f32 %f329, %f327, %f328;
|
|
add.f32 %f330, %f320, %f321;
|
|
mul.f32 %f331, %f319, %f330;
|
|
cvt.rmi.f32.f32 %f332, %f331;
|
|
sub.f32 %f333, %f331, %f332;
|
|
fma.rn.f32 %f334, %f325, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f335, %f329, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f336, %f333, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f337, [lightRadius];
|
|
ld.global.f32 %f338, [lightPos];
|
|
fma.rn.f32 %f339, %f337, %f334, %f338;
|
|
ld.global.f32 %f340, [lightPos+4];
|
|
fma.rn.f32 %f341, %f337, %f335, %f340;
|
|
ld.global.f32 %f342, [lightPos+8];
|
|
fma.rn.f32 %f343, %f337, %f336, %f342;
|
|
sub.f32 %f344, %f339, %f7;
|
|
sub.f32 %f345, %f341, %f8;
|
|
sub.f32 %f346, %f343, %f9;
|
|
mul.f32 %f347, %f345, %f345;
|
|
fma.rn.f32 %f348, %f344, %f344, %f347;
|
|
fma.rn.f32 %f349, %f346, %f346, %f348;
|
|
sqrt.rn.f32 %f302, %f349;
|
|
rcp.rn.f32 %f350, %f302;
|
|
mul.f32 %f298, %f350, %f344;
|
|
mul.f32 %f299, %f350, %f345;
|
|
mul.f32 %f300, %f350, %f346;
|
|
ld.global.u32 %r64, [imageEnabled];
|
|
and.b32 %r65, %r64, 32;
|
|
setp.eq.s32 %p32, %r65, 0;
|
|
selp.f32 %f351, 0f3F800000, 0f41200000, %p32;
|
|
mul.f32 %f301, %f351, %f35;
|
|
mov.u32 %r66, 1065353216;
|
|
st.local.u32 [%rd2], %r66;
|
|
ld.global.u32 %r61, [root];
|
|
mov.u32 %r62, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r61, %f32, %f33, %f34, %f298, %f299, %f300, %r62, %f301, %f302, %rd24, %r25);
|
|
// inline asm
|
|
ld.local.f32 %f352, [%rd2];
|
|
add.f32 %f773, %f773, %f352;
|
|
ld.global.u32 %r161, [samples];
|
|
add.s32 %r160, %r160, 1;
|
|
setp.lt.s32 %p33, %r160, %r161;
|
|
@%p33 bra BB0_17;
|
|
|
|
BB0_18:
|
|
setp.eq.s32 %p34, %r161, 0;
|
|
@%p34 bra BB0_20;
|
|
|
|
cvt.rn.f32.s32 %f354, %r161;
|
|
div.rn.f32 %f774, %f773, %f354;
|
|
|
|
BB0_20:
|
|
ld.global.f32 %f355, [lightColor];
|
|
mul.f32 %f356, %f31, %f774;
|
|
mul.f32 %f357, %f355, %f356;
|
|
ld.global.f32 %f358, [lightColor+4];
|
|
mul.f32 %f359, %f356, %f358;
|
|
ld.global.f32 %f360, [lightColor+8];
|
|
mul.f32 %f361, %f356, %f360;
|
|
mul.f32 %f41, %f208, %f357;
|
|
mul.f32 %f42, %f209, %f359;
|
|
mul.f32 %f43, %f210, %f361;
|
|
ld.global.u32 %r163, [imageEnabled];
|
|
and.b32 %r67, %r163, 8;
|
|
setp.eq.s32 %p35, %r67, 0;
|
|
@%p35 bra BB0_33;
|
|
|
|
mov.f32 %f741, 0fB5BFBE8E;
|
|
mov.f32 %f740, 0fBF317200;
|
|
mov.f32 %f739, 0f35BFBE8E;
|
|
mov.f32 %f738, 0f3F317200;
|
|
mov.f32 %f737, 0f3DAAAABD;
|
|
mov.f32 %f736, 0f3C4CAF63;
|
|
mov.f32 %f735, 0f3B18F0FE;
|
|
cvt.u64.u32 %rd28, %r2;
|
|
cvt.u64.u32 %rd29, %r3;
|
|
mov.u64 %rd32, image_Mask;
|
|
cvta.global.u64 %rd27, %rd32;
|
|
// inline asm
|
|
call (%rd26), _rt_buffer_get_64, (%rd27, %r24, %r24, %rd28, %rd29, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f364, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f365, %f364;
|
|
fma.rn.f32 %f366, %f365, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f44, %f366;
|
|
abs.f32 %f45, %f774;
|
|
setp.lt.f32 %p36, %f45, 0f00800000;
|
|
mul.f32 %f367, %f45, 0f4B800000;
|
|
selp.f32 %f368, 0fC3170000, 0fC2FE0000, %p36;
|
|
selp.f32 %f369, %f367, %f45, %p36;
|
|
mov.b32 %r70, %f369;
|
|
and.b32 %r71, %r70, 8388607;
|
|
or.b32 %r72, %r71, 1065353216;
|
|
mov.b32 %f370, %r72;
|
|
shr.u32 %r73, %r70, 23;
|
|
cvt.rn.f32.u32 %f371, %r73;
|
|
add.f32 %f372, %f368, %f371;
|
|
setp.gt.f32 %p37, %f370, 0f3FB504F3;
|
|
mul.f32 %f373, %f370, 0f3F000000;
|
|
add.f32 %f374, %f372, 0f3F800000;
|
|
selp.f32 %f375, %f373, %f370, %p37;
|
|
selp.f32 %f376, %f374, %f372, %p37;
|
|
add.f32 %f377, %f375, 0fBF800000;
|
|
add.f32 %f363, %f375, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f362,%f363;
|
|
// inline asm
|
|
add.f32 %f378, %f377, %f377;
|
|
mul.f32 %f379, %f362, %f378;
|
|
mul.f32 %f380, %f379, %f379;
|
|
fma.rn.f32 %f383, %f735, %f380, %f736;
|
|
fma.rn.f32 %f385, %f383, %f380, %f737;
|
|
mul.rn.f32 %f386, %f385, %f380;
|
|
mul.rn.f32 %f387, %f386, %f379;
|
|
sub.f32 %f388, %f377, %f379;
|
|
neg.f32 %f389, %f379;
|
|
add.f32 %f390, %f388, %f388;
|
|
fma.rn.f32 %f391, %f389, %f377, %f390;
|
|
mul.rn.f32 %f392, %f362, %f391;
|
|
add.f32 %f393, %f387, %f379;
|
|
sub.f32 %f394, %f379, %f393;
|
|
add.f32 %f395, %f387, %f394;
|
|
add.f32 %f396, %f392, %f395;
|
|
add.f32 %f397, %f393, %f396;
|
|
sub.f32 %f398, %f393, %f397;
|
|
add.f32 %f399, %f396, %f398;
|
|
mul.rn.f32 %f401, %f376, %f738;
|
|
mul.rn.f32 %f403, %f376, %f739;
|
|
add.f32 %f404, %f401, %f397;
|
|
sub.f32 %f405, %f401, %f404;
|
|
add.f32 %f406, %f397, %f405;
|
|
add.f32 %f407, %f399, %f406;
|
|
add.f32 %f408, %f403, %f407;
|
|
add.f32 %f409, %f404, %f408;
|
|
sub.f32 %f410, %f404, %f409;
|
|
add.f32 %f411, %f408, %f410;
|
|
mov.f32 %f412, 0f3EE8BA2E;
|
|
mul.rn.f32 %f413, %f412, %f409;
|
|
neg.f32 %f414, %f413;
|
|
fma.rn.f32 %f415, %f412, %f409, %f414;
|
|
fma.rn.f32 %f416, %f412, %f411, %f415;
|
|
mov.f32 %f417, 0f00000000;
|
|
fma.rn.f32 %f418, %f417, %f409, %f416;
|
|
add.rn.f32 %f419, %f413, %f418;
|
|
neg.f32 %f420, %f419;
|
|
add.rn.f32 %f421, %f413, %f420;
|
|
add.rn.f32 %f422, %f421, %f418;
|
|
mov.b32 %r74, %f419;
|
|
setp.eq.s32 %p38, %r74, 1118925336;
|
|
add.s32 %r75, %r74, -1;
|
|
mov.b32 %f423, %r75;
|
|
add.f32 %f424, %f422, 0f37000000;
|
|
selp.f32 %f425, %f423, %f419, %p38;
|
|
selp.f32 %f46, %f424, %f422, %p38;
|
|
mul.f32 %f426, %f425, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f427, %f426;
|
|
fma.rn.f32 %f429, %f427, %f740, %f425;
|
|
fma.rn.f32 %f431, %f427, %f741, %f429;
|
|
mul.f32 %f432, %f431, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f433, %f432;
|
|
add.f32 %f434, %f427, 0f00000000;
|
|
ex2.approx.f32 %f435, %f434;
|
|
mul.f32 %f436, %f433, %f435;
|
|
setp.lt.f32 %p39, %f425, 0fC2D20000;
|
|
selp.f32 %f437, 0f00000000, %f436, %p39;
|
|
setp.gt.f32 %p40, %f425, 0f42D20000;
|
|
selp.f32 %f775, 0f7F800000, %f437, %p40;
|
|
setp.eq.f32 %p41, %f775, 0f7F800000;
|
|
@%p41 bra BB0_23;
|
|
|
|
fma.rn.f32 %f775, %f775, %f46, %f775;
|
|
|
|
BB0_23:
|
|
setp.lt.f32 %p42, %f774, 0f00000000;
|
|
setp.eq.f32 %p43, %f44, 0f3F800000;
|
|
and.pred %p2, %p42, %p43;
|
|
mov.b32 %r76, %f775;
|
|
xor.b32 %r77, %r76, -2147483648;
|
|
mov.b32 %f438, %r77;
|
|
selp.f32 %f777, %f438, %f775, %p2;
|
|
setp.eq.f32 %p44, %f774, 0f00000000;
|
|
@%p44 bra BB0_26;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_26:
|
|
add.f32 %f441, %f774, %f774;
|
|
selp.f32 %f777, %f441, 0f00000000, %p43;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_91:
|
|
mov.u64 %rd141, image_HDR;
|
|
cvta.global.u64 %rd136, %rd141;
|
|
mov.u32 %r157, 8;
|
|
// inline asm
|
|
call (%rd135), _rt_buffer_get_64, (%rd136, %r24, %r157, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f725, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f725;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs72, 0;
|
|
st.v4.u16 [%rd135], {%rs71, %rs71, %rs71, %rs72};
|
|
|
|
BB0_92:
|
|
ld.global.u8 %rs73, [imageEnabled];
|
|
and.b16 %rs74, %rs73, 64;
|
|
setp.eq.s16 %p113, %rs74, 0;
|
|
@%p113 bra BB0_94;
|
|
|
|
cvt.u64.u32 %rd144, %r2;
|
|
cvt.u64.u32 %rd145, %r3;
|
|
mov.u64 %rd148, image_Dir;
|
|
cvta.global.u64 %rd143, %rd148;
|
|
// inline asm
|
|
call (%rd142), _rt_buffer_get_64, (%rd143, %r24, %r25, %rd144, %rd145, %rd15, %rd15);
|
|
// inline asm
|
|
mov.u16 %rs75, 0;
|
|
st.v4.u8 [%rd142], {%rs75, %rs75, %rs75, %rs75};
|
|
bra.uni BB0_94;
|
|
|
|
BB0_81:
|
|
mov.u64 %rd100, image_HDR;
|
|
cvta.global.u64 %rd95, %rd100;
|
|
mov.u32 %r140, 8;
|
|
// inline asm
|
|
call (%rd94), _rt_buffer_get_64, (%rd95, %r24, %r140, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f715, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f715;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd94], {%rs52, %rs52, %rs52, %rs41};
|
|
|
|
BB0_82:
|
|
ld.global.u8 %rs53, [imageEnabled];
|
|
and.b16 %rs54, %rs53, 64;
|
|
setp.eq.s16 %p108, %rs54, 0;
|
|
@%p108 bra BB0_94;
|
|
|
|
cvt.u64.u32 %rd103, %r2;
|
|
cvt.u64.u32 %rd104, %r3;
|
|
mov.u64 %rd107, image_Dir;
|
|
cvta.global.u64 %rd102, %rd107;
|
|
// inline asm
|
|
call (%rd101), _rt_buffer_get_64, (%rd102, %r24, %r25, %rd103, %rd104, %rd15, %rd15);
|
|
// inline asm
|
|
mov.u16 %rs55, 255;
|
|
mov.u16 %rs56, 0;
|
|
st.v4.u8 [%rd101], {%rs56, %rs56, %rs56, %rs55};
|
|
bra.uni BB0_94;
|
|
|
|
BB0_24:
|
|
setp.geu.f32 %p45, %f774, 0f00000000;
|
|
@%p45 bra BB0_27;
|
|
|
|
cvt.rzi.f32.f32 %f440, %f412;
|
|
setp.neu.f32 %p46, %f440, 0f3EE8BA2E;
|
|
selp.f32 %f777, 0f7FFFFFFF, %f777, %p46;
|
|
|
|
BB0_27:
|
|
add.f32 %f442, %f45, 0f3EE8BA2E;
|
|
mov.b32 %r78, %f442;
|
|
setp.lt.s32 %p48, %r78, 2139095040;
|
|
@%p48 bra BB0_32;
|
|
|
|
setp.gtu.f32 %p49, %f45, 0f7F800000;
|
|
@%p49 bra BB0_31;
|
|
bra.uni BB0_29;
|
|
|
|
BB0_31:
|
|
add.f32 %f777, %f774, 0f3EE8BA2E;
|
|
bra.uni BB0_32;
|
|
|
|
BB0_29:
|
|
setp.neu.f32 %p50, %f45, 0f7F800000;
|
|
@%p50 bra BB0_32;
|
|
|
|
selp.f32 %f777, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_32:
|
|
mul.f32 %f443, %f777, 0f437F0000;
|
|
setp.eq.f32 %p51, %f774, 0f3F800000;
|
|
selp.f32 %f444, 0f437F0000, %f443, %p51;
|
|
cvt.rzi.u32.f32 %r79, %f444;
|
|
cvt.u16.u32 %rs11, %r79;
|
|
mov.u16 %rs12, 255;
|
|
st.v2.u8 [%rd26], {%rs11, %rs12};
|
|
ld.global.u32 %r163, [imageEnabled];
|
|
|
|
BB0_33:
|
|
and.b32 %r80, %r163, 1;
|
|
setp.eq.b32 %p52, %r80, 1;
|
|
@!%p52 bra BB0_68;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_34:
|
|
mov.f32 %f748, 0fB5BFBE8E;
|
|
mov.f32 %f747, 0fBF317200;
|
|
mov.f32 %f746, 0f35BFBE8E;
|
|
mov.f32 %f745, 0f3F317200;
|
|
mov.f32 %f744, 0f3DAAAABD;
|
|
mov.f32 %f743, 0f3C4CAF63;
|
|
mov.f32 %f742, 0f3B18F0FE;
|
|
mov.f32 %f447, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f448, %f447;
|
|
fma.rn.f32 %f449, %f448, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f57, %f449;
|
|
abs.f32 %f58, %f41;
|
|
setp.lt.f32 %p53, %f58, 0f00800000;
|
|
mul.f32 %f450, %f58, 0f4B800000;
|
|
selp.f32 %f451, 0fC3170000, 0fC2FE0000, %p53;
|
|
selp.f32 %f452, %f450, %f58, %p53;
|
|
mov.b32 %r81, %f452;
|
|
and.b32 %r82, %r81, 8388607;
|
|
or.b32 %r83, %r82, 1065353216;
|
|
mov.b32 %f453, %r83;
|
|
shr.u32 %r84, %r81, 23;
|
|
cvt.rn.f32.u32 %f454, %r84;
|
|
add.f32 %f455, %f451, %f454;
|
|
setp.gt.f32 %p54, %f453, 0f3FB504F3;
|
|
mul.f32 %f456, %f453, 0f3F000000;
|
|
add.f32 %f457, %f455, 0f3F800000;
|
|
selp.f32 %f458, %f456, %f453, %p54;
|
|
selp.f32 %f459, %f457, %f455, %p54;
|
|
add.f32 %f460, %f458, 0fBF800000;
|
|
add.f32 %f446, %f458, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f445,%f446;
|
|
// inline asm
|
|
add.f32 %f461, %f460, %f460;
|
|
mul.f32 %f462, %f445, %f461;
|
|
mul.f32 %f463, %f462, %f462;
|
|
fma.rn.f32 %f466, %f742, %f463, %f743;
|
|
fma.rn.f32 %f468, %f466, %f463, %f744;
|
|
mul.rn.f32 %f469, %f468, %f463;
|
|
mul.rn.f32 %f470, %f469, %f462;
|
|
sub.f32 %f471, %f460, %f462;
|
|
neg.f32 %f472, %f462;
|
|
add.f32 %f473, %f471, %f471;
|
|
fma.rn.f32 %f474, %f472, %f460, %f473;
|
|
mul.rn.f32 %f475, %f445, %f474;
|
|
add.f32 %f476, %f470, %f462;
|
|
sub.f32 %f477, %f462, %f476;
|
|
add.f32 %f478, %f470, %f477;
|
|
add.f32 %f479, %f475, %f478;
|
|
add.f32 %f480, %f476, %f479;
|
|
sub.f32 %f481, %f476, %f480;
|
|
add.f32 %f482, %f479, %f481;
|
|
mul.rn.f32 %f484, %f459, %f745;
|
|
mul.rn.f32 %f486, %f459, %f746;
|
|
add.f32 %f487, %f484, %f480;
|
|
sub.f32 %f488, %f484, %f487;
|
|
add.f32 %f489, %f480, %f488;
|
|
add.f32 %f490, %f482, %f489;
|
|
add.f32 %f491, %f486, %f490;
|
|
add.f32 %f492, %f487, %f491;
|
|
sub.f32 %f493, %f487, %f492;
|
|
add.f32 %f494, %f491, %f493;
|
|
mov.f32 %f495, 0f3EE66666;
|
|
mul.rn.f32 %f496, %f495, %f492;
|
|
neg.f32 %f497, %f496;
|
|
fma.rn.f32 %f498, %f495, %f492, %f497;
|
|
fma.rn.f32 %f499, %f495, %f494, %f498;
|
|
mov.f32 %f500, 0f00000000;
|
|
fma.rn.f32 %f501, %f500, %f492, %f499;
|
|
add.rn.f32 %f502, %f496, %f501;
|
|
neg.f32 %f503, %f502;
|
|
add.rn.f32 %f504, %f496, %f503;
|
|
add.rn.f32 %f505, %f504, %f501;
|
|
mov.b32 %r85, %f502;
|
|
setp.eq.s32 %p55, %r85, 1118925336;
|
|
add.s32 %r86, %r85, -1;
|
|
mov.b32 %f506, %r86;
|
|
add.f32 %f507, %f505, 0f37000000;
|
|
selp.f32 %f508, %f506, %f502, %p55;
|
|
selp.f32 %f59, %f507, %f505, %p55;
|
|
mul.f32 %f509, %f508, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f510, %f509;
|
|
fma.rn.f32 %f512, %f510, %f747, %f508;
|
|
fma.rn.f32 %f514, %f510, %f748, %f512;
|
|
mul.f32 %f515, %f514, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f516, %f515;
|
|
add.f32 %f517, %f510, 0f00000000;
|
|
ex2.approx.f32 %f518, %f517;
|
|
mul.f32 %f519, %f516, %f518;
|
|
setp.lt.f32 %p56, %f508, 0fC2D20000;
|
|
selp.f32 %f520, 0f00000000, %f519, %p56;
|
|
setp.gt.f32 %p57, %f508, 0f42D20000;
|
|
selp.f32 %f778, 0f7F800000, %f520, %p57;
|
|
setp.eq.f32 %p58, %f778, 0f7F800000;
|
|
@%p58 bra BB0_36;
|
|
|
|
fma.rn.f32 %f778, %f778, %f59, %f778;
|
|
|
|
BB0_36:
|
|
setp.lt.f32 %p59, %f41, 0f00000000;
|
|
setp.eq.f32 %p60, %f57, 0f3F800000;
|
|
and.pred %p3, %p59, %p60;
|
|
mov.b32 %r87, %f778;
|
|
xor.b32 %r88, %r87, -2147483648;
|
|
mov.b32 %f521, %r88;
|
|
selp.f32 %f780, %f521, %f778, %p3;
|
|
setp.eq.f32 %p61, %f41, 0f00000000;
|
|
@%p61 bra BB0_39;
|
|
bra.uni BB0_37;
|
|
|
|
BB0_39:
|
|
add.f32 %f524, %f41, %f41;
|
|
selp.f32 %f780, %f524, 0f00000000, %p60;
|
|
bra.uni BB0_40;
|
|
|
|
BB0_37:
|
|
setp.geu.f32 %p62, %f41, 0f00000000;
|
|
@%p62 bra BB0_40;
|
|
|
|
cvt.rzi.f32.f32 %f523, %f495;
|
|
setp.neu.f32 %p63, %f523, 0f3EE66666;
|
|
selp.f32 %f780, 0f7FFFFFFF, %f780, %p63;
|
|
|
|
BB0_40:
|
|
add.f32 %f525, %f58, 0f3EE66666;
|
|
mov.b32 %r89, %f525;
|
|
setp.lt.s32 %p65, %r89, 2139095040;
|
|
@%p65 bra BB0_45;
|
|
|
|
setp.gtu.f32 %p66, %f58, 0f7F800000;
|
|
@%p66 bra BB0_44;
|
|
bra.uni BB0_42;
|
|
|
|
BB0_44:
|
|
add.f32 %f780, %f41, 0f3EE66666;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_42:
|
|
setp.neu.f32 %p67, %f58, 0f7F800000;
|
|
@%p67 bra BB0_45;
|
|
|
|
selp.f32 %f780, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_45:
|
|
mov.f32 %f755, 0fB5BFBE8E;
|
|
mov.f32 %f754, 0fBF317200;
|
|
mov.f32 %f753, 0f35BFBE8E;
|
|
mov.f32 %f752, 0f3F317200;
|
|
mov.f32 %f751, 0f3DAAAABD;
|
|
mov.f32 %f750, 0f3C4CAF63;
|
|
mov.f32 %f749, 0f3B18F0FE;
|
|
setp.eq.f32 %p68, %f41, 0f3F800000;
|
|
selp.f32 %f70, 0f3F800000, %f780, %p68;
|
|
abs.f32 %f71, %f42;
|
|
setp.lt.f32 %p69, %f71, 0f00800000;
|
|
mul.f32 %f528, %f71, 0f4B800000;
|
|
selp.f32 %f529, 0fC3170000, 0fC2FE0000, %p69;
|
|
selp.f32 %f530, %f528, %f71, %p69;
|
|
mov.b32 %r90, %f530;
|
|
and.b32 %r91, %r90, 8388607;
|
|
or.b32 %r92, %r91, 1065353216;
|
|
mov.b32 %f531, %r92;
|
|
shr.u32 %r93, %r90, 23;
|
|
cvt.rn.f32.u32 %f532, %r93;
|
|
add.f32 %f533, %f529, %f532;
|
|
setp.gt.f32 %p70, %f531, 0f3FB504F3;
|
|
mul.f32 %f534, %f531, 0f3F000000;
|
|
add.f32 %f535, %f533, 0f3F800000;
|
|
selp.f32 %f536, %f534, %f531, %p70;
|
|
selp.f32 %f537, %f535, %f533, %p70;
|
|
add.f32 %f538, %f536, 0fBF800000;
|
|
add.f32 %f527, %f536, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f526,%f527;
|
|
// inline asm
|
|
add.f32 %f539, %f538, %f538;
|
|
mul.f32 %f540, %f526, %f539;
|
|
mul.f32 %f541, %f540, %f540;
|
|
fma.rn.f32 %f544, %f749, %f541, %f750;
|
|
fma.rn.f32 %f546, %f544, %f541, %f751;
|
|
mul.rn.f32 %f547, %f546, %f541;
|
|
mul.rn.f32 %f548, %f547, %f540;
|
|
sub.f32 %f549, %f538, %f540;
|
|
neg.f32 %f550, %f540;
|
|
add.f32 %f551, %f549, %f549;
|
|
fma.rn.f32 %f552, %f550, %f538, %f551;
|
|
mul.rn.f32 %f553, %f526, %f552;
|
|
add.f32 %f554, %f548, %f540;
|
|
sub.f32 %f555, %f540, %f554;
|
|
add.f32 %f556, %f548, %f555;
|
|
add.f32 %f557, %f553, %f556;
|
|
add.f32 %f558, %f554, %f557;
|
|
sub.f32 %f559, %f554, %f558;
|
|
add.f32 %f560, %f557, %f559;
|
|
mul.rn.f32 %f562, %f537, %f752;
|
|
mul.rn.f32 %f564, %f537, %f753;
|
|
add.f32 %f565, %f562, %f558;
|
|
sub.f32 %f566, %f562, %f565;
|
|
add.f32 %f567, %f558, %f566;
|
|
add.f32 %f568, %f560, %f567;
|
|
add.f32 %f569, %f564, %f568;
|
|
add.f32 %f570, %f565, %f569;
|
|
sub.f32 %f571, %f565, %f570;
|
|
add.f32 %f572, %f569, %f571;
|
|
mul.rn.f32 %f574, %f495, %f570;
|
|
neg.f32 %f575, %f574;
|
|
fma.rn.f32 %f576, %f495, %f570, %f575;
|
|
fma.rn.f32 %f577, %f495, %f572, %f576;
|
|
fma.rn.f32 %f579, %f500, %f570, %f577;
|
|
add.rn.f32 %f580, %f574, %f579;
|
|
neg.f32 %f581, %f580;
|
|
add.rn.f32 %f582, %f574, %f581;
|
|
add.rn.f32 %f583, %f582, %f579;
|
|
mov.b32 %r94, %f580;
|
|
setp.eq.s32 %p71, %r94, 1118925336;
|
|
add.s32 %r95, %r94, -1;
|
|
mov.b32 %f584, %r95;
|
|
add.f32 %f585, %f583, 0f37000000;
|
|
selp.f32 %f586, %f584, %f580, %p71;
|
|
selp.f32 %f72, %f585, %f583, %p71;
|
|
mul.f32 %f587, %f586, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f588, %f587;
|
|
fma.rn.f32 %f590, %f588, %f754, %f586;
|
|
fma.rn.f32 %f592, %f588, %f755, %f590;
|
|
mul.f32 %f593, %f592, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f594, %f593;
|
|
add.f32 %f595, %f588, 0f00000000;
|
|
ex2.approx.f32 %f596, %f595;
|
|
mul.f32 %f597, %f594, %f596;
|
|
setp.lt.f32 %p72, %f586, 0fC2D20000;
|
|
selp.f32 %f598, 0f00000000, %f597, %p72;
|
|
setp.gt.f32 %p73, %f586, 0f42D20000;
|
|
selp.f32 %f781, 0f7F800000, %f598, %p73;
|
|
setp.eq.f32 %p74, %f781, 0f7F800000;
|
|
@%p74 bra BB0_47;
|
|
|
|
fma.rn.f32 %f781, %f781, %f72, %f781;
|
|
|
|
BB0_47:
|
|
setp.lt.f32 %p75, %f42, 0f00000000;
|
|
and.pred %p4, %p75, %p60;
|
|
mov.b32 %r96, %f781;
|
|
xor.b32 %r97, %r96, -2147483648;
|
|
mov.b32 %f599, %r97;
|
|
selp.f32 %f783, %f599, %f781, %p4;
|
|
setp.eq.f32 %p77, %f42, 0f00000000;
|
|
@%p77 bra BB0_50;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_50:
|
|
add.f32 %f602, %f42, %f42;
|
|
selp.f32 %f783, %f602, 0f00000000, %p60;
|
|
bra.uni BB0_51;
|
|
|
|
BB0_48:
|
|
setp.geu.f32 %p78, %f42, 0f00000000;
|
|
@%p78 bra BB0_51;
|
|
|
|
cvt.rzi.f32.f32 %f601, %f495;
|
|
setp.neu.f32 %p79, %f601, 0f3EE66666;
|
|
selp.f32 %f783, 0f7FFFFFFF, %f783, %p79;
|
|
|
|
BB0_51:
|
|
add.f32 %f603, %f71, 0f3EE66666;
|
|
mov.b32 %r98, %f603;
|
|
setp.lt.s32 %p81, %r98, 2139095040;
|
|
@%p81 bra BB0_56;
|
|
|
|
setp.gtu.f32 %p82, %f71, 0f7F800000;
|
|
@%p82 bra BB0_55;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_55:
|
|
add.f32 %f783, %f42, 0f3EE66666;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_53:
|
|
setp.neu.f32 %p83, %f71, 0f7F800000;
|
|
@%p83 bra BB0_56;
|
|
|
|
selp.f32 %f783, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_56:
|
|
mov.f32 %f762, 0fB5BFBE8E;
|
|
mov.f32 %f761, 0fBF317200;
|
|
mov.f32 %f760, 0f35BFBE8E;
|
|
mov.f32 %f759, 0f3F317200;
|
|
mov.f32 %f758, 0f3DAAAABD;
|
|
mov.f32 %f757, 0f3C4CAF63;
|
|
mov.f32 %f756, 0f3B18F0FE;
|
|
setp.eq.f32 %p84, %f42, 0f3F800000;
|
|
selp.f32 %f83, 0f3F800000, %f783, %p84;
|
|
abs.f32 %f84, %f43;
|
|
setp.lt.f32 %p85, %f84, 0f00800000;
|
|
mul.f32 %f606, %f84, 0f4B800000;
|
|
selp.f32 %f607, 0fC3170000, 0fC2FE0000, %p85;
|
|
selp.f32 %f608, %f606, %f84, %p85;
|
|
mov.b32 %r99, %f608;
|
|
and.b32 %r100, %r99, 8388607;
|
|
or.b32 %r101, %r100, 1065353216;
|
|
mov.b32 %f609, %r101;
|
|
shr.u32 %r102, %r99, 23;
|
|
cvt.rn.f32.u32 %f610, %r102;
|
|
add.f32 %f611, %f607, %f610;
|
|
setp.gt.f32 %p86, %f609, 0f3FB504F3;
|
|
mul.f32 %f612, %f609, 0f3F000000;
|
|
add.f32 %f613, %f611, 0f3F800000;
|
|
selp.f32 %f614, %f612, %f609, %p86;
|
|
selp.f32 %f615, %f613, %f611, %p86;
|
|
add.f32 %f616, %f614, 0fBF800000;
|
|
add.f32 %f605, %f614, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f604,%f605;
|
|
// inline asm
|
|
add.f32 %f617, %f616, %f616;
|
|
mul.f32 %f618, %f604, %f617;
|
|
mul.f32 %f619, %f618, %f618;
|
|
fma.rn.f32 %f622, %f756, %f619, %f757;
|
|
fma.rn.f32 %f624, %f622, %f619, %f758;
|
|
mul.rn.f32 %f625, %f624, %f619;
|
|
mul.rn.f32 %f626, %f625, %f618;
|
|
sub.f32 %f627, %f616, %f618;
|
|
neg.f32 %f628, %f618;
|
|
add.f32 %f629, %f627, %f627;
|
|
fma.rn.f32 %f630, %f628, %f616, %f629;
|
|
mul.rn.f32 %f631, %f604, %f630;
|
|
add.f32 %f632, %f626, %f618;
|
|
sub.f32 %f633, %f618, %f632;
|
|
add.f32 %f634, %f626, %f633;
|
|
add.f32 %f635, %f631, %f634;
|
|
add.f32 %f636, %f632, %f635;
|
|
sub.f32 %f637, %f632, %f636;
|
|
add.f32 %f638, %f635, %f637;
|
|
mul.rn.f32 %f640, %f615, %f759;
|
|
mul.rn.f32 %f642, %f615, %f760;
|
|
add.f32 %f643, %f640, %f636;
|
|
sub.f32 %f644, %f640, %f643;
|
|
add.f32 %f645, %f636, %f644;
|
|
add.f32 %f646, %f638, %f645;
|
|
add.f32 %f647, %f642, %f646;
|
|
add.f32 %f648, %f643, %f647;
|
|
sub.f32 %f649, %f643, %f648;
|
|
add.f32 %f650, %f647, %f649;
|
|
mul.rn.f32 %f652, %f495, %f648;
|
|
neg.f32 %f653, %f652;
|
|
fma.rn.f32 %f654, %f495, %f648, %f653;
|
|
fma.rn.f32 %f655, %f495, %f650, %f654;
|
|
fma.rn.f32 %f657, %f500, %f648, %f655;
|
|
add.rn.f32 %f658, %f652, %f657;
|
|
neg.f32 %f659, %f658;
|
|
add.rn.f32 %f660, %f652, %f659;
|
|
add.rn.f32 %f661, %f660, %f657;
|
|
mov.b32 %r103, %f658;
|
|
setp.eq.s32 %p87, %r103, 1118925336;
|
|
add.s32 %r104, %r103, -1;
|
|
mov.b32 %f662, %r104;
|
|
add.f32 %f663, %f661, 0f37000000;
|
|
selp.f32 %f664, %f662, %f658, %p87;
|
|
selp.f32 %f85, %f663, %f661, %p87;
|
|
mul.f32 %f665, %f664, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f666, %f665;
|
|
fma.rn.f32 %f668, %f666, %f761, %f664;
|
|
fma.rn.f32 %f670, %f666, %f762, %f668;
|
|
mul.f32 %f671, %f670, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f672, %f671;
|
|
add.f32 %f673, %f666, 0f00000000;
|
|
ex2.approx.f32 %f674, %f673;
|
|
mul.f32 %f675, %f672, %f674;
|
|
setp.lt.f32 %p88, %f664, 0fC2D20000;
|
|
selp.f32 %f676, 0f00000000, %f675, %p88;
|
|
setp.gt.f32 %p89, %f664, 0f42D20000;
|
|
selp.f32 %f784, 0f7F800000, %f676, %p89;
|
|
setp.eq.f32 %p90, %f784, 0f7F800000;
|
|
@%p90 bra BB0_58;
|
|
|
|
fma.rn.f32 %f784, %f784, %f85, %f784;
|
|
|
|
BB0_58:
|
|
setp.lt.f32 %p91, %f43, 0f00000000;
|
|
and.pred %p5, %p91, %p60;
|
|
mov.b32 %r105, %f784;
|
|
xor.b32 %r106, %r105, -2147483648;
|
|
mov.b32 %f677, %r106;
|
|
selp.f32 %f786, %f677, %f784, %p5;
|
|
setp.eq.f32 %p93, %f43, 0f00000000;
|
|
@%p93 bra BB0_61;
|
|
bra.uni BB0_59;
|
|
|
|
BB0_61:
|
|
add.f32 %f680, %f43, %f43;
|
|
selp.f32 %f786, %f680, 0f00000000, %p60;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_59:
|
|
setp.geu.f32 %p94, %f43, 0f00000000;
|
|
@%p94 bra BB0_62;
|
|
|
|
cvt.rzi.f32.f32 %f679, %f495;
|
|
setp.neu.f32 %p95, %f679, 0f3EE66666;
|
|
selp.f32 %f786, 0f7FFFFFFF, %f786, %p95;
|
|
|
|
BB0_62:
|
|
add.f32 %f681, %f84, 0f3EE66666;
|
|
mov.b32 %r107, %f681;
|
|
setp.lt.s32 %p97, %r107, 2139095040;
|
|
@%p97 bra BB0_67;
|
|
|
|
setp.gtu.f32 %p98, %f84, 0f7F800000;
|
|
@%p98 bra BB0_66;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_66:
|
|
add.f32 %f786, %f43, 0f3EE66666;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_64:
|
|
setp.neu.f32 %p99, %f84, 0f7F800000;
|
|
@%p99 bra BB0_67;
|
|
|
|
selp.f32 %f786, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_67:
|
|
setp.eq.f32 %p100, %f43, 0f3F800000;
|
|
selp.f32 %f682, 0f3F800000, %f786, %p100;
|
|
cvt.u64.u32 %rd36, %r3;
|
|
cvt.u64.u32 %rd35, %r2;
|
|
mov.u64 %rd39, image;
|
|
cvta.global.u64 %rd34, %rd39;
|
|
// inline asm
|
|
call (%rd33), _rt_buffer_get_64, (%rd34, %r24, %r25, %rd35, %rd36, %rd15, %rd15);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f683, %f682;
|
|
mul.f32 %f684, %f683, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r110, %f684;
|
|
cvt.sat.f32.f32 %f685, %f83;
|
|
mul.f32 %f686, %f685, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r111, %f686;
|
|
cvt.sat.f32.f32 %f687, %f70;
|
|
mul.f32 %f688, %f687, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r112, %f688;
|
|
cvt.u16.u32 %rs13, %r110;
|
|
cvt.u16.u32 %rs14, %r112;
|
|
cvt.u16.u32 %rs15, %r111;
|
|
mov.u16 %rs16, 255;
|
|
st.v4.u8 [%rd33], {%rs13, %rs15, %rs14, %rs16};
|
|
ld.global.u32 %r163, [imageEnabled];
|
|
|
|
BB0_68:
|
|
and.b32 %r113, %r163, 4;
|
|
setp.eq.s32 %p101, %r113, 0;
|
|
@%p101 bra BB0_72;
|
|
|
|
ld.global.u32 %r114, [additive];
|
|
setp.eq.s32 %p102, %r114, 0;
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
mov.f32 %f689, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs17, %f689;}
|
|
|
|
// inline asm
|
|
@%p102 bra BB0_71;
|
|
|
|
mov.u64 %rd52, image_HDR;
|
|
cvta.global.u64 %rd41, %rd52;
|
|
mov.u32 %r118, 8;
|
|
// inline asm
|
|
call (%rd40), _rt_buffer_get_64, (%rd41, %r24, %r118, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs24, %rs25, %rs26, %rs27}, [%rd40];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f690, %rs24;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f691, %rs25;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f692, %rs26;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd46), _rt_buffer_get_64, (%rd41, %r24, %r118, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f693, %f41, %f690;
|
|
add.f32 %f694, %f42, %f691;
|
|
add.f32 %f695, %f43, %f692;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f695;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs22, %f694;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs21, %f693;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd46], {%rs21, %rs22, %rs23, %rs17};
|
|
bra.uni BB0_72;
|
|
|
|
BB0_71:
|
|
mov.u64 %rd59, image_HDR;
|
|
cvta.global.u64 %rd54, %rd59;
|
|
mov.u32 %r120, 8;
|
|
// inline asm
|
|
call (%rd53), _rt_buffer_get_64, (%rd54, %r24, %r120, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f43;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f42;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f41;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd53], {%rs28, %rs29, %rs30, %rs17};
|
|
|
|
BB0_72:
|
|
ld.global.u8 %rs31, [imageEnabled];
|
|
and.b16 %rs32, %rs31, 64;
|
|
setp.eq.s16 %p103, %rs32, 0;
|
|
@%p103 bra BB0_94;
|
|
|
|
cvt.u64.u32 %rd62, %r2;
|
|
cvt.u64.u32 %rd63, %r3;
|
|
mov.u64 %rd66, image_Dir;
|
|
cvta.global.u64 %rd61, %rd66;
|
|
// inline asm
|
|
call (%rd60), _rt_buffer_get_64, (%rd61, %r24, %r25, %rd62, %rd63, %rd15, %rd15);
|
|
// inline asm
|
|
fma.rn.f32 %f699, %f10, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f700, %f699, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r123, %f700;
|
|
fma.rn.f32 %f701, %f11, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f702, %f701, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r124, %f702;
|
|
fma.rn.f32 %f703, %f12, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f704, %f703, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r125, %f704;
|
|
cvt.u16.u32 %rs33, %r125;
|
|
cvt.u16.u32 %rs34, %r124;
|
|
cvt.u16.u32 %rs35, %r123;
|
|
mov.u16 %rs36, 255;
|
|
st.v4.u8 [%rd60], {%rs35, %rs34, %rs33, %rs36};
|
|
|
|
BB0_94:
|
|
ret;
|
|
}
|
|
|
|
|