2020 lines
55 KiB
Plaintext
2020 lines
55 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 image_RNM3[1];
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.global .align 8 .b8 texCoords[8];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 1 .b8 rnd_seeds[1];
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.global .align 1 .b8 lightmapDirect[1];
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.global .texref albedoTex;
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.global .align 4 .u32 samples;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[40];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<103>;
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.reg .b16 %rs<145>;
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.reg .f32 %f<854>;
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.reg .b32 %r<397>;
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.reg .b64 %rd<284>;
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mov.u64 %rd283, __local_depot0;
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cvta.local.u64 %SP, %rd283;
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ld.global.u32 %r1, [samples];
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ld.global.v2.u32 {%r96, %r97}, [pixelID];
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cvt.u64.u32 %rd22, %r96;
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cvt.u64.u32 %rd23, %r97;
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mov.u64 %rd26, uvnormal;
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cvta.global.u64 %rd21, %rd26;
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mov.u32 %r94, 2;
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mov.u32 %r95, 4;
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mov.u64 %rd25, 0;
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// inline asm
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call (%rd20), _rt_buffer_get_64, (%rd21, %r94, %r95, %rd22, %rd23, %rd25, %rd25);
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// inline asm
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ld.u32 %r2, [%rd20];
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shr.u32 %r100, %r2, 16;
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cvt.u16.u32 %rs1, %r100;
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and.b16 %rs6, %rs1, 255;
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cvt.u16.u32 %rs7, %r2;
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or.b16 %rs8, %rs7, %rs6;
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setp.eq.s16 %p4, %rs8, 0;
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mov.f32 %f785, 0f00000000;
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mov.f32 %f786, %f785;
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mov.f32 %f787, %f785;
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@%p4 bra BB0_2;
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ld.u8 %rs9, [%rd20+1];
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and.b16 %rs11, %rs7, 255;
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cvt.rn.f32.u16 %f195, %rs11;
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div.rn.f32 %f196, %f195, 0f437F0000;
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fma.rn.f32 %f197, %f196, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f198, %rs9;
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div.rn.f32 %f199, %f198, 0f437F0000;
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fma.rn.f32 %f200, %f199, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f201, %rs6;
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div.rn.f32 %f202, %f201, 0f437F0000;
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fma.rn.f32 %f203, %f202, 0f40000000, 0fBF800000;
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mul.f32 %f204, %f200, %f200;
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fma.rn.f32 %f205, %f197, %f197, %f204;
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fma.rn.f32 %f206, %f203, %f203, %f205;
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sqrt.rn.f32 %f207, %f206;
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rcp.rn.f32 %f208, %f207;
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mul.f32 %f785, %f197, %f208;
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mul.f32 %f786, %f200, %f208;
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mul.f32 %f787, %f203, %f208;
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BB0_2:
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ld.global.v2.u32 {%r101, %r102}, [pixelID];
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ld.global.v2.u32 {%r104, %r105}, [tileInfo];
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add.s32 %r3, %r101, %r104;
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add.s32 %r4, %r102, %r105;
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setp.eq.f32 %p5, %f786, 0f00000000;
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setp.eq.f32 %p6, %f785, 0f00000000;
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and.pred %p7, %p6, %p5;
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setp.eq.f32 %p8, %f787, 0f00000000;
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and.pred %p9, %p7, %p8;
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@%p9 bra BB0_105;
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bra.uni BB0_3;
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BB0_105:
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ld.global.u32 %r396, [imageEnabled];
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and.b32 %r295, %r396, 1;
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setp.eq.b32 %p95, %r295, 1;
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@!%p95 bra BB0_107;
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bra.uni BB0_106;
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BB0_106:
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cvt.u64.u32 %rd174, %r3;
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cvt.u64.u32 %rd175, %r4;
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mov.u64 %rd178, image;
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cvta.global.u64 %rd173, %rd178;
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mov.u64 %rd177, 0;
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// inline asm
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call (%rd172), _rt_buffer_get_64, (%rd173, %r94, %r95, %rd174, %rd175, %rd177, %rd177);
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// inline asm
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mov.u16 %rs88, 0;
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st.v4.u8 [%rd172], {%rs88, %rs88, %rs88, %rs88};
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ld.global.u32 %r396, [imageEnabled];
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BB0_107:
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and.b32 %r298, %r396, 4;
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setp.eq.s32 %p96, %r298, 0;
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@%p96 bra BB0_109;
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cvt.u64.u32 %rd181, %r3;
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cvt.u64.u32 %rd182, %r4;
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mov.u64 %rd185, image_HDR;
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cvta.global.u64 %rd180, %rd185;
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mov.u32 %r300, 8;
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mov.u64 %rd184, 0;
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// inline asm
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call (%rd179), _rt_buffer_get_64, (%rd180, %r94, %r300, %rd181, %rd182, %rd184, %rd184);
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// inline asm
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mov.f32 %f697, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs89, %f697;}
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// inline asm
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mov.u16 %rs90, 0;
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st.v4.u16 [%rd179], {%rs89, %rs89, %rs89, %rs90};
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ld.global.u32 %r396, [imageEnabled];
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BB0_109:
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and.b32 %r301, %r396, 16;
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setp.eq.s32 %p97, %r301, 0;
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@%p97 bra BB0_111;
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cvt.u64.u32 %rd189, %r4;
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cvt.u64.u32 %rd188, %r3;
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mov.u64 %rd192, image_HDR2;
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cvta.global.u64 %rd187, %rd192;
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mov.u32 %r303, 8;
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mov.u64 %rd191, 0;
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// inline asm
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call (%rd186), _rt_buffer_get_64, (%rd187, %r94, %r303, %rd188, %rd189, %rd191, %rd191);
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// inline asm
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mov.f32 %f698, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs91, %f698;}
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// inline asm
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mov.u16 %rs92, 0;
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st.v4.u16 [%rd186], {%rs91, %rs91, %rs91, %rs92};
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BB0_111:
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cvt.u64.u32 %rd18, %r3;
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cvt.u64.u32 %rd19, %r4;
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ld.global.u32 %r304, [additive];
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setp.eq.s32 %p98, %r304, 0;
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@%p98 bra BB0_113;
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mov.u64 %rd205, image_RNM0;
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cvta.global.u64 %rd194, %rd205;
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mov.u32 %r308, 8;
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mov.u64 %rd204, 0;
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// inline asm
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call (%rd193), _rt_buffer_get_64, (%rd194, %r94, %r308, %rd18, %rd19, %rd204, %rd204);
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// inline asm
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ld.v4.u16 {%rs99, %rs100, %rs101, %rs102}, [%rd193];
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// inline asm
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{ cvt.f32.f16 %f699, %rs99;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f700, %rs100;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f701, %rs101;}
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// inline asm
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// inline asm
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call (%rd199), _rt_buffer_get_64, (%rd194, %r94, %r308, %rd18, %rd19, %rd204, %rd204);
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// inline asm
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add.f32 %f702, %f699, 0f00000000;
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add.f32 %f703, %f700, 0f00000000;
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add.f32 %f704, %f701, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs98, %f704;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs97, %f703;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs96, %f702;}
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// inline asm
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mov.u16 %rs103, 0;
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st.v4.u16 [%rd199], {%rs96, %rs97, %rs98, %rs103};
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bra.uni BB0_114;
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BB0_3:
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ld.global.v2.u32 {%r115, %r116}, [pixelID];
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cvt.u64.u32 %rd29, %r115;
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cvt.u64.u32 %rd30, %r116;
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mov.u64 %rd45, lightmapDirect;
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cvta.global.u64 %rd28, %rd45;
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mov.u32 %r110, 8;
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// inline asm
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call (%rd27), _rt_buffer_get_64, (%rd28, %r94, %r110, %rd29, %rd30, %rd25, %rd25);
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// inline asm
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ld.v4.u16 {%rs16, %rs17, %rs18, %rs19}, [%rd27];
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// inline asm
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{ cvt.f32.f16 %f209, %rs16;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f210, %rs17;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f211, %rs18;}
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// inline asm
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ld.global.v2.u32 {%r119, %r120}, [pixelID];
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cvt.u64.u32 %rd35, %r119;
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cvt.u64.u32 %rd36, %r120;
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mov.u64 %rd46, uvpos;
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cvta.global.u64 %rd34, %rd46;
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mov.u32 %r112, 12;
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// inline asm
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call (%rd33), _rt_buffer_get_64, (%rd34, %r94, %r112, %rd35, %rd36, %rd25, %rd25);
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// inline asm
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ld.f32 %f227, [%rd33+8];
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ld.f32 %f228, [%rd33+4];
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ld.f32 %f229, [%rd33];
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mul.f32 %f230, %f229, 0f3456BF95;
|
|
mul.f32 %f231, %f228, 0f3456BF95;
|
|
mul.f32 %f232, %f227, 0f3456BF95;
|
|
abs.f32 %f233, %f785;
|
|
div.rn.f32 %f234, %f230, %f233;
|
|
abs.f32 %f235, %f786;
|
|
div.rn.f32 %f236, %f231, %f235;
|
|
abs.f32 %f237, %f787;
|
|
div.rn.f32 %f238, %f232, %f237;
|
|
abs.f32 %f239, %f234;
|
|
abs.f32 %f240, %f236;
|
|
abs.f32 %f241, %f238;
|
|
mov.f32 %f242, 0f38D1B717;
|
|
max.f32 %f243, %f239, %f242;
|
|
max.f32 %f244, %f240, %f242;
|
|
max.f32 %f245, %f241, %f242;
|
|
fma.rn.f32 %f10, %f785, %f243, %f229;
|
|
fma.rn.f32 %f11, %f786, %f244, %f228;
|
|
fma.rn.f32 %f12, %f787, %f245, %f227;
|
|
setp.gt.f32 %p10, %f233, %f237;
|
|
neg.f32 %f246, %f786;
|
|
selp.f32 %f247, %f246, 0f00000000, %p10;
|
|
neg.f32 %f248, %f787;
|
|
selp.f32 %f249, %f785, %f248, %p10;
|
|
selp.f32 %f250, 0f00000000, %f786, %p10;
|
|
mul.f32 %f251, %f249, %f249;
|
|
fma.rn.f32 %f252, %f247, %f247, %f251;
|
|
fma.rn.f32 %f253, %f250, %f250, %f252;
|
|
sqrt.rn.f32 %f254, %f253;
|
|
rcp.rn.f32 %f255, %f254;
|
|
mul.f32 %f13, %f247, %f255;
|
|
mul.f32 %f14, %f249, %f255;
|
|
mul.f32 %f15, %f250, %f255;
|
|
ld.global.v2.u32 {%r123, %r124}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r123;
|
|
cvt.u64.u32 %rd42, %r124;
|
|
mov.u64 %rd47, rnd_seeds;
|
|
cvta.global.u64 %rd40, %rd47;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd40, %r94, %r95, %rd41, %rd42, %rd25, %rd25);
|
|
// inline asm
|
|
mov.f32 %f803, 0f00000000;
|
|
setp.lt.s32 %p11, %r1, 1;
|
|
mov.f32 %f804, %f803;
|
|
mov.f32 %f805, %f803;
|
|
mov.f32 %f806, %f803;
|
|
mov.f32 %f807, %f803;
|
|
mov.f32 %f808, %f803;
|
|
mov.f32 %f809, %f803;
|
|
mov.f32 %f810, %f803;
|
|
mov.f32 %f811, %f803;
|
|
mov.f32 %f812, %f803;
|
|
mov.f32 %f813, %f803;
|
|
mov.f32 %f814, %f803;
|
|
mov.f32 %f815, %f803;
|
|
mov.f32 %f816, %f803;
|
|
mov.f32 %f817, %f803;
|
|
@%p11 bra BB0_54;
|
|
|
|
cvt.rn.f32.s32 %f271, %r1;
|
|
rcp.rn.f32 %f16, %f271;
|
|
ld.u32 %r372, [%rd39];
|
|
mul.f32 %f17, %f10, 0f3456BF95;
|
|
mul.f32 %f18, %f11, 0f3456BF95;
|
|
mul.f32 %f19, %f12, 0f3456BF95;
|
|
mul.f32 %f272, %f785, %f14;
|
|
mul.f32 %f273, %f786, %f13;
|
|
sub.f32 %f20, %f273, %f272;
|
|
mul.f32 %f274, %f787, %f13;
|
|
mul.f32 %f275, %f785, %f15;
|
|
sub.f32 %f21, %f275, %f274;
|
|
mul.f32 %f276, %f786, %f15;
|
|
mul.f32 %f277, %f787, %f14;
|
|
sub.f32 %f22, %f277, %f276;
|
|
mov.f32 %f803, 0f00000000;
|
|
mov.u32 %r127, 0;
|
|
abs.f32 %f278, %f18;
|
|
abs.f32 %f279, %f17;
|
|
max.f32 %f280, %f279, %f278;
|
|
abs.f32 %f281, %f19;
|
|
max.f32 %f282, %f280, %f281;
|
|
mov.u32 %r369, %r127;
|
|
mov.f32 %f804, %f803;
|
|
mov.f32 %f805, %f803;
|
|
mov.f32 %f806, %f803;
|
|
mov.f32 %f807, %f803;
|
|
mov.f32 %f808, %f803;
|
|
mov.f32 %f809, %f803;
|
|
mov.f32 %f810, %f803;
|
|
mov.f32 %f811, %f803;
|
|
mov.f32 %f812, %f803;
|
|
mov.f32 %f813, %f803;
|
|
mov.f32 %f814, %f803;
|
|
mov.f32 %f815, %f803;
|
|
mov.f32 %f816, %f803;
|
|
mov.f32 %f817, %f803;
|
|
|
|
BB0_5:
|
|
mov.u32 %r371, %r127;
|
|
|
|
BB0_6:
|
|
mov.u32 %r9, %r372;
|
|
cvt.rn.f32.s32 %f767, %r369;
|
|
mad.lo.s32 %r129, %r9, 1664525, 1013904223;
|
|
and.b32 %r130, %r129, 16777215;
|
|
cvt.rn.f32.u32 %f284, %r130;
|
|
fma.rn.f32 %f285, %f284, 0f33800000, %f767;
|
|
mul.f32 %f55, %f16, %f285;
|
|
mad.lo.s32 %r10, %r129, 1664525, 1013904223;
|
|
and.b32 %r131, %r10, 16777215;
|
|
cvt.rn.f32.u32 %f286, %r131;
|
|
cvt.rn.f32.s32 %f287, %r371;
|
|
fma.rn.f32 %f288, %f286, 0f33800000, %f287;
|
|
mul.f32 %f289, %f16, %f288;
|
|
mul.f32 %f290, %f55, %f55;
|
|
mov.f32 %f291, 0f3F800000;
|
|
sub.f32 %f292, %f291, %f290;
|
|
mov.f32 %f293, 0f00000000;
|
|
max.f32 %f294, %f293, %f292;
|
|
sqrt.rn.f32 %f56, %f294;
|
|
mul.f32 %f824, %f289, 0f40C90FDB;
|
|
abs.f32 %f58, %f824;
|
|
setp.neu.f32 %p12, %f58, 0f7F800000;
|
|
mov.f32 %f818, %f824;
|
|
@%p12 bra BB0_8;
|
|
|
|
mov.f32 %f768, 0f00000000;
|
|
mul.rn.f32 %f818, %f824, %f768;
|
|
|
|
BB0_8:
|
|
mul.f32 %f296, %f818, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r382, %f296;
|
|
cvt.rn.f32.s32 %f297, %r382;
|
|
neg.f32 %f298, %f297;
|
|
mov.f32 %f299, 0f3FC90FDA;
|
|
fma.rn.f32 %f300, %f298, %f299, %f818;
|
|
mov.f32 %f301, 0f33A22168;
|
|
fma.rn.f32 %f302, %f298, %f301, %f300;
|
|
mov.f32 %f303, 0f27C234C5;
|
|
fma.rn.f32 %f819, %f298, %f303, %f302;
|
|
abs.f32 %f304, %f818;
|
|
setp.leu.f32 %p13, %f304, 0f47CE4780;
|
|
@%p13 bra BB0_19;
|
|
|
|
add.u64 %rd49, %SP, 12;
|
|
cvta.to.local.u64 %rd279, %rd49;
|
|
mov.u32 %r373, 0;
|
|
mov.u64 %rd280, 0;
|
|
mov.u32 %r374, %r373;
|
|
|
|
BB0_10:
|
|
.pragma "nounroll";
|
|
mov.b32 %r349, %f818;
|
|
shl.b32 %r348, %r349, 8;
|
|
or.b32 %r347, %r348, -2147483648;
|
|
add.u64 %rd275, %SP, 12;
|
|
cvta.to.local.u64 %rd274, %rd275;
|
|
shl.b64 %rd50, %rd280, 2;
|
|
mov.u64 %rd51, __cudart_i2opi_f;
|
|
add.s64 %rd52, %rd51, %rd50;
|
|
ld.const.u32 %r137, [%rd52];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r135, %r137, %r347, %r374;
|
|
madc.hi.u32 %r374, %r137, %r347, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd279], %r135;
|
|
add.s32 %r373, %r373, 1;
|
|
cvt.s64.s32 %rd280, %r373;
|
|
mul.wide.s32 %rd55, %r373, 4;
|
|
add.s64 %rd279, %rd274, %rd55;
|
|
setp.ne.s32 %p14, %r373, 6;
|
|
@%p14 bra BB0_10;
|
|
|
|
mov.b32 %r351, %f818;
|
|
shr.u32 %r350, %r351, 23;
|
|
add.u64 %rd273, %SP, 12;
|
|
and.b32 %r140, %r350, 255;
|
|
add.s32 %r141, %r140, -128;
|
|
shr.u32 %r142, %r141, 5;
|
|
cvta.to.local.u64 %rd57, %rd273;
|
|
st.local.u32 [%rd57+24], %r374;
|
|
mov.u32 %r143, 6;
|
|
sub.s32 %r144, %r143, %r142;
|
|
mul.wide.s32 %rd58, %r144, 4;
|
|
add.s64 %rd8, %rd57, %rd58;
|
|
ld.local.u32 %r375, [%rd8];
|
|
ld.local.u32 %r376, [%rd8+-4];
|
|
and.b32 %r22, %r350, 31;
|
|
setp.eq.s32 %p15, %r22, 0;
|
|
@%p15 bra BB0_13;
|
|
|
|
mov.u32 %r145, 32;
|
|
sub.s32 %r146, %r145, %r22;
|
|
shr.u32 %r147, %r376, %r146;
|
|
shl.b32 %r148, %r375, %r22;
|
|
add.s32 %r375, %r147, %r148;
|
|
ld.local.u32 %r149, [%rd8+-8];
|
|
shr.u32 %r150, %r149, %r146;
|
|
shl.b32 %r151, %r376, %r22;
|
|
add.s32 %r376, %r150, %r151;
|
|
|
|
BB0_13:
|
|
mov.b32 %r354, %f818;
|
|
and.b32 %r378, %r354, -2147483648;
|
|
shr.u32 %r152, %r376, 30;
|
|
shl.b32 %r153, %r375, 2;
|
|
add.s32 %r377, %r152, %r153;
|
|
shl.b32 %r28, %r376, 2;
|
|
shr.u32 %r154, %r377, 31;
|
|
shr.u32 %r155, %r375, 30;
|
|
add.s32 %r29, %r154, %r155;
|
|
setp.eq.s32 %p16, %r154, 0;
|
|
@%p16 bra BB0_14;
|
|
bra.uni BB0_15;
|
|
|
|
BB0_14:
|
|
mov.u32 %r379, %r28;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_15:
|
|
mov.b32 %r356, %f818;
|
|
and.b32 %r355, %r356, -2147483648;
|
|
not.b32 %r156, %r377;
|
|
neg.s32 %r379, %r28;
|
|
setp.eq.s32 %p17, %r28, 0;
|
|
selp.u32 %r157, 1, 0, %p17;
|
|
add.s32 %r377, %r157, %r156;
|
|
xor.b32 %r378, %r355, -2147483648;
|
|
|
|
BB0_16:
|
|
mov.b32 %r358, %f818;
|
|
and.b32 %r357, %r358, -2147483648;
|
|
clz.b32 %r381, %r377;
|
|
setp.eq.s32 %p18, %r381, 0;
|
|
shl.b32 %r158, %r377, %r381;
|
|
mov.u32 %r159, 32;
|
|
sub.s32 %r160, %r159, %r381;
|
|
shr.u32 %r161, %r379, %r160;
|
|
add.s32 %r162, %r161, %r158;
|
|
selp.b32 %r37, %r377, %r162, %p18;
|
|
mov.u32 %r163, -921707870;
|
|
mul.hi.u32 %r380, %r37, %r163;
|
|
setp.eq.s32 %p19, %r357, 0;
|
|
neg.s32 %r164, %r29;
|
|
selp.b32 %r382, %r29, %r164, %p19;
|
|
setp.lt.s32 %p20, %r380, 1;
|
|
@%p20 bra BB0_18;
|
|
|
|
mul.lo.s32 %r165, %r37, -921707870;
|
|
shr.u32 %r166, %r165, 31;
|
|
shl.b32 %r167, %r380, 1;
|
|
add.s32 %r380, %r166, %r167;
|
|
add.s32 %r381, %r381, 1;
|
|
|
|
BB0_18:
|
|
mov.u32 %r168, 126;
|
|
sub.s32 %r169, %r168, %r381;
|
|
shl.b32 %r170, %r169, 23;
|
|
add.s32 %r171, %r380, 1;
|
|
shr.u32 %r172, %r171, 7;
|
|
add.s32 %r173, %r172, 1;
|
|
shr.u32 %r174, %r173, 1;
|
|
add.s32 %r175, %r174, %r170;
|
|
or.b32 %r176, %r175, %r378;
|
|
mov.b32 %f819, %r176;
|
|
|
|
BB0_19:
|
|
add.s32 %r45, %r382, 1;
|
|
and.b32 %r46, %r45, 1;
|
|
setp.eq.s32 %p21, %r46, 0;
|
|
@%p21 bra BB0_21;
|
|
bra.uni BB0_20;
|
|
|
|
BB0_21:
|
|
mul.rn.f32 %f776, %f819, %f819;
|
|
mov.f32 %f307, 0f3C08839E;
|
|
mov.f32 %f308, 0fB94CA1F9;
|
|
fma.rn.f32 %f820, %f308, %f776, %f307;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_20:
|
|
mul.rn.f32 %f772, %f819, %f819;
|
|
mov.f32 %f305, 0fBAB6061A;
|
|
mov.f32 %f306, 0f37CCF5CE;
|
|
fma.rn.f32 %f820, %f306, %f772, %f305;
|
|
|
|
BB0_22:
|
|
@%p21 bra BB0_24;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_24:
|
|
mul.rn.f32 %f775, %f819, %f819;
|
|
mov.f32 %f771, 0f00000000;
|
|
mov.f32 %f312, 0fBE2AAAA3;
|
|
fma.rn.f32 %f313, %f820, %f775, %f312;
|
|
fma.rn.f32 %f821, %f313, %f775, %f771;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_23:
|
|
mul.rn.f32 %f773, %f819, %f819;
|
|
mov.f32 %f309, 0f3D2AAAA5;
|
|
fma.rn.f32 %f310, %f820, %f773, %f309;
|
|
mov.f32 %f311, 0fBF000000;
|
|
fma.rn.f32 %f821, %f310, %f773, %f311;
|
|
|
|
BB0_25:
|
|
fma.rn.f32 %f822, %f821, %f819, %f819;
|
|
@%p21 bra BB0_27;
|
|
|
|
mul.rn.f32 %f774, %f819, %f819;
|
|
mov.f32 %f758, 0f3F800000;
|
|
fma.rn.f32 %f822, %f821, %f774, %f758;
|
|
|
|
BB0_27:
|
|
add.s32 %r359, %r382, 1;
|
|
and.b32 %r177, %r359, 2;
|
|
setp.eq.s32 %p24, %r177, 0;
|
|
@%p24 bra BB0_29;
|
|
|
|
mov.f32 %f759, 0f00000000;
|
|
mov.f32 %f317, 0fBF800000;
|
|
fma.rn.f32 %f822, %f822, %f317, %f759;
|
|
|
|
BB0_29:
|
|
abs.f32 %f760, %f824;
|
|
setp.neu.f32 %p102, %f760, 0f7F800000;
|
|
@%p102 bra BB0_31;
|
|
|
|
mov.f32 %f770, 0f00000000;
|
|
mul.rn.f32 %f824, %f824, %f770;
|
|
|
|
BB0_31:
|
|
mov.f32 %f763, 0f27C234C5;
|
|
mov.f32 %f762, 0f33A22168;
|
|
mov.f32 %f761, 0f3FC90FDA;
|
|
mul.f32 %f319, %f824, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r392, %f319;
|
|
cvt.rn.f32.s32 %f320, %r392;
|
|
neg.f32 %f321, %f320;
|
|
fma.rn.f32 %f323, %f321, %f761, %f824;
|
|
fma.rn.f32 %f325, %f321, %f762, %f323;
|
|
fma.rn.f32 %f825, %f321, %f763, %f325;
|
|
abs.f32 %f327, %f824;
|
|
setp.leu.f32 %p26, %f327, 0f47CE4780;
|
|
@%p26 bra BB0_42;
|
|
|
|
add.u64 %rd60, %SP, 12;
|
|
cvta.to.local.u64 %rd281, %rd60;
|
|
mov.b32 %r48, %f824;
|
|
shl.b32 %r180, %r48, 8;
|
|
or.b32 %r50, %r180, -2147483648;
|
|
mov.u32 %r383, 0;
|
|
mov.u64 %rd282, %rd25;
|
|
mov.u32 %r384, %r383;
|
|
|
|
BB0_33:
|
|
.pragma "nounroll";
|
|
add.u64 %rd277, %SP, 12;
|
|
cvta.to.local.u64 %rd276, %rd277;
|
|
shl.b64 %rd61, %rd282, 2;
|
|
mov.u64 %rd62, __cudart_i2opi_f;
|
|
add.s64 %rd63, %rd62, %rd61;
|
|
ld.const.u32 %r183, [%rd63];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r181, %r183, %r50, %r384;
|
|
madc.hi.u32 %r384, %r183, %r50, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd281], %r181;
|
|
add.s32 %r383, %r383, 1;
|
|
cvt.s64.s32 %rd282, %r383;
|
|
mul.wide.s32 %rd64, %r383, 4;
|
|
add.s64 %rd281, %rd276, %rd64;
|
|
setp.ne.s32 %p27, %r383, 6;
|
|
@%p27 bra BB0_33;
|
|
|
|
mov.b32 %r361, %f824;
|
|
shr.u32 %r360, %r361, 23;
|
|
add.u64 %rd278, %SP, 12;
|
|
and.b32 %r186, %r360, 255;
|
|
add.s32 %r187, %r186, -128;
|
|
shr.u32 %r188, %r187, 5;
|
|
cvta.to.local.u64 %rd66, %rd278;
|
|
st.local.u32 [%rd66+24], %r384;
|
|
mov.u32 %r189, 6;
|
|
sub.s32 %r190, %r189, %r188;
|
|
mul.wide.s32 %rd67, %r190, 4;
|
|
add.s64 %rd15, %rd66, %rd67;
|
|
ld.local.u32 %r385, [%rd15];
|
|
ld.local.u32 %r386, [%rd15+-4];
|
|
and.b32 %r58, %r360, 31;
|
|
setp.eq.s32 %p28, %r58, 0;
|
|
@%p28 bra BB0_36;
|
|
|
|
mov.u32 %r191, 32;
|
|
sub.s32 %r192, %r191, %r58;
|
|
shr.u32 %r193, %r386, %r192;
|
|
shl.b32 %r194, %r385, %r58;
|
|
add.s32 %r385, %r193, %r194;
|
|
ld.local.u32 %r195, [%rd15+-8];
|
|
shr.u32 %r196, %r195, %r192;
|
|
shl.b32 %r197, %r386, %r58;
|
|
add.s32 %r386, %r196, %r197;
|
|
|
|
BB0_36:
|
|
mov.b32 %r364, %f824;
|
|
and.b32 %r388, %r364, -2147483648;
|
|
shr.u32 %r198, %r386, 30;
|
|
shl.b32 %r199, %r385, 2;
|
|
add.s32 %r387, %r198, %r199;
|
|
shl.b32 %r64, %r386, 2;
|
|
shr.u32 %r200, %r387, 31;
|
|
shr.u32 %r201, %r385, 30;
|
|
add.s32 %r65, %r200, %r201;
|
|
setp.eq.s32 %p29, %r200, 0;
|
|
@%p29 bra BB0_37;
|
|
bra.uni BB0_38;
|
|
|
|
BB0_37:
|
|
mov.u32 %r389, %r64;
|
|
bra.uni BB0_39;
|
|
|
|
BB0_38:
|
|
mov.b32 %r366, %f824;
|
|
and.b32 %r365, %r366, -2147483648;
|
|
not.b32 %r202, %r387;
|
|
neg.s32 %r389, %r64;
|
|
setp.eq.s32 %p30, %r64, 0;
|
|
selp.u32 %r203, 1, 0, %p30;
|
|
add.s32 %r387, %r203, %r202;
|
|
xor.b32 %r388, %r365, -2147483648;
|
|
|
|
BB0_39:
|
|
mov.b32 %r368, %f824;
|
|
and.b32 %r367, %r368, -2147483648;
|
|
clz.b32 %r391, %r387;
|
|
setp.eq.s32 %p31, %r391, 0;
|
|
shl.b32 %r204, %r387, %r391;
|
|
mov.u32 %r205, 32;
|
|
sub.s32 %r206, %r205, %r391;
|
|
shr.u32 %r207, %r389, %r206;
|
|
add.s32 %r208, %r207, %r204;
|
|
selp.b32 %r73, %r387, %r208, %p31;
|
|
mov.u32 %r209, -921707870;
|
|
mul.hi.u32 %r390, %r73, %r209;
|
|
setp.eq.s32 %p32, %r367, 0;
|
|
neg.s32 %r210, %r65;
|
|
selp.b32 %r392, %r65, %r210, %p32;
|
|
setp.lt.s32 %p33, %r390, 1;
|
|
@%p33 bra BB0_41;
|
|
|
|
mul.lo.s32 %r211, %r73, -921707870;
|
|
shr.u32 %r212, %r211, 31;
|
|
shl.b32 %r213, %r390, 1;
|
|
add.s32 %r390, %r212, %r213;
|
|
add.s32 %r391, %r391, 1;
|
|
|
|
BB0_41:
|
|
mov.u32 %r214, 126;
|
|
sub.s32 %r215, %r214, %r391;
|
|
shl.b32 %r216, %r215, 23;
|
|
add.s32 %r217, %r390, 1;
|
|
shr.u32 %r218, %r217, 7;
|
|
add.s32 %r219, %r218, 1;
|
|
shr.u32 %r220, %r219, 1;
|
|
add.s32 %r221, %r220, %r216;
|
|
or.b32 %r222, %r221, %r388;
|
|
mov.b32 %f825, %r222;
|
|
|
|
BB0_42:
|
|
and.b32 %r81, %r392, 1;
|
|
setp.eq.s32 %p34, %r81, 0;
|
|
@%p34 bra BB0_44;
|
|
bra.uni BB0_43;
|
|
|
|
BB0_44:
|
|
mul.rn.f32 %f784, %f825, %f825;
|
|
mov.f32 %f330, 0f3C08839E;
|
|
mov.f32 %f331, 0fB94CA1F9;
|
|
fma.rn.f32 %f826, %f331, %f784, %f330;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_43:
|
|
mul.rn.f32 %f780, %f825, %f825;
|
|
mov.f32 %f328, 0fBAB6061A;
|
|
mov.f32 %f329, 0f37CCF5CE;
|
|
fma.rn.f32 %f826, %f329, %f780, %f328;
|
|
|
|
BB0_45:
|
|
@%p34 bra BB0_47;
|
|
bra.uni BB0_46;
|
|
|
|
BB0_47:
|
|
mul.rn.f32 %f783, %f825, %f825;
|
|
mov.f32 %f769, 0f00000000;
|
|
mov.f32 %f335, 0fBE2AAAA3;
|
|
fma.rn.f32 %f336, %f826, %f783, %f335;
|
|
fma.rn.f32 %f827, %f336, %f783, %f769;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_46:
|
|
mul.rn.f32 %f781, %f825, %f825;
|
|
mov.f32 %f332, 0f3D2AAAA5;
|
|
fma.rn.f32 %f333, %f826, %f781, %f332;
|
|
mov.f32 %f334, 0fBF000000;
|
|
fma.rn.f32 %f827, %f333, %f781, %f334;
|
|
|
|
BB0_48:
|
|
fma.rn.f32 %f828, %f827, %f825, %f825;
|
|
@%p34 bra BB0_50;
|
|
|
|
mul.rn.f32 %f782, %f825, %f825;
|
|
mov.f32 %f764, 0f3F800000;
|
|
fma.rn.f32 %f828, %f827, %f782, %f764;
|
|
|
|
BB0_50:
|
|
and.b32 %r223, %r392, 2;
|
|
setp.eq.s32 %p37, %r223, 0;
|
|
@%p37 bra BB0_52;
|
|
|
|
mov.f32 %f765, 0f00000000;
|
|
mov.f32 %f340, 0fBF800000;
|
|
fma.rn.f32 %f828, %f828, %f340, %f765;
|
|
|
|
BB0_52:
|
|
mad.lo.s32 %r344, %r9, 1664525, 1013904223;
|
|
mad.lo.s32 %r372, %r344, 1664525, 1013904223;
|
|
max.f32 %f766, %f282, %f242;
|
|
mul.f32 %f349, %f56, %f822;
|
|
add.u64 %rd68, %SP, 0;
|
|
cvta.to.local.u64 %rd69, %rd68;
|
|
mul.f32 %f350, %f56, %f828;
|
|
mul.f32 %f351, %f13, %f350;
|
|
mul.f32 %f352, %f14, %f350;
|
|
mul.f32 %f353, %f15, %f350;
|
|
fma.rn.f32 %f354, %f22, %f349, %f351;
|
|
fma.rn.f32 %f355, %f21, %f349, %f352;
|
|
fma.rn.f32 %f356, %f20, %f349, %f353;
|
|
fma.rn.f32 %f344, %f785, %f55, %f354;
|
|
fma.rn.f32 %f345, %f786, %f55, %f355;
|
|
fma.rn.f32 %f346, %f787, %f55, %f356;
|
|
mov.u32 %r225, 0;
|
|
st.local.u32 [%rd69+8], %r225;
|
|
st.local.u32 [%rd69+4], %r225;
|
|
st.local.u32 [%rd69], %r225;
|
|
ld.global.u32 %r224, [root];
|
|
mov.f32 %f348, 0f6C4ECB8F;
|
|
// inline asm
|
|
call _rt_trace_64, (%r224, %f10, %f11, %f12, %f344, %f345, %f346, %r225, %f766, %f348, %rd68, %r112);
|
|
// inline asm
|
|
mul.f32 %f357, %f786, %f345;
|
|
fma.rn.f32 %f358, %f785, %f344, %f357;
|
|
fma.rn.f32 %f359, %f787, %f346, %f358;
|
|
mul.f32 %f360, %f359, 0f40800000;
|
|
cvt.sat.f32.f32 %f361, %f360;
|
|
ld.local.f32 %f362, [%rd69];
|
|
mul.f32 %f363, %f361, %f362;
|
|
ld.local.f32 %f364, [%rd69+4];
|
|
mul.f32 %f365, %f361, %f364;
|
|
ld.local.f32 %f366, [%rd69+8];
|
|
mul.f32 %f367, %f361, %f366;
|
|
fma.rn.f32 %f811, %f344, %f363, %f811;
|
|
fma.rn.f32 %f810, %f344, %f365, %f810;
|
|
fma.rn.f32 %f809, %f344, %f367, %f809;
|
|
fma.rn.f32 %f814, %f345, %f363, %f814;
|
|
fma.rn.f32 %f813, %f345, %f365, %f813;
|
|
fma.rn.f32 %f812, %f345, %f367, %f812;
|
|
fma.rn.f32 %f817, %f346, %f363, %f817;
|
|
fma.rn.f32 %f816, %f346, %f365, %f816;
|
|
fma.rn.f32 %f815, %f346, %f367, %f815;
|
|
add.f32 %f808, %f808, %f363;
|
|
add.f32 %f807, %f807, %f365;
|
|
add.f32 %f806, %f806, %f367;
|
|
cvt.sat.f32.f32 %f368, %f359;
|
|
fma.rn.f32 %f805, %f368, %f362, %f805;
|
|
fma.rn.f32 %f804, %f368, %f364, %f804;
|
|
fma.rn.f32 %f803, %f368, %f366, %f803;
|
|
add.s32 %r371, %r371, 1;
|
|
setp.lt.s32 %p38, %r371, %r1;
|
|
@%p38 bra BB0_6;
|
|
|
|
mad.lo.s32 %r346, %r9, 1664525, 1013904223;
|
|
mad.lo.s32 %r372, %r346, 1664525, 1013904223;
|
|
add.s32 %r369, %r369, 1;
|
|
setp.lt.s32 %p39, %r369, %r1;
|
|
@%p39 bra BB0_5;
|
|
|
|
BB0_54:
|
|
mul.lo.s32 %r227, %r1, %r1;
|
|
cvt.rn.f32.s32 %f369, %r227;
|
|
rcp.rn.f32 %f370, %f369;
|
|
cvt.rn.f32.u32 %f371, %r4;
|
|
cvt.rn.f32.u32 %f372, %r3;
|
|
tex.2d.v4.f32.f32 {%f373, %f374, %f375, %f376}, [albedoTex, {%f372, %f371}];
|
|
mul.f32 %f123, %f808, %f370;
|
|
mul.f32 %f124, %f807, %f370;
|
|
mul.f32 %f125, %f806, %f370;
|
|
mul.f32 %f126, %f811, %f370;
|
|
mul.f32 %f127, %f810, %f370;
|
|
mul.f32 %f128, %f809, %f370;
|
|
mul.f32 %f129, %f814, %f370;
|
|
mul.f32 %f130, %f813, %f370;
|
|
mul.f32 %f131, %f812, %f370;
|
|
mul.f32 %f132, %f817, %f370;
|
|
mul.f32 %f133, %f816, %f370;
|
|
mul.f32 %f134, %f815, %f370;
|
|
mul.f32 %f377, %f805, %f370;
|
|
mul.f32 %f378, %f804, %f370;
|
|
mul.f32 %f379, %f803, %f370;
|
|
fma.rn.f32 %f380, %f805, %f370, %f377;
|
|
fma.rn.f32 %f381, %f804, %f370, %f378;
|
|
fma.rn.f32 %f382, %f803, %f370, %f379;
|
|
mul.f32 %f135, %f380, %f373;
|
|
mul.f32 %f136, %f381, %f374;
|
|
mul.f32 %f137, %f382, %f375;
|
|
add.f32 %f138, %f209, %f135;
|
|
add.f32 %f139, %f210, %f136;
|
|
add.f32 %f140, %f211, %f137;
|
|
ld.global.u32 %r394, [imageEnabled];
|
|
and.b32 %r228, %r394, 1;
|
|
setp.eq.b32 %p40, %r228, 1;
|
|
@!%p40 bra BB0_89;
|
|
bra.uni BB0_55;
|
|
|
|
BB0_55:
|
|
abs.f32 %f142, %f138;
|
|
setp.lt.f32 %p41, %f142, 0f00800000;
|
|
mul.f32 %f388, %f142, 0f4B800000;
|
|
selp.f32 %f389, 0fC3170000, 0fC2FE0000, %p41;
|
|
selp.f32 %f390, %f388, %f142, %p41;
|
|
mov.b32 %r229, %f390;
|
|
and.b32 %r230, %r229, 8388607;
|
|
or.b32 %r231, %r230, 1065353216;
|
|
mov.b32 %f391, %r231;
|
|
shr.u32 %r232, %r229, 23;
|
|
cvt.rn.f32.u32 %f392, %r232;
|
|
add.f32 %f393, %f389, %f392;
|
|
setp.gt.f32 %p42, %f391, 0f3FB504F3;
|
|
mul.f32 %f394, %f391, 0f3F000000;
|
|
add.f32 %f395, %f393, 0f3F800000;
|
|
selp.f32 %f396, %f394, %f391, %p42;
|
|
selp.f32 %f397, %f395, %f393, %p42;
|
|
add.f32 %f398, %f396, 0fBF800000;
|
|
add.f32 %f384, %f396, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f383,%f384;
|
|
// inline asm
|
|
add.f32 %f399, %f398, %f398;
|
|
mul.f32 %f400, %f383, %f399;
|
|
mul.f32 %f401, %f400, %f400;
|
|
mov.f32 %f402, 0f3C4CAF63;
|
|
mov.f32 %f403, 0f3B18F0FE;
|
|
fma.rn.f32 %f404, %f403, %f401, %f402;
|
|
mov.f32 %f405, 0f3DAAAABD;
|
|
fma.rn.f32 %f406, %f404, %f401, %f405;
|
|
mul.rn.f32 %f407, %f406, %f401;
|
|
mul.rn.f32 %f408, %f407, %f400;
|
|
sub.f32 %f409, %f398, %f400;
|
|
neg.f32 %f410, %f400;
|
|
add.f32 %f411, %f409, %f409;
|
|
fma.rn.f32 %f412, %f410, %f398, %f411;
|
|
mul.rn.f32 %f413, %f383, %f412;
|
|
add.f32 %f414, %f408, %f400;
|
|
sub.f32 %f415, %f400, %f414;
|
|
add.f32 %f416, %f408, %f415;
|
|
add.f32 %f417, %f413, %f416;
|
|
add.f32 %f418, %f414, %f417;
|
|
sub.f32 %f419, %f414, %f418;
|
|
add.f32 %f420, %f417, %f419;
|
|
mov.f32 %f421, 0f3F317200;
|
|
mul.rn.f32 %f422, %f397, %f421;
|
|
mov.f32 %f423, 0f35BFBE8E;
|
|
mul.rn.f32 %f424, %f397, %f423;
|
|
add.f32 %f425, %f422, %f418;
|
|
sub.f32 %f426, %f422, %f425;
|
|
add.f32 %f427, %f418, %f426;
|
|
add.f32 %f428, %f420, %f427;
|
|
add.f32 %f429, %f424, %f428;
|
|
add.f32 %f430, %f425, %f429;
|
|
sub.f32 %f431, %f425, %f430;
|
|
add.f32 %f432, %f429, %f431;
|
|
mov.f32 %f433, 0f3EE66666;
|
|
mul.rn.f32 %f434, %f433, %f430;
|
|
neg.f32 %f435, %f434;
|
|
fma.rn.f32 %f436, %f433, %f430, %f435;
|
|
fma.rn.f32 %f437, %f433, %f432, %f436;
|
|
mov.f32 %f438, 0f00000000;
|
|
fma.rn.f32 %f439, %f438, %f430, %f437;
|
|
add.rn.f32 %f440, %f434, %f439;
|
|
neg.f32 %f441, %f440;
|
|
add.rn.f32 %f442, %f434, %f441;
|
|
add.rn.f32 %f443, %f442, %f439;
|
|
mov.b32 %r233, %f440;
|
|
setp.eq.s32 %p43, %r233, 1118925336;
|
|
add.s32 %r234, %r233, -1;
|
|
mov.b32 %f444, %r234;
|
|
add.f32 %f445, %f443, 0f37000000;
|
|
selp.f32 %f446, %f444, %f440, %p43;
|
|
selp.f32 %f143, %f445, %f443, %p43;
|
|
mul.f32 %f447, %f446, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f448, %f447;
|
|
mov.f32 %f449, 0fBF317200;
|
|
fma.rn.f32 %f450, %f448, %f449, %f446;
|
|
mov.f32 %f451, 0fB5BFBE8E;
|
|
fma.rn.f32 %f452, %f448, %f451, %f450;
|
|
mul.f32 %f453, %f452, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f454, %f453;
|
|
add.f32 %f455, %f448, 0f00000000;
|
|
ex2.approx.f32 %f456, %f455;
|
|
mul.f32 %f457, %f454, %f456;
|
|
setp.lt.f32 %p44, %f446, 0fC2D20000;
|
|
selp.f32 %f458, 0f00000000, %f457, %p44;
|
|
setp.gt.f32 %p45, %f446, 0f42D20000;
|
|
selp.f32 %f845, 0f7F800000, %f458, %p45;
|
|
setp.eq.f32 %p46, %f845, 0f7F800000;
|
|
@%p46 bra BB0_57;
|
|
|
|
fma.rn.f32 %f845, %f845, %f143, %f845;
|
|
|
|
BB0_57:
|
|
mov.f32 %f730, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f729, %f730;
|
|
fma.rn.f32 %f728, %f729, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f727, %f728;
|
|
setp.lt.f32 %p47, %f138, 0f00000000;
|
|
setp.eq.f32 %p48, %f727, 0f3F800000;
|
|
and.pred %p1, %p47, %p48;
|
|
mov.b32 %r235, %f845;
|
|
xor.b32 %r236, %r235, -2147483648;
|
|
mov.b32 %f459, %r236;
|
|
selp.f32 %f847, %f459, %f845, %p1;
|
|
setp.eq.f32 %p49, %f138, 0f00000000;
|
|
@%p49 bra BB0_60;
|
|
bra.uni BB0_58;
|
|
|
|
BB0_60:
|
|
add.f32 %f462, %f138, %f138;
|
|
selp.f32 %f847, %f462, 0f00000000, %p48;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_113:
|
|
mov.u64 %rd212, image_RNM0;
|
|
cvta.global.u64 %rd207, %rd212;
|
|
mov.u32 %r310, 8;
|
|
mov.u64 %rd211, 0;
|
|
// inline asm
|
|
call (%rd206), _rt_buffer_get_64, (%rd207, %r94, %r310, %rd18, %rd19, %rd211, %rd211);
|
|
// inline asm
|
|
mov.f32 %f705, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f705;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs105, 0;
|
|
st.v4.u16 [%rd206], {%rs104, %rs104, %rs104, %rs105};
|
|
|
|
BB0_114:
|
|
ld.global.u32 %r311, [additive];
|
|
setp.eq.s32 %p99, %r311, 0;
|
|
@%p99 bra BB0_116;
|
|
|
|
mov.u64 %rd225, image_RNM1;
|
|
cvta.global.u64 %rd214, %rd225;
|
|
mov.u32 %r315, 8;
|
|
mov.u64 %rd224, 0;
|
|
// inline asm
|
|
call (%rd213), _rt_buffer_get_64, (%rd214, %r94, %r315, %rd18, %rd19, %rd224, %rd224);
|
|
// inline asm
|
|
ld.v4.u16 {%rs112, %rs113, %rs114, %rs115}, [%rd213];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f706, %rs112;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f707, %rs113;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f708, %rs114;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd219), _rt_buffer_get_64, (%rd214, %r94, %r315, %rd18, %rd19, %rd224, %rd224);
|
|
// inline asm
|
|
add.f32 %f709, %f706, 0f00000000;
|
|
add.f32 %f710, %f707, 0f00000000;
|
|
add.f32 %f711, %f708, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f711;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs110, %f710;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs109, %f709;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs116, 0;
|
|
st.v4.u16 [%rd219], {%rs109, %rs110, %rs111, %rs116};
|
|
bra.uni BB0_117;
|
|
|
|
BB0_116:
|
|
mov.u64 %rd232, image_RNM1;
|
|
cvta.global.u64 %rd227, %rd232;
|
|
mov.u32 %r317, 8;
|
|
mov.u64 %rd231, 0;
|
|
// inline asm
|
|
call (%rd226), _rt_buffer_get_64, (%rd227, %r94, %r317, %rd18, %rd19, %rd231, %rd231);
|
|
// inline asm
|
|
mov.f32 %f712, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs117, %f712;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs118, 0;
|
|
st.v4.u16 [%rd226], {%rs117, %rs117, %rs117, %rs118};
|
|
|
|
BB0_117:
|
|
ld.global.u32 %r318, [additive];
|
|
setp.eq.s32 %p100, %r318, 0;
|
|
@%p100 bra BB0_119;
|
|
|
|
mov.u64 %rd245, image_RNM2;
|
|
cvta.global.u64 %rd234, %rd245;
|
|
mov.u32 %r322, 8;
|
|
mov.u64 %rd244, 0;
|
|
// inline asm
|
|
call (%rd233), _rt_buffer_get_64, (%rd234, %r94, %r322, %rd18, %rd19, %rd244, %rd244);
|
|
// inline asm
|
|
ld.v4.u16 {%rs125, %rs126, %rs127, %rs128}, [%rd233];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f713, %rs125;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f714, %rs126;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f715, %rs127;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd239), _rt_buffer_get_64, (%rd234, %r94, %r322, %rd18, %rd19, %rd244, %rd244);
|
|
// inline asm
|
|
add.f32 %f716, %f713, 0f00000000;
|
|
add.f32 %f717, %f714, 0f00000000;
|
|
add.f32 %f718, %f715, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f718;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs123, %f717;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs122, %f716;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs129, 0;
|
|
st.v4.u16 [%rd239], {%rs122, %rs123, %rs124, %rs129};
|
|
bra.uni BB0_120;
|
|
|
|
BB0_119:
|
|
mov.u64 %rd252, image_RNM2;
|
|
cvta.global.u64 %rd247, %rd252;
|
|
mov.u32 %r324, 8;
|
|
mov.u64 %rd251, 0;
|
|
// inline asm
|
|
call (%rd246), _rt_buffer_get_64, (%rd247, %r94, %r324, %rd18, %rd19, %rd251, %rd251);
|
|
// inline asm
|
|
mov.f32 %f719, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs130, %f719;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs131, 0;
|
|
st.v4.u16 [%rd246], {%rs130, %rs130, %rs130, %rs131};
|
|
|
|
BB0_120:
|
|
ld.global.u32 %r325, [additive];
|
|
setp.eq.s32 %p101, %r325, 0;
|
|
@%p101 bra BB0_122;
|
|
|
|
mov.u64 %rd265, image_RNM3;
|
|
cvta.global.u64 %rd254, %rd265;
|
|
mov.u32 %r329, 8;
|
|
mov.u64 %rd264, 0;
|
|
// inline asm
|
|
call (%rd253), _rt_buffer_get_64, (%rd254, %r94, %r329, %rd18, %rd19, %rd264, %rd264);
|
|
// inline asm
|
|
ld.v4.u16 {%rs138, %rs139, %rs140, %rs141}, [%rd253];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f720, %rs138;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f721, %rs139;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f722, %rs140;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd259), _rt_buffer_get_64, (%rd254, %r94, %r329, %rd18, %rd19, %rd264, %rd264);
|
|
// inline asm
|
|
add.f32 %f723, %f720, 0f00000000;
|
|
add.f32 %f724, %f721, 0f00000000;
|
|
add.f32 %f725, %f722, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f725;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs136, %f724;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f723;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs142, 0;
|
|
st.v4.u16 [%rd259], {%rs135, %rs136, %rs137, %rs142};
|
|
bra.uni BB0_123;
|
|
|
|
BB0_122:
|
|
mov.u64 %rd272, image_RNM3;
|
|
cvta.global.u64 %rd267, %rd272;
|
|
mov.u32 %r331, 8;
|
|
mov.u64 %rd271, 0;
|
|
// inline asm
|
|
call (%rd266), _rt_buffer_get_64, (%rd267, %r94, %r331, %rd18, %rd19, %rd271, %rd271);
|
|
// inline asm
|
|
mov.f32 %f726, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs143, %f726;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs144, 0;
|
|
st.v4.u16 [%rd266], {%rs143, %rs143, %rs143, %rs144};
|
|
bra.uni BB0_123;
|
|
|
|
BB0_58:
|
|
setp.geu.f32 %p50, %f138, 0f00000000;
|
|
@%p50 bra BB0_61;
|
|
|
|
mov.f32 %f754, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f461, %f754;
|
|
setp.neu.f32 %p51, %f461, 0f3EE66666;
|
|
selp.f32 %f847, 0f7FFFFFFF, %f847, %p51;
|
|
|
|
BB0_61:
|
|
abs.f32 %f731, %f138;
|
|
add.f32 %f463, %f731, 0f3EE66666;
|
|
mov.b32 %r237, %f463;
|
|
setp.lt.s32 %p53, %r237, 2139095040;
|
|
@%p53 bra BB0_66;
|
|
|
|
abs.f32 %f752, %f138;
|
|
setp.gtu.f32 %p54, %f752, 0f7F800000;
|
|
@%p54 bra BB0_65;
|
|
bra.uni BB0_63;
|
|
|
|
BB0_65:
|
|
add.f32 %f847, %f138, 0f3EE66666;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_63:
|
|
abs.f32 %f753, %f138;
|
|
setp.neu.f32 %p55, %f753, 0f7F800000;
|
|
@%p55 bra BB0_66;
|
|
|
|
selp.f32 %f847, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_66:
|
|
mov.f32 %f740, 0fB5BFBE8E;
|
|
mov.f32 %f739, 0fBF317200;
|
|
mov.f32 %f738, 0f00000000;
|
|
mov.f32 %f737, 0f35BFBE8E;
|
|
mov.f32 %f736, 0f3F317200;
|
|
mov.f32 %f735, 0f3DAAAABD;
|
|
mov.f32 %f734, 0f3C4CAF63;
|
|
mov.f32 %f733, 0f3B18F0FE;
|
|
mov.f32 %f732, 0f3EE66666;
|
|
setp.eq.f32 %p56, %f138, 0f3F800000;
|
|
selp.f32 %f154, 0f3F800000, %f847, %p56;
|
|
abs.f32 %f155, %f139;
|
|
setp.lt.f32 %p57, %f155, 0f00800000;
|
|
mul.f32 %f466, %f155, 0f4B800000;
|
|
selp.f32 %f467, 0fC3170000, 0fC2FE0000, %p57;
|
|
selp.f32 %f468, %f466, %f155, %p57;
|
|
mov.b32 %r238, %f468;
|
|
and.b32 %r239, %r238, 8388607;
|
|
or.b32 %r240, %r239, 1065353216;
|
|
mov.b32 %f469, %r240;
|
|
shr.u32 %r241, %r238, 23;
|
|
cvt.rn.f32.u32 %f470, %r241;
|
|
add.f32 %f471, %f467, %f470;
|
|
setp.gt.f32 %p58, %f469, 0f3FB504F3;
|
|
mul.f32 %f472, %f469, 0f3F000000;
|
|
add.f32 %f473, %f471, 0f3F800000;
|
|
selp.f32 %f474, %f472, %f469, %p58;
|
|
selp.f32 %f475, %f473, %f471, %p58;
|
|
add.f32 %f476, %f474, 0fBF800000;
|
|
add.f32 %f465, %f474, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f464,%f465;
|
|
// inline asm
|
|
add.f32 %f477, %f476, %f476;
|
|
mul.f32 %f478, %f464, %f477;
|
|
mul.f32 %f479, %f478, %f478;
|
|
fma.rn.f32 %f482, %f733, %f479, %f734;
|
|
fma.rn.f32 %f484, %f482, %f479, %f735;
|
|
mul.rn.f32 %f485, %f484, %f479;
|
|
mul.rn.f32 %f486, %f485, %f478;
|
|
sub.f32 %f487, %f476, %f478;
|
|
neg.f32 %f488, %f478;
|
|
add.f32 %f489, %f487, %f487;
|
|
fma.rn.f32 %f490, %f488, %f476, %f489;
|
|
mul.rn.f32 %f491, %f464, %f490;
|
|
add.f32 %f492, %f486, %f478;
|
|
sub.f32 %f493, %f478, %f492;
|
|
add.f32 %f494, %f486, %f493;
|
|
add.f32 %f495, %f491, %f494;
|
|
add.f32 %f496, %f492, %f495;
|
|
sub.f32 %f497, %f492, %f496;
|
|
add.f32 %f498, %f495, %f497;
|
|
mul.rn.f32 %f500, %f475, %f736;
|
|
mul.rn.f32 %f502, %f475, %f737;
|
|
add.f32 %f503, %f500, %f496;
|
|
sub.f32 %f504, %f500, %f503;
|
|
add.f32 %f505, %f496, %f504;
|
|
add.f32 %f506, %f498, %f505;
|
|
add.f32 %f507, %f502, %f506;
|
|
add.f32 %f508, %f503, %f507;
|
|
sub.f32 %f509, %f503, %f508;
|
|
add.f32 %f510, %f507, %f509;
|
|
mul.rn.f32 %f512, %f732, %f508;
|
|
neg.f32 %f513, %f512;
|
|
fma.rn.f32 %f514, %f732, %f508, %f513;
|
|
fma.rn.f32 %f515, %f732, %f510, %f514;
|
|
fma.rn.f32 %f517, %f738, %f508, %f515;
|
|
add.rn.f32 %f518, %f512, %f517;
|
|
neg.f32 %f519, %f518;
|
|
add.rn.f32 %f520, %f512, %f519;
|
|
add.rn.f32 %f521, %f520, %f517;
|
|
mov.b32 %r242, %f518;
|
|
setp.eq.s32 %p59, %r242, 1118925336;
|
|
add.s32 %r243, %r242, -1;
|
|
mov.b32 %f522, %r243;
|
|
add.f32 %f523, %f521, 0f37000000;
|
|
selp.f32 %f524, %f522, %f518, %p59;
|
|
selp.f32 %f156, %f523, %f521, %p59;
|
|
mul.f32 %f525, %f524, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f526, %f525;
|
|
fma.rn.f32 %f528, %f526, %f739, %f524;
|
|
fma.rn.f32 %f530, %f526, %f740, %f528;
|
|
mul.f32 %f531, %f530, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f532, %f531;
|
|
add.f32 %f533, %f526, 0f00000000;
|
|
ex2.approx.f32 %f534, %f533;
|
|
mul.f32 %f535, %f532, %f534;
|
|
setp.lt.f32 %p60, %f524, 0fC2D20000;
|
|
selp.f32 %f536, 0f00000000, %f535, %p60;
|
|
setp.gt.f32 %p61, %f524, 0f42D20000;
|
|
selp.f32 %f848, 0f7F800000, %f536, %p61;
|
|
setp.eq.f32 %p62, %f848, 0f7F800000;
|
|
@%p62 bra BB0_68;
|
|
|
|
fma.rn.f32 %f848, %f848, %f156, %f848;
|
|
|
|
BB0_68:
|
|
setp.lt.f32 %p63, %f139, 0f00000000;
|
|
and.pred %p2, %p63, %p48;
|
|
mov.b32 %r244, %f848;
|
|
xor.b32 %r245, %r244, -2147483648;
|
|
mov.b32 %f537, %r245;
|
|
selp.f32 %f850, %f537, %f848, %p2;
|
|
setp.eq.f32 %p65, %f139, 0f00000000;
|
|
@%p65 bra BB0_71;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_71:
|
|
add.f32 %f540, %f139, %f139;
|
|
selp.f32 %f850, %f540, 0f00000000, %p48;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_69:
|
|
setp.geu.f32 %p66, %f139, 0f00000000;
|
|
@%p66 bra BB0_72;
|
|
|
|
mov.f32 %f751, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f539, %f751;
|
|
setp.neu.f32 %p67, %f539, 0f3EE66666;
|
|
selp.f32 %f850, 0f7FFFFFFF, %f850, %p67;
|
|
|
|
BB0_72:
|
|
abs.f32 %f755, %f139;
|
|
add.f32 %f541, %f755, 0f3EE66666;
|
|
mov.b32 %r246, %f541;
|
|
setp.lt.s32 %p69, %r246, 2139095040;
|
|
@%p69 bra BB0_77;
|
|
|
|
abs.f32 %f756, %f139;
|
|
setp.gtu.f32 %p70, %f756, 0f7F800000;
|
|
@%p70 bra BB0_76;
|
|
bra.uni BB0_74;
|
|
|
|
BB0_76:
|
|
add.f32 %f850, %f139, 0f3EE66666;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_74:
|
|
abs.f32 %f757, %f139;
|
|
setp.neu.f32 %p71, %f757, 0f7F800000;
|
|
@%p71 bra BB0_77;
|
|
|
|
selp.f32 %f850, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_77:
|
|
mov.f32 %f749, 0fB5BFBE8E;
|
|
mov.f32 %f748, 0fBF317200;
|
|
mov.f32 %f747, 0f00000000;
|
|
mov.f32 %f746, 0f35BFBE8E;
|
|
mov.f32 %f745, 0f3F317200;
|
|
mov.f32 %f744, 0f3DAAAABD;
|
|
mov.f32 %f743, 0f3C4CAF63;
|
|
mov.f32 %f742, 0f3B18F0FE;
|
|
mov.f32 %f741, 0f3EE66666;
|
|
setp.eq.f32 %p72, %f139, 0f3F800000;
|
|
selp.f32 %f167, 0f3F800000, %f850, %p72;
|
|
abs.f32 %f168, %f140;
|
|
setp.lt.f32 %p73, %f168, 0f00800000;
|
|
mul.f32 %f544, %f168, 0f4B800000;
|
|
selp.f32 %f545, 0fC3170000, 0fC2FE0000, %p73;
|
|
selp.f32 %f546, %f544, %f168, %p73;
|
|
mov.b32 %r247, %f546;
|
|
and.b32 %r248, %r247, 8388607;
|
|
or.b32 %r249, %r248, 1065353216;
|
|
mov.b32 %f547, %r249;
|
|
shr.u32 %r250, %r247, 23;
|
|
cvt.rn.f32.u32 %f548, %r250;
|
|
add.f32 %f549, %f545, %f548;
|
|
setp.gt.f32 %p74, %f547, 0f3FB504F3;
|
|
mul.f32 %f550, %f547, 0f3F000000;
|
|
add.f32 %f551, %f549, 0f3F800000;
|
|
selp.f32 %f552, %f550, %f547, %p74;
|
|
selp.f32 %f553, %f551, %f549, %p74;
|
|
add.f32 %f554, %f552, 0fBF800000;
|
|
add.f32 %f543, %f552, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f542,%f543;
|
|
// inline asm
|
|
add.f32 %f555, %f554, %f554;
|
|
mul.f32 %f556, %f542, %f555;
|
|
mul.f32 %f557, %f556, %f556;
|
|
fma.rn.f32 %f560, %f742, %f557, %f743;
|
|
fma.rn.f32 %f562, %f560, %f557, %f744;
|
|
mul.rn.f32 %f563, %f562, %f557;
|
|
mul.rn.f32 %f564, %f563, %f556;
|
|
sub.f32 %f565, %f554, %f556;
|
|
neg.f32 %f566, %f556;
|
|
add.f32 %f567, %f565, %f565;
|
|
fma.rn.f32 %f568, %f566, %f554, %f567;
|
|
mul.rn.f32 %f569, %f542, %f568;
|
|
add.f32 %f570, %f564, %f556;
|
|
sub.f32 %f571, %f556, %f570;
|
|
add.f32 %f572, %f564, %f571;
|
|
add.f32 %f573, %f569, %f572;
|
|
add.f32 %f574, %f570, %f573;
|
|
sub.f32 %f575, %f570, %f574;
|
|
add.f32 %f576, %f573, %f575;
|
|
mul.rn.f32 %f578, %f553, %f745;
|
|
mul.rn.f32 %f580, %f553, %f746;
|
|
add.f32 %f581, %f578, %f574;
|
|
sub.f32 %f582, %f578, %f581;
|
|
add.f32 %f583, %f574, %f582;
|
|
add.f32 %f584, %f576, %f583;
|
|
add.f32 %f585, %f580, %f584;
|
|
add.f32 %f586, %f581, %f585;
|
|
sub.f32 %f587, %f581, %f586;
|
|
add.f32 %f588, %f585, %f587;
|
|
mul.rn.f32 %f590, %f741, %f586;
|
|
neg.f32 %f591, %f590;
|
|
fma.rn.f32 %f592, %f741, %f586, %f591;
|
|
fma.rn.f32 %f593, %f741, %f588, %f592;
|
|
fma.rn.f32 %f595, %f747, %f586, %f593;
|
|
add.rn.f32 %f596, %f590, %f595;
|
|
neg.f32 %f597, %f596;
|
|
add.rn.f32 %f598, %f590, %f597;
|
|
add.rn.f32 %f599, %f598, %f595;
|
|
mov.b32 %r251, %f596;
|
|
setp.eq.s32 %p75, %r251, 1118925336;
|
|
add.s32 %r252, %r251, -1;
|
|
mov.b32 %f600, %r252;
|
|
add.f32 %f601, %f599, 0f37000000;
|
|
selp.f32 %f602, %f600, %f596, %p75;
|
|
selp.f32 %f169, %f601, %f599, %p75;
|
|
mul.f32 %f603, %f602, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f604, %f603;
|
|
fma.rn.f32 %f606, %f604, %f748, %f602;
|
|
fma.rn.f32 %f608, %f604, %f749, %f606;
|
|
mul.f32 %f609, %f608, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f610, %f609;
|
|
add.f32 %f611, %f604, 0f00000000;
|
|
ex2.approx.f32 %f612, %f611;
|
|
mul.f32 %f613, %f610, %f612;
|
|
setp.lt.f32 %p76, %f602, 0fC2D20000;
|
|
selp.f32 %f614, 0f00000000, %f613, %p76;
|
|
setp.gt.f32 %p77, %f602, 0f42D20000;
|
|
selp.f32 %f851, 0f7F800000, %f614, %p77;
|
|
setp.eq.f32 %p78, %f851, 0f7F800000;
|
|
@%p78 bra BB0_79;
|
|
|
|
fma.rn.f32 %f851, %f851, %f169, %f851;
|
|
|
|
BB0_79:
|
|
setp.lt.f32 %p79, %f140, 0f00000000;
|
|
and.pred %p3, %p79, %p48;
|
|
mov.b32 %r253, %f851;
|
|
xor.b32 %r254, %r253, -2147483648;
|
|
mov.b32 %f615, %r254;
|
|
selp.f32 %f853, %f615, %f851, %p3;
|
|
setp.eq.f32 %p81, %f140, 0f00000000;
|
|
@%p81 bra BB0_82;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_82:
|
|
add.f32 %f618, %f140, %f140;
|
|
selp.f32 %f853, %f618, 0f00000000, %p48;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_80:
|
|
setp.geu.f32 %p82, %f140, 0f00000000;
|
|
@%p82 bra BB0_83;
|
|
|
|
mov.f32 %f750, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f617, %f750;
|
|
setp.neu.f32 %p83, %f617, 0f3EE66666;
|
|
selp.f32 %f853, 0f7FFFFFFF, %f853, %p83;
|
|
|
|
BB0_83:
|
|
abs.f32 %f777, %f140;
|
|
add.f32 %f619, %f777, 0f3EE66666;
|
|
mov.b32 %r255, %f619;
|
|
setp.lt.s32 %p85, %r255, 2139095040;
|
|
@%p85 bra BB0_88;
|
|
|
|
abs.f32 %f778, %f140;
|
|
setp.gtu.f32 %p86, %f778, 0f7F800000;
|
|
@%p86 bra BB0_87;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_87:
|
|
add.f32 %f853, %f140, 0f3EE66666;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_85:
|
|
abs.f32 %f779, %f140;
|
|
setp.neu.f32 %p87, %f779, 0f7F800000;
|
|
@%p87 bra BB0_88;
|
|
|
|
selp.f32 %f853, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_88:
|
|
mov.u32 %r332, 4;
|
|
setp.eq.f32 %p88, %f140, 0f3F800000;
|
|
selp.f32 %f620, 0f3F800000, %f853, %p88;
|
|
cvt.u64.u32 %rd74, %r4;
|
|
cvt.u64.u32 %rd73, %r3;
|
|
mov.u64 %rd77, image;
|
|
cvta.global.u64 %rd72, %rd77;
|
|
// inline asm
|
|
call (%rd71), _rt_buffer_get_64, (%rd72, %r94, %r332, %rd73, %rd74, %rd25, %rd25);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f621, %f620;
|
|
mul.f32 %f622, %f621, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r258, %f622;
|
|
cvt.sat.f32.f32 %f623, %f167;
|
|
mul.f32 %f624, %f623, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r259, %f624;
|
|
cvt.sat.f32.f32 %f625, %f154;
|
|
mul.f32 %f626, %f625, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r260, %f626;
|
|
cvt.u16.u32 %rs20, %r258;
|
|
cvt.u16.u32 %rs21, %r260;
|
|
cvt.u16.u32 %rs22, %r259;
|
|
mov.u16 %rs23, 255;
|
|
st.v4.u8 [%rd71], {%rs20, %rs22, %rs21, %rs23};
|
|
ld.global.u32 %r394, [imageEnabled];
|
|
|
|
BB0_89:
|
|
and.b32 %r261, %r394, 4;
|
|
setp.eq.s32 %p89, %r261, 0;
|
|
@%p89 bra BB0_91;
|
|
|
|
mov.u32 %r333, 8;
|
|
cvt.u64.u32 %rd80, %r3;
|
|
cvt.u64.u32 %rd81, %r4;
|
|
mov.u64 %rd84, image_HDR;
|
|
cvta.global.u64 %rd79, %rd84;
|
|
// inline asm
|
|
call (%rd78), _rt_buffer_get_64, (%rd79, %r94, %r333, %rd80, %rd81, %rd25, %rd25);
|
|
// inline asm
|
|
mov.f32 %f630, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f630;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f140;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f139;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f138;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd78], {%rs24, %rs25, %rs26, %rs27};
|
|
ld.global.u32 %r394, [imageEnabled];
|
|
|
|
BB0_91:
|
|
and.b32 %r264, %r394, 16;
|
|
setp.eq.s32 %p90, %r264, 0;
|
|
@%p90 bra BB0_93;
|
|
|
|
mov.u32 %r334, 8;
|
|
cvt.u64.u32 %rd88, %r4;
|
|
cvt.u64.u32 %rd87, %r3;
|
|
mov.u64 %rd91, image_HDR2;
|
|
cvta.global.u64 %rd86, %rd91;
|
|
// inline asm
|
|
call (%rd85), _rt_buffer_get_64, (%rd86, %r94, %r334, %rd87, %rd88, %rd25, %rd25);
|
|
// inline asm
|
|
mov.f32 %f634, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f634;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f137;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f136;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f135;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd85], {%rs28, %rs29, %rs30, %rs31};
|
|
|
|
BB0_93:
|
|
cvt.u64.u32 %rd16, %r3;
|
|
cvt.u64.u32 %rd17, %r4;
|
|
mul.f32 %f180, %f123, 0f3F000000;
|
|
mul.f32 %f181, %f124, 0f3F000000;
|
|
mul.f32 %f182, %f125, 0f3F000000;
|
|
ld.global.u32 %r267, [additive];
|
|
setp.eq.s32 %p91, %r267, 0;
|
|
mov.f32 %f635, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f635;}
|
|
|
|
// inline asm
|
|
@%p91 bra BB0_95;
|
|
|
|
mov.u32 %r335, 8;
|
|
mov.u64 %rd104, image_RNM0;
|
|
cvta.global.u64 %rd93, %rd104;
|
|
// inline asm
|
|
call (%rd92), _rt_buffer_get_64, (%rd93, %r94, %r335, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs39, %rs40, %rs41, %rs42}, [%rd92];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f636, %rs39;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f637, %rs40;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f638, %rs41;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd98), _rt_buffer_get_64, (%rd93, %r94, %r335, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f639, %f180, %f636;
|
|
add.f32 %f640, %f181, %f637;
|
|
add.f32 %f641, %f182, %f638;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs38, %f641;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f640;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f639;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd98], {%rs36, %rs37, %rs38, %rs32};
|
|
bra.uni BB0_96;
|
|
|
|
BB0_95:
|
|
mov.u32 %r342, 8;
|
|
mov.u64 %rd111, image_RNM0;
|
|
cvta.global.u64 %rd106, %rd111;
|
|
// inline asm
|
|
call (%rd105), _rt_buffer_get_64, (%rd106, %r94, %r342, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs45, %f182;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs44, %f181;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f180;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd105], {%rs43, %rs44, %rs45, %rs32};
|
|
|
|
BB0_96:
|
|
mov.f32 %f646, 0f34000000;
|
|
max.f32 %f647, %f180, %f646;
|
|
mul.f32 %f648, %f126, 0f3F000000;
|
|
div.rn.f32 %f649, %f648, %f647;
|
|
max.f32 %f650, %f181, %f646;
|
|
mul.f32 %f651, %f127, 0f3F000000;
|
|
div.rn.f32 %f652, %f651, %f650;
|
|
max.f32 %f653, %f182, %f646;
|
|
mul.f32 %f654, %f128, 0f3F000000;
|
|
div.rn.f32 %f655, %f654, %f653;
|
|
fma.rn.f32 %f183, %f649, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f184, %f652, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f185, %f655, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f656, %f129, 0f3F000000;
|
|
div.rn.f32 %f657, %f656, %f647;
|
|
mul.f32 %f658, %f130, 0f3F000000;
|
|
div.rn.f32 %f659, %f658, %f650;
|
|
mul.f32 %f660, %f131, 0f3F000000;
|
|
div.rn.f32 %f661, %f660, %f653;
|
|
fma.rn.f32 %f186, %f657, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f187, %f659, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f188, %f661, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f662, %f132, 0f3F000000;
|
|
div.rn.f32 %f663, %f662, %f647;
|
|
mul.f32 %f664, %f133, 0f3F000000;
|
|
div.rn.f32 %f665, %f664, %f650;
|
|
mul.f32 %f666, %f134, 0f3F000000;
|
|
div.rn.f32 %f667, %f666, %f653;
|
|
fma.rn.f32 %f189, %f663, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f190, %f665, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f191, %f667, 0f3F000000, 0f3F000000;
|
|
ld.global.u32 %r274, [additive];
|
|
setp.eq.s32 %p92, %r274, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f635;}
|
|
|
|
// inline asm
|
|
@%p92 bra BB0_98;
|
|
|
|
mov.u32 %r336, 8;
|
|
mov.u64 %rd124, image_RNM1;
|
|
cvta.global.u64 %rd113, %rd124;
|
|
// inline asm
|
|
call (%rd112), _rt_buffer_get_64, (%rd113, %r94, %r336, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs53, %rs54, %rs55, %rs56}, [%rd112];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f668, %rs53;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f669, %rs54;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f670, %rs55;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd118), _rt_buffer_get_64, (%rd113, %r94, %r336, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f671, %f183, %f668;
|
|
add.f32 %f672, %f184, %f669;
|
|
add.f32 %f673, %f185, %f670;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f673;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f672;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f671;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd118], {%rs50, %rs51, %rs52, %rs46};
|
|
bra.uni BB0_99;
|
|
|
|
BB0_98:
|
|
mov.u32 %r341, 8;
|
|
mov.u64 %rd131, image_RNM1;
|
|
cvta.global.u64 %rd126, %rd131;
|
|
// inline asm
|
|
call (%rd125), _rt_buffer_get_64, (%rd126, %r94, %r341, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f185;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f184;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f183;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd125], {%rs57, %rs58, %rs59, %rs46};
|
|
|
|
BB0_99:
|
|
ld.global.u32 %r281, [additive];
|
|
setp.eq.s32 %p93, %r281, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f635;}
|
|
|
|
// inline asm
|
|
@%p93 bra BB0_101;
|
|
|
|
mov.u32 %r337, 8;
|
|
mov.u64 %rd144, image_RNM2;
|
|
cvta.global.u64 %rd133, %rd144;
|
|
// inline asm
|
|
call (%rd132), _rt_buffer_get_64, (%rd133, %r94, %r337, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs67, %rs68, %rs69, %rs70}, [%rd132];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f678, %rs67;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f679, %rs68;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f680, %rs69;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd138), _rt_buffer_get_64, (%rd133, %r94, %r337, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f681, %f186, %f678;
|
|
add.f32 %f682, %f187, %f679;
|
|
add.f32 %f683, %f188, %f680;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f683;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f682;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f681;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd138], {%rs64, %rs65, %rs66, %rs60};
|
|
bra.uni BB0_102;
|
|
|
|
BB0_101:
|
|
mov.u32 %r340, 8;
|
|
mov.u64 %rd151, image_RNM2;
|
|
cvta.global.u64 %rd146, %rd151;
|
|
// inline asm
|
|
call (%rd145), _rt_buffer_get_64, (%rd146, %r94, %r340, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f188;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f187;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f186;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd145], {%rs71, %rs72, %rs73, %rs60};
|
|
|
|
BB0_102:
|
|
ld.global.u32 %r288, [additive];
|
|
setp.eq.s32 %p94, %r288, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f635;}
|
|
|
|
// inline asm
|
|
@%p94 bra BB0_104;
|
|
|
|
mov.u32 %r338, 8;
|
|
mov.u64 %rd164, image_RNM3;
|
|
cvta.global.u64 %rd153, %rd164;
|
|
// inline asm
|
|
call (%rd152), _rt_buffer_get_64, (%rd153, %r94, %r338, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
ld.v4.u16 {%rs81, %rs82, %rs83, %rs84}, [%rd152];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f688, %rs81;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f689, %rs82;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f690, %rs83;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd158), _rt_buffer_get_64, (%rd153, %r94, %r338, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
add.f32 %f691, %f189, %f688;
|
|
add.f32 %f692, %f190, %f689;
|
|
add.f32 %f693, %f191, %f690;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f693;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f692;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f691;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd158], {%rs78, %rs79, %rs80, %rs74};
|
|
bra.uni BB0_123;
|
|
|
|
BB0_104:
|
|
mov.u32 %r339, 8;
|
|
mov.u64 %rd171, image_RNM3;
|
|
cvta.global.u64 %rd166, %rd171;
|
|
// inline asm
|
|
call (%rd165), _rt_buffer_get_64, (%rd166, %r94, %r339, %rd16, %rd17, %rd25, %rd25);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f191;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f190;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f189;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd165], {%rs85, %rs86, %rs87, %rs74};
|
|
|
|
BB0_123:
|
|
ret;
|
|
}
|
|
|
|
|