1543 lines
47 KiB
Plaintext
1543 lines
47 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_Dir[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 samples;
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.global .align 4 .f32 lightInvCutoff;
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.global .align 4 .f32 lightRadius;
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.global .align 4 .b8 lightPos[12];
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.global .align 4 .b8 lightColor[12];
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.global .align 4 .u32 ignoreNormal;
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.global .align 4 .f32 lightFalloffFakeDistanceMult;
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.global .align 4 .f32 lightFalloffMinRadiusSq;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<113>;
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.reg .b16 %rs<76>;
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.reg .f32 %f<756>;
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.reg .b32 %r<167>;
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.reg .b64 %rd<150>;
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mov.u64 %rd149, __local_depot0;
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cvta.local.u64 %SP, %rd149;
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ld.global.v2.u32 {%r28, %r29}, [pixelID];
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cvt.u64.u32 %rd12, %r28;
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cvt.u64.u32 %rd13, %r29;
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mov.u64 %rd16, uvnormal;
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cvta.global.u64 %rd11, %rd16;
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mov.u32 %r26, 2;
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mov.u32 %r27, 4;
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mov.u64 %rd15, 0;
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// inline asm
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call (%rd10), _rt_buffer_get_64, (%rd11, %r26, %r27, %rd12, %rd13, %rd15, %rd15);
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// inline asm
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ld.u32 %r1, [%rd10];
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shr.u32 %r32, %r1, 16;
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cvt.u16.u32 %rs1, %r32;
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and.b16 %rs4, %rs1, 255;
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cvt.u16.u32 %rs5, %r1;
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or.b16 %rs6, %rs5, %rs4;
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setp.eq.s16 %p6, %rs6, 0;
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mov.f32 %f732, 0f00000000;
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mov.f32 %f733, %f732;
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mov.f32 %f734, %f732;
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@%p6 bra BB0_2;
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ld.u8 %rs7, [%rd10+1];
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and.b16 %rs9, %rs5, 255;
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cvt.rn.f32.u16 %f105, %rs9;
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div.rn.f32 %f106, %f105, 0f437F0000;
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fma.rn.f32 %f107, %f106, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f108, %rs7;
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div.rn.f32 %f109, %f108, 0f437F0000;
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fma.rn.f32 %f110, %f109, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f111, %rs4;
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div.rn.f32 %f112, %f111, 0f437F0000;
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fma.rn.f32 %f113, %f112, 0f40000000, 0fBF800000;
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mul.f32 %f114, %f110, %f110;
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fma.rn.f32 %f115, %f107, %f107, %f114;
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fma.rn.f32 %f116, %f113, %f113, %f115;
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sqrt.rn.f32 %f117, %f116;
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rcp.rn.f32 %f118, %f117;
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mul.f32 %f732, %f107, %f118;
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mul.f32 %f733, %f110, %f118;
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mul.f32 %f734, %f113, %f118;
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BB0_2:
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ld.global.v2.u32 {%r33, %r34}, [pixelID];
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ld.global.v2.u32 {%r36, %r37}, [tileInfo];
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add.s32 %r2, %r33, %r36;
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add.s32 %r3, %r34, %r37;
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setp.eq.f32 %p7, %f733, 0f00000000;
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setp.eq.f32 %p8, %f732, 0f00000000;
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and.pred %p9, %p8, %p7;
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setp.eq.f32 %p10, %f734, 0f00000000;
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and.pred %p11, %p9, %p10;
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@%p11 bra BB0_85;
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bra.uni BB0_3;
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BB0_85:
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ld.global.u32 %r166, [imageEnabled];
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and.b32 %r141, %r166, 1;
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setp.eq.b32 %p108, %r141, 1;
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@!%p108 bra BB0_87;
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bra.uni BB0_86;
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BB0_86:
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cvt.u64.u32 %rd110, %r2;
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cvt.u64.u32 %rd111, %r3;
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mov.u64 %rd114, image;
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cvta.global.u64 %rd109, %rd114;
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// inline asm
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call (%rd108), _rt_buffer_get_64, (%rd109, %r26, %r27, %rd110, %rd111, %rd15, %rd15);
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// inline asm
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mov.u16 %rs57, 0;
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st.v4.u8 [%rd108], {%rs57, %rs57, %rs57, %rs57};
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ld.global.u32 %r166, [imageEnabled];
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BB0_87:
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and.b32 %r144, %r166, 8;
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setp.eq.s32 %p109, %r144, 0;
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@%p109 bra BB0_89;
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cvt.u64.u32 %rd117, %r2;
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cvt.u64.u32 %rd118, %r3;
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mov.u64 %rd121, image_Mask;
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cvta.global.u64 %rd116, %rd121;
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// inline asm
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call (%rd115), _rt_buffer_get_64, (%rd116, %r26, %r26, %rd117, %rd118, %rd15, %rd15);
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// inline asm
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mov.f32 %f673, 0f00000000;
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cvt.rzi.u32.f32 %r147, %f673;
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cvt.u16.u32 %rs58, %r147;
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mov.u16 %rs59, 0;
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st.v2.u8 [%rd115], {%rs58, %rs59};
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ld.global.u32 %r166, [imageEnabled];
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BB0_89:
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and.b32 %r148, %r166, 4;
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setp.eq.s32 %p110, %r148, 0;
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@%p110 bra BB0_93;
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ld.global.u32 %r149, [additive];
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setp.eq.s32 %p111, %r149, 0;
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cvt.u64.u32 %rd8, %r2;
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cvt.u64.u32 %rd9, %r3;
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@%p111 bra BB0_92;
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mov.u64 %rd134, image_HDR;
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cvta.global.u64 %rd123, %rd134;
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mov.u32 %r153, 8;
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// inline asm
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call (%rd122), _rt_buffer_get_64, (%rd123, %r26, %r153, %rd8, %rd9, %rd15, %rd15);
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// inline asm
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ld.v4.u16 {%rs66, %rs67, %rs68, %rs69}, [%rd122];
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// inline asm
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{ cvt.f32.f16 %f674, %rs66;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f675, %rs67;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f676, %rs68;}
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// inline asm
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// inline asm
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call (%rd128), _rt_buffer_get_64, (%rd123, %r26, %r153, %rd8, %rd9, %rd15, %rd15);
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// inline asm
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add.f32 %f677, %f674, 0f00000000;
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add.f32 %f678, %f675, 0f00000000;
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add.f32 %f679, %f676, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs65, %f679;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs64, %f678;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs63, %f677;}
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// inline asm
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mov.u16 %rs70, 0;
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st.v4.u16 [%rd128], {%rs63, %rs64, %rs65, %rs70};
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bra.uni BB0_93;
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BB0_3:
|
|
ld.global.v2.u32 {%r43, %r44}, [pixelID];
|
|
cvt.u64.u32 %rd19, %r43;
|
|
cvt.u64.u32 %rd20, %r44;
|
|
mov.u64 %rd23, uvpos;
|
|
cvta.global.u64 %rd18, %rd23;
|
|
mov.u32 %r42, 12;
|
|
// inline asm
|
|
call (%rd17), _rt_buffer_get_64, (%rd18, %r26, %r42, %rd19, %rd20, %rd15, %rd15);
|
|
// inline asm
|
|
ld.global.f32 %f7, [lightPos];
|
|
ld.f32 %f12, [%rd17+8];
|
|
ld.f32 %f10, [%rd17+4];
|
|
ld.f32 %f8, [%rd17];
|
|
sub.f32 %f121, %f7, %f8;
|
|
ld.global.f32 %f9, [lightPos+4];
|
|
sub.f32 %f122, %f9, %f10;
|
|
ld.global.f32 %f11, [lightPos+8];
|
|
sub.f32 %f123, %f11, %f12;
|
|
mul.f32 %f124, %f122, %f122;
|
|
fma.rn.f32 %f125, %f121, %f121, %f124;
|
|
fma.rn.f32 %f126, %f123, %f123, %f125;
|
|
sqrt.rn.f32 %f127, %f126;
|
|
rcp.rn.f32 %f128, %f127;
|
|
ld.global.f32 %f129, [lightFalloffFakeDistanceMult];
|
|
mul.f32 %f16, %f127, %f129;
|
|
ld.global.f32 %f130, [lightInvCutoff];
|
|
mul.f32 %f17, %f127, %f130;
|
|
mov.f32 %f134, 0f40800000;
|
|
abs.f32 %f19, %f17;
|
|
setp.lt.f32 %p12, %f19, 0f00800000;
|
|
mul.f32 %f136, %f19, 0f4B800000;
|
|
selp.f32 %f137, 0fC3170000, 0fC2FE0000, %p12;
|
|
selp.f32 %f138, %f136, %f19, %p12;
|
|
mov.b32 %r47, %f138;
|
|
and.b32 %r48, %r47, 8388607;
|
|
or.b32 %r49, %r48, 1065353216;
|
|
mov.b32 %f139, %r49;
|
|
shr.u32 %r50, %r47, 23;
|
|
cvt.rn.f32.u32 %f140, %r50;
|
|
add.f32 %f141, %f137, %f140;
|
|
setp.gt.f32 %p13, %f139, 0f3FB504F3;
|
|
mul.f32 %f142, %f139, 0f3F000000;
|
|
add.f32 %f143, %f141, 0f3F800000;
|
|
selp.f32 %f144, %f142, %f139, %p13;
|
|
selp.f32 %f145, %f143, %f141, %p13;
|
|
add.f32 %f146, %f144, 0fBF800000;
|
|
add.f32 %f120, %f144, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f119,%f120;
|
|
// inline asm
|
|
add.f32 %f147, %f146, %f146;
|
|
mul.f32 %f148, %f119, %f147;
|
|
mul.f32 %f149, %f148, %f148;
|
|
mov.f32 %f150, 0f3C4CAF63;
|
|
mov.f32 %f151, 0f3B18F0FE;
|
|
fma.rn.f32 %f152, %f151, %f149, %f150;
|
|
mov.f32 %f153, 0f3DAAAABD;
|
|
fma.rn.f32 %f154, %f152, %f149, %f153;
|
|
mul.rn.f32 %f155, %f154, %f149;
|
|
mul.rn.f32 %f156, %f155, %f148;
|
|
sub.f32 %f157, %f146, %f148;
|
|
neg.f32 %f158, %f148;
|
|
add.f32 %f159, %f157, %f157;
|
|
fma.rn.f32 %f160, %f158, %f146, %f159;
|
|
mul.rn.f32 %f161, %f119, %f160;
|
|
add.f32 %f162, %f156, %f148;
|
|
sub.f32 %f163, %f148, %f162;
|
|
add.f32 %f164, %f156, %f163;
|
|
add.f32 %f165, %f161, %f164;
|
|
add.f32 %f166, %f162, %f165;
|
|
sub.f32 %f167, %f162, %f166;
|
|
add.f32 %f168, %f165, %f167;
|
|
mov.f32 %f169, 0f3F317200;
|
|
mul.rn.f32 %f170, %f145, %f169;
|
|
mov.f32 %f171, 0f35BFBE8E;
|
|
mul.rn.f32 %f172, %f145, %f171;
|
|
add.f32 %f173, %f170, %f166;
|
|
sub.f32 %f174, %f170, %f173;
|
|
add.f32 %f175, %f166, %f174;
|
|
add.f32 %f176, %f168, %f175;
|
|
add.f32 %f177, %f172, %f176;
|
|
add.f32 %f178, %f173, %f177;
|
|
sub.f32 %f179, %f173, %f178;
|
|
add.f32 %f180, %f177, %f179;
|
|
mul.rn.f32 %f181, %f134, %f178;
|
|
neg.f32 %f182, %f181;
|
|
fma.rn.f32 %f183, %f134, %f178, %f182;
|
|
fma.rn.f32 %f184, %f134, %f180, %f183;
|
|
mov.f32 %f185, 0f00000000;
|
|
fma.rn.f32 %f186, %f185, %f178, %f184;
|
|
add.rn.f32 %f187, %f181, %f186;
|
|
neg.f32 %f188, %f187;
|
|
add.rn.f32 %f189, %f181, %f188;
|
|
add.rn.f32 %f190, %f189, %f186;
|
|
mov.b32 %r51, %f187;
|
|
setp.eq.s32 %p14, %r51, 1118925336;
|
|
add.s32 %r52, %r51, -1;
|
|
mov.b32 %f191, %r52;
|
|
add.f32 %f192, %f190, 0f37000000;
|
|
selp.f32 %f193, %f191, %f187, %p14;
|
|
selp.f32 %f20, %f192, %f190, %p14;
|
|
mul.f32 %f194, %f193, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f195, %f194;
|
|
mov.f32 %f196, 0fBF317200;
|
|
fma.rn.f32 %f197, %f195, %f196, %f193;
|
|
mov.f32 %f198, 0fB5BFBE8E;
|
|
fma.rn.f32 %f199, %f195, %f198, %f197;
|
|
mul.f32 %f200, %f199, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f201, %f200;
|
|
add.f32 %f202, %f195, 0f00000000;
|
|
ex2.approx.f32 %f203, %f202;
|
|
mul.f32 %f204, %f201, %f203;
|
|
setp.lt.f32 %p15, %f193, 0fC2D20000;
|
|
selp.f32 %f205, 0f00000000, %f204, %p15;
|
|
setp.gt.f32 %p16, %f193, 0f42D20000;
|
|
selp.f32 %f735, 0f7F800000, %f205, %p16;
|
|
setp.eq.f32 %p17, %f735, 0f7F800000;
|
|
@%p17 bra BB0_5;
|
|
|
|
fma.rn.f32 %f735, %f735, %f20, %f735;
|
|
|
|
BB0_5:
|
|
mov.f32 %f686, 0f40000000;
|
|
cvt.rzi.f32.f32 %f685, %f686;
|
|
add.f32 %f684, %f685, %f685;
|
|
mov.f32 %f683, 0f40800000;
|
|
sub.f32 %f682, %f683, %f684;
|
|
abs.f32 %f681, %f682;
|
|
setp.lt.f32 %p18, %f17, 0f00000000;
|
|
setp.eq.f32 %p19, %f681, 0f3F800000;
|
|
and.pred %p1, %p18, %p19;
|
|
mov.b32 %r53, %f735;
|
|
xor.b32 %r54, %r53, -2147483648;
|
|
mov.b32 %f206, %r54;
|
|
selp.f32 %f737, %f206, %f735, %p1;
|
|
setp.eq.f32 %p20, %f17, 0f00000000;
|
|
@%p20 bra BB0_8;
|
|
bra.uni BB0_6;
|
|
|
|
BB0_8:
|
|
add.f32 %f209, %f17, %f17;
|
|
selp.f32 %f737, %f209, 0f00000000, %p19;
|
|
bra.uni BB0_9;
|
|
|
|
BB0_6:
|
|
setp.geu.f32 %p21, %f17, 0f00000000;
|
|
@%p21 bra BB0_9;
|
|
|
|
mov.f32 %f731, 0f40800000;
|
|
cvt.rzi.f32.f32 %f208, %f731;
|
|
setp.neu.f32 %p22, %f208, 0f40800000;
|
|
selp.f32 %f737, 0f7FFFFFFF, %f737, %p22;
|
|
|
|
BB0_9:
|
|
abs.f32 %f687, %f17;
|
|
add.f32 %f210, %f687, 0f40800000;
|
|
mov.b32 %r55, %f210;
|
|
setp.lt.s32 %p24, %r55, 2139095040;
|
|
@%p24 bra BB0_14;
|
|
|
|
abs.f32 %f729, %f17;
|
|
setp.gtu.f32 %p25, %f729, 0f7F800000;
|
|
@%p25 bra BB0_13;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_13:
|
|
add.f32 %f737, %f17, 0f40800000;
|
|
bra.uni BB0_14;
|
|
|
|
BB0_11:
|
|
abs.f32 %f730, %f17;
|
|
setp.neu.f32 %p26, %f730, 0f7F800000;
|
|
@%p26 bra BB0_14;
|
|
|
|
selp.f32 %f737, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_14:
|
|
sub.f32 %f693, %f11, %f12;
|
|
mul.f32 %f692, %f693, %f128;
|
|
sub.f32 %f691, %f7, %f8;
|
|
mul.f32 %f690, %f691, %f128;
|
|
sub.f32 %f689, %f9, %f10;
|
|
mul.f32 %f688, %f689, %f128;
|
|
mov.f32 %f743, 0f3F800000;
|
|
sub.f32 %f212, %f743, %f737;
|
|
setp.eq.f32 %p27, %f17, 0f3F800000;
|
|
selp.f32 %f213, 0f00000000, %f212, %p27;
|
|
cvt.sat.f32.f32 %f214, %f213;
|
|
ld.global.f32 %f215, [lightFalloffMinRadiusSq];
|
|
fma.rn.f32 %f216, %f16, %f16, %f215;
|
|
div.rn.f32 %f217, %f214, %f216;
|
|
mul.f32 %f218, %f733, %f688;
|
|
fma.rn.f32 %f219, %f732, %f690, %f218;
|
|
fma.rn.f32 %f220, %f734, %f692, %f219;
|
|
ld.global.u32 %r164, [imageEnabled];
|
|
and.b32 %r56, %r164, 32;
|
|
ld.global.u32 %r57, [ignoreNormal];
|
|
or.b32 %r58, %r56, %r57;
|
|
setp.eq.s32 %p28, %r58, 0;
|
|
selp.f32 %f221, %f220, 0f3F800000, %p28;
|
|
cvt.sat.f32.f32 %f222, %f221;
|
|
mul.f32 %f31, %f217, %f222;
|
|
ld.global.f32 %f223, [lightColor+4];
|
|
ld.global.f32 %f224, [lightColor];
|
|
max.f32 %f225, %f224, %f223;
|
|
ld.global.f32 %f226, [lightColor+8];
|
|
max.f32 %f227, %f225, %f226;
|
|
mul.f32 %f228, %f31, %f227;
|
|
setp.lt.f32 %p29, %f228, 0f3727C5AC;
|
|
@%p29 bra BB0_75;
|
|
bra.uni BB0_15;
|
|
|
|
BB0_75:
|
|
and.b32 %r124, %r164, 1;
|
|
setp.eq.b32 %p103, %r124, 1;
|
|
@!%p103 bra BB0_77;
|
|
bra.uni BB0_76;
|
|
|
|
BB0_76:
|
|
cvt.u64.u32 %rd69, %r2;
|
|
cvt.u64.u32 %rd70, %r3;
|
|
mov.u64 %rd73, image;
|
|
cvta.global.u64 %rd68, %rd73;
|
|
// inline asm
|
|
call (%rd67), _rt_buffer_get_64, (%rd68, %r26, %r27, %rd69, %rd70, %rd15, %rd15);
|
|
// inline asm
|
|
mov.u16 %rs37, 1;
|
|
mov.u16 %rs38, 0;
|
|
st.v4.u8 [%rd67], {%rs38, %rs38, %rs38, %rs37};
|
|
ld.global.u32 %r164, [imageEnabled];
|
|
|
|
BB0_77:
|
|
and.b32 %r127, %r164, 8;
|
|
setp.eq.s32 %p104, %r127, 0;
|
|
@%p104 bra BB0_79;
|
|
|
|
cvt.u64.u32 %rd76, %r2;
|
|
cvt.u64.u32 %rd77, %r3;
|
|
mov.u64 %rd80, image_Mask;
|
|
cvta.global.u64 %rd75, %rd80;
|
|
// inline asm
|
|
call (%rd74), _rt_buffer_get_64, (%rd75, %r26, %r26, %rd76, %rd77, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f662, 0f00000000;
|
|
cvt.rzi.u32.f32 %r130, %f662;
|
|
cvt.u16.u32 %rs39, %r130;
|
|
mov.u16 %rs40, 255;
|
|
st.v2.u8 [%rd74], {%rs39, %rs40};
|
|
ld.global.u32 %r164, [imageEnabled];
|
|
|
|
BB0_79:
|
|
and.b32 %r131, %r164, 4;
|
|
setp.eq.s32 %p105, %r131, 0;
|
|
@%p105 bra BB0_83;
|
|
|
|
ld.global.u32 %r132, [additive];
|
|
setp.eq.s32 %p106, %r132, 0;
|
|
cvt.u64.u32 %rd6, %r2;
|
|
cvt.u64.u32 %rd7, %r3;
|
|
mov.f32 %f663, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f663;}
|
|
|
|
// inline asm
|
|
@%p106 bra BB0_82;
|
|
|
|
mov.u64 %rd93, image_HDR;
|
|
cvta.global.u64 %rd82, %rd93;
|
|
mov.u32 %r136, 8;
|
|
// inline asm
|
|
call (%rd81), _rt_buffer_get_64, (%rd82, %r26, %r136, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs48, %rs49, %rs50, %rs51}, [%rd81];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f664, %rs48;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f665, %rs49;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f666, %rs50;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd87), _rt_buffer_get_64, (%rd82, %r26, %r136, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f667, %f664, 0f00000000;
|
|
add.f32 %f668, %f665, 0f00000000;
|
|
add.f32 %f669, %f666, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs47, %f669;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f668;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs45, %f667;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd87], {%rs45, %rs46, %rs47, %rs41};
|
|
bra.uni BB0_83;
|
|
|
|
BB0_15:
|
|
mov.f32 %f741, 0f00000000;
|
|
mul.f32 %f230, %f8, 0f3456BF95;
|
|
abs.f32 %f231, %f732;
|
|
div.rn.f32 %f232, %f230, %f231;
|
|
abs.f32 %f233, %f733;
|
|
mul.f32 %f234, %f10, 0f3456BF95;
|
|
div.rn.f32 %f235, %f234, %f233;
|
|
abs.f32 %f236, %f734;
|
|
mul.f32 %f237, %f12, 0f3456BF95;
|
|
div.rn.f32 %f238, %f237, %f236;
|
|
abs.f32 %f239, %f232;
|
|
abs.f32 %f240, %f235;
|
|
abs.f32 %f241, %f238;
|
|
mov.f32 %f242, 0f38D1B717;
|
|
max.f32 %f243, %f239, %f242;
|
|
max.f32 %f244, %f240, %f242;
|
|
max.f32 %f245, %f241, %f242;
|
|
fma.rn.f32 %f32, %f732, %f243, %f8;
|
|
fma.rn.f32 %f33, %f733, %f244, %f10;
|
|
fma.rn.f32 %f34, %f734, %f245, %f12;
|
|
ld.global.u32 %r160, [samples];
|
|
setp.lt.s32 %p30, %r160, 1;
|
|
@%p30 bra BB0_18;
|
|
|
|
mul.f32 %f247, %f32, 0f3456BF95;
|
|
abs.f32 %f248, %f247;
|
|
mul.f32 %f249, %f33, 0f3456BF95;
|
|
abs.f32 %f250, %f249;
|
|
mul.f32 %f251, %f34, 0f3456BF95;
|
|
abs.f32 %f252, %f251;
|
|
max.f32 %f253, %f248, %f250;
|
|
max.f32 %f254, %f253, %f252;
|
|
max.f32 %f35, %f254, %f242;
|
|
add.u64 %rd24, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd24;
|
|
mov.f32 %f741, 0f00000000;
|
|
mov.u32 %r159, 0;
|
|
mov.f32 %f738, %f11;
|
|
mov.f32 %f739, %f9;
|
|
mov.f32 %f740, %f7;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_74:
|
|
ld.global.f32 %f740, [lightPos];
|
|
ld.global.f32 %f739, [lightPos+4];
|
|
ld.global.f32 %f738, [lightPos+8];
|
|
ld.global.u32 %r164, [imageEnabled];
|
|
|
|
BB0_17:
|
|
cvt.rn.f32.s32 %f264, %r159;
|
|
mul.f32 %f265, %f264, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f266, %f265;
|
|
sub.f32 %f267, %f265, %f266;
|
|
mul.f32 %f268, %f264, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f269, %f268;
|
|
sub.f32 %f270, %f268, %f269;
|
|
mul.f32 %f271, %f264, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f272, %f271;
|
|
sub.f32 %f273, %f271, %f272;
|
|
add.f32 %f274, %f270, 0f4199851F;
|
|
add.f32 %f275, %f273, 0f4199851F;
|
|
add.f32 %f276, %f267, 0f4199851F;
|
|
mul.f32 %f277, %f270, %f275;
|
|
fma.rn.f32 %f278, %f267, %f274, %f277;
|
|
fma.rn.f32 %f279, %f276, %f273, %f278;
|
|
add.f32 %f280, %f267, %f279;
|
|
add.f32 %f281, %f270, %f279;
|
|
add.f32 %f282, %f273, %f279;
|
|
add.f32 %f283, %f280, %f281;
|
|
mul.f32 %f284, %f282, %f283;
|
|
cvt.rmi.f32.f32 %f285, %f284;
|
|
sub.f32 %f286, %f284, %f285;
|
|
add.f32 %f287, %f280, %f282;
|
|
mul.f32 %f288, %f281, %f287;
|
|
cvt.rmi.f32.f32 %f289, %f288;
|
|
sub.f32 %f290, %f288, %f289;
|
|
add.f32 %f291, %f281, %f282;
|
|
mul.f32 %f292, %f280, %f291;
|
|
cvt.rmi.f32.f32 %f293, %f292;
|
|
sub.f32 %f294, %f292, %f293;
|
|
fma.rn.f32 %f295, %f286, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f296, %f290, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f297, %f294, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f298, [lightRadius];
|
|
fma.rn.f32 %f299, %f298, %f295, %f740;
|
|
fma.rn.f32 %f300, %f298, %f296, %f739;
|
|
fma.rn.f32 %f301, %f298, %f297, %f738;
|
|
sub.f32 %f302, %f299, %f8;
|
|
sub.f32 %f303, %f300, %f10;
|
|
sub.f32 %f304, %f301, %f12;
|
|
mul.f32 %f305, %f303, %f303;
|
|
fma.rn.f32 %f306, %f302, %f302, %f305;
|
|
fma.rn.f32 %f307, %f304, %f304, %f306;
|
|
sqrt.rn.f32 %f263, %f307;
|
|
rcp.rn.f32 %f308, %f263;
|
|
mul.f32 %f259, %f308, %f302;
|
|
mul.f32 %f260, %f308, %f303;
|
|
mul.f32 %f261, %f308, %f304;
|
|
and.b32 %r63, %r164, 32;
|
|
setp.eq.s32 %p31, %r63, 0;
|
|
selp.f32 %f309, 0f3F800000, 0f41200000, %p31;
|
|
mul.f32 %f262, %f309, %f35;
|
|
mov.u32 %r64, 1065353216;
|
|
st.local.u32 [%rd2], %r64;
|
|
ld.global.u32 %r60, [root];
|
|
mov.u32 %r61, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r60, %f32, %f33, %f34, %f259, %f260, %f261, %r61, %f262, %f263, %rd24, %r27);
|
|
// inline asm
|
|
ld.local.f32 %f310, [%rd2];
|
|
add.f32 %f741, %f741, %f310;
|
|
ld.global.u32 %r160, [samples];
|
|
add.s32 %r159, %r159, 1;
|
|
setp.lt.s32 %p32, %r159, %r160;
|
|
@%p32 bra BB0_74;
|
|
|
|
BB0_18:
|
|
setp.eq.s32 %p33, %r160, 0;
|
|
@%p33 bra BB0_20;
|
|
|
|
cvt.rn.f32.s32 %f312, %r160;
|
|
div.rn.f32 %f743, %f741, %f312;
|
|
|
|
BB0_20:
|
|
ld.global.f32 %f313, [lightColor];
|
|
mul.f32 %f314, %f31, %f743;
|
|
mul.f32 %f44, %f313, %f314;
|
|
ld.global.f32 %f315, [lightColor+4];
|
|
mul.f32 %f45, %f314, %f315;
|
|
ld.global.f32 %f316, [lightColor+8];
|
|
mul.f32 %f46, %f314, %f316;
|
|
ld.global.u32 %r162, [imageEnabled];
|
|
and.b32 %r65, %r162, 8;
|
|
setp.eq.s32 %p34, %r65, 0;
|
|
@%p34 bra BB0_33;
|
|
|
|
mov.f32 %f701, 0fB5BFBE8E;
|
|
mov.f32 %f700, 0fBF317200;
|
|
mov.f32 %f699, 0f35BFBE8E;
|
|
mov.f32 %f698, 0f3F317200;
|
|
mov.f32 %f697, 0f3DAAAABD;
|
|
mov.f32 %f696, 0f3C4CAF63;
|
|
mov.f32 %f695, 0f3B18F0FE;
|
|
cvt.u64.u32 %rd28, %r2;
|
|
cvt.u64.u32 %rd29, %r3;
|
|
mov.u64 %rd32, image_Mask;
|
|
cvta.global.u64 %rd27, %rd32;
|
|
// inline asm
|
|
call (%rd26), _rt_buffer_get_64, (%rd27, %r26, %r26, %rd28, %rd29, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f319, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f320, %f319;
|
|
fma.rn.f32 %f321, %f320, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f47, %f321;
|
|
abs.f32 %f48, %f743;
|
|
setp.lt.f32 %p35, %f48, 0f00800000;
|
|
mul.f32 %f322, %f48, 0f4B800000;
|
|
selp.f32 %f323, 0fC3170000, 0fC2FE0000, %p35;
|
|
selp.f32 %f324, %f322, %f48, %p35;
|
|
mov.b32 %r68, %f324;
|
|
and.b32 %r69, %r68, 8388607;
|
|
or.b32 %r70, %r69, 1065353216;
|
|
mov.b32 %f325, %r70;
|
|
shr.u32 %r71, %r68, 23;
|
|
cvt.rn.f32.u32 %f326, %r71;
|
|
add.f32 %f327, %f323, %f326;
|
|
setp.gt.f32 %p36, %f325, 0f3FB504F3;
|
|
mul.f32 %f328, %f325, 0f3F000000;
|
|
add.f32 %f329, %f327, 0f3F800000;
|
|
selp.f32 %f330, %f328, %f325, %p36;
|
|
selp.f32 %f331, %f329, %f327, %p36;
|
|
add.f32 %f332, %f330, 0fBF800000;
|
|
add.f32 %f318, %f330, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f317,%f318;
|
|
// inline asm
|
|
add.f32 %f333, %f332, %f332;
|
|
mul.f32 %f334, %f317, %f333;
|
|
mul.f32 %f335, %f334, %f334;
|
|
fma.rn.f32 %f338, %f695, %f335, %f696;
|
|
fma.rn.f32 %f340, %f338, %f335, %f697;
|
|
mul.rn.f32 %f341, %f340, %f335;
|
|
mul.rn.f32 %f342, %f341, %f334;
|
|
sub.f32 %f343, %f332, %f334;
|
|
neg.f32 %f344, %f334;
|
|
add.f32 %f345, %f343, %f343;
|
|
fma.rn.f32 %f346, %f344, %f332, %f345;
|
|
mul.rn.f32 %f347, %f317, %f346;
|
|
add.f32 %f348, %f342, %f334;
|
|
sub.f32 %f349, %f334, %f348;
|
|
add.f32 %f350, %f342, %f349;
|
|
add.f32 %f351, %f347, %f350;
|
|
add.f32 %f352, %f348, %f351;
|
|
sub.f32 %f353, %f348, %f352;
|
|
add.f32 %f354, %f351, %f353;
|
|
mul.rn.f32 %f356, %f331, %f698;
|
|
mul.rn.f32 %f358, %f331, %f699;
|
|
add.f32 %f359, %f356, %f352;
|
|
sub.f32 %f360, %f356, %f359;
|
|
add.f32 %f361, %f352, %f360;
|
|
add.f32 %f362, %f354, %f361;
|
|
add.f32 %f363, %f358, %f362;
|
|
add.f32 %f364, %f359, %f363;
|
|
sub.f32 %f365, %f359, %f364;
|
|
add.f32 %f366, %f363, %f365;
|
|
mov.f32 %f367, 0f3EE8BA2E;
|
|
mul.rn.f32 %f368, %f367, %f364;
|
|
neg.f32 %f369, %f368;
|
|
fma.rn.f32 %f370, %f367, %f364, %f369;
|
|
fma.rn.f32 %f371, %f367, %f366, %f370;
|
|
mov.f32 %f372, 0f00000000;
|
|
fma.rn.f32 %f373, %f372, %f364, %f371;
|
|
add.rn.f32 %f374, %f368, %f373;
|
|
neg.f32 %f375, %f374;
|
|
add.rn.f32 %f376, %f368, %f375;
|
|
add.rn.f32 %f377, %f376, %f373;
|
|
mov.b32 %r72, %f374;
|
|
setp.eq.s32 %p37, %r72, 1118925336;
|
|
add.s32 %r73, %r72, -1;
|
|
mov.b32 %f378, %r73;
|
|
add.f32 %f379, %f377, 0f37000000;
|
|
selp.f32 %f380, %f378, %f374, %p37;
|
|
selp.f32 %f49, %f379, %f377, %p37;
|
|
mul.f32 %f381, %f380, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f382, %f381;
|
|
fma.rn.f32 %f384, %f382, %f700, %f380;
|
|
fma.rn.f32 %f386, %f382, %f701, %f384;
|
|
mul.f32 %f387, %f386, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f388, %f387;
|
|
add.f32 %f389, %f382, 0f00000000;
|
|
ex2.approx.f32 %f390, %f389;
|
|
mul.f32 %f391, %f388, %f390;
|
|
setp.lt.f32 %p38, %f380, 0fC2D20000;
|
|
selp.f32 %f392, 0f00000000, %f391, %p38;
|
|
setp.gt.f32 %p39, %f380, 0f42D20000;
|
|
selp.f32 %f744, 0f7F800000, %f392, %p39;
|
|
setp.eq.f32 %p40, %f744, 0f7F800000;
|
|
@%p40 bra BB0_23;
|
|
|
|
fma.rn.f32 %f744, %f744, %f49, %f744;
|
|
|
|
BB0_23:
|
|
setp.lt.f32 %p41, %f743, 0f00000000;
|
|
setp.eq.f32 %p42, %f47, 0f3F800000;
|
|
and.pred %p2, %p41, %p42;
|
|
mov.b32 %r74, %f744;
|
|
xor.b32 %r75, %r74, -2147483648;
|
|
mov.b32 %f393, %r75;
|
|
selp.f32 %f746, %f393, %f744, %p2;
|
|
setp.eq.f32 %p43, %f743, 0f00000000;
|
|
@%p43 bra BB0_26;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_26:
|
|
add.f32 %f396, %f743, %f743;
|
|
selp.f32 %f746, %f396, 0f00000000, %p42;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_92:
|
|
mov.u64 %rd141, image_HDR;
|
|
cvta.global.u64 %rd136, %rd141;
|
|
mov.u32 %r155, 8;
|
|
// inline asm
|
|
call (%rd135), _rt_buffer_get_64, (%rd136, %r26, %r155, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f680, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f680;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs72, 0;
|
|
st.v4.u16 [%rd135], {%rs71, %rs71, %rs71, %rs72};
|
|
|
|
BB0_93:
|
|
ld.global.u8 %rs73, [imageEnabled];
|
|
and.b16 %rs74, %rs73, 64;
|
|
setp.eq.s16 %p112, %rs74, 0;
|
|
@%p112 bra BB0_95;
|
|
|
|
cvt.u64.u32 %rd144, %r2;
|
|
cvt.u64.u32 %rd145, %r3;
|
|
mov.u64 %rd148, image_Dir;
|
|
cvta.global.u64 %rd143, %rd148;
|
|
// inline asm
|
|
call (%rd142), _rt_buffer_get_64, (%rd143, %r26, %r27, %rd144, %rd145, %rd15, %rd15);
|
|
// inline asm
|
|
mov.u16 %rs75, 0;
|
|
st.v4.u8 [%rd142], {%rs75, %rs75, %rs75, %rs75};
|
|
bra.uni BB0_95;
|
|
|
|
BB0_82:
|
|
mov.u64 %rd100, image_HDR;
|
|
cvta.global.u64 %rd95, %rd100;
|
|
mov.u32 %r138, 8;
|
|
// inline asm
|
|
call (%rd94), _rt_buffer_get_64, (%rd95, %r26, %r138, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f670, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f670;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd94], {%rs52, %rs52, %rs52, %rs41};
|
|
|
|
BB0_83:
|
|
ld.global.u8 %rs53, [imageEnabled];
|
|
and.b16 %rs54, %rs53, 64;
|
|
setp.eq.s16 %p107, %rs54, 0;
|
|
@%p107 bra BB0_95;
|
|
|
|
cvt.u64.u32 %rd103, %r2;
|
|
cvt.u64.u32 %rd104, %r3;
|
|
mov.u64 %rd107, image_Dir;
|
|
cvta.global.u64 %rd102, %rd107;
|
|
// inline asm
|
|
call (%rd101), _rt_buffer_get_64, (%rd102, %r26, %r27, %rd103, %rd104, %rd15, %rd15);
|
|
// inline asm
|
|
mov.u16 %rs55, 255;
|
|
mov.u16 %rs56, 0;
|
|
st.v4.u8 [%rd101], {%rs56, %rs56, %rs56, %rs55};
|
|
bra.uni BB0_95;
|
|
|
|
BB0_24:
|
|
setp.geu.f32 %p44, %f743, 0f00000000;
|
|
@%p44 bra BB0_27;
|
|
|
|
cvt.rzi.f32.f32 %f395, %f367;
|
|
setp.neu.f32 %p45, %f395, 0f3EE8BA2E;
|
|
selp.f32 %f746, 0f7FFFFFFF, %f746, %p45;
|
|
|
|
BB0_27:
|
|
add.f32 %f397, %f48, 0f3EE8BA2E;
|
|
mov.b32 %r76, %f397;
|
|
setp.lt.s32 %p47, %r76, 2139095040;
|
|
@%p47 bra BB0_32;
|
|
|
|
setp.gtu.f32 %p48, %f48, 0f7F800000;
|
|
@%p48 bra BB0_31;
|
|
bra.uni BB0_29;
|
|
|
|
BB0_31:
|
|
add.f32 %f746, %f743, 0f3EE8BA2E;
|
|
bra.uni BB0_32;
|
|
|
|
BB0_29:
|
|
setp.neu.f32 %p49, %f48, 0f7F800000;
|
|
@%p49 bra BB0_32;
|
|
|
|
selp.f32 %f746, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_32:
|
|
mul.f32 %f398, %f746, 0f437F0000;
|
|
setp.eq.f32 %p50, %f743, 0f3F800000;
|
|
selp.f32 %f399, 0f437F0000, %f398, %p50;
|
|
cvt.rzi.u32.f32 %r77, %f399;
|
|
cvt.u16.u32 %rs11, %r77;
|
|
mov.u16 %rs12, 255;
|
|
st.v2.u8 [%rd26], {%rs11, %rs12};
|
|
ld.global.u32 %r162, [imageEnabled];
|
|
|
|
BB0_33:
|
|
and.b32 %r78, %r162, 1;
|
|
setp.eq.b32 %p51, %r78, 1;
|
|
@!%p51 bra BB0_68;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_34:
|
|
mov.f32 %f708, 0fB5BFBE8E;
|
|
mov.f32 %f707, 0fBF317200;
|
|
mov.f32 %f706, 0f35BFBE8E;
|
|
mov.f32 %f705, 0f3F317200;
|
|
mov.f32 %f704, 0f3DAAAABD;
|
|
mov.f32 %f703, 0f3C4CAF63;
|
|
mov.f32 %f702, 0f3B18F0FE;
|
|
mov.f32 %f402, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f403, %f402;
|
|
fma.rn.f32 %f404, %f403, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f60, %f404;
|
|
abs.f32 %f61, %f44;
|
|
setp.lt.f32 %p52, %f61, 0f00800000;
|
|
mul.f32 %f405, %f61, 0f4B800000;
|
|
selp.f32 %f406, 0fC3170000, 0fC2FE0000, %p52;
|
|
selp.f32 %f407, %f405, %f61, %p52;
|
|
mov.b32 %r79, %f407;
|
|
and.b32 %r80, %r79, 8388607;
|
|
or.b32 %r81, %r80, 1065353216;
|
|
mov.b32 %f408, %r81;
|
|
shr.u32 %r82, %r79, 23;
|
|
cvt.rn.f32.u32 %f409, %r82;
|
|
add.f32 %f410, %f406, %f409;
|
|
setp.gt.f32 %p53, %f408, 0f3FB504F3;
|
|
mul.f32 %f411, %f408, 0f3F000000;
|
|
add.f32 %f412, %f410, 0f3F800000;
|
|
selp.f32 %f413, %f411, %f408, %p53;
|
|
selp.f32 %f414, %f412, %f410, %p53;
|
|
add.f32 %f415, %f413, 0fBF800000;
|
|
add.f32 %f401, %f413, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f400,%f401;
|
|
// inline asm
|
|
add.f32 %f416, %f415, %f415;
|
|
mul.f32 %f417, %f400, %f416;
|
|
mul.f32 %f418, %f417, %f417;
|
|
fma.rn.f32 %f421, %f702, %f418, %f703;
|
|
fma.rn.f32 %f423, %f421, %f418, %f704;
|
|
mul.rn.f32 %f424, %f423, %f418;
|
|
mul.rn.f32 %f425, %f424, %f417;
|
|
sub.f32 %f426, %f415, %f417;
|
|
neg.f32 %f427, %f417;
|
|
add.f32 %f428, %f426, %f426;
|
|
fma.rn.f32 %f429, %f427, %f415, %f428;
|
|
mul.rn.f32 %f430, %f400, %f429;
|
|
add.f32 %f431, %f425, %f417;
|
|
sub.f32 %f432, %f417, %f431;
|
|
add.f32 %f433, %f425, %f432;
|
|
add.f32 %f434, %f430, %f433;
|
|
add.f32 %f435, %f431, %f434;
|
|
sub.f32 %f436, %f431, %f435;
|
|
add.f32 %f437, %f434, %f436;
|
|
mul.rn.f32 %f439, %f414, %f705;
|
|
mul.rn.f32 %f441, %f414, %f706;
|
|
add.f32 %f442, %f439, %f435;
|
|
sub.f32 %f443, %f439, %f442;
|
|
add.f32 %f444, %f435, %f443;
|
|
add.f32 %f445, %f437, %f444;
|
|
add.f32 %f446, %f441, %f445;
|
|
add.f32 %f447, %f442, %f446;
|
|
sub.f32 %f448, %f442, %f447;
|
|
add.f32 %f449, %f446, %f448;
|
|
mov.f32 %f450, 0f3EE66666;
|
|
mul.rn.f32 %f451, %f450, %f447;
|
|
neg.f32 %f452, %f451;
|
|
fma.rn.f32 %f453, %f450, %f447, %f452;
|
|
fma.rn.f32 %f454, %f450, %f449, %f453;
|
|
mov.f32 %f455, 0f00000000;
|
|
fma.rn.f32 %f456, %f455, %f447, %f454;
|
|
add.rn.f32 %f457, %f451, %f456;
|
|
neg.f32 %f458, %f457;
|
|
add.rn.f32 %f459, %f451, %f458;
|
|
add.rn.f32 %f460, %f459, %f456;
|
|
mov.b32 %r83, %f457;
|
|
setp.eq.s32 %p54, %r83, 1118925336;
|
|
add.s32 %r84, %r83, -1;
|
|
mov.b32 %f461, %r84;
|
|
add.f32 %f462, %f460, 0f37000000;
|
|
selp.f32 %f463, %f461, %f457, %p54;
|
|
selp.f32 %f62, %f462, %f460, %p54;
|
|
mul.f32 %f464, %f463, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f465, %f464;
|
|
fma.rn.f32 %f467, %f465, %f707, %f463;
|
|
fma.rn.f32 %f469, %f465, %f708, %f467;
|
|
mul.f32 %f470, %f469, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f471, %f470;
|
|
add.f32 %f472, %f465, 0f00000000;
|
|
ex2.approx.f32 %f473, %f472;
|
|
mul.f32 %f474, %f471, %f473;
|
|
setp.lt.f32 %p55, %f463, 0fC2D20000;
|
|
selp.f32 %f475, 0f00000000, %f474, %p55;
|
|
setp.gt.f32 %p56, %f463, 0f42D20000;
|
|
selp.f32 %f747, 0f7F800000, %f475, %p56;
|
|
setp.eq.f32 %p57, %f747, 0f7F800000;
|
|
@%p57 bra BB0_36;
|
|
|
|
fma.rn.f32 %f747, %f747, %f62, %f747;
|
|
|
|
BB0_36:
|
|
setp.lt.f32 %p58, %f44, 0f00000000;
|
|
setp.eq.f32 %p59, %f60, 0f3F800000;
|
|
and.pred %p3, %p58, %p59;
|
|
mov.b32 %r85, %f747;
|
|
xor.b32 %r86, %r85, -2147483648;
|
|
mov.b32 %f476, %r86;
|
|
selp.f32 %f749, %f476, %f747, %p3;
|
|
setp.eq.f32 %p60, %f44, 0f00000000;
|
|
@%p60 bra BB0_39;
|
|
bra.uni BB0_37;
|
|
|
|
BB0_39:
|
|
add.f32 %f479, %f44, %f44;
|
|
selp.f32 %f749, %f479, 0f00000000, %p59;
|
|
bra.uni BB0_40;
|
|
|
|
BB0_37:
|
|
setp.geu.f32 %p61, %f44, 0f00000000;
|
|
@%p61 bra BB0_40;
|
|
|
|
cvt.rzi.f32.f32 %f478, %f450;
|
|
setp.neu.f32 %p62, %f478, 0f3EE66666;
|
|
selp.f32 %f749, 0f7FFFFFFF, %f749, %p62;
|
|
|
|
BB0_40:
|
|
add.f32 %f480, %f61, 0f3EE66666;
|
|
mov.b32 %r87, %f480;
|
|
setp.lt.s32 %p64, %r87, 2139095040;
|
|
@%p64 bra BB0_45;
|
|
|
|
setp.gtu.f32 %p65, %f61, 0f7F800000;
|
|
@%p65 bra BB0_44;
|
|
bra.uni BB0_42;
|
|
|
|
BB0_44:
|
|
add.f32 %f749, %f44, 0f3EE66666;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_42:
|
|
setp.neu.f32 %p66, %f61, 0f7F800000;
|
|
@%p66 bra BB0_45;
|
|
|
|
selp.f32 %f749, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_45:
|
|
mov.f32 %f715, 0fB5BFBE8E;
|
|
mov.f32 %f714, 0fBF317200;
|
|
mov.f32 %f713, 0f35BFBE8E;
|
|
mov.f32 %f712, 0f3F317200;
|
|
mov.f32 %f711, 0f3DAAAABD;
|
|
mov.f32 %f710, 0f3C4CAF63;
|
|
mov.f32 %f709, 0f3B18F0FE;
|
|
setp.eq.f32 %p67, %f44, 0f3F800000;
|
|
selp.f32 %f73, 0f3F800000, %f749, %p67;
|
|
abs.f32 %f74, %f45;
|
|
setp.lt.f32 %p68, %f74, 0f00800000;
|
|
mul.f32 %f483, %f74, 0f4B800000;
|
|
selp.f32 %f484, 0fC3170000, 0fC2FE0000, %p68;
|
|
selp.f32 %f485, %f483, %f74, %p68;
|
|
mov.b32 %r88, %f485;
|
|
and.b32 %r89, %r88, 8388607;
|
|
or.b32 %r90, %r89, 1065353216;
|
|
mov.b32 %f486, %r90;
|
|
shr.u32 %r91, %r88, 23;
|
|
cvt.rn.f32.u32 %f487, %r91;
|
|
add.f32 %f488, %f484, %f487;
|
|
setp.gt.f32 %p69, %f486, 0f3FB504F3;
|
|
mul.f32 %f489, %f486, 0f3F000000;
|
|
add.f32 %f490, %f488, 0f3F800000;
|
|
selp.f32 %f491, %f489, %f486, %p69;
|
|
selp.f32 %f492, %f490, %f488, %p69;
|
|
add.f32 %f493, %f491, 0fBF800000;
|
|
add.f32 %f482, %f491, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f481,%f482;
|
|
// inline asm
|
|
add.f32 %f494, %f493, %f493;
|
|
mul.f32 %f495, %f481, %f494;
|
|
mul.f32 %f496, %f495, %f495;
|
|
fma.rn.f32 %f499, %f709, %f496, %f710;
|
|
fma.rn.f32 %f501, %f499, %f496, %f711;
|
|
mul.rn.f32 %f502, %f501, %f496;
|
|
mul.rn.f32 %f503, %f502, %f495;
|
|
sub.f32 %f504, %f493, %f495;
|
|
neg.f32 %f505, %f495;
|
|
add.f32 %f506, %f504, %f504;
|
|
fma.rn.f32 %f507, %f505, %f493, %f506;
|
|
mul.rn.f32 %f508, %f481, %f507;
|
|
add.f32 %f509, %f503, %f495;
|
|
sub.f32 %f510, %f495, %f509;
|
|
add.f32 %f511, %f503, %f510;
|
|
add.f32 %f512, %f508, %f511;
|
|
add.f32 %f513, %f509, %f512;
|
|
sub.f32 %f514, %f509, %f513;
|
|
add.f32 %f515, %f512, %f514;
|
|
mul.rn.f32 %f517, %f492, %f712;
|
|
mul.rn.f32 %f519, %f492, %f713;
|
|
add.f32 %f520, %f517, %f513;
|
|
sub.f32 %f521, %f517, %f520;
|
|
add.f32 %f522, %f513, %f521;
|
|
add.f32 %f523, %f515, %f522;
|
|
add.f32 %f524, %f519, %f523;
|
|
add.f32 %f525, %f520, %f524;
|
|
sub.f32 %f526, %f520, %f525;
|
|
add.f32 %f527, %f524, %f526;
|
|
mul.rn.f32 %f529, %f450, %f525;
|
|
neg.f32 %f530, %f529;
|
|
fma.rn.f32 %f531, %f450, %f525, %f530;
|
|
fma.rn.f32 %f532, %f450, %f527, %f531;
|
|
fma.rn.f32 %f534, %f455, %f525, %f532;
|
|
add.rn.f32 %f535, %f529, %f534;
|
|
neg.f32 %f536, %f535;
|
|
add.rn.f32 %f537, %f529, %f536;
|
|
add.rn.f32 %f538, %f537, %f534;
|
|
mov.b32 %r92, %f535;
|
|
setp.eq.s32 %p70, %r92, 1118925336;
|
|
add.s32 %r93, %r92, -1;
|
|
mov.b32 %f539, %r93;
|
|
add.f32 %f540, %f538, 0f37000000;
|
|
selp.f32 %f541, %f539, %f535, %p70;
|
|
selp.f32 %f75, %f540, %f538, %p70;
|
|
mul.f32 %f542, %f541, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f543, %f542;
|
|
fma.rn.f32 %f545, %f543, %f714, %f541;
|
|
fma.rn.f32 %f547, %f543, %f715, %f545;
|
|
mul.f32 %f548, %f547, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f549, %f548;
|
|
add.f32 %f550, %f543, 0f00000000;
|
|
ex2.approx.f32 %f551, %f550;
|
|
mul.f32 %f552, %f549, %f551;
|
|
setp.lt.f32 %p71, %f541, 0fC2D20000;
|
|
selp.f32 %f553, 0f00000000, %f552, %p71;
|
|
setp.gt.f32 %p72, %f541, 0f42D20000;
|
|
selp.f32 %f750, 0f7F800000, %f553, %p72;
|
|
setp.eq.f32 %p73, %f750, 0f7F800000;
|
|
@%p73 bra BB0_47;
|
|
|
|
fma.rn.f32 %f750, %f750, %f75, %f750;
|
|
|
|
BB0_47:
|
|
setp.lt.f32 %p74, %f45, 0f00000000;
|
|
and.pred %p4, %p74, %p59;
|
|
mov.b32 %r94, %f750;
|
|
xor.b32 %r95, %r94, -2147483648;
|
|
mov.b32 %f554, %r95;
|
|
selp.f32 %f752, %f554, %f750, %p4;
|
|
setp.eq.f32 %p76, %f45, 0f00000000;
|
|
@%p76 bra BB0_50;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_50:
|
|
add.f32 %f557, %f45, %f45;
|
|
selp.f32 %f752, %f557, 0f00000000, %p59;
|
|
bra.uni BB0_51;
|
|
|
|
BB0_48:
|
|
setp.geu.f32 %p77, %f45, 0f00000000;
|
|
@%p77 bra BB0_51;
|
|
|
|
cvt.rzi.f32.f32 %f556, %f450;
|
|
setp.neu.f32 %p78, %f556, 0f3EE66666;
|
|
selp.f32 %f752, 0f7FFFFFFF, %f752, %p78;
|
|
|
|
BB0_51:
|
|
add.f32 %f558, %f74, 0f3EE66666;
|
|
mov.b32 %r96, %f558;
|
|
setp.lt.s32 %p80, %r96, 2139095040;
|
|
@%p80 bra BB0_56;
|
|
|
|
setp.gtu.f32 %p81, %f74, 0f7F800000;
|
|
@%p81 bra BB0_55;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_55:
|
|
add.f32 %f752, %f45, 0f3EE66666;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_53:
|
|
setp.neu.f32 %p82, %f74, 0f7F800000;
|
|
@%p82 bra BB0_56;
|
|
|
|
selp.f32 %f752, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_56:
|
|
mov.f32 %f722, 0fB5BFBE8E;
|
|
mov.f32 %f721, 0fBF317200;
|
|
mov.f32 %f720, 0f35BFBE8E;
|
|
mov.f32 %f719, 0f3F317200;
|
|
mov.f32 %f718, 0f3DAAAABD;
|
|
mov.f32 %f717, 0f3C4CAF63;
|
|
mov.f32 %f716, 0f3B18F0FE;
|
|
setp.eq.f32 %p83, %f45, 0f3F800000;
|
|
selp.f32 %f86, 0f3F800000, %f752, %p83;
|
|
abs.f32 %f87, %f46;
|
|
setp.lt.f32 %p84, %f87, 0f00800000;
|
|
mul.f32 %f561, %f87, 0f4B800000;
|
|
selp.f32 %f562, 0fC3170000, 0fC2FE0000, %p84;
|
|
selp.f32 %f563, %f561, %f87, %p84;
|
|
mov.b32 %r97, %f563;
|
|
and.b32 %r98, %r97, 8388607;
|
|
or.b32 %r99, %r98, 1065353216;
|
|
mov.b32 %f564, %r99;
|
|
shr.u32 %r100, %r97, 23;
|
|
cvt.rn.f32.u32 %f565, %r100;
|
|
add.f32 %f566, %f562, %f565;
|
|
setp.gt.f32 %p85, %f564, 0f3FB504F3;
|
|
mul.f32 %f567, %f564, 0f3F000000;
|
|
add.f32 %f568, %f566, 0f3F800000;
|
|
selp.f32 %f569, %f567, %f564, %p85;
|
|
selp.f32 %f570, %f568, %f566, %p85;
|
|
add.f32 %f571, %f569, 0fBF800000;
|
|
add.f32 %f560, %f569, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f559,%f560;
|
|
// inline asm
|
|
add.f32 %f572, %f571, %f571;
|
|
mul.f32 %f573, %f559, %f572;
|
|
mul.f32 %f574, %f573, %f573;
|
|
fma.rn.f32 %f577, %f716, %f574, %f717;
|
|
fma.rn.f32 %f579, %f577, %f574, %f718;
|
|
mul.rn.f32 %f580, %f579, %f574;
|
|
mul.rn.f32 %f581, %f580, %f573;
|
|
sub.f32 %f582, %f571, %f573;
|
|
neg.f32 %f583, %f573;
|
|
add.f32 %f584, %f582, %f582;
|
|
fma.rn.f32 %f585, %f583, %f571, %f584;
|
|
mul.rn.f32 %f586, %f559, %f585;
|
|
add.f32 %f587, %f581, %f573;
|
|
sub.f32 %f588, %f573, %f587;
|
|
add.f32 %f589, %f581, %f588;
|
|
add.f32 %f590, %f586, %f589;
|
|
add.f32 %f591, %f587, %f590;
|
|
sub.f32 %f592, %f587, %f591;
|
|
add.f32 %f593, %f590, %f592;
|
|
mul.rn.f32 %f595, %f570, %f719;
|
|
mul.rn.f32 %f597, %f570, %f720;
|
|
add.f32 %f598, %f595, %f591;
|
|
sub.f32 %f599, %f595, %f598;
|
|
add.f32 %f600, %f591, %f599;
|
|
add.f32 %f601, %f593, %f600;
|
|
add.f32 %f602, %f597, %f601;
|
|
add.f32 %f603, %f598, %f602;
|
|
sub.f32 %f604, %f598, %f603;
|
|
add.f32 %f605, %f602, %f604;
|
|
mul.rn.f32 %f607, %f450, %f603;
|
|
neg.f32 %f608, %f607;
|
|
fma.rn.f32 %f609, %f450, %f603, %f608;
|
|
fma.rn.f32 %f610, %f450, %f605, %f609;
|
|
fma.rn.f32 %f612, %f455, %f603, %f610;
|
|
add.rn.f32 %f613, %f607, %f612;
|
|
neg.f32 %f614, %f613;
|
|
add.rn.f32 %f615, %f607, %f614;
|
|
add.rn.f32 %f616, %f615, %f612;
|
|
mov.b32 %r101, %f613;
|
|
setp.eq.s32 %p86, %r101, 1118925336;
|
|
add.s32 %r102, %r101, -1;
|
|
mov.b32 %f617, %r102;
|
|
add.f32 %f618, %f616, 0f37000000;
|
|
selp.f32 %f619, %f617, %f613, %p86;
|
|
selp.f32 %f88, %f618, %f616, %p86;
|
|
mul.f32 %f620, %f619, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f621, %f620;
|
|
fma.rn.f32 %f623, %f621, %f721, %f619;
|
|
fma.rn.f32 %f625, %f621, %f722, %f623;
|
|
mul.f32 %f626, %f625, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f627, %f626;
|
|
add.f32 %f628, %f621, 0f00000000;
|
|
ex2.approx.f32 %f629, %f628;
|
|
mul.f32 %f630, %f627, %f629;
|
|
setp.lt.f32 %p87, %f619, 0fC2D20000;
|
|
selp.f32 %f631, 0f00000000, %f630, %p87;
|
|
setp.gt.f32 %p88, %f619, 0f42D20000;
|
|
selp.f32 %f753, 0f7F800000, %f631, %p88;
|
|
setp.eq.f32 %p89, %f753, 0f7F800000;
|
|
@%p89 bra BB0_58;
|
|
|
|
fma.rn.f32 %f753, %f753, %f88, %f753;
|
|
|
|
BB0_58:
|
|
setp.lt.f32 %p90, %f46, 0f00000000;
|
|
and.pred %p5, %p90, %p59;
|
|
mov.b32 %r103, %f753;
|
|
xor.b32 %r104, %r103, -2147483648;
|
|
mov.b32 %f632, %r104;
|
|
selp.f32 %f755, %f632, %f753, %p5;
|
|
setp.eq.f32 %p92, %f46, 0f00000000;
|
|
@%p92 bra BB0_61;
|
|
bra.uni BB0_59;
|
|
|
|
BB0_61:
|
|
add.f32 %f635, %f46, %f46;
|
|
selp.f32 %f755, %f635, 0f00000000, %p59;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_59:
|
|
setp.geu.f32 %p93, %f46, 0f00000000;
|
|
@%p93 bra BB0_62;
|
|
|
|
cvt.rzi.f32.f32 %f634, %f450;
|
|
setp.neu.f32 %p94, %f634, 0f3EE66666;
|
|
selp.f32 %f755, 0f7FFFFFFF, %f755, %p94;
|
|
|
|
BB0_62:
|
|
add.f32 %f636, %f87, 0f3EE66666;
|
|
mov.b32 %r105, %f636;
|
|
setp.lt.s32 %p96, %r105, 2139095040;
|
|
@%p96 bra BB0_67;
|
|
|
|
setp.gtu.f32 %p97, %f87, 0f7F800000;
|
|
@%p97 bra BB0_66;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_66:
|
|
add.f32 %f755, %f46, 0f3EE66666;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_64:
|
|
setp.neu.f32 %p98, %f87, 0f7F800000;
|
|
@%p98 bra BB0_67;
|
|
|
|
selp.f32 %f755, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_67:
|
|
setp.eq.f32 %p99, %f46, 0f3F800000;
|
|
selp.f32 %f637, 0f3F800000, %f755, %p99;
|
|
cvt.u64.u32 %rd36, %r3;
|
|
cvt.u64.u32 %rd35, %r2;
|
|
mov.u64 %rd39, image;
|
|
cvta.global.u64 %rd34, %rd39;
|
|
// inline asm
|
|
call (%rd33), _rt_buffer_get_64, (%rd34, %r26, %r27, %rd35, %rd36, %rd15, %rd15);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f638, %f637;
|
|
mul.f32 %f639, %f638, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r108, %f639;
|
|
cvt.sat.f32.f32 %f640, %f86;
|
|
mul.f32 %f641, %f640, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r109, %f641;
|
|
cvt.sat.f32.f32 %f642, %f73;
|
|
mul.f32 %f643, %f642, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r110, %f643;
|
|
cvt.u16.u32 %rs13, %r108;
|
|
cvt.u16.u32 %rs14, %r110;
|
|
cvt.u16.u32 %rs15, %r109;
|
|
mov.u16 %rs16, 255;
|
|
st.v4.u8 [%rd33], {%rs13, %rs15, %rs14, %rs16};
|
|
ld.global.u32 %r162, [imageEnabled];
|
|
|
|
BB0_68:
|
|
and.b32 %r111, %r162, 4;
|
|
setp.eq.s32 %p100, %r111, 0;
|
|
@%p100 bra BB0_72;
|
|
|
|
ld.global.u32 %r112, [additive];
|
|
setp.eq.s32 %p101, %r112, 0;
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
mov.f32 %f644, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs17, %f644;}
|
|
|
|
// inline asm
|
|
@%p101 bra BB0_71;
|
|
|
|
mov.u64 %rd52, image_HDR;
|
|
cvta.global.u64 %rd41, %rd52;
|
|
mov.u32 %r116, 8;
|
|
// inline asm
|
|
call (%rd40), _rt_buffer_get_64, (%rd41, %r26, %r116, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs24, %rs25, %rs26, %rs27}, [%rd40];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f645, %rs24;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f646, %rs25;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f647, %rs26;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd46), _rt_buffer_get_64, (%rd41, %r26, %r116, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f648, %f44, %f645;
|
|
add.f32 %f649, %f45, %f646;
|
|
add.f32 %f650, %f46, %f647;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f650;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs22, %f649;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs21, %f648;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd46], {%rs21, %rs22, %rs23, %rs17};
|
|
bra.uni BB0_72;
|
|
|
|
BB0_71:
|
|
mov.u64 %rd59, image_HDR;
|
|
cvta.global.u64 %rd54, %rd59;
|
|
mov.u32 %r118, 8;
|
|
// inline asm
|
|
call (%rd53), _rt_buffer_get_64, (%rd54, %r26, %r118, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f46;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f45;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f44;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd53], {%rs28, %rs29, %rs30, %rs17};
|
|
|
|
BB0_72:
|
|
ld.global.u8 %rs31, [imageEnabled];
|
|
and.b16 %rs32, %rs31, 64;
|
|
setp.eq.s16 %p102, %rs32, 0;
|
|
@%p102 bra BB0_95;
|
|
|
|
sub.f32 %f728, %f11, %f12;
|
|
mul.f32 %f727, %f728, %f128;
|
|
sub.f32 %f726, %f7, %f8;
|
|
mul.f32 %f725, %f726, %f128;
|
|
sub.f32 %f724, %f9, %f10;
|
|
mul.f32 %f723, %f724, %f128;
|
|
cvt.u64.u32 %rd62, %r2;
|
|
cvt.u64.u32 %rd63, %r3;
|
|
mov.u64 %rd66, image_Dir;
|
|
cvta.global.u64 %rd61, %rd66;
|
|
// inline asm
|
|
call (%rd60), _rt_buffer_get_64, (%rd61, %r26, %r27, %rd62, %rd63, %rd15, %rd15);
|
|
// inline asm
|
|
fma.rn.f32 %f654, %f725, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f655, %f654, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r121, %f655;
|
|
fma.rn.f32 %f656, %f723, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f657, %f656, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r122, %f657;
|
|
fma.rn.f32 %f658, %f727, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f659, %f658, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r123, %f659;
|
|
cvt.u16.u32 %rs33, %r123;
|
|
cvt.u16.u32 %rs34, %r122;
|
|
cvt.u16.u32 %rs35, %r121;
|
|
mov.u16 %rs36, 255;
|
|
st.v4.u8 [%rd60], {%rs35, %rs34, %rs33, %rs36};
|
|
|
|
BB0_95:
|
|
ret;
|
|
}
|
|
|
|
|