2251 lines
62 KiB
Plaintext
2251 lines
62 KiB
Plaintext
//
|
|
// Generated by NVIDIA NVVM Compiler
|
|
//
|
|
// Compiler Build ID: CL-23083092
|
|
// Cuda compilation tools, release 9.1, V9.1.85
|
|
// Based on LLVM 3.4svn
|
|
//
|
|
|
|
.version 6.1
|
|
.target sm_30
|
|
.address_size 64
|
|
|
|
// .globl _Z6oxMainv
|
|
.global .align 8 .b8 pixelID[8];
|
|
.global .align 8 .b8 resolution[8];
|
|
.global .align 4 .b8 normal[12];
|
|
.global .align 4 .b8 camPos[12];
|
|
.global .align 4 .b8 root[4];
|
|
.global .align 4 .u32 imageEnabled;
|
|
.global .texref lightmap;
|
|
.global .align 16 .b8 tileInfo[16];
|
|
.global .align 4 .u32 additive;
|
|
.global .align 1 .b8 image[1];
|
|
.global .align 1 .b8 image_HDR[1];
|
|
.global .align 1 .b8 image_HDR2[1];
|
|
.global .align 1 .b8 image_Mask[1];
|
|
.global .align 1 .b8 image_RNM0[1];
|
|
.global .align 1 .b8 image_RNM1[1];
|
|
.global .align 1 .b8 image_RNM2[1];
|
|
.global .align 1 .b8 image_RNM3[1];
|
|
.global .align 1 .b8 uvpos[1];
|
|
.global .align 1 .b8 uvnormal[1];
|
|
.global .align 4 .u32 samples;
|
|
.global .align 4 .f32 lightInvCutoff;
|
|
.global .align 4 .f32 lightRadius;
|
|
.global .align 4 .b8 lightPos[12];
|
|
.global .align 4 .b8 lightColor[12];
|
|
.global .align 4 .u32 ignoreNormal;
|
|
.global .align 4 .f32 lightFalloffFakeDistanceMult;
|
|
.global .align 4 .f32 lightFalloffMinRadiusSq;
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8lightPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo28lightFalloffFakeDistanceMultE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo23lightFalloffMinRadiusSqE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
|
|
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename8lightPosE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename28lightFalloffFakeDistanceMultE[6] = {102, 108, 111, 97, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename23lightFalloffMinRadiusSqE[6] = {102, 108, 111, 97, 116, 0};
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8lightPosE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum28lightFalloffFakeDistanceMultE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum23lightFalloffMinRadiusSqE = 4919;
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8lightPosE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic28lightFalloffFakeDistanceMultE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic23lightFalloffMinRadiusSqE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8lightPosE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation28lightFalloffFakeDistanceMultE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation23lightFalloffMinRadiusSqE[1];
|
|
|
|
.visible .entry _Z6oxMainv(
|
|
|
|
)
|
|
{
|
|
.local .align 4 .b8 __local_depot0[4];
|
|
.reg .b64 %SP;
|
|
.reg .b64 %SPL;
|
|
.reg .pred %p<122>;
|
|
.reg .b16 %rs<221>;
|
|
.reg .f32 %f<855>;
|
|
.reg .b32 %r<242>;
|
|
.reg .b64 %rd<369>;
|
|
|
|
|
|
mov.u64 %rd368, __local_depot0;
|
|
cvta.local.u64 %SP, %rd368;
|
|
ld.global.v2.u32 {%r28, %r29}, [pixelID];
|
|
cvt.u64.u32 %rd12, %r28;
|
|
cvt.u64.u32 %rd13, %r29;
|
|
mov.u64 %rd16, uvnormal;
|
|
cvta.global.u64 %rd11, %rd16;
|
|
mov.u32 %r26, 2;
|
|
mov.u32 %r27, 4;
|
|
mov.u64 %rd15, 0;
|
|
// inline asm
|
|
call (%rd10), _rt_buffer_get_64, (%rd11, %r26, %r27, %rd12, %rd13, %rd15, %rd15);
|
|
// inline asm
|
|
ld.u32 %r1, [%rd10];
|
|
shr.u32 %r32, %r1, 16;
|
|
cvt.u16.u32 %rs1, %r32;
|
|
and.b16 %rs12, %rs1, 255;
|
|
cvt.u16.u32 %rs13, %r1;
|
|
or.b16 %rs14, %rs13, %rs12;
|
|
setp.eq.s16 %p6, %rs14, 0;
|
|
mov.f32 %f831, 0f00000000;
|
|
mov.f32 %f832, %f831;
|
|
mov.f32 %f833, %f831;
|
|
@%p6 bra BB0_2;
|
|
|
|
ld.u8 %rs15, [%rd10+1];
|
|
and.b16 %rs17, %rs13, 255;
|
|
cvt.rn.f32.u16 %f113, %rs17;
|
|
div.rn.f32 %f114, %f113, 0f437F0000;
|
|
fma.rn.f32 %f115, %f114, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f116, %rs15;
|
|
div.rn.f32 %f117, %f116, 0f437F0000;
|
|
fma.rn.f32 %f118, %f117, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f119, %rs12;
|
|
div.rn.f32 %f120, %f119, 0f437F0000;
|
|
fma.rn.f32 %f121, %f120, 0f40000000, 0fBF800000;
|
|
mul.f32 %f122, %f118, %f118;
|
|
fma.rn.f32 %f123, %f115, %f115, %f122;
|
|
fma.rn.f32 %f124, %f121, %f121, %f123;
|
|
sqrt.rn.f32 %f125, %f124;
|
|
rcp.rn.f32 %f126, %f125;
|
|
mul.f32 %f831, %f115, %f126;
|
|
mul.f32 %f832, %f118, %f126;
|
|
mul.f32 %f833, %f121, %f126;
|
|
|
|
BB0_2:
|
|
ld.global.v2.u32 {%r33, %r34}, [pixelID];
|
|
ld.global.v2.u32 {%r36, %r37}, [tileInfo];
|
|
add.s32 %r2, %r33, %r36;
|
|
add.s32 %r3, %r34, %r37;
|
|
setp.eq.f32 %p7, %f832, 0f00000000;
|
|
setp.eq.f32 %p8, %f831, 0f00000000;
|
|
and.pred %p9, %p8, %p7;
|
|
setp.eq.f32 %p10, %f833, 0f00000000;
|
|
and.pred %p11, %p9, %p10;
|
|
@%p11 bra BB0_105;
|
|
bra.uni BB0_3;
|
|
|
|
BB0_105:
|
|
ld.global.u32 %r241, [imageEnabled];
|
|
and.b32 %r190, %r241, 1;
|
|
setp.eq.b32 %p114, %r190, 1;
|
|
@!%p114 bra BB0_107;
|
|
bra.uni BB0_106;
|
|
|
|
BB0_106:
|
|
cvt.u64.u32 %rd256, %r2;
|
|
cvt.u64.u32 %rd257, %r3;
|
|
mov.u64 %rd260, image;
|
|
cvta.global.u64 %rd255, %rd260;
|
|
// inline asm
|
|
call (%rd254), _rt_buffer_get_64, (%rd255, %r26, %r27, %rd256, %rd257, %rd15, %rd15);
|
|
// inline asm
|
|
mov.u16 %rs153, 0;
|
|
st.v4.u8 [%rd254], {%rs153, %rs153, %rs153, %rs153};
|
|
ld.global.u32 %r241, [imageEnabled];
|
|
|
|
BB0_107:
|
|
and.b32 %r193, %r241, 8;
|
|
setp.eq.s32 %p115, %r193, 0;
|
|
@%p115 bra BB0_109;
|
|
|
|
cvt.u64.u32 %rd264, %r3;
|
|
cvt.u64.u32 %rd263, %r2;
|
|
mov.u64 %rd267, image_Mask;
|
|
cvta.global.u64 %rd262, %rd267;
|
|
// inline asm
|
|
call (%rd261), _rt_buffer_get_64, (%rd262, %r26, %r26, %rd263, %rd264, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f744, 0f00000000;
|
|
cvt.rzi.u32.f32 %r196, %f744;
|
|
cvt.u16.u32 %rs154, %r196;
|
|
mov.u16 %rs155, 0;
|
|
st.v2.u8 [%rd261], {%rs154, %rs155};
|
|
ld.global.u32 %r241, [imageEnabled];
|
|
|
|
BB0_109:
|
|
cvt.u64.u32 %rd8, %r2;
|
|
cvt.u64.u32 %rd9, %r3;
|
|
and.b32 %r197, %r241, 4;
|
|
setp.eq.s32 %p116, %r197, 0;
|
|
@%p116 bra BB0_113;
|
|
|
|
ld.global.u32 %r198, [additive];
|
|
setp.eq.s32 %p117, %r198, 0;
|
|
@%p117 bra BB0_112;
|
|
|
|
mov.u64 %rd280, image_HDR;
|
|
cvta.global.u64 %rd269, %rd280;
|
|
mov.u32 %r202, 8;
|
|
// inline asm
|
|
call (%rd268), _rt_buffer_get_64, (%rd269, %r26, %r202, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs162, %rs163, %rs164, %rs165}, [%rd268];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f745, %rs162;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f746, %rs163;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f747, %rs164;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd274), _rt_buffer_get_64, (%rd269, %r26, %r202, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f748, %f745, 0f00000000;
|
|
add.f32 %f749, %f746, 0f00000000;
|
|
add.f32 %f750, %f747, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs161, %f750;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs160, %f749;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f748;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs166, 0;
|
|
st.v4.u16 [%rd274], {%rs159, %rs160, %rs161, %rs166};
|
|
bra.uni BB0_113;
|
|
|
|
BB0_3:
|
|
ld.global.v2.u32 {%r43, %r44}, [pixelID];
|
|
cvt.u64.u32 %rd19, %r43;
|
|
cvt.u64.u32 %rd20, %r44;
|
|
mov.u64 %rd23, uvpos;
|
|
cvta.global.u64 %rd18, %rd23;
|
|
mov.u32 %r42, 12;
|
|
// inline asm
|
|
call (%rd17), _rt_buffer_get_64, (%rd18, %r26, %r42, %rd19, %rd20, %rd15, %rd15);
|
|
// inline asm
|
|
ld.global.f32 %f7, [lightPos];
|
|
ld.f32 %f12, [%rd17+8];
|
|
ld.f32 %f10, [%rd17+4];
|
|
ld.f32 %f8, [%rd17];
|
|
sub.f32 %f129, %f7, %f8;
|
|
ld.global.f32 %f9, [lightPos+4];
|
|
sub.f32 %f130, %f9, %f10;
|
|
ld.global.f32 %f11, [lightPos+8];
|
|
sub.f32 %f131, %f11, %f12;
|
|
mul.f32 %f132, %f130, %f130;
|
|
fma.rn.f32 %f133, %f129, %f129, %f132;
|
|
fma.rn.f32 %f134, %f131, %f131, %f133;
|
|
sqrt.rn.f32 %f135, %f134;
|
|
rcp.rn.f32 %f136, %f135;
|
|
ld.global.f32 %f137, [lightFalloffFakeDistanceMult];
|
|
mul.f32 %f16, %f135, %f137;
|
|
ld.global.f32 %f138, [lightInvCutoff];
|
|
mul.f32 %f17, %f135, %f138;
|
|
mov.f32 %f142, 0f40800000;
|
|
abs.f32 %f19, %f17;
|
|
setp.lt.f32 %p12, %f19, 0f00800000;
|
|
mul.f32 %f144, %f19, 0f4B800000;
|
|
selp.f32 %f145, 0fC3170000, 0fC2FE0000, %p12;
|
|
selp.f32 %f146, %f144, %f19, %p12;
|
|
mov.b32 %r47, %f146;
|
|
and.b32 %r48, %r47, 8388607;
|
|
or.b32 %r49, %r48, 1065353216;
|
|
mov.b32 %f147, %r49;
|
|
shr.u32 %r50, %r47, 23;
|
|
cvt.rn.f32.u32 %f148, %r50;
|
|
add.f32 %f149, %f145, %f148;
|
|
setp.gt.f32 %p13, %f147, 0f3FB504F3;
|
|
mul.f32 %f150, %f147, 0f3F000000;
|
|
add.f32 %f151, %f149, 0f3F800000;
|
|
selp.f32 %f152, %f150, %f147, %p13;
|
|
selp.f32 %f153, %f151, %f149, %p13;
|
|
add.f32 %f154, %f152, 0fBF800000;
|
|
add.f32 %f128, %f152, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f127,%f128;
|
|
// inline asm
|
|
add.f32 %f155, %f154, %f154;
|
|
mul.f32 %f156, %f127, %f155;
|
|
mul.f32 %f157, %f156, %f156;
|
|
mov.f32 %f158, 0f3C4CAF63;
|
|
mov.f32 %f159, 0f3B18F0FE;
|
|
fma.rn.f32 %f160, %f159, %f157, %f158;
|
|
mov.f32 %f161, 0f3DAAAABD;
|
|
fma.rn.f32 %f162, %f160, %f157, %f161;
|
|
mul.rn.f32 %f163, %f162, %f157;
|
|
mul.rn.f32 %f164, %f163, %f156;
|
|
sub.f32 %f165, %f154, %f156;
|
|
neg.f32 %f166, %f156;
|
|
add.f32 %f167, %f165, %f165;
|
|
fma.rn.f32 %f168, %f166, %f154, %f167;
|
|
mul.rn.f32 %f169, %f127, %f168;
|
|
add.f32 %f170, %f164, %f156;
|
|
sub.f32 %f171, %f156, %f170;
|
|
add.f32 %f172, %f164, %f171;
|
|
add.f32 %f173, %f169, %f172;
|
|
add.f32 %f174, %f170, %f173;
|
|
sub.f32 %f175, %f170, %f174;
|
|
add.f32 %f176, %f173, %f175;
|
|
mov.f32 %f177, 0f3F317200;
|
|
mul.rn.f32 %f178, %f153, %f177;
|
|
mov.f32 %f179, 0f35BFBE8E;
|
|
mul.rn.f32 %f180, %f153, %f179;
|
|
add.f32 %f181, %f178, %f174;
|
|
sub.f32 %f182, %f178, %f181;
|
|
add.f32 %f183, %f174, %f182;
|
|
add.f32 %f184, %f176, %f183;
|
|
add.f32 %f185, %f180, %f184;
|
|
add.f32 %f186, %f181, %f185;
|
|
sub.f32 %f187, %f181, %f186;
|
|
add.f32 %f188, %f185, %f187;
|
|
mul.rn.f32 %f189, %f142, %f186;
|
|
neg.f32 %f190, %f189;
|
|
fma.rn.f32 %f191, %f142, %f186, %f190;
|
|
fma.rn.f32 %f192, %f142, %f188, %f191;
|
|
mov.f32 %f193, 0f00000000;
|
|
fma.rn.f32 %f194, %f193, %f186, %f192;
|
|
add.rn.f32 %f195, %f189, %f194;
|
|
neg.f32 %f196, %f195;
|
|
add.rn.f32 %f197, %f189, %f196;
|
|
add.rn.f32 %f198, %f197, %f194;
|
|
mov.b32 %r51, %f195;
|
|
setp.eq.s32 %p14, %r51, 1118925336;
|
|
add.s32 %r52, %r51, -1;
|
|
mov.b32 %f199, %r52;
|
|
add.f32 %f200, %f198, 0f37000000;
|
|
selp.f32 %f201, %f199, %f195, %p14;
|
|
selp.f32 %f20, %f200, %f198, %p14;
|
|
mul.f32 %f202, %f201, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f203, %f202;
|
|
mov.f32 %f204, 0fBF317200;
|
|
fma.rn.f32 %f205, %f203, %f204, %f201;
|
|
mov.f32 %f206, 0fB5BFBE8E;
|
|
fma.rn.f32 %f207, %f203, %f206, %f205;
|
|
mul.f32 %f208, %f207, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f209, %f208;
|
|
add.f32 %f210, %f203, 0f00000000;
|
|
ex2.approx.f32 %f211, %f210;
|
|
mul.f32 %f212, %f209, %f211;
|
|
setp.lt.f32 %p15, %f201, 0fC2D20000;
|
|
selp.f32 %f213, 0f00000000, %f212, %p15;
|
|
setp.gt.f32 %p16, %f201, 0f42D20000;
|
|
selp.f32 %f834, 0f7F800000, %f213, %p16;
|
|
setp.eq.f32 %p17, %f834, 0f7F800000;
|
|
@%p17 bra BB0_5;
|
|
|
|
fma.rn.f32 %f834, %f834, %f20, %f834;
|
|
|
|
BB0_5:
|
|
mov.f32 %f785, 0f40000000;
|
|
cvt.rzi.f32.f32 %f784, %f785;
|
|
add.f32 %f783, %f784, %f784;
|
|
mov.f32 %f782, 0f40800000;
|
|
sub.f32 %f781, %f782, %f783;
|
|
abs.f32 %f780, %f781;
|
|
setp.lt.f32 %p18, %f17, 0f00000000;
|
|
setp.eq.f32 %p19, %f780, 0f3F800000;
|
|
and.pred %p1, %p18, %p19;
|
|
mov.b32 %r53, %f834;
|
|
xor.b32 %r54, %r53, -2147483648;
|
|
mov.b32 %f214, %r54;
|
|
selp.f32 %f836, %f214, %f834, %p1;
|
|
setp.eq.f32 %p20, %f17, 0f00000000;
|
|
@%p20 bra BB0_8;
|
|
bra.uni BB0_6;
|
|
|
|
BB0_8:
|
|
add.f32 %f217, %f17, %f17;
|
|
selp.f32 %f836, %f217, 0f00000000, %p19;
|
|
bra.uni BB0_9;
|
|
|
|
BB0_6:
|
|
setp.geu.f32 %p21, %f17, 0f00000000;
|
|
@%p21 bra BB0_9;
|
|
|
|
mov.f32 %f830, 0f40800000;
|
|
cvt.rzi.f32.f32 %f216, %f830;
|
|
setp.neu.f32 %p22, %f216, 0f40800000;
|
|
selp.f32 %f836, 0f7FFFFFFF, %f836, %p22;
|
|
|
|
BB0_9:
|
|
abs.f32 %f786, %f17;
|
|
add.f32 %f218, %f786, 0f40800000;
|
|
mov.b32 %r55, %f218;
|
|
setp.lt.s32 %p24, %r55, 2139095040;
|
|
@%p24 bra BB0_14;
|
|
|
|
abs.f32 %f828, %f17;
|
|
setp.gtu.f32 %p25, %f828, 0f7F800000;
|
|
@%p25 bra BB0_13;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_13:
|
|
add.f32 %f836, %f17, 0f40800000;
|
|
bra.uni BB0_14;
|
|
|
|
BB0_11:
|
|
abs.f32 %f829, %f17;
|
|
setp.neu.f32 %p26, %f829, 0f7F800000;
|
|
@%p26 bra BB0_14;
|
|
|
|
selp.f32 %f836, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_14:
|
|
sub.f32 %f792, %f11, %f12;
|
|
mul.f32 %f791, %f792, %f136;
|
|
sub.f32 %f790, %f7, %f8;
|
|
mul.f32 %f789, %f790, %f136;
|
|
sub.f32 %f788, %f9, %f10;
|
|
mul.f32 %f787, %f788, %f136;
|
|
mov.f32 %f842, 0f3F800000;
|
|
sub.f32 %f220, %f842, %f836;
|
|
setp.eq.f32 %p27, %f17, 0f3F800000;
|
|
selp.f32 %f221, 0f00000000, %f220, %p27;
|
|
cvt.sat.f32.f32 %f222, %f221;
|
|
ld.global.f32 %f223, [lightFalloffMinRadiusSq];
|
|
fma.rn.f32 %f224, %f16, %f16, %f223;
|
|
div.rn.f32 %f31, %f222, %f224;
|
|
mul.f32 %f225, %f832, %f787;
|
|
fma.rn.f32 %f226, %f831, %f789, %f225;
|
|
fma.rn.f32 %f32, %f833, %f791, %f226;
|
|
ld.global.u32 %r239, [imageEnabled];
|
|
ld.global.f32 %f227, [lightColor+4];
|
|
ld.global.f32 %f228, [lightColor];
|
|
max.f32 %f229, %f228, %f227;
|
|
ld.global.f32 %f230, [lightColor+8];
|
|
max.f32 %f231, %f229, %f230;
|
|
mul.f32 %f232, %f31, %f231;
|
|
setp.lt.f32 %p28, %f232, 0f3727C5AC;
|
|
@%p28 bra BB0_85;
|
|
bra.uni BB0_15;
|
|
|
|
BB0_85:
|
|
and.b32 %r147, %r239, 1;
|
|
setp.eq.b32 %p106, %r147, 1;
|
|
@!%p106 bra BB0_87;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_86:
|
|
cvt.u64.u32 %rd142, %r2;
|
|
cvt.u64.u32 %rd143, %r3;
|
|
mov.u64 %rd146, image;
|
|
cvta.global.u64 %rd141, %rd146;
|
|
// inline asm
|
|
call (%rd140), _rt_buffer_get_64, (%rd141, %r26, %r27, %rd142, %rd143, %rd15, %rd15);
|
|
// inline asm
|
|
mov.u16 %rs89, 1;
|
|
mov.u16 %rs90, 0;
|
|
st.v4.u8 [%rd140], {%rs90, %rs90, %rs90, %rs89};
|
|
ld.global.u32 %r239, [imageEnabled];
|
|
|
|
BB0_87:
|
|
and.b32 %r150, %r239, 8;
|
|
setp.eq.s32 %p107, %r150, 0;
|
|
@%p107 bra BB0_89;
|
|
|
|
cvt.u64.u32 %rd150, %r3;
|
|
cvt.u64.u32 %rd149, %r2;
|
|
mov.u64 %rd153, image_Mask;
|
|
cvta.global.u64 %rd148, %rd153;
|
|
// inline asm
|
|
call (%rd147), _rt_buffer_get_64, (%rd148, %r26, %r26, %rd149, %rd150, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f701, 0f00000000;
|
|
cvt.rzi.u32.f32 %r153, %f701;
|
|
cvt.u16.u32 %rs91, %r153;
|
|
mov.u16 %rs92, 255;
|
|
st.v2.u8 [%rd147], {%rs91, %rs92};
|
|
ld.global.u32 %r239, [imageEnabled];
|
|
|
|
BB0_89:
|
|
cvt.u64.u32 %rd6, %r2;
|
|
cvt.u64.u32 %rd7, %r3;
|
|
and.b32 %r154, %r239, 4;
|
|
setp.eq.s32 %p108, %r154, 0;
|
|
@%p108 bra BB0_93;
|
|
|
|
ld.global.u32 %r155, [additive];
|
|
setp.eq.s32 %p109, %r155, 0;
|
|
mov.f32 %f702, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs93, %f702;}
|
|
|
|
// inline asm
|
|
@%p109 bra BB0_92;
|
|
|
|
mov.u64 %rd166, image_HDR;
|
|
cvta.global.u64 %rd155, %rd166;
|
|
mov.u32 %r159, 8;
|
|
// inline asm
|
|
call (%rd154), _rt_buffer_get_64, (%rd155, %r26, %r159, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs100, %rs101, %rs102, %rs103}, [%rd154];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f703, %rs100;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f704, %rs101;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f705, %rs102;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd160), _rt_buffer_get_64, (%rd155, %r26, %r159, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f706, %f703, 0f00000000;
|
|
add.f32 %f707, %f704, 0f00000000;
|
|
add.f32 %f708, %f705, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f708;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs98, %f707;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f706;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd160], {%rs97, %rs98, %rs99, %rs93};
|
|
bra.uni BB0_93;
|
|
|
|
BB0_15:
|
|
mov.f32 %f840, 0f00000000;
|
|
mul.f32 %f234, %f8, 0f3456BF95;
|
|
abs.f32 %f235, %f831;
|
|
div.rn.f32 %f236, %f234, %f235;
|
|
abs.f32 %f237, %f832;
|
|
mul.f32 %f238, %f10, 0f3456BF95;
|
|
div.rn.f32 %f239, %f238, %f237;
|
|
abs.f32 %f240, %f833;
|
|
mul.f32 %f241, %f12, 0f3456BF95;
|
|
div.rn.f32 %f242, %f241, %f240;
|
|
abs.f32 %f243, %f236;
|
|
abs.f32 %f244, %f239;
|
|
abs.f32 %f245, %f242;
|
|
mov.f32 %f246, 0f38D1B717;
|
|
max.f32 %f247, %f243, %f246;
|
|
max.f32 %f248, %f244, %f246;
|
|
max.f32 %f249, %f245, %f246;
|
|
fma.rn.f32 %f33, %f831, %f247, %f8;
|
|
fma.rn.f32 %f34, %f832, %f248, %f10;
|
|
fma.rn.f32 %f35, %f833, %f249, %f12;
|
|
ld.global.u32 %r235, [samples];
|
|
setp.lt.s32 %p29, %r235, 1;
|
|
@%p29 bra BB0_18;
|
|
|
|
mul.f32 %f251, %f33, 0f3456BF95;
|
|
abs.f32 %f252, %f251;
|
|
mul.f32 %f253, %f34, 0f3456BF95;
|
|
abs.f32 %f254, %f253;
|
|
mul.f32 %f255, %f35, 0f3456BF95;
|
|
abs.f32 %f256, %f255;
|
|
max.f32 %f257, %f252, %f254;
|
|
max.f32 %f258, %f257, %f256;
|
|
max.f32 %f36, %f258, %f246;
|
|
add.u64 %rd24, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd24;
|
|
mov.f32 %f840, 0f00000000;
|
|
mov.u32 %r234, 0;
|
|
mov.u32 %r233, %r239;
|
|
mov.f32 %f837, %f11;
|
|
mov.f32 %f838, %f9;
|
|
mov.f32 %f839, %f7;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_84:
|
|
ld.global.f32 %f839, [lightPos];
|
|
ld.global.f32 %f838, [lightPos+4];
|
|
ld.global.f32 %f837, [lightPos+8];
|
|
ld.global.u32 %r233, [imageEnabled];
|
|
|
|
BB0_17:
|
|
cvt.rn.f32.s32 %f268, %r234;
|
|
mul.f32 %f269, %f268, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f270, %f269;
|
|
sub.f32 %f271, %f269, %f270;
|
|
mul.f32 %f272, %f268, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f273, %f272;
|
|
sub.f32 %f274, %f272, %f273;
|
|
mul.f32 %f275, %f268, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f276, %f275;
|
|
sub.f32 %f277, %f275, %f276;
|
|
add.f32 %f278, %f274, 0f4199851F;
|
|
add.f32 %f279, %f277, 0f4199851F;
|
|
add.f32 %f280, %f271, 0f4199851F;
|
|
mul.f32 %f281, %f274, %f279;
|
|
fma.rn.f32 %f282, %f271, %f278, %f281;
|
|
fma.rn.f32 %f283, %f280, %f277, %f282;
|
|
add.f32 %f284, %f271, %f283;
|
|
add.f32 %f285, %f274, %f283;
|
|
add.f32 %f286, %f277, %f283;
|
|
add.f32 %f287, %f284, %f285;
|
|
mul.f32 %f288, %f286, %f287;
|
|
cvt.rmi.f32.f32 %f289, %f288;
|
|
sub.f32 %f290, %f288, %f289;
|
|
add.f32 %f291, %f284, %f286;
|
|
mul.f32 %f292, %f285, %f291;
|
|
cvt.rmi.f32.f32 %f293, %f292;
|
|
sub.f32 %f294, %f292, %f293;
|
|
add.f32 %f295, %f285, %f286;
|
|
mul.f32 %f296, %f284, %f295;
|
|
cvt.rmi.f32.f32 %f297, %f296;
|
|
sub.f32 %f298, %f296, %f297;
|
|
fma.rn.f32 %f299, %f290, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f300, %f294, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f301, %f298, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f302, [lightRadius];
|
|
fma.rn.f32 %f303, %f302, %f299, %f839;
|
|
fma.rn.f32 %f304, %f302, %f300, %f838;
|
|
fma.rn.f32 %f305, %f302, %f301, %f837;
|
|
sub.f32 %f306, %f303, %f8;
|
|
sub.f32 %f307, %f304, %f10;
|
|
sub.f32 %f308, %f305, %f12;
|
|
mul.f32 %f309, %f307, %f307;
|
|
fma.rn.f32 %f310, %f306, %f306, %f309;
|
|
fma.rn.f32 %f311, %f308, %f308, %f310;
|
|
sqrt.rn.f32 %f267, %f311;
|
|
rcp.rn.f32 %f312, %f267;
|
|
mul.f32 %f263, %f312, %f306;
|
|
mul.f32 %f264, %f312, %f307;
|
|
mul.f32 %f265, %f312, %f308;
|
|
and.b32 %r60, %r233, 32;
|
|
setp.eq.s32 %p30, %r60, 0;
|
|
selp.f32 %f313, 0f3F800000, 0f41200000, %p30;
|
|
mul.f32 %f266, %f313, %f36;
|
|
mov.u32 %r61, 1065353216;
|
|
st.local.u32 [%rd2], %r61;
|
|
ld.global.u32 %r57, [root];
|
|
mov.u32 %r58, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r57, %f33, %f34, %f35, %f263, %f264, %f265, %r58, %f266, %f267, %rd24, %r27);
|
|
// inline asm
|
|
ld.local.f32 %f314, [%rd2];
|
|
add.f32 %f840, %f840, %f314;
|
|
ld.global.u32 %r235, [samples];
|
|
add.s32 %r234, %r234, 1;
|
|
setp.lt.s32 %p31, %r234, %r235;
|
|
@%p31 bra BB0_84;
|
|
|
|
BB0_18:
|
|
ld.global.u32 %r62, [ignoreNormal];
|
|
setp.eq.s32 %p32, %r235, 0;
|
|
and.b32 %r63, %r239, 32;
|
|
or.b32 %r64, %r63, %r62;
|
|
setp.eq.s32 %p33, %r64, 0;
|
|
selp.f32 %f43, %f32, 0f3F800000, %p33;
|
|
@%p32 bra BB0_20;
|
|
|
|
cvt.rn.f32.s32 %f316, %r235;
|
|
div.rn.f32 %f842, %f840, %f316;
|
|
|
|
BB0_20:
|
|
cvt.sat.f32.f32 %f317, %f43;
|
|
mul.f32 %f318, %f31, %f317;
|
|
mul.f32 %f319, %f842, %f318;
|
|
ld.global.f32 %f320, [lightColor];
|
|
mul.f32 %f46, %f320, %f319;
|
|
ld.global.f32 %f321, [lightColor+4];
|
|
mul.f32 %f47, %f321, %f319;
|
|
ld.global.f32 %f322, [lightColor+8];
|
|
mul.f32 %f48, %f319, %f322;
|
|
ld.global.u32 %r237, [imageEnabled];
|
|
and.b32 %r65, %r237, 8;
|
|
setp.eq.s32 %p34, %r65, 0;
|
|
@%p34 bra BB0_33;
|
|
|
|
mov.f32 %f800, 0fB5BFBE8E;
|
|
mov.f32 %f799, 0fBF317200;
|
|
mov.f32 %f798, 0f35BFBE8E;
|
|
mov.f32 %f797, 0f3F317200;
|
|
mov.f32 %f796, 0f3DAAAABD;
|
|
mov.f32 %f795, 0f3C4CAF63;
|
|
mov.f32 %f794, 0f3B18F0FE;
|
|
cvt.u64.u32 %rd28, %r2;
|
|
cvt.u64.u32 %rd29, %r3;
|
|
mov.u64 %rd32, image_Mask;
|
|
cvta.global.u64 %rd27, %rd32;
|
|
// inline asm
|
|
call (%rd26), _rt_buffer_get_64, (%rd27, %r26, %r26, %rd28, %rd29, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f325, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f326, %f325;
|
|
fma.rn.f32 %f327, %f326, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f49, %f327;
|
|
abs.f32 %f50, %f842;
|
|
setp.lt.f32 %p35, %f50, 0f00800000;
|
|
mul.f32 %f328, %f50, 0f4B800000;
|
|
selp.f32 %f329, 0fC3170000, 0fC2FE0000, %p35;
|
|
selp.f32 %f330, %f328, %f50, %p35;
|
|
mov.b32 %r68, %f330;
|
|
and.b32 %r69, %r68, 8388607;
|
|
or.b32 %r70, %r69, 1065353216;
|
|
mov.b32 %f331, %r70;
|
|
shr.u32 %r71, %r68, 23;
|
|
cvt.rn.f32.u32 %f332, %r71;
|
|
add.f32 %f333, %f329, %f332;
|
|
setp.gt.f32 %p36, %f331, 0f3FB504F3;
|
|
mul.f32 %f334, %f331, 0f3F000000;
|
|
add.f32 %f335, %f333, 0f3F800000;
|
|
selp.f32 %f336, %f334, %f331, %p36;
|
|
selp.f32 %f337, %f335, %f333, %p36;
|
|
add.f32 %f338, %f336, 0fBF800000;
|
|
add.f32 %f324, %f336, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f323,%f324;
|
|
// inline asm
|
|
add.f32 %f339, %f338, %f338;
|
|
mul.f32 %f340, %f323, %f339;
|
|
mul.f32 %f341, %f340, %f340;
|
|
fma.rn.f32 %f344, %f794, %f341, %f795;
|
|
fma.rn.f32 %f346, %f344, %f341, %f796;
|
|
mul.rn.f32 %f347, %f346, %f341;
|
|
mul.rn.f32 %f348, %f347, %f340;
|
|
sub.f32 %f349, %f338, %f340;
|
|
neg.f32 %f350, %f340;
|
|
add.f32 %f351, %f349, %f349;
|
|
fma.rn.f32 %f352, %f350, %f338, %f351;
|
|
mul.rn.f32 %f353, %f323, %f352;
|
|
add.f32 %f354, %f348, %f340;
|
|
sub.f32 %f355, %f340, %f354;
|
|
add.f32 %f356, %f348, %f355;
|
|
add.f32 %f357, %f353, %f356;
|
|
add.f32 %f358, %f354, %f357;
|
|
sub.f32 %f359, %f354, %f358;
|
|
add.f32 %f360, %f357, %f359;
|
|
mul.rn.f32 %f362, %f337, %f797;
|
|
mul.rn.f32 %f364, %f337, %f798;
|
|
add.f32 %f365, %f362, %f358;
|
|
sub.f32 %f366, %f362, %f365;
|
|
add.f32 %f367, %f358, %f366;
|
|
add.f32 %f368, %f360, %f367;
|
|
add.f32 %f369, %f364, %f368;
|
|
add.f32 %f370, %f365, %f369;
|
|
sub.f32 %f371, %f365, %f370;
|
|
add.f32 %f372, %f369, %f371;
|
|
mov.f32 %f373, 0f3EE8BA2E;
|
|
mul.rn.f32 %f374, %f373, %f370;
|
|
neg.f32 %f375, %f374;
|
|
fma.rn.f32 %f376, %f373, %f370, %f375;
|
|
fma.rn.f32 %f377, %f373, %f372, %f376;
|
|
mov.f32 %f378, 0f00000000;
|
|
fma.rn.f32 %f379, %f378, %f370, %f377;
|
|
add.rn.f32 %f380, %f374, %f379;
|
|
neg.f32 %f381, %f380;
|
|
add.rn.f32 %f382, %f374, %f381;
|
|
add.rn.f32 %f383, %f382, %f379;
|
|
mov.b32 %r72, %f380;
|
|
setp.eq.s32 %p37, %r72, 1118925336;
|
|
add.s32 %r73, %r72, -1;
|
|
mov.b32 %f384, %r73;
|
|
add.f32 %f385, %f383, 0f37000000;
|
|
selp.f32 %f386, %f384, %f380, %p37;
|
|
selp.f32 %f51, %f385, %f383, %p37;
|
|
mul.f32 %f387, %f386, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f388, %f387;
|
|
fma.rn.f32 %f390, %f388, %f799, %f386;
|
|
fma.rn.f32 %f392, %f388, %f800, %f390;
|
|
mul.f32 %f393, %f392, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f394, %f393;
|
|
add.f32 %f395, %f388, 0f00000000;
|
|
ex2.approx.f32 %f396, %f395;
|
|
mul.f32 %f397, %f394, %f396;
|
|
setp.lt.f32 %p38, %f386, 0fC2D20000;
|
|
selp.f32 %f398, 0f00000000, %f397, %p38;
|
|
setp.gt.f32 %p39, %f386, 0f42D20000;
|
|
selp.f32 %f843, 0f7F800000, %f398, %p39;
|
|
setp.eq.f32 %p40, %f843, 0f7F800000;
|
|
@%p40 bra BB0_23;
|
|
|
|
fma.rn.f32 %f843, %f843, %f51, %f843;
|
|
|
|
BB0_23:
|
|
setp.lt.f32 %p41, %f842, 0f00000000;
|
|
setp.eq.f32 %p42, %f49, 0f3F800000;
|
|
and.pred %p2, %p41, %p42;
|
|
mov.b32 %r74, %f843;
|
|
xor.b32 %r75, %r74, -2147483648;
|
|
mov.b32 %f399, %r75;
|
|
selp.f32 %f845, %f399, %f843, %p2;
|
|
setp.eq.f32 %p43, %f842, 0f00000000;
|
|
@%p43 bra BB0_26;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_26:
|
|
add.f32 %f402, %f842, %f842;
|
|
selp.f32 %f845, %f402, 0f00000000, %p42;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_112:
|
|
mov.u64 %rd287, image_HDR;
|
|
cvta.global.u64 %rd282, %rd287;
|
|
mov.u32 %r204, 8;
|
|
// inline asm
|
|
call (%rd281), _rt_buffer_get_64, (%rd282, %r26, %r204, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f751, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs167, %f751;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs168, 0;
|
|
st.v4.u16 [%rd281], {%rs167, %rs167, %rs167, %rs168};
|
|
|
|
BB0_113:
|
|
ld.global.u32 %r205, [additive];
|
|
setp.eq.s32 %p118, %r205, 0;
|
|
@%p118 bra BB0_115;
|
|
|
|
mov.u64 %rd300, image_RNM0;
|
|
cvta.global.u64 %rd289, %rd300;
|
|
mov.u32 %r209, 8;
|
|
// inline asm
|
|
call (%rd288), _rt_buffer_get_64, (%rd289, %r26, %r209, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs175, %rs176, %rs177, %rs178}, [%rd288];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f752, %rs175;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f753, %rs176;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f754, %rs177;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd294), _rt_buffer_get_64, (%rd289, %r26, %r209, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f755, %f752, 0f00000000;
|
|
add.f32 %f756, %f753, 0f00000000;
|
|
add.f32 %f757, %f754, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs174, %f757;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs173, %f756;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs172, %f755;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs179, 0;
|
|
st.v4.u16 [%rd294], {%rs172, %rs173, %rs174, %rs179};
|
|
bra.uni BB0_116;
|
|
|
|
BB0_115:
|
|
mov.u64 %rd307, image_RNM0;
|
|
cvta.global.u64 %rd302, %rd307;
|
|
mov.u32 %r211, 8;
|
|
// inline asm
|
|
call (%rd301), _rt_buffer_get_64, (%rd302, %r26, %r211, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f758, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs180, %f758;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs181, 0;
|
|
st.v4.u16 [%rd301], {%rs180, %rs180, %rs180, %rs181};
|
|
|
|
BB0_116:
|
|
ld.global.u32 %r212, [additive];
|
|
setp.eq.s32 %p119, %r212, 0;
|
|
@%p119 bra BB0_118;
|
|
|
|
mov.u64 %rd320, image_RNM1;
|
|
cvta.global.u64 %rd309, %rd320;
|
|
mov.u32 %r216, 8;
|
|
// inline asm
|
|
call (%rd308), _rt_buffer_get_64, (%rd309, %r26, %r216, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs188, %rs189, %rs190, %rs191}, [%rd308];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f759, %rs188;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f760, %rs189;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f761, %rs190;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd314), _rt_buffer_get_64, (%rd309, %r26, %r216, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f762, %f759, 0f00000000;
|
|
add.f32 %f763, %f760, 0f00000000;
|
|
add.f32 %f764, %f761, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs187, %f764;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs186, %f763;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs185, %f762;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs192, 0;
|
|
st.v4.u16 [%rd314], {%rs185, %rs186, %rs187, %rs192};
|
|
bra.uni BB0_119;
|
|
|
|
BB0_118:
|
|
mov.u64 %rd327, image_RNM1;
|
|
cvta.global.u64 %rd322, %rd327;
|
|
mov.u32 %r218, 8;
|
|
// inline asm
|
|
call (%rd321), _rt_buffer_get_64, (%rd322, %r26, %r218, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f765, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs193, %f765;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs194, 0;
|
|
st.v4.u16 [%rd321], {%rs193, %rs193, %rs193, %rs194};
|
|
|
|
BB0_119:
|
|
ld.global.u32 %r219, [additive];
|
|
setp.eq.s32 %p120, %r219, 0;
|
|
@%p120 bra BB0_121;
|
|
|
|
mov.u64 %rd340, image_RNM2;
|
|
cvta.global.u64 %rd329, %rd340;
|
|
mov.u32 %r223, 8;
|
|
// inline asm
|
|
call (%rd328), _rt_buffer_get_64, (%rd329, %r26, %r223, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs201, %rs202, %rs203, %rs204}, [%rd328];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f766, %rs201;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f767, %rs202;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f768, %rs203;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd334), _rt_buffer_get_64, (%rd329, %r26, %r223, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f769, %f766, 0f00000000;
|
|
add.f32 %f770, %f767, 0f00000000;
|
|
add.f32 %f771, %f768, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs200, %f771;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs199, %f770;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs198, %f769;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs205, 0;
|
|
st.v4.u16 [%rd334], {%rs198, %rs199, %rs200, %rs205};
|
|
bra.uni BB0_122;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd347, image_RNM2;
|
|
cvta.global.u64 %rd342, %rd347;
|
|
mov.u32 %r225, 8;
|
|
// inline asm
|
|
call (%rd341), _rt_buffer_get_64, (%rd342, %r26, %r225, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f772, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs206, %f772;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs207, 0;
|
|
st.v4.u16 [%rd341], {%rs206, %rs206, %rs206, %rs207};
|
|
|
|
BB0_122:
|
|
ld.global.u32 %r226, [additive];
|
|
setp.eq.s32 %p121, %r226, 0;
|
|
@%p121 bra BB0_124;
|
|
|
|
mov.u64 %rd360, image_RNM3;
|
|
cvta.global.u64 %rd349, %rd360;
|
|
mov.u32 %r230, 8;
|
|
// inline asm
|
|
call (%rd348), _rt_buffer_get_64, (%rd349, %r26, %r230, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs214, %rs215, %rs216, %rs217}, [%rd348];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f773, %rs214;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f774, %rs215;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f775, %rs216;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd354), _rt_buffer_get_64, (%rd349, %r26, %r230, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f776, %f773, 0f00000000;
|
|
add.f32 %f777, %f774, 0f00000000;
|
|
add.f32 %f778, %f775, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs213, %f778;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs212, %f777;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs211, %f776;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs218, 0;
|
|
st.v4.u16 [%rd354], {%rs211, %rs212, %rs213, %rs218};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_124:
|
|
mov.u64 %rd367, image_RNM3;
|
|
cvta.global.u64 %rd362, %rd367;
|
|
mov.u32 %r232, 8;
|
|
// inline asm
|
|
call (%rd361), _rt_buffer_get_64, (%rd362, %r26, %r232, %rd8, %rd9, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f779, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs219, %f779;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs220, 0;
|
|
st.v4.u16 [%rd361], {%rs219, %rs219, %rs219, %rs220};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_92:
|
|
mov.u64 %rd173, image_HDR;
|
|
cvta.global.u64 %rd168, %rd173;
|
|
mov.u32 %r161, 8;
|
|
// inline asm
|
|
call (%rd167), _rt_buffer_get_64, (%rd168, %r26, %r161, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f709, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f709;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd167], {%rs104, %rs104, %rs104, %rs93};
|
|
|
|
BB0_93:
|
|
ld.global.u32 %r162, [additive];
|
|
setp.eq.s32 %p110, %r162, 0;
|
|
mov.f32 %f710, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs105, %f710;}
|
|
|
|
// inline asm
|
|
@%p110 bra BB0_95;
|
|
|
|
mov.u64 %rd186, image_RNM0;
|
|
cvta.global.u64 %rd175, %rd186;
|
|
mov.u32 %r166, 8;
|
|
// inline asm
|
|
call (%rd174), _rt_buffer_get_64, (%rd175, %r26, %r166, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs112, %rs113, %rs114, %rs115}, [%rd174];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f711, %rs112;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f712, %rs113;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f713, %rs114;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd180), _rt_buffer_get_64, (%rd175, %r26, %r166, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f714, %f711, 0f00000000;
|
|
add.f32 %f715, %f712, 0f00000000;
|
|
add.f32 %f716, %f713, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f716;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs110, %f715;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs109, %f714;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd180], {%rs109, %rs110, %rs111, %rs105};
|
|
bra.uni BB0_96;
|
|
|
|
BB0_95:
|
|
mov.u64 %rd193, image_RNM0;
|
|
cvta.global.u64 %rd188, %rd193;
|
|
mov.u32 %r168, 8;
|
|
// inline asm
|
|
call (%rd187), _rt_buffer_get_64, (%rd188, %r26, %r168, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f717, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs116, %f717;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd187], {%rs116, %rs116, %rs116, %rs105};
|
|
|
|
BB0_96:
|
|
ld.global.u32 %r169, [additive];
|
|
setp.eq.s32 %p111, %r169, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs117, %f710;}
|
|
|
|
// inline asm
|
|
@%p111 bra BB0_98;
|
|
|
|
mov.u64 %rd206, image_RNM1;
|
|
cvta.global.u64 %rd195, %rd206;
|
|
mov.u32 %r173, 8;
|
|
// inline asm
|
|
call (%rd194), _rt_buffer_get_64, (%rd195, %r26, %r173, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd194];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f719, %rs124;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f720, %rs125;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f721, %rs126;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd200), _rt_buffer_get_64, (%rd195, %r26, %r173, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f722, %f719, 0f00000000;
|
|
add.f32 %f723, %f720, 0f00000000;
|
|
add.f32 %f724, %f721, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs123, %f724;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs122, %f723;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs121, %f722;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd200], {%rs121, %rs122, %rs123, %rs117};
|
|
bra.uni BB0_99;
|
|
|
|
BB0_98:
|
|
mov.u64 %rd213, image_RNM1;
|
|
cvta.global.u64 %rd208, %rd213;
|
|
mov.u32 %r175, 8;
|
|
// inline asm
|
|
call (%rd207), _rt_buffer_get_64, (%rd208, %r26, %r175, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f725, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs128, %f725;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd207], {%rs128, %rs128, %rs128, %rs117};
|
|
|
|
BB0_99:
|
|
ld.global.u32 %r176, [additive];
|
|
setp.eq.s32 %p112, %r176, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f710;}
|
|
|
|
// inline asm
|
|
@%p112 bra BB0_101;
|
|
|
|
mov.u64 %rd226, image_RNM2;
|
|
cvta.global.u64 %rd215, %rd226;
|
|
mov.u32 %r180, 8;
|
|
// inline asm
|
|
call (%rd214), _rt_buffer_get_64, (%rd215, %r26, %r180, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs136, %rs137, %rs138, %rs139}, [%rd214];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f727, %rs136;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f728, %rs137;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f729, %rs138;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd220), _rt_buffer_get_64, (%rd215, %r26, %r180, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f730, %f727, 0f00000000;
|
|
add.f32 %f731, %f728, 0f00000000;
|
|
add.f32 %f732, %f729, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f732;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f731;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f730;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd220], {%rs133, %rs134, %rs135, %rs129};
|
|
bra.uni BB0_102;
|
|
|
|
BB0_101:
|
|
mov.u64 %rd233, image_RNM2;
|
|
cvta.global.u64 %rd228, %rd233;
|
|
mov.u32 %r182, 8;
|
|
// inline asm
|
|
call (%rd227), _rt_buffer_get_64, (%rd228, %r26, %r182, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f733, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f733;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd227], {%rs140, %rs140, %rs140, %rs129};
|
|
|
|
BB0_102:
|
|
ld.global.u32 %r183, [additive];
|
|
setp.eq.s32 %p113, %r183, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs141, %f710;}
|
|
|
|
// inline asm
|
|
@%p113 bra BB0_104;
|
|
|
|
mov.u64 %rd246, image_RNM3;
|
|
cvta.global.u64 %rd235, %rd246;
|
|
mov.u32 %r187, 8;
|
|
// inline asm
|
|
call (%rd234), _rt_buffer_get_64, (%rd235, %r26, %r187, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs148, %rs149, %rs150, %rs151}, [%rd234];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f735, %rs148;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f736, %rs149;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f737, %rs150;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd240), _rt_buffer_get_64, (%rd235, %r26, %r187, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f738, %f735, 0f00000000;
|
|
add.f32 %f739, %f736, 0f00000000;
|
|
add.f32 %f740, %f737, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs147, %f740;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f739;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f738;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd240], {%rs145, %rs146, %rs147, %rs141};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd253, image_RNM3;
|
|
cvta.global.u64 %rd248, %rd253;
|
|
mov.u32 %r189, 8;
|
|
// inline asm
|
|
call (%rd247), _rt_buffer_get_64, (%rd248, %r26, %r189, %rd6, %rd7, %rd15, %rd15);
|
|
// inline asm
|
|
mov.f32 %f741, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f741;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd247], {%rs152, %rs152, %rs152, %rs141};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_24:
|
|
setp.geu.f32 %p44, %f842, 0f00000000;
|
|
@%p44 bra BB0_27;
|
|
|
|
cvt.rzi.f32.f32 %f401, %f373;
|
|
setp.neu.f32 %p45, %f401, 0f3EE8BA2E;
|
|
selp.f32 %f845, 0f7FFFFFFF, %f845, %p45;
|
|
|
|
BB0_27:
|
|
add.f32 %f403, %f50, 0f3EE8BA2E;
|
|
mov.b32 %r76, %f403;
|
|
setp.lt.s32 %p47, %r76, 2139095040;
|
|
@%p47 bra BB0_32;
|
|
|
|
setp.gtu.f32 %p48, %f50, 0f7F800000;
|
|
@%p48 bra BB0_31;
|
|
bra.uni BB0_29;
|
|
|
|
BB0_31:
|
|
add.f32 %f845, %f842, 0f3EE8BA2E;
|
|
bra.uni BB0_32;
|
|
|
|
BB0_29:
|
|
setp.neu.f32 %p49, %f50, 0f7F800000;
|
|
@%p49 bra BB0_32;
|
|
|
|
selp.f32 %f845, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_32:
|
|
mul.f32 %f404, %f845, 0f437F0000;
|
|
setp.eq.f32 %p50, %f842, 0f3F800000;
|
|
selp.f32 %f405, 0f437F0000, %f404, %p50;
|
|
cvt.rzi.u32.f32 %r77, %f405;
|
|
cvt.u16.u32 %rs19, %r77;
|
|
mov.u16 %rs20, 255;
|
|
st.v2.u8 [%rd26], {%rs19, %rs20};
|
|
ld.global.u32 %r237, [imageEnabled];
|
|
|
|
BB0_33:
|
|
and.b32 %r78, %r237, 1;
|
|
setp.eq.b32 %p51, %r78, 1;
|
|
@!%p51 bra BB0_68;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_34:
|
|
mov.f32 %f807, 0fB5BFBE8E;
|
|
mov.f32 %f806, 0fBF317200;
|
|
mov.f32 %f805, 0f35BFBE8E;
|
|
mov.f32 %f804, 0f3F317200;
|
|
mov.f32 %f803, 0f3DAAAABD;
|
|
mov.f32 %f802, 0f3C4CAF63;
|
|
mov.f32 %f801, 0f3B18F0FE;
|
|
mov.f32 %f408, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f409, %f408;
|
|
fma.rn.f32 %f410, %f409, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f62, %f410;
|
|
abs.f32 %f63, %f46;
|
|
setp.lt.f32 %p52, %f63, 0f00800000;
|
|
mul.f32 %f411, %f63, 0f4B800000;
|
|
selp.f32 %f412, 0fC3170000, 0fC2FE0000, %p52;
|
|
selp.f32 %f413, %f411, %f63, %p52;
|
|
mov.b32 %r79, %f413;
|
|
and.b32 %r80, %r79, 8388607;
|
|
or.b32 %r81, %r80, 1065353216;
|
|
mov.b32 %f414, %r81;
|
|
shr.u32 %r82, %r79, 23;
|
|
cvt.rn.f32.u32 %f415, %r82;
|
|
add.f32 %f416, %f412, %f415;
|
|
setp.gt.f32 %p53, %f414, 0f3FB504F3;
|
|
mul.f32 %f417, %f414, 0f3F000000;
|
|
add.f32 %f418, %f416, 0f3F800000;
|
|
selp.f32 %f419, %f417, %f414, %p53;
|
|
selp.f32 %f420, %f418, %f416, %p53;
|
|
add.f32 %f421, %f419, 0fBF800000;
|
|
add.f32 %f407, %f419, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f406,%f407;
|
|
// inline asm
|
|
add.f32 %f422, %f421, %f421;
|
|
mul.f32 %f423, %f406, %f422;
|
|
mul.f32 %f424, %f423, %f423;
|
|
fma.rn.f32 %f427, %f801, %f424, %f802;
|
|
fma.rn.f32 %f429, %f427, %f424, %f803;
|
|
mul.rn.f32 %f430, %f429, %f424;
|
|
mul.rn.f32 %f431, %f430, %f423;
|
|
sub.f32 %f432, %f421, %f423;
|
|
neg.f32 %f433, %f423;
|
|
add.f32 %f434, %f432, %f432;
|
|
fma.rn.f32 %f435, %f433, %f421, %f434;
|
|
mul.rn.f32 %f436, %f406, %f435;
|
|
add.f32 %f437, %f431, %f423;
|
|
sub.f32 %f438, %f423, %f437;
|
|
add.f32 %f439, %f431, %f438;
|
|
add.f32 %f440, %f436, %f439;
|
|
add.f32 %f441, %f437, %f440;
|
|
sub.f32 %f442, %f437, %f441;
|
|
add.f32 %f443, %f440, %f442;
|
|
mul.rn.f32 %f445, %f420, %f804;
|
|
mul.rn.f32 %f447, %f420, %f805;
|
|
add.f32 %f448, %f445, %f441;
|
|
sub.f32 %f449, %f445, %f448;
|
|
add.f32 %f450, %f441, %f449;
|
|
add.f32 %f451, %f443, %f450;
|
|
add.f32 %f452, %f447, %f451;
|
|
add.f32 %f453, %f448, %f452;
|
|
sub.f32 %f454, %f448, %f453;
|
|
add.f32 %f455, %f452, %f454;
|
|
mov.f32 %f456, 0f3EE66666;
|
|
mul.rn.f32 %f457, %f456, %f453;
|
|
neg.f32 %f458, %f457;
|
|
fma.rn.f32 %f459, %f456, %f453, %f458;
|
|
fma.rn.f32 %f460, %f456, %f455, %f459;
|
|
mov.f32 %f461, 0f00000000;
|
|
fma.rn.f32 %f462, %f461, %f453, %f460;
|
|
add.rn.f32 %f463, %f457, %f462;
|
|
neg.f32 %f464, %f463;
|
|
add.rn.f32 %f465, %f457, %f464;
|
|
add.rn.f32 %f466, %f465, %f462;
|
|
mov.b32 %r83, %f463;
|
|
setp.eq.s32 %p54, %r83, 1118925336;
|
|
add.s32 %r84, %r83, -1;
|
|
mov.b32 %f467, %r84;
|
|
add.f32 %f468, %f466, 0f37000000;
|
|
selp.f32 %f469, %f467, %f463, %p54;
|
|
selp.f32 %f64, %f468, %f466, %p54;
|
|
mul.f32 %f470, %f469, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f471, %f470;
|
|
fma.rn.f32 %f473, %f471, %f806, %f469;
|
|
fma.rn.f32 %f475, %f471, %f807, %f473;
|
|
mul.f32 %f476, %f475, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f477, %f476;
|
|
add.f32 %f478, %f471, 0f00000000;
|
|
ex2.approx.f32 %f479, %f478;
|
|
mul.f32 %f480, %f477, %f479;
|
|
setp.lt.f32 %p55, %f469, 0fC2D20000;
|
|
selp.f32 %f481, 0f00000000, %f480, %p55;
|
|
setp.gt.f32 %p56, %f469, 0f42D20000;
|
|
selp.f32 %f846, 0f7F800000, %f481, %p56;
|
|
setp.eq.f32 %p57, %f846, 0f7F800000;
|
|
@%p57 bra BB0_36;
|
|
|
|
fma.rn.f32 %f846, %f846, %f64, %f846;
|
|
|
|
BB0_36:
|
|
setp.lt.f32 %p58, %f46, 0f00000000;
|
|
setp.eq.f32 %p59, %f62, 0f3F800000;
|
|
and.pred %p3, %p58, %p59;
|
|
mov.b32 %r85, %f846;
|
|
xor.b32 %r86, %r85, -2147483648;
|
|
mov.b32 %f482, %r86;
|
|
selp.f32 %f848, %f482, %f846, %p3;
|
|
setp.eq.f32 %p60, %f46, 0f00000000;
|
|
@%p60 bra BB0_39;
|
|
bra.uni BB0_37;
|
|
|
|
BB0_39:
|
|
add.f32 %f485, %f46, %f46;
|
|
selp.f32 %f848, %f485, 0f00000000, %p59;
|
|
bra.uni BB0_40;
|
|
|
|
BB0_37:
|
|
setp.geu.f32 %p61, %f46, 0f00000000;
|
|
@%p61 bra BB0_40;
|
|
|
|
cvt.rzi.f32.f32 %f484, %f456;
|
|
setp.neu.f32 %p62, %f484, 0f3EE66666;
|
|
selp.f32 %f848, 0f7FFFFFFF, %f848, %p62;
|
|
|
|
BB0_40:
|
|
add.f32 %f486, %f63, 0f3EE66666;
|
|
mov.b32 %r87, %f486;
|
|
setp.lt.s32 %p64, %r87, 2139095040;
|
|
@%p64 bra BB0_45;
|
|
|
|
setp.gtu.f32 %p65, %f63, 0f7F800000;
|
|
@%p65 bra BB0_44;
|
|
bra.uni BB0_42;
|
|
|
|
BB0_44:
|
|
add.f32 %f848, %f46, 0f3EE66666;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_42:
|
|
setp.neu.f32 %p66, %f63, 0f7F800000;
|
|
@%p66 bra BB0_45;
|
|
|
|
selp.f32 %f848, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_45:
|
|
mov.f32 %f814, 0fB5BFBE8E;
|
|
mov.f32 %f813, 0fBF317200;
|
|
mov.f32 %f812, 0f35BFBE8E;
|
|
mov.f32 %f811, 0f3F317200;
|
|
mov.f32 %f810, 0f3DAAAABD;
|
|
mov.f32 %f809, 0f3C4CAF63;
|
|
mov.f32 %f808, 0f3B18F0FE;
|
|
setp.eq.f32 %p67, %f46, 0f3F800000;
|
|
selp.f32 %f75, 0f3F800000, %f848, %p67;
|
|
abs.f32 %f76, %f47;
|
|
setp.lt.f32 %p68, %f76, 0f00800000;
|
|
mul.f32 %f489, %f76, 0f4B800000;
|
|
selp.f32 %f490, 0fC3170000, 0fC2FE0000, %p68;
|
|
selp.f32 %f491, %f489, %f76, %p68;
|
|
mov.b32 %r88, %f491;
|
|
and.b32 %r89, %r88, 8388607;
|
|
or.b32 %r90, %r89, 1065353216;
|
|
mov.b32 %f492, %r90;
|
|
shr.u32 %r91, %r88, 23;
|
|
cvt.rn.f32.u32 %f493, %r91;
|
|
add.f32 %f494, %f490, %f493;
|
|
setp.gt.f32 %p69, %f492, 0f3FB504F3;
|
|
mul.f32 %f495, %f492, 0f3F000000;
|
|
add.f32 %f496, %f494, 0f3F800000;
|
|
selp.f32 %f497, %f495, %f492, %p69;
|
|
selp.f32 %f498, %f496, %f494, %p69;
|
|
add.f32 %f499, %f497, 0fBF800000;
|
|
add.f32 %f488, %f497, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f487,%f488;
|
|
// inline asm
|
|
add.f32 %f500, %f499, %f499;
|
|
mul.f32 %f501, %f487, %f500;
|
|
mul.f32 %f502, %f501, %f501;
|
|
fma.rn.f32 %f505, %f808, %f502, %f809;
|
|
fma.rn.f32 %f507, %f505, %f502, %f810;
|
|
mul.rn.f32 %f508, %f507, %f502;
|
|
mul.rn.f32 %f509, %f508, %f501;
|
|
sub.f32 %f510, %f499, %f501;
|
|
neg.f32 %f511, %f501;
|
|
add.f32 %f512, %f510, %f510;
|
|
fma.rn.f32 %f513, %f511, %f499, %f512;
|
|
mul.rn.f32 %f514, %f487, %f513;
|
|
add.f32 %f515, %f509, %f501;
|
|
sub.f32 %f516, %f501, %f515;
|
|
add.f32 %f517, %f509, %f516;
|
|
add.f32 %f518, %f514, %f517;
|
|
add.f32 %f519, %f515, %f518;
|
|
sub.f32 %f520, %f515, %f519;
|
|
add.f32 %f521, %f518, %f520;
|
|
mul.rn.f32 %f523, %f498, %f811;
|
|
mul.rn.f32 %f525, %f498, %f812;
|
|
add.f32 %f526, %f523, %f519;
|
|
sub.f32 %f527, %f523, %f526;
|
|
add.f32 %f528, %f519, %f527;
|
|
add.f32 %f529, %f521, %f528;
|
|
add.f32 %f530, %f525, %f529;
|
|
add.f32 %f531, %f526, %f530;
|
|
sub.f32 %f532, %f526, %f531;
|
|
add.f32 %f533, %f530, %f532;
|
|
mul.rn.f32 %f535, %f456, %f531;
|
|
neg.f32 %f536, %f535;
|
|
fma.rn.f32 %f537, %f456, %f531, %f536;
|
|
fma.rn.f32 %f538, %f456, %f533, %f537;
|
|
fma.rn.f32 %f540, %f461, %f531, %f538;
|
|
add.rn.f32 %f541, %f535, %f540;
|
|
neg.f32 %f542, %f541;
|
|
add.rn.f32 %f543, %f535, %f542;
|
|
add.rn.f32 %f544, %f543, %f540;
|
|
mov.b32 %r92, %f541;
|
|
setp.eq.s32 %p70, %r92, 1118925336;
|
|
add.s32 %r93, %r92, -1;
|
|
mov.b32 %f545, %r93;
|
|
add.f32 %f546, %f544, 0f37000000;
|
|
selp.f32 %f547, %f545, %f541, %p70;
|
|
selp.f32 %f77, %f546, %f544, %p70;
|
|
mul.f32 %f548, %f547, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f549, %f548;
|
|
fma.rn.f32 %f551, %f549, %f813, %f547;
|
|
fma.rn.f32 %f553, %f549, %f814, %f551;
|
|
mul.f32 %f554, %f553, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f555, %f554;
|
|
add.f32 %f556, %f549, 0f00000000;
|
|
ex2.approx.f32 %f557, %f556;
|
|
mul.f32 %f558, %f555, %f557;
|
|
setp.lt.f32 %p71, %f547, 0fC2D20000;
|
|
selp.f32 %f559, 0f00000000, %f558, %p71;
|
|
setp.gt.f32 %p72, %f547, 0f42D20000;
|
|
selp.f32 %f849, 0f7F800000, %f559, %p72;
|
|
setp.eq.f32 %p73, %f849, 0f7F800000;
|
|
@%p73 bra BB0_47;
|
|
|
|
fma.rn.f32 %f849, %f849, %f77, %f849;
|
|
|
|
BB0_47:
|
|
setp.lt.f32 %p74, %f47, 0f00000000;
|
|
and.pred %p4, %p74, %p59;
|
|
mov.b32 %r94, %f849;
|
|
xor.b32 %r95, %r94, -2147483648;
|
|
mov.b32 %f560, %r95;
|
|
selp.f32 %f851, %f560, %f849, %p4;
|
|
setp.eq.f32 %p76, %f47, 0f00000000;
|
|
@%p76 bra BB0_50;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_50:
|
|
add.f32 %f563, %f47, %f47;
|
|
selp.f32 %f851, %f563, 0f00000000, %p59;
|
|
bra.uni BB0_51;
|
|
|
|
BB0_48:
|
|
setp.geu.f32 %p77, %f47, 0f00000000;
|
|
@%p77 bra BB0_51;
|
|
|
|
cvt.rzi.f32.f32 %f562, %f456;
|
|
setp.neu.f32 %p78, %f562, 0f3EE66666;
|
|
selp.f32 %f851, 0f7FFFFFFF, %f851, %p78;
|
|
|
|
BB0_51:
|
|
add.f32 %f564, %f76, 0f3EE66666;
|
|
mov.b32 %r96, %f564;
|
|
setp.lt.s32 %p80, %r96, 2139095040;
|
|
@%p80 bra BB0_56;
|
|
|
|
setp.gtu.f32 %p81, %f76, 0f7F800000;
|
|
@%p81 bra BB0_55;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_55:
|
|
add.f32 %f851, %f47, 0f3EE66666;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_53:
|
|
setp.neu.f32 %p82, %f76, 0f7F800000;
|
|
@%p82 bra BB0_56;
|
|
|
|
selp.f32 %f851, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_56:
|
|
mov.f32 %f821, 0fB5BFBE8E;
|
|
mov.f32 %f820, 0fBF317200;
|
|
mov.f32 %f819, 0f35BFBE8E;
|
|
mov.f32 %f818, 0f3F317200;
|
|
mov.f32 %f817, 0f3DAAAABD;
|
|
mov.f32 %f816, 0f3C4CAF63;
|
|
mov.f32 %f815, 0f3B18F0FE;
|
|
setp.eq.f32 %p83, %f47, 0f3F800000;
|
|
selp.f32 %f88, 0f3F800000, %f851, %p83;
|
|
abs.f32 %f89, %f48;
|
|
setp.lt.f32 %p84, %f89, 0f00800000;
|
|
mul.f32 %f567, %f89, 0f4B800000;
|
|
selp.f32 %f568, 0fC3170000, 0fC2FE0000, %p84;
|
|
selp.f32 %f569, %f567, %f89, %p84;
|
|
mov.b32 %r97, %f569;
|
|
and.b32 %r98, %r97, 8388607;
|
|
or.b32 %r99, %r98, 1065353216;
|
|
mov.b32 %f570, %r99;
|
|
shr.u32 %r100, %r97, 23;
|
|
cvt.rn.f32.u32 %f571, %r100;
|
|
add.f32 %f572, %f568, %f571;
|
|
setp.gt.f32 %p85, %f570, 0f3FB504F3;
|
|
mul.f32 %f573, %f570, 0f3F000000;
|
|
add.f32 %f574, %f572, 0f3F800000;
|
|
selp.f32 %f575, %f573, %f570, %p85;
|
|
selp.f32 %f576, %f574, %f572, %p85;
|
|
add.f32 %f577, %f575, 0fBF800000;
|
|
add.f32 %f566, %f575, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f565,%f566;
|
|
// inline asm
|
|
add.f32 %f578, %f577, %f577;
|
|
mul.f32 %f579, %f565, %f578;
|
|
mul.f32 %f580, %f579, %f579;
|
|
fma.rn.f32 %f583, %f815, %f580, %f816;
|
|
fma.rn.f32 %f585, %f583, %f580, %f817;
|
|
mul.rn.f32 %f586, %f585, %f580;
|
|
mul.rn.f32 %f587, %f586, %f579;
|
|
sub.f32 %f588, %f577, %f579;
|
|
neg.f32 %f589, %f579;
|
|
add.f32 %f590, %f588, %f588;
|
|
fma.rn.f32 %f591, %f589, %f577, %f590;
|
|
mul.rn.f32 %f592, %f565, %f591;
|
|
add.f32 %f593, %f587, %f579;
|
|
sub.f32 %f594, %f579, %f593;
|
|
add.f32 %f595, %f587, %f594;
|
|
add.f32 %f596, %f592, %f595;
|
|
add.f32 %f597, %f593, %f596;
|
|
sub.f32 %f598, %f593, %f597;
|
|
add.f32 %f599, %f596, %f598;
|
|
mul.rn.f32 %f601, %f576, %f818;
|
|
mul.rn.f32 %f603, %f576, %f819;
|
|
add.f32 %f604, %f601, %f597;
|
|
sub.f32 %f605, %f601, %f604;
|
|
add.f32 %f606, %f597, %f605;
|
|
add.f32 %f607, %f599, %f606;
|
|
add.f32 %f608, %f603, %f607;
|
|
add.f32 %f609, %f604, %f608;
|
|
sub.f32 %f610, %f604, %f609;
|
|
add.f32 %f611, %f608, %f610;
|
|
mul.rn.f32 %f613, %f456, %f609;
|
|
neg.f32 %f614, %f613;
|
|
fma.rn.f32 %f615, %f456, %f609, %f614;
|
|
fma.rn.f32 %f616, %f456, %f611, %f615;
|
|
fma.rn.f32 %f618, %f461, %f609, %f616;
|
|
add.rn.f32 %f619, %f613, %f618;
|
|
neg.f32 %f620, %f619;
|
|
add.rn.f32 %f621, %f613, %f620;
|
|
add.rn.f32 %f622, %f621, %f618;
|
|
mov.b32 %r101, %f619;
|
|
setp.eq.s32 %p86, %r101, 1118925336;
|
|
add.s32 %r102, %r101, -1;
|
|
mov.b32 %f623, %r102;
|
|
add.f32 %f624, %f622, 0f37000000;
|
|
selp.f32 %f625, %f623, %f619, %p86;
|
|
selp.f32 %f90, %f624, %f622, %p86;
|
|
mul.f32 %f626, %f625, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f627, %f626;
|
|
fma.rn.f32 %f629, %f627, %f820, %f625;
|
|
fma.rn.f32 %f631, %f627, %f821, %f629;
|
|
mul.f32 %f632, %f631, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f633, %f632;
|
|
add.f32 %f634, %f627, 0f00000000;
|
|
ex2.approx.f32 %f635, %f634;
|
|
mul.f32 %f636, %f633, %f635;
|
|
setp.lt.f32 %p87, %f625, 0fC2D20000;
|
|
selp.f32 %f637, 0f00000000, %f636, %p87;
|
|
setp.gt.f32 %p88, %f625, 0f42D20000;
|
|
selp.f32 %f852, 0f7F800000, %f637, %p88;
|
|
setp.eq.f32 %p89, %f852, 0f7F800000;
|
|
@%p89 bra BB0_58;
|
|
|
|
fma.rn.f32 %f852, %f852, %f90, %f852;
|
|
|
|
BB0_58:
|
|
setp.lt.f32 %p90, %f48, 0f00000000;
|
|
and.pred %p5, %p90, %p59;
|
|
mov.b32 %r103, %f852;
|
|
xor.b32 %r104, %r103, -2147483648;
|
|
mov.b32 %f638, %r104;
|
|
selp.f32 %f854, %f638, %f852, %p5;
|
|
setp.eq.f32 %p92, %f48, 0f00000000;
|
|
@%p92 bra BB0_61;
|
|
bra.uni BB0_59;
|
|
|
|
BB0_61:
|
|
add.f32 %f641, %f48, %f48;
|
|
selp.f32 %f854, %f641, 0f00000000, %p59;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_59:
|
|
setp.geu.f32 %p93, %f48, 0f00000000;
|
|
@%p93 bra BB0_62;
|
|
|
|
cvt.rzi.f32.f32 %f640, %f456;
|
|
setp.neu.f32 %p94, %f640, 0f3EE66666;
|
|
selp.f32 %f854, 0f7FFFFFFF, %f854, %p94;
|
|
|
|
BB0_62:
|
|
add.f32 %f642, %f89, 0f3EE66666;
|
|
mov.b32 %r105, %f642;
|
|
setp.lt.s32 %p96, %r105, 2139095040;
|
|
@%p96 bra BB0_67;
|
|
|
|
setp.gtu.f32 %p97, %f89, 0f7F800000;
|
|
@%p97 bra BB0_66;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_66:
|
|
add.f32 %f854, %f48, 0f3EE66666;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_64:
|
|
setp.neu.f32 %p98, %f89, 0f7F800000;
|
|
@%p98 bra BB0_67;
|
|
|
|
selp.f32 %f854, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_67:
|
|
setp.eq.f32 %p99, %f48, 0f3F800000;
|
|
selp.f32 %f643, 0f3F800000, %f854, %p99;
|
|
cvt.u64.u32 %rd36, %r3;
|
|
cvt.u64.u32 %rd35, %r2;
|
|
mov.u64 %rd39, image;
|
|
cvta.global.u64 %rd34, %rd39;
|
|
// inline asm
|
|
call (%rd33), _rt_buffer_get_64, (%rd34, %r26, %r27, %rd35, %rd36, %rd15, %rd15);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f644, %f643;
|
|
mul.f32 %f645, %f644, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r108, %f645;
|
|
cvt.sat.f32.f32 %f646, %f88;
|
|
mul.f32 %f647, %f646, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r109, %f647;
|
|
cvt.sat.f32.f32 %f648, %f75;
|
|
mul.f32 %f649, %f648, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r110, %f649;
|
|
cvt.u16.u32 %rs21, %r108;
|
|
cvt.u16.u32 %rs22, %r110;
|
|
cvt.u16.u32 %rs23, %r109;
|
|
mov.u16 %rs24, 255;
|
|
st.v4.u8 [%rd33], {%rs21, %rs23, %rs22, %rs24};
|
|
ld.global.u32 %r237, [imageEnabled];
|
|
|
|
BB0_68:
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
and.b32 %r111, %r237, 4;
|
|
setp.eq.s32 %p100, %r111, 0;
|
|
@%p100 bra BB0_72;
|
|
|
|
ld.global.u32 %r112, [additive];
|
|
setp.eq.s32 %p101, %r112, 0;
|
|
mov.f32 %f650, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f650;}
|
|
|
|
// inline asm
|
|
@%p101 bra BB0_71;
|
|
|
|
mov.u64 %rd52, image_HDR;
|
|
cvta.global.u64 %rd41, %rd52;
|
|
mov.u32 %r116, 8;
|
|
// inline asm
|
|
call (%rd40), _rt_buffer_get_64, (%rd41, %r26, %r116, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs32, %rs33, %rs34, %rs35}, [%rd40];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f651, %rs32;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f652, %rs33;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f653, %rs34;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd46), _rt_buffer_get_64, (%rd41, %r26, %r116, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f654, %f46, %f651;
|
|
add.f32 %f655, %f47, %f652;
|
|
add.f32 %f656, %f48, %f653;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f656;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f655;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f654;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd46], {%rs29, %rs30, %rs31, %rs25};
|
|
bra.uni BB0_72;
|
|
|
|
BB0_71:
|
|
mov.u64 %rd59, image_HDR;
|
|
cvta.global.u64 %rd54, %rd59;
|
|
mov.u32 %r118, 8;
|
|
// inline asm
|
|
call (%rd53), _rt_buffer_get_64, (%rd54, %r26, %r118, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs38, %f48;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f47;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f46;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd53], {%rs36, %rs37, %rs38, %rs25};
|
|
|
|
BB0_72:
|
|
mul.f32 %f661, %f31, 0f3E800000;
|
|
mul.f32 %f662, %f661, %f842;
|
|
ld.global.f32 %f663, [lightColor];
|
|
mul.f32 %f101, %f662, %f663;
|
|
ld.global.f32 %f664, [lightColor+4];
|
|
mul.f32 %f102, %f662, %f664;
|
|
ld.global.f32 %f665, [lightColor+8];
|
|
mul.f32 %f103, %f662, %f665;
|
|
ld.global.u32 %r119, [additive];
|
|
setp.eq.s32 %p102, %r119, 0;
|
|
mov.f32 %f660, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs39, %f660;}
|
|
|
|
// inline asm
|
|
@%p102 bra BB0_74;
|
|
|
|
mov.u64 %rd72, image_RNM0;
|
|
cvta.global.u64 %rd61, %rd72;
|
|
mov.u32 %r123, 8;
|
|
// inline asm
|
|
call (%rd60), _rt_buffer_get_64, (%rd61, %r26, %r123, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs46, %rs47, %rs48, %rs49}, [%rd60];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f666, %rs46;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f667, %rs47;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f668, %rs48;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd66), _rt_buffer_get_64, (%rd61, %r26, %r123, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f669, %f101, %f666;
|
|
add.f32 %f670, %f102, %f667;
|
|
add.f32 %f671, %f103, %f668;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs45, %f671;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs44, %f670;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f669;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd66], {%rs43, %rs44, %rs45, %rs39};
|
|
bra.uni BB0_75;
|
|
|
|
BB0_74:
|
|
mov.u64 %rd79, image_RNM0;
|
|
cvta.global.u64 %rd74, %rd79;
|
|
mov.u32 %r125, 8;
|
|
// inline asm
|
|
call (%rd73), _rt_buffer_get_64, (%rd74, %r26, %r125, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f103;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f102;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f101;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd73], {%rs50, %rs51, %rs52, %rs39};
|
|
|
|
BB0_75:
|
|
sub.f32 %f827, %f11, %f12;
|
|
mul.f32 %f826, %f827, %f136;
|
|
sub.f32 %f825, %f7, %f8;
|
|
mul.f32 %f824, %f825, %f136;
|
|
sub.f32 %f823, %f9, %f10;
|
|
mul.f32 %f822, %f823, %f136;
|
|
fma.rn.f32 %f104, %f824, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f105, %f822, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f106, %f826, 0f3F000000, 0f3F000000;
|
|
ld.global.u32 %r126, [additive];
|
|
setp.eq.s32 %p103, %r126, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f660;}
|
|
|
|
// inline asm
|
|
@%p103 bra BB0_77;
|
|
|
|
mov.u64 %rd92, image_RNM1;
|
|
cvta.global.u64 %rd81, %rd92;
|
|
mov.u32 %r130, 8;
|
|
// inline asm
|
|
call (%rd80), _rt_buffer_get_64, (%rd81, %r26, %r130, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs60, %rs61, %rs62, %rs63}, [%rd80];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f676, %rs60;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f677, %rs61;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f678, %rs62;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd86), _rt_buffer_get_64, (%rd81, %r26, %r130, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f679, %f104, %f676;
|
|
add.f32 %f680, %f104, %f677;
|
|
add.f32 %f681, %f104, %f678;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f681;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f680;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f679;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd86], {%rs57, %rs58, %rs59, %rs53};
|
|
bra.uni BB0_78;
|
|
|
|
BB0_77:
|
|
mov.u64 %rd99, image_RNM1;
|
|
cvta.global.u64 %rd94, %rd99;
|
|
mov.u32 %r132, 8;
|
|
// inline asm
|
|
call (%rd93), _rt_buffer_get_64, (%rd94, %r26, %r132, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f104;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd93], {%rs64, %rs64, %rs64, %rs53};
|
|
|
|
BB0_78:
|
|
ld.global.u32 %r133, [additive];
|
|
setp.eq.s32 %p104, %r133, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f660;}
|
|
|
|
// inline asm
|
|
@%p104 bra BB0_80;
|
|
|
|
mov.u64 %rd112, image_RNM2;
|
|
cvta.global.u64 %rd101, %rd112;
|
|
mov.u32 %r137, 8;
|
|
// inline asm
|
|
call (%rd100), _rt_buffer_get_64, (%rd101, %r26, %r137, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd100];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f684, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f685, %rs73;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f686, %rs74;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd106), _rt_buffer_get_64, (%rd101, %r26, %r137, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f687, %f105, %f684;
|
|
add.f32 %f688, %f105, %f685;
|
|
add.f32 %f689, %f105, %f686;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f689;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f688;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f687;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd106], {%rs69, %rs70, %rs71, %rs65};
|
|
bra.uni BB0_81;
|
|
|
|
BB0_80:
|
|
mov.u64 %rd119, image_RNM2;
|
|
cvta.global.u64 %rd114, %rd119;
|
|
mov.u32 %r139, 8;
|
|
// inline asm
|
|
call (%rd113), _rt_buffer_get_64, (%rd114, %r26, %r139, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f105;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd113], {%rs76, %rs76, %rs76, %rs65};
|
|
|
|
BB0_81:
|
|
ld.global.u32 %r140, [additive];
|
|
setp.eq.s32 %p105, %r140, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f660;}
|
|
|
|
// inline asm
|
|
@%p105 bra BB0_83;
|
|
|
|
mov.u64 %rd132, image_RNM3;
|
|
cvta.global.u64 %rd121, %rd132;
|
|
mov.u32 %r144, 8;
|
|
// inline asm
|
|
call (%rd120), _rt_buffer_get_64, (%rd121, %r26, %r144, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
ld.v4.u16 {%rs84, %rs85, %rs86, %rs87}, [%rd120];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f692, %rs84;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f693, %rs85;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f694, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd126), _rt_buffer_get_64, (%rd121, %r26, %r144, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
add.f32 %f695, %f106, %f692;
|
|
add.f32 %f696, %f106, %f693;
|
|
add.f32 %f697, %f106, %f694;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f697;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f696;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f695;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd126], {%rs81, %rs82, %rs83, %rs77};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_83:
|
|
mov.u64 %rd139, image_RNM3;
|
|
cvta.global.u64 %rd134, %rd139;
|
|
mov.u32 %r146, 8;
|
|
// inline asm
|
|
call (%rd133), _rt_buffer_get_64, (%rd134, %r26, %r146, %rd4, %rd5, %rd15, %rd15);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f106;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd133], {%rs88, %rs88, %rs88, %rs77};
|
|
|
|
BB0_125:
|
|
ret;
|
|
}
|
|
|
|
|