ArabDesert/Assets/Editor/x64/Bakery/lmAreaLightSH.ptx

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2024-05-25 09:10:35 +03:00
//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//
.version 6.1
.target sm_30
.address_size 64
// .globl _Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 lightMeshBuffer[1];
.global .align 4 .u32 lightMeshBufferSize;
.global .align 4 .f32 lightInvCutoff;
.global .align 4 .f32 lightPointSize;
.global .align 4 .b8 lightColor[12];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 rnd_seeds2[1];
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry _Z6oxMainv(
)
{
.local .align 4 .b8 __local_depot0[36];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<151>;
.reg .b16 %rs<153>;
.reg .f32 %f<1034>;
.reg .b32 %r<418>;
.reg .b64 %rd<320>;
mov.u64 %rd319, __local_depot0;
cvta.local.u64 %SP, %rd319;
ld.global.u32 %r1, [lightMeshBufferSize];
abs.s32 %r2, %r1;
ld.global.u32 %r3, [samples];
ld.global.v2.u32 {%r105, %r106}, [pixelID];
cvt.u64.u32 %rd24, %r105;
cvt.u64.u32 %rd25, %r106;
mov.u64 %rd28, uvnormal;
cvta.global.u64 %rd23, %rd28;
mov.u32 %r103, 2;
mov.u32 %r104, 4;
mov.u64 %rd27, 0;
// inline asm
call (%rd22), _rt_buffer_get_64, (%rd23, %r103, %r104, %rd24, %rd25, %rd27, %rd27);
// inline asm
ld.u32 %r4, [%rd22];
shr.u32 %r109, %r4, 16;
cvt.u16.u32 %rs1, %r109;
and.b16 %rs7, %rs1, 255;
cvt.u16.u32 %rs8, %r4;
or.b16 %rs9, %rs8, %rs7;
setp.eq.s16 %p7, %rs9, 0;
mov.f32 %f956, 0f00000000;
mov.f32 %f957, %f956;
mov.f32 %f958, %f956;
@%p7 bra BB0_2;
ld.u8 %rs10, [%rd22+1];
and.b16 %rs12, %rs8, 255;
cvt.rn.f32.u16 %f231, %rs12;
div.rn.f32 %f232, %f231, 0f437F0000;
fma.rn.f32 %f233, %f232, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f234, %rs10;
div.rn.f32 %f235, %f234, 0f437F0000;
fma.rn.f32 %f236, %f235, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f237, %rs7;
div.rn.f32 %f238, %f237, 0f437F0000;
fma.rn.f32 %f239, %f238, 0f40000000, 0fBF800000;
mul.f32 %f240, %f236, %f236;
fma.rn.f32 %f241, %f233, %f233, %f240;
fma.rn.f32 %f242, %f239, %f239, %f241;
sqrt.rn.f32 %f243, %f242;
rcp.rn.f32 %f244, %f243;
mul.f32 %f956, %f233, %f244;
mul.f32 %f957, %f236, %f244;
mul.f32 %f958, %f239, %f244;
BB0_2:
ld.global.v2.u32 {%r110, %r111}, [pixelID];
ld.global.v2.u32 {%r113, %r114}, [tileInfo];
add.s32 %r5, %r110, %r113;
add.s32 %r6, %r111, %r114;
setp.eq.f32 %p8, %f957, 0f00000000;
setp.eq.f32 %p9, %f956, 0f00000000;
and.pred %p10, %p9, %p8;
setp.eq.f32 %p11, %f958, 0f00000000;
and.pred %p12, %p10, %p11;
@%p12 bra BB0_142;
bra.uni BB0_3;
BB0_142:
ld.global.u32 %r417, [imageEnabled];
and.b32 %r340, %r417, 1;
setp.eq.b32 %p142, %r340, 1;
@!%p142 bra BB0_144;
bra.uni BB0_143;
BB0_143:
cvt.u64.u32 %rd199, %r5;
cvt.u64.u32 %rd200, %r6;
mov.u64 %rd203, image;
cvta.global.u64 %rd198, %rd203;
mov.u64 %rd202, 0;
// inline asm
call (%rd197), _rt_buffer_get_64, (%rd198, %r103, %r104, %rd199, %rd200, %rd202, %rd202);
// inline asm
mov.u16 %rs85, 0;
st.v4.u8 [%rd197], {%rs85, %rs85, %rs85, %rs85};
ld.global.u32 %r417, [imageEnabled];
BB0_144:
and.b32 %r343, %r417, 8;
setp.eq.s32 %p143, %r343, 0;
@%p143 bra BB0_146;
cvt.u64.u32 %rd207, %r6;
cvt.u64.u32 %rd206, %r5;
mov.u64 %rd210, image_Mask;
cvta.global.u64 %rd205, %rd210;
mov.u64 %rd209, 0;
// inline asm
call (%rd204), _rt_buffer_get_64, (%rd205, %r103, %r103, %rd206, %rd207, %rd209, %rd209);
// inline asm
mov.f32 %f911, 0f00000000;
cvt.rzi.u32.f32 %r346, %f911;
cvt.u16.u32 %rs86, %r346;
mov.u16 %rs87, 0;
st.v2.u8 [%rd204], {%rs86, %rs87};
ld.global.u32 %r417, [imageEnabled];
BB0_146:
cvt.u64.u32 %rd20, %r5;
cvt.u64.u32 %rd21, %r6;
and.b32 %r347, %r417, 4;
setp.eq.s32 %p144, %r347, 0;
@%p144 bra BB0_150;
ld.global.u32 %r348, [additive];
setp.eq.s32 %p145, %r348, 0;
@%p145 bra BB0_149;
mov.u64 %rd223, image_HDR;
cvta.global.u64 %rd212, %rd223;
mov.u32 %r352, 8;
mov.u64 %rd222, 0;
// inline asm
call (%rd211), _rt_buffer_get_64, (%rd212, %r103, %r352, %rd20, %rd21, %rd222, %rd222);
// inline asm
ld.v4.u16 {%rs94, %rs95, %rs96, %rs97}, [%rd211];
// inline asm
{ cvt.f32.f16 %f912, %rs94;}
// inline asm
// inline asm
{ cvt.f32.f16 %f913, %rs95;}
// inline asm
// inline asm
{ cvt.f32.f16 %f914, %rs96;}
// inline asm
// inline asm
call (%rd217), _rt_buffer_get_64, (%rd212, %r103, %r352, %rd20, %rd21, %rd222, %rd222);
// inline asm
add.f32 %f915, %f912, 0f00000000;
add.f32 %f916, %f913, 0f00000000;
add.f32 %f917, %f914, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs93, %f917;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs92, %f916;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs91, %f915;}
// inline asm
mov.u16 %rs98, 0;
st.v4.u16 [%rd217], {%rs91, %rs92, %rs93, %rs98};
bra.uni BB0_150;
BB0_3:
ld.global.v2.u32 {%r123, %r124}, [pixelID];
cvt.u64.u32 %rd31, %r123;
cvt.u64.u32 %rd32, %r124;
mov.u64 %rd41, uvpos;
cvta.global.u64 %rd30, %rd41;
mov.u32 %r119, 12;
// inline asm
call (%rd29), _rt_buffer_get_64, (%rd30, %r103, %r119, %rd31, %rd32, %rd27, %rd27);
// inline asm
ld.f32 %f9, [%rd29+8];
ld.f32 %f8, [%rd29+4];
ld.f32 %f7, [%rd29];
mul.f32 %f251, %f7, 0f3456BF95;
mul.f32 %f252, %f8, 0f3456BF95;
mul.f32 %f253, %f9, 0f3456BF95;
abs.f32 %f10, %f956;
div.rn.f32 %f254, %f251, %f10;
abs.f32 %f255, %f957;
div.rn.f32 %f256, %f252, %f255;
abs.f32 %f11, %f958;
div.rn.f32 %f257, %f253, %f11;
abs.f32 %f258, %f254;
abs.f32 %f259, %f256;
abs.f32 %f260, %f257;
mov.f32 %f261, 0f38D1B717;
max.f32 %f262, %f258, %f261;
max.f32 %f263, %f259, %f261;
max.f32 %f264, %f260, %f261;
fma.rn.f32 %f12, %f956, %f262, %f7;
fma.rn.f32 %f13, %f957, %f263, %f8;
fma.rn.f32 %f14, %f958, %f264, %f9;
ld.global.v2.u32 {%r127, %r128}, [pixelID];
cvt.u64.u32 %rd37, %r127;
cvt.u64.u32 %rd38, %r128;
mov.u64 %rd42, rnd_seeds;
cvta.global.u64 %rd36, %rd42;
// inline asm
call (%rd35), _rt_buffer_get_64, (%rd36, %r103, %r104, %rd37, %rd38, %rd27, %rd27);
// inline asm
ld.u32 %r393, [%rd35];
mov.pred %p13, 0;
mov.f32 %f19, 0f00000000;
mov.u32 %r9, 0;
setp.lt.s32 %p14, %r2, 1;
@%p14 bra BB0_4;
ld.global.f32 %f15, [lightPointSize];
mul.f32 %f16, %f12, 0f3456BF95;
mul.f32 %f17, %f13, 0f3456BF95;
mul.f32 %f18, %f14, 0f3456BF95;
mov.f32 %f19, 0f00000000;
mov.u32 %r386, 0;
abs.f32 %f393, %f17;
abs.f32 %f394, %f16;
max.f32 %f395, %f394, %f393;
abs.f32 %f396, %f18;
max.f32 %f397, %f395, %f396;
mov.u32 %r9, %r386;
mov.f32 %f20, %f19;
mov.f32 %f21, %f19;
mov.f32 %f22, %f19;
mov.f32 %f23, %f19;
mov.f32 %f24, %f19;
BB0_6:
shl.b32 %r10, %r386, 1;
cvt.s64.s32 %rd45, %r10;
mov.u64 %rd49, lightMeshBuffer;
cvta.global.u64 %rd44, %rd49;
mov.u32 %r133, 1;
mov.u64 %rd48, 0;
// inline asm
call (%rd43), _rt_buffer_get_64, (%rd44, %r133, %r119, %rd45, %rd48, %rd48, %rd48);
// inline asm
ld.f32 %f271, [%rd43];
sub.f32 %f272, %f271, %f7;
ld.f32 %f273, [%rd43+4];
sub.f32 %f274, %f273, %f8;
ld.f32 %f275, [%rd43+8];
sub.f32 %f276, %f275, %f9;
mul.f32 %f277, %f274, %f274;
fma.rn.f32 %f278, %f272, %f272, %f277;
fma.rn.f32 %f279, %f276, %f276, %f278;
sqrt.rn.f32 %f25, %f279;
rcp.rn.f32 %f280, %f25;
mul.f32 %f26, %f272, %f280;
mul.f32 %f27, %f274, %f280;
mul.f32 %f28, %f276, %f280;
mul.f32 %f281, %f957, %f27;
fma.rn.f32 %f282, %f956, %f26, %f281;
fma.rn.f32 %f29, %f958, %f28, %f282;
setp.leu.f32 %p15, %f29, 0f00000000;
@%p15 bra BB0_23;
mov.u64 %rd314, 0;
setp.eq.s32 %p16, %r3, 0;
mul.f32 %f283, %f25, %f25;
div.rn.f32 %f30, %f15, %f283;
ld.global.v2.u32 {%r137, %r138}, [pixelID];
cvt.u64.u32 %rd56, %r138;
cvt.u64.u32 %rd57, %r137;
and.b64 %rd52, %rd57, 255;
and.b64 %rd53, %rd56, 255;
mov.u64 %rd58, rnd_seeds2;
cvta.global.u64 %rd51, %rd58;
mov.u32 %r136, 3;
// inline asm
call (%rd50), _rt_buffer_get_64, (%rd51, %r103, %r136, %rd52, %rd53, %rd314, %rd314);
// inline asm
@%p16 bra BB0_9;
ld.u8 %rs14, [%rd50];
cvt.rn.f32.u16 %f284, %rs14;
div.rn.f32 %f285, %f284, 0fC37F0000;
fma.rn.f32 %f286, %f285, 0f3F333333, 0f3F800000;
setp.gt.f32 %p18, %f30, %f286;
mov.pred %p150, -1;
@%p18 bra BB0_25;
BB0_9:
ld.global.f32 %f289, [lightInvCutoff];
mul.f32 %f31, %f25, %f289;
mov.f32 %f293, 0f40800000;
abs.f32 %f33, %f31;
setp.lt.f32 %p19, %f33, 0f00800000;
mul.f32 %f295, %f33, 0f4B800000;
selp.f32 %f296, 0fC3170000, 0fC2FE0000, %p19;
selp.f32 %f297, %f295, %f33, %p19;
mov.b32 %r141, %f297;
and.b32 %r142, %r141, 8388607;
or.b32 %r143, %r142, 1065353216;
mov.b32 %f298, %r143;
shr.u32 %r144, %r141, 23;
cvt.rn.f32.u32 %f299, %r144;
add.f32 %f300, %f296, %f299;
setp.gt.f32 %p20, %f298, 0f3FB504F3;
mul.f32 %f301, %f298, 0f3F000000;
add.f32 %f302, %f300, 0f3F800000;
selp.f32 %f303, %f301, %f298, %p20;
selp.f32 %f304, %f302, %f300, %p20;
add.f32 %f305, %f303, 0fBF800000;
add.f32 %f288, %f303, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f287,%f288;
// inline asm
add.f32 %f306, %f305, %f305;
mul.f32 %f307, %f287, %f306;
mul.f32 %f308, %f307, %f307;
mov.f32 %f309, 0f3C4CAF63;
mov.f32 %f310, 0f3B18F0FE;
fma.rn.f32 %f311, %f310, %f308, %f309;
mov.f32 %f312, 0f3DAAAABD;
fma.rn.f32 %f313, %f311, %f308, %f312;
mul.rn.f32 %f314, %f313, %f308;
mul.rn.f32 %f315, %f314, %f307;
sub.f32 %f316, %f305, %f307;
neg.f32 %f317, %f307;
add.f32 %f318, %f316, %f316;
fma.rn.f32 %f319, %f317, %f305, %f318;
mul.rn.f32 %f320, %f287, %f319;
add.f32 %f321, %f315, %f307;
sub.f32 %f322, %f307, %f321;
add.f32 %f323, %f315, %f322;
add.f32 %f324, %f320, %f323;
add.f32 %f325, %f321, %f324;
sub.f32 %f326, %f321, %f325;
add.f32 %f327, %f324, %f326;
mov.f32 %f328, 0f3F317200;
mul.rn.f32 %f329, %f304, %f328;
mov.f32 %f330, 0f35BFBE8E;
mul.rn.f32 %f331, %f304, %f330;
add.f32 %f332, %f329, %f325;
sub.f32 %f333, %f329, %f332;
add.f32 %f334, %f325, %f333;
add.f32 %f335, %f327, %f334;
add.f32 %f336, %f331, %f335;
add.f32 %f337, %f332, %f336;
sub.f32 %f338, %f332, %f337;
add.f32 %f339, %f336, %f338;
mul.rn.f32 %f340, %f293, %f337;
neg.f32 %f341, %f340;
fma.rn.f32 %f342, %f293, %f337, %f341;
fma.rn.f32 %f343, %f293, %f339, %f342;
mov.f32 %f344, 0f00000000;
fma.rn.f32 %f345, %f344, %f337, %f343;
add.rn.f32 %f346, %f340, %f345;
neg.f32 %f347, %f346;
add.rn.f32 %f348, %f340, %f347;
add.rn.f32 %f349, %f348, %f345;
mov.b32 %r145, %f346;
setp.eq.s32 %p21, %r145, 1118925336;
add.s32 %r146, %r145, -1;
mov.b32 %f350, %r146;
add.f32 %f351, %f349, 0f37000000;
selp.f32 %f352, %f350, %f346, %p21;
selp.f32 %f34, %f351, %f349, %p21;
mul.f32 %f353, %f352, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f354, %f353;
mov.f32 %f355, 0fBF317200;
fma.rn.f32 %f356, %f354, %f355, %f352;
mov.f32 %f357, 0fB5BFBE8E;
fma.rn.f32 %f358, %f354, %f357, %f356;
mul.f32 %f359, %f358, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f360, %f359;
add.f32 %f361, %f354, 0f00000000;
ex2.approx.f32 %f362, %f361;
mul.f32 %f363, %f360, %f362;
setp.lt.f32 %p22, %f352, 0fC2D20000;
selp.f32 %f364, 0f00000000, %f363, %p22;
setp.gt.f32 %p23, %f352, 0f42D20000;
selp.f32 %f965, 0f7F800000, %f364, %p23;
setp.eq.f32 %p24, %f965, 0f7F800000;
@%p24 bra BB0_11;
fma.rn.f32 %f965, %f965, %f34, %f965;
BB0_11:
mov.f32 %f952, 0f40000000;
cvt.rzi.f32.f32 %f951, %f952;
add.f32 %f950, %f951, %f951;
mov.f32 %f949, 0f40800000;
sub.f32 %f948, %f949, %f950;
abs.f32 %f947, %f948;
setp.lt.f32 %p25, %f31, 0f00000000;
setp.eq.f32 %p26, %f947, 0f3F800000;
and.pred %p1, %p25, %p26;
mov.b32 %r147, %f965;
xor.b32 %r148, %r147, -2147483648;
mov.b32 %f365, %r148;
selp.f32 %f967, %f365, %f965, %p1;
setp.eq.f32 %p27, %f31, 0f00000000;
@%p27 bra BB0_14;
bra.uni BB0_12;
BB0_14:
add.f32 %f368, %f31, %f31;
selp.f32 %f967, %f368, 0f00000000, %p26;
bra.uni BB0_15;
BB0_12:
setp.geu.f32 %p28, %f31, 0f00000000;
@%p28 bra BB0_15;
mov.f32 %f955, 0f40800000;
cvt.rzi.f32.f32 %f367, %f955;
setp.neu.f32 %p29, %f367, 0f40800000;
selp.f32 %f967, 0f7FFFFFFF, %f967, %p29;
BB0_15:
add.f32 %f369, %f33, 0f40800000;
mov.b32 %r149, %f369;
setp.lt.s32 %p31, %r149, 2139095040;
@%p31 bra BB0_20;
setp.gtu.f32 %p32, %f33, 0f7F800000;
@%p32 bra BB0_19;
bra.uni BB0_17;
BB0_19:
add.f32 %f967, %f31, 0f40800000;
bra.uni BB0_20;
BB0_17:
setp.neu.f32 %p33, %f33, 0f7F800000;
@%p33 bra BB0_20;
selp.f32 %f967, 0fFF800000, 0f7F800000, %p1;
BB0_20:
mov.u32 %r384, 1;
mov.u64 %rd313, lightMeshBuffer;
cvta.global.u64 %rd312, %rd313;
shl.b32 %r383, %r386, 1;
mov.u64 %rd311, 0;
mov.f32 %f370, 0f3F800000;
sub.f32 %f371, %f370, %f967;
setp.eq.f32 %p34, %f31, 0f3F800000;
selp.f32 %f372, 0f00000000, %f371, %p34;
cvt.sat.f32.f32 %f373, %f372;
mul.f32 %f374, %f30, %f373;
add.s32 %r152, %r383, 1;
cvt.s64.s32 %rd61, %r152;
// inline asm
call (%rd59), _rt_buffer_get_64, (%rd312, %r384, %r119, %rd61, %rd311, %rd311, %rd311);
// inline asm
ld.f32 %f375, [%rd59];
mul.f32 %f376, %f26, %f375;
ld.f32 %f377, [%rd59+4];
mul.f32 %f378, %f27, %f377;
neg.f32 %f379, %f378;
sub.f32 %f380, %f379, %f376;
ld.f32 %f381, [%rd59+8];
mul.f32 %f382, %f28, %f381;
sub.f32 %f383, %f380, %f382;
cvt.sat.f32.f32 %f384, %f383;
mul.f32 %f45, %f374, %f384;
setp.leu.f32 %p35, %f45, 0f3727C5AC;
@%p35 bra BB0_22;
mov.u32 %r385, 1;
add.u64 %rd66, %SP, 4;
cvta.to.local.u64 %rd67, %rd66;
max.f32 %f391, %f397, %f261;
sub.f32 %f392, %f25, %f391;
mov.u32 %r156, 1065353216;
st.local.u32 [%rd67], %r156;
ld.global.u32 %r153, [root];
// inline asm
call _rt_trace_64, (%r153, %f12, %f13, %f14, %f26, %f27, %f28, %r385, %f391, %f392, %rd66, %r104);
// inline asm
ld.local.f32 %f399, [%rd67];
mul.f32 %f400, %f45, 0f3EA2F983;
mul.f32 %f401, %f400, %f399;
cvt.sat.f32.f32 %f402, %f29;
fma.rn.f32 %f24, %f402, %f401, %f24;
mul.f32 %f403, %f29, 0f40800000;
cvt.sat.f32.f32 %f404, %f403;
mul.f32 %f405, %f401, %f404;
fma.rn.f32 %f22, %f26, %f405, %f22;
fma.rn.f32 %f21, %f27, %f405, %f21;
fma.rn.f32 %f20, %f28, %f405, %f20;
add.f32 %f23, %f23, %f405;
add.f32 %f19, %f19, %f399;
BB0_22:
add.s32 %r9, %r9, 1;
BB0_23:
add.s32 %r386, %r386, 1;
setp.lt.s32 %p37, %r386, %r2;
@%p37 bra BB0_6;
bra.uni BB0_24;
BB0_4:
mov.f32 %f20, %f19;
mov.f32 %f21, %f19;
mov.f32 %f22, %f19;
mov.f32 %f23, %f19;
mov.f32 %f24, %f19;
BB0_24:
mov.pred %p150, %p13;
BB0_25:
cvt.rn.f32.s32 %f406, %r9;
mov.f32 %f407, 0f3F800000;
max.f32 %f408, %f406, %f407;
div.rn.f32 %f1016, %f24, %f408;
div.rn.f32 %f1021, %f19, %f408;
div.rn.f32 %f1017, %f23, %f408;
div.rn.f32 %f1018, %f22, %f408;
div.rn.f32 %f1019, %f21, %f408;
div.rn.f32 %f1020, %f20, %f408;
@!%p150 bra BB0_78;
bra.uni BB0_26;
BB0_26:
abs.f32 %f954, %f958;
abs.f32 %f953, %f956;
setp.gt.f32 %p38, %f953, %f954;
neg.f32 %f415, %f957;
selp.f32 %f416, %f415, 0f00000000, %p38;
neg.f32 %f417, %f958;
selp.f32 %f418, %f956, %f417, %p38;
selp.f32 %f419, 0f00000000, %f957, %p38;
mul.f32 %f420, %f418, %f418;
fma.rn.f32 %f421, %f416, %f416, %f420;
fma.rn.f32 %f422, %f419, %f419, %f421;
sqrt.rn.f32 %f423, %f422;
rcp.rn.f32 %f424, %f423;
mul.f32 %f76, %f416, %f424;
mul.f32 %f77, %f418, %f424;
mul.f32 %f78, %f419, %f424;
mov.f32 %f992, 0f00000000;
setp.lt.s32 %p39, %r3, 1;
mov.f32 %f993, %f992;
mov.f32 %f994, %f992;
mov.f32 %f995, %f992;
mov.f32 %f996, %f992;
mov.f32 %f997, %f992;
@%p39 bra BB0_77;
cvt.rn.f32.s32 %f431, %r3;
rcp.rn.f32 %f79, %f431;
add.u64 %rd68, %SP, 8;
cvta.to.local.u64 %rd3, %rd68;
mul.f32 %f80, %f12, 0f3456BF95;
mul.f32 %f81, %f13, 0f3456BF95;
mul.f32 %f82, %f14, 0f3456BF95;
add.u64 %rd69, %SP, 0;
cvta.to.local.u64 %rd4, %rd69;
mul.f32 %f432, %f956, %f77;
mul.f32 %f433, %f957, %f76;
sub.f32 %f83, %f433, %f432;
mul.f32 %f434, %f958, %f76;
mul.f32 %f435, %f956, %f78;
sub.f32 %f84, %f435, %f434;
mul.f32 %f436, %f957, %f78;
mul.f32 %f437, %f958, %f77;
sub.f32 %f85, %f437, %f436;
mov.f32 %f992, 0f00000000;
mov.u32 %r157, 0;
abs.f32 %f438, %f81;
abs.f32 %f439, %f80;
max.f32 %f440, %f439, %f438;
abs.f32 %f441, %f82;
max.f32 %f442, %f440, %f441;
mov.u32 %r390, %r157;
mov.f32 %f993, %f992;
mov.f32 %f994, %f992;
mov.f32 %f995, %f992;
mov.f32 %f996, %f992;
mov.f32 %f997, %f992;
BB0_28:
cvt.rn.f32.s32 %f92, %r390;
max.f32 %f93, %f442, %f261;
mov.u32 %r392, %r157;
BB0_29:
mad.lo.s32 %r159, %r393, 1664525, 1013904223;
and.b32 %r160, %r159, 16777215;
cvt.rn.f32.u32 %f444, %r160;
fma.rn.f32 %f445, %f444, 0f33800000, %f92;
mul.f32 %f100, %f79, %f445;
mad.lo.s32 %r393, %r159, 1664525, 1013904223;
and.b32 %r161, %r393, 16777215;
cvt.rn.f32.u32 %f446, %r161;
cvt.rn.f32.s32 %f447, %r392;
fma.rn.f32 %f448, %f446, 0f33800000, %f447;
mul.f32 %f449, %f79, %f448;
mul.f32 %f450, %f100, %f100;
sub.f32 %f452, %f407, %f450;
mov.f32 %f453, 0f00000000;
max.f32 %f454, %f453, %f452;
sqrt.rn.f32 %f101, %f454;
mul.f32 %f1004, %f449, 0f40C90FDB;
abs.f32 %f103, %f1004;
setp.neu.f32 %p40, %f103, 0f7F800000;
mov.f32 %f998, %f1004;
@%p40 bra BB0_31;
mul.rn.f32 %f998, %f1004, %f453;
BB0_31:
mul.f32 %f456, %f998, 0f3F22F983;
cvt.rni.s32.f32 %r403, %f456;
cvt.rn.f32.s32 %f457, %r403;
neg.f32 %f458, %f457;
mov.f32 %f459, 0f3FC90FDA;
fma.rn.f32 %f460, %f458, %f459, %f998;
mov.f32 %f461, 0f33A22168;
fma.rn.f32 %f462, %f458, %f461, %f460;
mov.f32 %f463, 0f27C234C5;
fma.rn.f32 %f999, %f458, %f463, %f462;
abs.f32 %f464, %f998;
setp.leu.f32 %p41, %f464, 0f47CE4780;
@%p41 bra BB0_42;
mov.b32 %r21, %f998;
shr.u32 %r22, %r21, 23;
shl.b32 %r164, %r21, 8;
or.b32 %r23, %r164, -2147483648;
mov.u32 %r394, 0;
mov.u64 %rd316, 0;
mov.u64 %rd315, %rd3;
mov.u32 %r395, %r394;
BB0_33:
.pragma "nounroll";
shl.b64 %rd71, %rd316, 2;
mov.u64 %rd72, __cudart_i2opi_f;
add.s64 %rd73, %rd72, %rd71;
ld.const.u32 %r167, [%rd73];
// inline asm
{
mad.lo.cc.u32 %r165, %r167, %r23, %r395;
madc.hi.u32 %r395, %r167, %r23, 0;
}
// inline asm
st.local.u32 [%rd315], %r165;
add.s32 %r394, %r394, 1;
cvt.s64.s32 %rd316, %r394;
mul.wide.s32 %rd74, %r394, 4;
add.s64 %rd315, %rd3, %rd74;
setp.ne.s32 %p42, %r394, 6;
@%p42 bra BB0_33;
and.b32 %r170, %r22, 255;
add.s32 %r171, %r170, -128;
shr.u32 %r172, %r171, 5;
and.b32 %r28, %r21, -2147483648;
st.local.u32 [%rd3+24], %r395;
mov.u32 %r173, 6;
sub.s32 %r174, %r173, %r172;
mul.wide.s32 %rd75, %r174, 4;
add.s64 %rd10, %rd3, %rd75;
ld.local.u32 %r396, [%rd10];
ld.local.u32 %r397, [%rd10+-4];
and.b32 %r31, %r22, 31;
setp.eq.s32 %p43, %r31, 0;
@%p43 bra BB0_36;
mov.u32 %r175, 32;
sub.s32 %r176, %r175, %r31;
shr.u32 %r177, %r397, %r176;
shl.b32 %r178, %r396, %r31;
add.s32 %r396, %r177, %r178;
ld.local.u32 %r179, [%rd10+-8];
shr.u32 %r180, %r179, %r176;
shl.b32 %r181, %r397, %r31;
add.s32 %r397, %r180, %r181;
BB0_36:
shr.u32 %r182, %r397, 30;
shl.b32 %r183, %r396, 2;
add.s32 %r398, %r182, %r183;
shl.b32 %r37, %r397, 2;
shr.u32 %r184, %r398, 31;
shr.u32 %r185, %r396, 30;
add.s32 %r38, %r184, %r185;
setp.eq.s32 %p44, %r184, 0;
@%p44 bra BB0_37;
bra.uni BB0_38;
BB0_37:
mov.u32 %r399, %r28;
mov.u32 %r400, %r37;
bra.uni BB0_39;
BB0_38:
not.b32 %r186, %r398;
neg.s32 %r400, %r37;
setp.eq.s32 %p45, %r37, 0;
selp.u32 %r187, 1, 0, %p45;
add.s32 %r398, %r187, %r186;
xor.b32 %r399, %r28, -2147483648;
BB0_39:
clz.b32 %r402, %r398;
setp.eq.s32 %p46, %r402, 0;
shl.b32 %r188, %r398, %r402;
mov.u32 %r189, 32;
sub.s32 %r190, %r189, %r402;
shr.u32 %r191, %r400, %r190;
add.s32 %r192, %r191, %r188;
selp.b32 %r46, %r398, %r192, %p46;
mov.u32 %r193, -921707870;
mul.hi.u32 %r401, %r46, %r193;
setp.eq.s32 %p47, %r28, 0;
neg.s32 %r194, %r38;
selp.b32 %r403, %r38, %r194, %p47;
setp.lt.s32 %p48, %r401, 1;
@%p48 bra BB0_41;
mul.lo.s32 %r195, %r46, -921707870;
shr.u32 %r196, %r195, 31;
shl.b32 %r197, %r401, 1;
add.s32 %r401, %r196, %r197;
add.s32 %r402, %r402, 1;
BB0_41:
mov.u32 %r198, 126;
sub.s32 %r199, %r198, %r402;
shl.b32 %r200, %r199, 23;
add.s32 %r201, %r401, 1;
shr.u32 %r202, %r201, 7;
add.s32 %r203, %r202, 1;
shr.u32 %r204, %r203, 1;
add.s32 %r205, %r204, %r200;
or.b32 %r206, %r205, %r399;
mov.b32 %f999, %r206;
BB0_42:
mul.rn.f32 %f109, %f999, %f999;
add.s32 %r54, %r403, 1;
and.b32 %r55, %r54, 1;
setp.eq.s32 %p49, %r55, 0;
@%p49 bra BB0_44;
bra.uni BB0_43;
BB0_44:
mov.f32 %f467, 0f3C08839E;
mov.f32 %f468, 0fB94CA1F9;
fma.rn.f32 %f1000, %f468, %f109, %f467;
bra.uni BB0_45;
BB0_43:
mov.f32 %f465, 0fBAB6061A;
mov.f32 %f466, 0f37CCF5CE;
fma.rn.f32 %f1000, %f466, %f109, %f465;
BB0_45:
@%p49 bra BB0_47;
bra.uni BB0_46;
BB0_47:
mov.f32 %f472, 0fBE2AAAA3;
fma.rn.f32 %f473, %f1000, %f109, %f472;
fma.rn.f32 %f1001, %f473, %f109, %f453;
bra.uni BB0_48;
BB0_46:
mov.f32 %f469, 0f3D2AAAA5;
fma.rn.f32 %f470, %f1000, %f109, %f469;
mov.f32 %f471, 0fBF000000;
fma.rn.f32 %f1001, %f470, %f109, %f471;
BB0_48:
fma.rn.f32 %f1002, %f1001, %f999, %f999;
@%p49 bra BB0_50;
fma.rn.f32 %f1002, %f1001, %f109, %f407;
BB0_50:
and.b32 %r207, %r54, 2;
setp.eq.s32 %p52, %r207, 0;
@%p52 bra BB0_52;
mov.f32 %f477, 0fBF800000;
fma.rn.f32 %f1002, %f1002, %f477, %f453;
BB0_52:
@%p40 bra BB0_54;
mul.rn.f32 %f1004, %f1004, %f453;
BB0_54:
mul.f32 %f479, %f1004, 0f3F22F983;
cvt.rni.s32.f32 %r413, %f479;
cvt.rn.f32.s32 %f480, %r413;
neg.f32 %f481, %f480;
fma.rn.f32 %f483, %f481, %f459, %f1004;
fma.rn.f32 %f485, %f481, %f461, %f483;
fma.rn.f32 %f1005, %f481, %f463, %f485;
abs.f32 %f487, %f1004;
setp.leu.f32 %p54, %f487, 0f47CE4780;
@%p54 bra BB0_65;
mov.b32 %r57, %f1004;
shr.u32 %r58, %r57, 23;
shl.b32 %r210, %r57, 8;
or.b32 %r59, %r210, -2147483648;
mov.u32 %r404, 0;
mov.u64 %rd317, %rd3;
mov.u64 %rd318, %rd27;
mov.u32 %r405, %r404;
BB0_56:
.pragma "nounroll";
shl.b64 %rd77, %rd318, 2;
mov.u64 %rd78, __cudart_i2opi_f;
add.s64 %rd79, %rd78, %rd77;
ld.const.u32 %r213, [%rd79];
// inline asm
{
mad.lo.cc.u32 %r211, %r213, %r59, %r405;
madc.hi.u32 %r405, %r213, %r59, 0;
}
// inline asm
st.local.u32 [%rd317], %r211;
add.s32 %r404, %r404, 1;
cvt.s64.s32 %rd318, %r404;
mul.wide.s32 %rd80, %r404, 4;
add.s64 %rd317, %rd3, %rd80;
setp.ne.s32 %p55, %r404, 6;
@%p55 bra BB0_56;
and.b32 %r216, %r58, 255;
add.s32 %r217, %r216, -128;
shr.u32 %r218, %r217, 5;
and.b32 %r64, %r57, -2147483648;
st.local.u32 [%rd3+24], %r405;
mov.u32 %r219, 6;
sub.s32 %r220, %r219, %r218;
mul.wide.s32 %rd81, %r220, 4;
add.s64 %rd16, %rd3, %rd81;
ld.local.u32 %r406, [%rd16];
ld.local.u32 %r407, [%rd16+-4];
and.b32 %r67, %r58, 31;
setp.eq.s32 %p56, %r67, 0;
@%p56 bra BB0_59;
mov.u32 %r221, 32;
sub.s32 %r222, %r221, %r67;
shr.u32 %r223, %r407, %r222;
shl.b32 %r224, %r406, %r67;
add.s32 %r406, %r223, %r224;
ld.local.u32 %r225, [%rd16+-8];
shr.u32 %r226, %r225, %r222;
shl.b32 %r227, %r407, %r67;
add.s32 %r407, %r226, %r227;
BB0_59:
shr.u32 %r228, %r407, 30;
shl.b32 %r229, %r406, 2;
add.s32 %r408, %r228, %r229;
shl.b32 %r73, %r407, 2;
shr.u32 %r230, %r408, 31;
shr.u32 %r231, %r406, 30;
add.s32 %r74, %r230, %r231;
setp.eq.s32 %p57, %r230, 0;
@%p57 bra BB0_60;
bra.uni BB0_61;
BB0_60:
mov.u32 %r409, %r64;
mov.u32 %r410, %r73;
bra.uni BB0_62;
BB0_61:
not.b32 %r232, %r408;
neg.s32 %r410, %r73;
setp.eq.s32 %p58, %r73, 0;
selp.u32 %r233, 1, 0, %p58;
add.s32 %r408, %r233, %r232;
xor.b32 %r409, %r64, -2147483648;
BB0_62:
clz.b32 %r412, %r408;
setp.eq.s32 %p59, %r412, 0;
shl.b32 %r234, %r408, %r412;
mov.u32 %r235, 32;
sub.s32 %r236, %r235, %r412;
shr.u32 %r237, %r410, %r236;
add.s32 %r238, %r237, %r234;
selp.b32 %r82, %r408, %r238, %p59;
mov.u32 %r239, -921707870;
mul.hi.u32 %r411, %r82, %r239;
setp.eq.s32 %p60, %r64, 0;
neg.s32 %r240, %r74;
selp.b32 %r413, %r74, %r240, %p60;
setp.lt.s32 %p61, %r411, 1;
@%p61 bra BB0_64;
mul.lo.s32 %r241, %r82, -921707870;
shr.u32 %r242, %r241, 31;
shl.b32 %r243, %r411, 1;
add.s32 %r411, %r242, %r243;
add.s32 %r412, %r412, 1;
BB0_64:
mov.u32 %r244, 126;
sub.s32 %r245, %r244, %r412;
shl.b32 %r246, %r245, 23;
add.s32 %r247, %r411, 1;
shr.u32 %r248, %r247, 7;
add.s32 %r249, %r248, 1;
shr.u32 %r250, %r249, 1;
add.s32 %r251, %r250, %r246;
or.b32 %r252, %r251, %r409;
mov.b32 %f1005, %r252;
BB0_65:
mul.rn.f32 %f126, %f1005, %f1005;
and.b32 %r90, %r413, 1;
setp.eq.s32 %p62, %r90, 0;
@%p62 bra BB0_67;
bra.uni BB0_66;
BB0_67:
mov.f32 %f490, 0f3C08839E;
mov.f32 %f491, 0fB94CA1F9;
fma.rn.f32 %f1006, %f491, %f126, %f490;
bra.uni BB0_68;
BB0_66:
mov.f32 %f488, 0fBAB6061A;
mov.f32 %f489, 0f37CCF5CE;
fma.rn.f32 %f1006, %f489, %f126, %f488;
BB0_68:
@%p62 bra BB0_70;
bra.uni BB0_69;
BB0_70:
mov.f32 %f495, 0fBE2AAAA3;
fma.rn.f32 %f496, %f1006, %f126, %f495;
fma.rn.f32 %f1007, %f496, %f126, %f453;
bra.uni BB0_71;
BB0_69:
mov.f32 %f492, 0f3D2AAAA5;
fma.rn.f32 %f493, %f1006, %f126, %f492;
mov.f32 %f494, 0fBF000000;
fma.rn.f32 %f1007, %f493, %f126, %f494;
BB0_71:
fma.rn.f32 %f1008, %f1007, %f1005, %f1005;
@%p62 bra BB0_73;
fma.rn.f32 %f1008, %f1007, %f126, %f407;
BB0_73:
and.b32 %r253, %r413, 2;
setp.eq.s32 %p65, %r253, 0;
@%p65 bra BB0_75;
mov.f32 %f500, 0fBF800000;
fma.rn.f32 %f1008, %f1008, %f500, %f453;
BB0_75:
mul.f32 %f509, %f101, %f1002;
mul.f32 %f510, %f101, %f1008;
mul.f32 %f511, %f76, %f510;
mul.f32 %f512, %f77, %f510;
mul.f32 %f513, %f78, %f510;
fma.rn.f32 %f514, %f85, %f509, %f511;
fma.rn.f32 %f515, %f84, %f509, %f512;
fma.rn.f32 %f516, %f83, %f509, %f513;
fma.rn.f32 %f504, %f956, %f100, %f514;
fma.rn.f32 %f505, %f957, %f100, %f515;
fma.rn.f32 %f506, %f958, %f100, %f516;
mov.u32 %r255, 0;
st.local.u32 [%rd4], %r255;
ld.global.u32 %r254, [root];
mov.f32 %f508, 0f6C4ECB8F;
// inline asm
call _rt_trace_64, (%r254, %f12, %f13, %f14, %f504, %f505, %f506, %r255, %f93, %f508, %rd69, %r104);
// inline asm
ld.local.f32 %f517, [%rd4];
setp.lt.f32 %p66, %f517, 0f00000000;
selp.f32 %f518, 0f00000000, %f517, %p66;
selp.f32 %f519, 0f00000000, 0f3F800000, %p66;
add.f32 %f992, %f992, %f519;
fma.rn.f32 %f995, %f504, %f518, %f995;
fma.rn.f32 %f994, %f505, %f518, %f994;
fma.rn.f32 %f993, %f506, %f518, %f993;
add.f32 %f996, %f996, %f518;
mul.f32 %f520, %f957, %f505;
fma.rn.f32 %f521, %f956, %f504, %f520;
fma.rn.f32 %f522, %f958, %f506, %f521;
cvt.sat.f32.f32 %f523, %f522;
fma.rn.f32 %f997, %f518, %f523, %f997;
add.s32 %r392, %r392, 1;
setp.lt.s32 %p67, %r392, %r3;
@%p67 bra BB0_29;
add.s32 %r390, %r390, 1;
setp.lt.s32 %p68, %r390, %r3;
@%p68 bra BB0_28;
BB0_77:
mul.lo.s32 %r257, %r3, %r3;
cvt.rn.f32.s32 %f524, %r257;
div.rn.f32 %f525, %f997, %f524;
div.rn.f32 %f1021, %f992, %f524;
div.rn.f32 %f1017, %f996, %f524;
div.rn.f32 %f1018, %f995, %f524;
div.rn.f32 %f1019, %f994, %f524;
div.rn.f32 %f1020, %f993, %f524;
add.f32 %f1016, %f525, %f525;
BB0_78:
setp.gt.s32 %p69, %r1, -1;
selp.f32 %f162, %f1021, %f1016, %p69;
ld.global.u32 %r415, [imageEnabled];
and.b32 %r258, %r415, 8;
setp.eq.s32 %p70, %r258, 0;
@%p70 bra BB0_91;
cvt.u64.u32 %rd85, %r5;
cvt.u64.u32 %rd86, %r6;
mov.u64 %rd89, image_Mask;
cvta.global.u64 %rd84, %rd89;
// inline asm
call (%rd83), _rt_buffer_get_64, (%rd84, %r103, %r103, %rd85, %rd86, %rd27, %rd27);
// inline asm
mov.f32 %f528, 0f3E68BA2E;
cvt.rzi.f32.f32 %f529, %f528;
fma.rn.f32 %f530, %f529, 0fC0000000, 0f3EE8BA2E;
abs.f32 %f163, %f530;
abs.f32 %f164, %f162;
setp.lt.f32 %p71, %f164, 0f00800000;
mul.f32 %f531, %f164, 0f4B800000;
selp.f32 %f532, 0fC3170000, 0fC2FE0000, %p71;
selp.f32 %f533, %f531, %f164, %p71;
mov.b32 %r261, %f533;
and.b32 %r262, %r261, 8388607;
or.b32 %r263, %r262, 1065353216;
mov.b32 %f534, %r263;
shr.u32 %r264, %r261, 23;
cvt.rn.f32.u32 %f535, %r264;
add.f32 %f536, %f532, %f535;
setp.gt.f32 %p72, %f534, 0f3FB504F3;
mul.f32 %f537, %f534, 0f3F000000;
add.f32 %f538, %f536, 0f3F800000;
selp.f32 %f539, %f537, %f534, %p72;
selp.f32 %f540, %f538, %f536, %p72;
add.f32 %f541, %f539, 0fBF800000;
add.f32 %f527, %f539, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f526,%f527;
// inline asm
add.f32 %f542, %f541, %f541;
mul.f32 %f543, %f526, %f542;
mul.f32 %f544, %f543, %f543;
mov.f32 %f545, 0f3C4CAF63;
mov.f32 %f546, 0f3B18F0FE;
fma.rn.f32 %f547, %f546, %f544, %f545;
mov.f32 %f548, 0f3DAAAABD;
fma.rn.f32 %f549, %f547, %f544, %f548;
mul.rn.f32 %f550, %f549, %f544;
mul.rn.f32 %f551, %f550, %f543;
sub.f32 %f552, %f541, %f543;
neg.f32 %f553, %f543;
add.f32 %f554, %f552, %f552;
fma.rn.f32 %f555, %f553, %f541, %f554;
mul.rn.f32 %f556, %f526, %f555;
add.f32 %f557, %f551, %f543;
sub.f32 %f558, %f543, %f557;
add.f32 %f559, %f551, %f558;
add.f32 %f560, %f556, %f559;
add.f32 %f561, %f557, %f560;
sub.f32 %f562, %f557, %f561;
add.f32 %f563, %f560, %f562;
mov.f32 %f564, 0f3F317200;
mul.rn.f32 %f565, %f540, %f564;
mov.f32 %f566, 0f35BFBE8E;
mul.rn.f32 %f567, %f540, %f566;
add.f32 %f568, %f565, %f561;
sub.f32 %f569, %f565, %f568;
add.f32 %f570, %f561, %f569;
add.f32 %f571, %f563, %f570;
add.f32 %f572, %f567, %f571;
add.f32 %f573, %f568, %f572;
sub.f32 %f574, %f568, %f573;
add.f32 %f575, %f572, %f574;
mov.f32 %f576, 0f3EE8BA2E;
mul.rn.f32 %f577, %f576, %f573;
neg.f32 %f578, %f577;
fma.rn.f32 %f579, %f576, %f573, %f578;
fma.rn.f32 %f580, %f576, %f575, %f579;
mov.f32 %f581, 0f00000000;
fma.rn.f32 %f582, %f581, %f573, %f580;
add.rn.f32 %f583, %f577, %f582;
neg.f32 %f584, %f583;
add.rn.f32 %f585, %f577, %f584;
add.rn.f32 %f586, %f585, %f582;
mov.b32 %r265, %f583;
setp.eq.s32 %p73, %r265, 1118925336;
add.s32 %r266, %r265, -1;
mov.b32 %f587, %r266;
add.f32 %f588, %f586, 0f37000000;
selp.f32 %f589, %f587, %f583, %p73;
selp.f32 %f165, %f588, %f586, %p73;
mul.f32 %f590, %f589, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f591, %f590;
mov.f32 %f592, 0fBF317200;
fma.rn.f32 %f593, %f591, %f592, %f589;
mov.f32 %f594, 0fB5BFBE8E;
fma.rn.f32 %f595, %f591, %f594, %f593;
mul.f32 %f596, %f595, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f597, %f596;
add.f32 %f598, %f591, 0f00000000;
ex2.approx.f32 %f599, %f598;
mul.f32 %f600, %f597, %f599;
setp.lt.f32 %p74, %f589, 0fC2D20000;
selp.f32 %f601, 0f00000000, %f600, %p74;
setp.gt.f32 %p75, %f589, 0f42D20000;
selp.f32 %f1022, 0f7F800000, %f601, %p75;
setp.eq.f32 %p76, %f1022, 0f7F800000;
@%p76 bra BB0_81;
fma.rn.f32 %f1022, %f1022, %f165, %f1022;
BB0_81:
setp.lt.f32 %p77, %f162, 0f00000000;
setp.eq.f32 %p78, %f163, 0f3F800000;
and.pred %p3, %p77, %p78;
mov.b32 %r267, %f1022;
xor.b32 %r268, %r267, -2147483648;
mov.b32 %f602, %r268;
selp.f32 %f1024, %f602, %f1022, %p3;
setp.eq.f32 %p79, %f162, 0f00000000;
@%p79 bra BB0_84;
bra.uni BB0_82;
BB0_84:
add.f32 %f605, %f162, %f162;
selp.f32 %f1024, %f605, 0f00000000, %p78;
bra.uni BB0_85;
BB0_149:
mov.u64 %rd230, image_HDR;
cvta.global.u64 %rd225, %rd230;
mov.u32 %r354, 8;
mov.u64 %rd229, 0;
// inline asm
call (%rd224), _rt_buffer_get_64, (%rd225, %r103, %r354, %rd20, %rd21, %rd229, %rd229);
// inline asm
mov.f32 %f918, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs99, %f918;}
// inline asm
mov.u16 %rs100, 0;
st.v4.u16 [%rd224], {%rs99, %rs99, %rs99, %rs100};
BB0_150:
ld.global.u32 %r355, [additive];
setp.eq.s32 %p146, %r355, 0;
@%p146 bra BB0_152;
mov.u64 %rd243, image_RNM0;
cvta.global.u64 %rd232, %rd243;
mov.u32 %r359, 8;
mov.u64 %rd242, 0;
// inline asm
call (%rd231), _rt_buffer_get_64, (%rd232, %r103, %r359, %rd20, %rd21, %rd242, %rd242);
// inline asm
ld.v4.u16 {%rs107, %rs108, %rs109, %rs110}, [%rd231];
// inline asm
{ cvt.f32.f16 %f919, %rs107;}
// inline asm
// inline asm
{ cvt.f32.f16 %f920, %rs108;}
// inline asm
// inline asm
{ cvt.f32.f16 %f921, %rs109;}
// inline asm
// inline asm
call (%rd237), _rt_buffer_get_64, (%rd232, %r103, %r359, %rd20, %rd21, %rd242, %rd242);
// inline asm
add.f32 %f922, %f919, 0f00000000;
add.f32 %f923, %f920, 0f00000000;
add.f32 %f924, %f921, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs106, %f924;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs105, %f923;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs104, %f922;}
// inline asm
mov.u16 %rs111, 0;
st.v4.u16 [%rd237], {%rs104, %rs105, %rs106, %rs111};
bra.uni BB0_153;
BB0_152:
mov.u64 %rd250, image_RNM0;
cvta.global.u64 %rd245, %rd250;
mov.u32 %r361, 8;
mov.u64 %rd249, 0;
// inline asm
call (%rd244), _rt_buffer_get_64, (%rd245, %r103, %r361, %rd20, %rd21, %rd249, %rd249);
// inline asm
mov.f32 %f925, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs112, %f925;}
// inline asm
mov.u16 %rs113, 0;
st.v4.u16 [%rd244], {%rs112, %rs112, %rs112, %rs113};
BB0_153:
ld.global.u32 %r362, [additive];
setp.eq.s32 %p147, %r362, 0;
@%p147 bra BB0_155;
mov.u64 %rd263, image_RNM1;
cvta.global.u64 %rd252, %rd263;
mov.u32 %r366, 8;
mov.u64 %rd262, 0;
// inline asm
call (%rd251), _rt_buffer_get_64, (%rd252, %r103, %r366, %rd20, %rd21, %rd262, %rd262);
// inline asm
ld.v4.u16 {%rs120, %rs121, %rs122, %rs123}, [%rd251];
// inline asm
{ cvt.f32.f16 %f926, %rs120;}
// inline asm
// inline asm
{ cvt.f32.f16 %f927, %rs121;}
// inline asm
// inline asm
{ cvt.f32.f16 %f928, %rs122;}
// inline asm
// inline asm
call (%rd257), _rt_buffer_get_64, (%rd252, %r103, %r366, %rd20, %rd21, %rd262, %rd262);
// inline asm
add.f32 %f929, %f926, 0f00000000;
add.f32 %f930, %f927, 0f00000000;
add.f32 %f931, %f928, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs119, %f931;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs118, %f930;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs117, %f929;}
// inline asm
mov.u16 %rs124, 0;
st.v4.u16 [%rd257], {%rs117, %rs118, %rs119, %rs124};
bra.uni BB0_156;
BB0_155:
mov.u64 %rd270, image_RNM1;
cvta.global.u64 %rd265, %rd270;
mov.u32 %r368, 8;
mov.u64 %rd269, 0;
// inline asm
call (%rd264), _rt_buffer_get_64, (%rd265, %r103, %r368, %rd20, %rd21, %rd269, %rd269);
// inline asm
mov.f32 %f932, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs125, %f932;}
// inline asm
mov.u16 %rs126, 0;
st.v4.u16 [%rd264], {%rs125, %rs125, %rs125, %rs126};
BB0_156:
ld.global.u32 %r369, [additive];
setp.eq.s32 %p148, %r369, 0;
@%p148 bra BB0_158;
mov.u64 %rd283, image_RNM2;
cvta.global.u64 %rd272, %rd283;
mov.u32 %r373, 8;
mov.u64 %rd282, 0;
// inline asm
call (%rd271), _rt_buffer_get_64, (%rd272, %r103, %r373, %rd20, %rd21, %rd282, %rd282);
// inline asm
ld.v4.u16 {%rs133, %rs134, %rs135, %rs136}, [%rd271];
// inline asm
{ cvt.f32.f16 %f933, %rs133;}
// inline asm
// inline asm
{ cvt.f32.f16 %f934, %rs134;}
// inline asm
// inline asm
{ cvt.f32.f16 %f935, %rs135;}
// inline asm
// inline asm
call (%rd277), _rt_buffer_get_64, (%rd272, %r103, %r373, %rd20, %rd21, %rd282, %rd282);
// inline asm
add.f32 %f936, %f933, 0f00000000;
add.f32 %f937, %f934, 0f00000000;
add.f32 %f938, %f935, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs132, %f938;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs131, %f937;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs130, %f936;}
// inline asm
mov.u16 %rs137, 0;
st.v4.u16 [%rd277], {%rs130, %rs131, %rs132, %rs137};
bra.uni BB0_159;
BB0_158:
mov.u64 %rd290, image_RNM2;
cvta.global.u64 %rd285, %rd290;
mov.u32 %r375, 8;
mov.u64 %rd289, 0;
// inline asm
call (%rd284), _rt_buffer_get_64, (%rd285, %r103, %r375, %rd20, %rd21, %rd289, %rd289);
// inline asm
mov.f32 %f939, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs138, %f939;}
// inline asm
mov.u16 %rs139, 0;
st.v4.u16 [%rd284], {%rs138, %rs138, %rs138, %rs139};
BB0_159:
ld.global.u32 %r376, [additive];
setp.eq.s32 %p149, %r376, 0;
@%p149 bra BB0_161;
mov.u64 %rd303, image_RNM3;
cvta.global.u64 %rd292, %rd303;
mov.u32 %r380, 8;
mov.u64 %rd302, 0;
// inline asm
call (%rd291), _rt_buffer_get_64, (%rd292, %r103, %r380, %rd20, %rd21, %rd302, %rd302);
// inline asm
ld.v4.u16 {%rs146, %rs147, %rs148, %rs149}, [%rd291];
// inline asm
{ cvt.f32.f16 %f940, %rs146;}
// inline asm
// inline asm
{ cvt.f32.f16 %f941, %rs147;}
// inline asm
// inline asm
{ cvt.f32.f16 %f942, %rs148;}
// inline asm
// inline asm
call (%rd297), _rt_buffer_get_64, (%rd292, %r103, %r380, %rd20, %rd21, %rd302, %rd302);
// inline asm
add.f32 %f943, %f940, 0f00000000;
add.f32 %f944, %f941, 0f00000000;
add.f32 %f945, %f942, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs145, %f945;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs144, %f944;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs143, %f943;}
// inline asm
mov.u16 %rs150, 0;
st.v4.u16 [%rd297], {%rs143, %rs144, %rs145, %rs150};
bra.uni BB0_162;
BB0_161:
mov.u64 %rd310, image_RNM3;
cvta.global.u64 %rd305, %rd310;
mov.u32 %r382, 8;
mov.u64 %rd309, 0;
// inline asm
call (%rd304), _rt_buffer_get_64, (%rd305, %r103, %r382, %rd20, %rd21, %rd309, %rd309);
// inline asm
mov.f32 %f946, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs151, %f946;}
// inline asm
mov.u16 %rs152, 0;
st.v4.u16 [%rd304], {%rs151, %rs151, %rs151, %rs152};
bra.uni BB0_162;
BB0_82:
setp.geu.f32 %p80, %f162, 0f00000000;
@%p80 bra BB0_85;
cvt.rzi.f32.f32 %f604, %f576;
setp.neu.f32 %p81, %f604, 0f3EE8BA2E;
selp.f32 %f1024, 0f7FFFFFFF, %f1024, %p81;
BB0_85:
add.f32 %f606, %f164, 0f3EE8BA2E;
mov.b32 %r269, %f606;
setp.lt.s32 %p83, %r269, 2139095040;
@%p83 bra BB0_90;
setp.gtu.f32 %p84, %f164, 0f7F800000;
@%p84 bra BB0_89;
bra.uni BB0_87;
BB0_89:
add.f32 %f1024, %f162, 0f3EE8BA2E;
bra.uni BB0_90;
BB0_87:
setp.neu.f32 %p85, %f164, 0f7F800000;
@%p85 bra BB0_90;
selp.f32 %f1024, 0fFF800000, 0f7F800000, %p3;
BB0_90:
mul.f32 %f607, %f1024, 0f437F0000;
setp.eq.f32 %p86, %f162, 0f3F800000;
selp.f32 %f608, 0f437F0000, %f607, %p86;
cvt.rzi.u32.f32 %r270, %f608;
cvt.u16.u32 %rs15, %r270;
mov.u16 %rs16, 255;
st.v2.u8 [%rd83], {%rs15, %rs16};
ld.global.u32 %r415, [imageEnabled];
BB0_91:
ld.global.f32 %f609, [lightColor];
mul.f32 %f176, %f1016, %f609;
ld.global.f32 %f610, [lightColor+4];
mul.f32 %f177, %f1016, %f610;
ld.global.f32 %f611, [lightColor+8];
mul.f32 %f178, %f1016, %f611;
and.b32 %r271, %r415, 1;
setp.eq.b32 %p87, %r271, 1;
@!%p87 bra BB0_126;
bra.uni BB0_92;
BB0_92:
mov.f32 %f614, 0f3E666666;
cvt.rzi.f32.f32 %f615, %f614;
fma.rn.f32 %f616, %f615, 0fC0000000, 0f3EE66666;
abs.f32 %f179, %f616;
abs.f32 %f180, %f176;
setp.lt.f32 %p88, %f180, 0f00800000;
mul.f32 %f617, %f180, 0f4B800000;
selp.f32 %f618, 0fC3170000, 0fC2FE0000, %p88;
selp.f32 %f619, %f617, %f180, %p88;
mov.b32 %r272, %f619;
and.b32 %r273, %r272, 8388607;
or.b32 %r274, %r273, 1065353216;
mov.b32 %f620, %r274;
shr.u32 %r275, %r272, 23;
cvt.rn.f32.u32 %f621, %r275;
add.f32 %f622, %f618, %f621;
setp.gt.f32 %p89, %f620, 0f3FB504F3;
mul.f32 %f623, %f620, 0f3F000000;
add.f32 %f624, %f622, 0f3F800000;
selp.f32 %f625, %f623, %f620, %p89;
selp.f32 %f626, %f624, %f622, %p89;
add.f32 %f627, %f625, 0fBF800000;
add.f32 %f613, %f625, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f612,%f613;
// inline asm
add.f32 %f628, %f627, %f627;
mul.f32 %f629, %f612, %f628;
mul.f32 %f630, %f629, %f629;
mov.f32 %f631, 0f3C4CAF63;
mov.f32 %f632, 0f3B18F0FE;
fma.rn.f32 %f633, %f632, %f630, %f631;
mov.f32 %f634, 0f3DAAAABD;
fma.rn.f32 %f635, %f633, %f630, %f634;
mul.rn.f32 %f636, %f635, %f630;
mul.rn.f32 %f637, %f636, %f629;
sub.f32 %f638, %f627, %f629;
neg.f32 %f639, %f629;
add.f32 %f640, %f638, %f638;
fma.rn.f32 %f641, %f639, %f627, %f640;
mul.rn.f32 %f642, %f612, %f641;
add.f32 %f643, %f637, %f629;
sub.f32 %f644, %f629, %f643;
add.f32 %f645, %f637, %f644;
add.f32 %f646, %f642, %f645;
add.f32 %f647, %f643, %f646;
sub.f32 %f648, %f643, %f647;
add.f32 %f649, %f646, %f648;
mov.f32 %f650, 0f3F317200;
mul.rn.f32 %f651, %f626, %f650;
mov.f32 %f652, 0f35BFBE8E;
mul.rn.f32 %f653, %f626, %f652;
add.f32 %f654, %f651, %f647;
sub.f32 %f655, %f651, %f654;
add.f32 %f656, %f647, %f655;
add.f32 %f657, %f649, %f656;
add.f32 %f658, %f653, %f657;
add.f32 %f659, %f654, %f658;
sub.f32 %f660, %f654, %f659;
add.f32 %f661, %f658, %f660;
mov.f32 %f662, 0f3EE66666;
mul.rn.f32 %f663, %f662, %f659;
neg.f32 %f664, %f663;
fma.rn.f32 %f665, %f662, %f659, %f664;
fma.rn.f32 %f666, %f662, %f661, %f665;
mov.f32 %f667, 0f00000000;
fma.rn.f32 %f668, %f667, %f659, %f666;
add.rn.f32 %f669, %f663, %f668;
neg.f32 %f670, %f669;
add.rn.f32 %f671, %f663, %f670;
add.rn.f32 %f672, %f671, %f668;
mov.b32 %r276, %f669;
setp.eq.s32 %p90, %r276, 1118925336;
add.s32 %r277, %r276, -1;
mov.b32 %f673, %r277;
add.f32 %f674, %f672, 0f37000000;
selp.f32 %f675, %f673, %f669, %p90;
selp.f32 %f181, %f674, %f672, %p90;
mul.f32 %f676, %f675, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f677, %f676;
mov.f32 %f678, 0fBF317200;
fma.rn.f32 %f679, %f677, %f678, %f675;
mov.f32 %f680, 0fB5BFBE8E;
fma.rn.f32 %f681, %f677, %f680, %f679;
mul.f32 %f682, %f681, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f683, %f682;
add.f32 %f684, %f677, 0f00000000;
ex2.approx.f32 %f685, %f684;
mul.f32 %f686, %f683, %f685;
setp.lt.f32 %p91, %f675, 0fC2D20000;
selp.f32 %f687, 0f00000000, %f686, %p91;
setp.gt.f32 %p92, %f675, 0f42D20000;
selp.f32 %f1025, 0f7F800000, %f687, %p92;
setp.eq.f32 %p93, %f1025, 0f7F800000;
@%p93 bra BB0_94;
fma.rn.f32 %f1025, %f1025, %f181, %f1025;
BB0_94:
setp.lt.f32 %p94, %f176, 0f00000000;
setp.eq.f32 %p95, %f179, 0f3F800000;
and.pred %p4, %p94, %p95;
mov.b32 %r278, %f1025;
xor.b32 %r279, %r278, -2147483648;
mov.b32 %f688, %r279;
selp.f32 %f1027, %f688, %f1025, %p4;
setp.eq.f32 %p96, %f176, 0f00000000;
@%p96 bra BB0_97;
bra.uni BB0_95;
BB0_97:
add.f32 %f691, %f176, %f176;
selp.f32 %f1027, %f691, 0f00000000, %p95;
bra.uni BB0_98;
BB0_95:
setp.geu.f32 %p97, %f176, 0f00000000;
@%p97 bra BB0_98;
cvt.rzi.f32.f32 %f690, %f662;
setp.neu.f32 %p98, %f690, 0f3EE66666;
selp.f32 %f1027, 0f7FFFFFFF, %f1027, %p98;
BB0_98:
add.f32 %f692, %f180, 0f3EE66666;
mov.b32 %r280, %f692;
setp.lt.s32 %p100, %r280, 2139095040;
@%p100 bra BB0_103;
setp.gtu.f32 %p101, %f180, 0f7F800000;
@%p101 bra BB0_102;
bra.uni BB0_100;
BB0_102:
add.f32 %f1027, %f176, 0f3EE66666;
bra.uni BB0_103;
BB0_100:
setp.neu.f32 %p102, %f180, 0f7F800000;
@%p102 bra BB0_103;
selp.f32 %f1027, 0fFF800000, 0f7F800000, %p4;
BB0_103:
setp.eq.f32 %p103, %f176, 0f3F800000;
selp.f32 %f192, 0f3F800000, %f1027, %p103;
abs.f32 %f193, %f177;
setp.lt.f32 %p104, %f193, 0f00800000;
mul.f32 %f695, %f193, 0f4B800000;
selp.f32 %f696, 0fC3170000, 0fC2FE0000, %p104;
selp.f32 %f697, %f695, %f193, %p104;
mov.b32 %r281, %f697;
and.b32 %r282, %r281, 8388607;
or.b32 %r283, %r282, 1065353216;
mov.b32 %f698, %r283;
shr.u32 %r284, %r281, 23;
cvt.rn.f32.u32 %f699, %r284;
add.f32 %f700, %f696, %f699;
setp.gt.f32 %p105, %f698, 0f3FB504F3;
mul.f32 %f701, %f698, 0f3F000000;
add.f32 %f702, %f700, 0f3F800000;
selp.f32 %f703, %f701, %f698, %p105;
selp.f32 %f704, %f702, %f700, %p105;
add.f32 %f705, %f703, 0fBF800000;
add.f32 %f694, %f703, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f693,%f694;
// inline asm
add.f32 %f706, %f705, %f705;
mul.f32 %f707, %f693, %f706;
mul.f32 %f708, %f707, %f707;
fma.rn.f32 %f711, %f632, %f708, %f631;
fma.rn.f32 %f713, %f711, %f708, %f634;
mul.rn.f32 %f714, %f713, %f708;
mul.rn.f32 %f715, %f714, %f707;
sub.f32 %f716, %f705, %f707;
neg.f32 %f717, %f707;
add.f32 %f718, %f716, %f716;
fma.rn.f32 %f719, %f717, %f705, %f718;
mul.rn.f32 %f720, %f693, %f719;
add.f32 %f721, %f715, %f707;
sub.f32 %f722, %f707, %f721;
add.f32 %f723, %f715, %f722;
add.f32 %f724, %f720, %f723;
add.f32 %f725, %f721, %f724;
sub.f32 %f726, %f721, %f725;
add.f32 %f727, %f724, %f726;
mul.rn.f32 %f729, %f704, %f650;
mul.rn.f32 %f731, %f704, %f652;
add.f32 %f732, %f729, %f725;
sub.f32 %f733, %f729, %f732;
add.f32 %f734, %f725, %f733;
add.f32 %f735, %f727, %f734;
add.f32 %f736, %f731, %f735;
add.f32 %f737, %f732, %f736;
sub.f32 %f738, %f732, %f737;
add.f32 %f739, %f736, %f738;
mul.rn.f32 %f741, %f662, %f737;
neg.f32 %f742, %f741;
fma.rn.f32 %f743, %f662, %f737, %f742;
fma.rn.f32 %f744, %f662, %f739, %f743;
fma.rn.f32 %f746, %f667, %f737, %f744;
add.rn.f32 %f747, %f741, %f746;
neg.f32 %f748, %f747;
add.rn.f32 %f749, %f741, %f748;
add.rn.f32 %f750, %f749, %f746;
mov.b32 %r285, %f747;
setp.eq.s32 %p106, %r285, 1118925336;
add.s32 %r286, %r285, -1;
mov.b32 %f751, %r286;
add.f32 %f752, %f750, 0f37000000;
selp.f32 %f753, %f751, %f747, %p106;
selp.f32 %f194, %f752, %f750, %p106;
mul.f32 %f754, %f753, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f755, %f754;
fma.rn.f32 %f757, %f755, %f678, %f753;
fma.rn.f32 %f759, %f755, %f680, %f757;
mul.f32 %f760, %f759, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f761, %f760;
add.f32 %f762, %f755, 0f00000000;
ex2.approx.f32 %f763, %f762;
mul.f32 %f764, %f761, %f763;
setp.lt.f32 %p107, %f753, 0fC2D20000;
selp.f32 %f765, 0f00000000, %f764, %p107;
setp.gt.f32 %p108, %f753, 0f42D20000;
selp.f32 %f1028, 0f7F800000, %f765, %p108;
setp.eq.f32 %p109, %f1028, 0f7F800000;
@%p109 bra BB0_105;
fma.rn.f32 %f1028, %f1028, %f194, %f1028;
BB0_105:
setp.lt.f32 %p110, %f177, 0f00000000;
and.pred %p5, %p110, %p95;
mov.b32 %r287, %f1028;
xor.b32 %r288, %r287, -2147483648;
mov.b32 %f766, %r288;
selp.f32 %f1030, %f766, %f1028, %p5;
setp.eq.f32 %p112, %f177, 0f00000000;
@%p112 bra BB0_108;
bra.uni BB0_106;
BB0_108:
add.f32 %f769, %f177, %f177;
selp.f32 %f1030, %f769, 0f00000000, %p95;
bra.uni BB0_109;
BB0_106:
setp.geu.f32 %p113, %f177, 0f00000000;
@%p113 bra BB0_109;
cvt.rzi.f32.f32 %f768, %f662;
setp.neu.f32 %p114, %f768, 0f3EE66666;
selp.f32 %f1030, 0f7FFFFFFF, %f1030, %p114;
BB0_109:
add.f32 %f770, %f193, 0f3EE66666;
mov.b32 %r289, %f770;
setp.lt.s32 %p116, %r289, 2139095040;
@%p116 bra BB0_114;
setp.gtu.f32 %p117, %f193, 0f7F800000;
@%p117 bra BB0_113;
bra.uni BB0_111;
BB0_113:
add.f32 %f1030, %f177, 0f3EE66666;
bra.uni BB0_114;
BB0_111:
setp.neu.f32 %p118, %f193, 0f7F800000;
@%p118 bra BB0_114;
selp.f32 %f1030, 0fFF800000, 0f7F800000, %p5;
BB0_114:
setp.eq.f32 %p119, %f177, 0f3F800000;
selp.f32 %f205, 0f3F800000, %f1030, %p119;
abs.f32 %f206, %f178;
setp.lt.f32 %p120, %f206, 0f00800000;
mul.f32 %f773, %f206, 0f4B800000;
selp.f32 %f774, 0fC3170000, 0fC2FE0000, %p120;
selp.f32 %f775, %f773, %f206, %p120;
mov.b32 %r290, %f775;
and.b32 %r291, %r290, 8388607;
or.b32 %r292, %r291, 1065353216;
mov.b32 %f776, %r292;
shr.u32 %r293, %r290, 23;
cvt.rn.f32.u32 %f777, %r293;
add.f32 %f778, %f774, %f777;
setp.gt.f32 %p121, %f776, 0f3FB504F3;
mul.f32 %f779, %f776, 0f3F000000;
add.f32 %f780, %f778, 0f3F800000;
selp.f32 %f781, %f779, %f776, %p121;
selp.f32 %f782, %f780, %f778, %p121;
add.f32 %f783, %f781, 0fBF800000;
add.f32 %f772, %f781, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f771,%f772;
// inline asm
add.f32 %f784, %f783, %f783;
mul.f32 %f785, %f771, %f784;
mul.f32 %f786, %f785, %f785;
fma.rn.f32 %f789, %f632, %f786, %f631;
fma.rn.f32 %f791, %f789, %f786, %f634;
mul.rn.f32 %f792, %f791, %f786;
mul.rn.f32 %f793, %f792, %f785;
sub.f32 %f794, %f783, %f785;
neg.f32 %f795, %f785;
add.f32 %f796, %f794, %f794;
fma.rn.f32 %f797, %f795, %f783, %f796;
mul.rn.f32 %f798, %f771, %f797;
add.f32 %f799, %f793, %f785;
sub.f32 %f800, %f785, %f799;
add.f32 %f801, %f793, %f800;
add.f32 %f802, %f798, %f801;
add.f32 %f803, %f799, %f802;
sub.f32 %f804, %f799, %f803;
add.f32 %f805, %f802, %f804;
mul.rn.f32 %f807, %f782, %f650;
mul.rn.f32 %f809, %f782, %f652;
add.f32 %f810, %f807, %f803;
sub.f32 %f811, %f807, %f810;
add.f32 %f812, %f803, %f811;
add.f32 %f813, %f805, %f812;
add.f32 %f814, %f809, %f813;
add.f32 %f815, %f810, %f814;
sub.f32 %f816, %f810, %f815;
add.f32 %f817, %f814, %f816;
mul.rn.f32 %f819, %f662, %f815;
neg.f32 %f820, %f819;
fma.rn.f32 %f821, %f662, %f815, %f820;
fma.rn.f32 %f822, %f662, %f817, %f821;
fma.rn.f32 %f824, %f667, %f815, %f822;
add.rn.f32 %f825, %f819, %f824;
neg.f32 %f826, %f825;
add.rn.f32 %f827, %f819, %f826;
add.rn.f32 %f828, %f827, %f824;
mov.b32 %r294, %f825;
setp.eq.s32 %p122, %r294, 1118925336;
add.s32 %r295, %r294, -1;
mov.b32 %f829, %r295;
add.f32 %f830, %f828, 0f37000000;
selp.f32 %f831, %f829, %f825, %p122;
selp.f32 %f207, %f830, %f828, %p122;
mul.f32 %f832, %f831, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f833, %f832;
fma.rn.f32 %f835, %f833, %f678, %f831;
fma.rn.f32 %f837, %f833, %f680, %f835;
mul.f32 %f838, %f837, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f839, %f838;
add.f32 %f840, %f833, 0f00000000;
ex2.approx.f32 %f841, %f840;
mul.f32 %f842, %f839, %f841;
setp.lt.f32 %p123, %f831, 0fC2D20000;
selp.f32 %f843, 0f00000000, %f842, %p123;
setp.gt.f32 %p124, %f831, 0f42D20000;
selp.f32 %f1031, 0f7F800000, %f843, %p124;
setp.eq.f32 %p125, %f1031, 0f7F800000;
@%p125 bra BB0_116;
fma.rn.f32 %f1031, %f1031, %f207, %f1031;
BB0_116:
setp.lt.f32 %p126, %f178, 0f00000000;
and.pred %p6, %p126, %p95;
mov.b32 %r296, %f1031;
xor.b32 %r297, %r296, -2147483648;
mov.b32 %f844, %r297;
selp.f32 %f1033, %f844, %f1031, %p6;
setp.eq.f32 %p128, %f178, 0f00000000;
@%p128 bra BB0_119;
bra.uni BB0_117;
BB0_119:
add.f32 %f847, %f178, %f178;
selp.f32 %f1033, %f847, 0f00000000, %p95;
bra.uni BB0_120;
BB0_117:
setp.geu.f32 %p129, %f178, 0f00000000;
@%p129 bra BB0_120;
cvt.rzi.f32.f32 %f846, %f662;
setp.neu.f32 %p130, %f846, 0f3EE66666;
selp.f32 %f1033, 0f7FFFFFFF, %f1033, %p130;
BB0_120:
add.f32 %f848, %f206, 0f3EE66666;
mov.b32 %r298, %f848;
setp.lt.s32 %p132, %r298, 2139095040;
@%p132 bra BB0_125;
setp.gtu.f32 %p133, %f206, 0f7F800000;
@%p133 bra BB0_124;
bra.uni BB0_122;
BB0_124:
add.f32 %f1033, %f178, 0f3EE66666;
bra.uni BB0_125;
BB0_122:
setp.neu.f32 %p134, %f206, 0f7F800000;
@%p134 bra BB0_125;
selp.f32 %f1033, 0fFF800000, 0f7F800000, %p6;
BB0_125:
setp.eq.f32 %p135, %f178, 0f3F800000;
selp.f32 %f849, 0f3F800000, %f1033, %p135;
cvt.u64.u32 %rd93, %r6;
cvt.u64.u32 %rd92, %r5;
mov.u64 %rd96, image;
cvta.global.u64 %rd91, %rd96;
// inline asm
call (%rd90), _rt_buffer_get_64, (%rd91, %r103, %r104, %rd92, %rd93, %rd27, %rd27);
// inline asm
cvt.sat.f32.f32 %f850, %f849;
mul.f32 %f851, %f850, 0f437FFD71;
cvt.rzi.u32.f32 %r301, %f851;
cvt.sat.f32.f32 %f852, %f205;
mul.f32 %f853, %f852, 0f437FFD71;
cvt.rzi.u32.f32 %r302, %f853;
cvt.sat.f32.f32 %f854, %f192;
mul.f32 %f855, %f854, 0f437FFD71;
cvt.rzi.u32.f32 %r303, %f855;
cvt.u16.u32 %rs17, %r301;
cvt.u16.u32 %rs18, %r303;
cvt.u16.u32 %rs19, %r302;
mov.u16 %rs20, 255;
st.v4.u8 [%rd90], {%rs17, %rs19, %rs18, %rs20};
ld.global.u32 %r415, [imageEnabled];
BB0_126:
cvt.u64.u32 %rd18, %r5;
cvt.u64.u32 %rd19, %r6;
and.b32 %r304, %r415, 4;
setp.eq.s32 %p136, %r304, 0;
@%p136 bra BB0_130;
ld.global.u32 %r305, [additive];
setp.eq.s32 %p137, %r305, 0;
// inline asm
{ cvt.rn.f16.f32 %rs21, %f407;}
// inline asm
@%p137 bra BB0_129;
mov.u64 %rd109, image_HDR;
cvta.global.u64 %rd98, %rd109;
mov.u32 %r309, 8;
// inline asm
call (%rd97), _rt_buffer_get_64, (%rd98, %r103, %r309, %rd18, %rd19, %rd27, %rd27);
// inline asm
ld.v4.u16 {%rs28, %rs29, %rs30, %rs31}, [%rd97];
// inline asm
{ cvt.f32.f16 %f857, %rs28;}
// inline asm
// inline asm
{ cvt.f32.f16 %f858, %rs29;}
// inline asm
// inline asm
{ cvt.f32.f16 %f859, %rs30;}
// inline asm
// inline asm
call (%rd103), _rt_buffer_get_64, (%rd98, %r103, %r309, %rd18, %rd19, %rd27, %rd27);
// inline asm
add.f32 %f860, %f176, %f857;
add.f32 %f861, %f177, %f858;
add.f32 %f862, %f178, %f859;
// inline asm
{ cvt.rn.f16.f32 %rs27, %f862;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs26, %f861;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs25, %f860;}
// inline asm
st.v4.u16 [%rd103], {%rs25, %rs26, %rs27, %rs21};
bra.uni BB0_130;
BB0_129:
mov.u64 %rd116, image_HDR;
cvta.global.u64 %rd111, %rd116;
mov.u32 %r311, 8;
// inline asm
call (%rd110), _rt_buffer_get_64, (%rd111, %r103, %r311, %rd18, %rd19, %rd27, %rd27);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs34, %f178;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs33, %f177;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs32, %f176;}
// inline asm
st.v4.u16 [%rd110], {%rs32, %rs33, %rs34, %rs21};
BB0_130:
selp.f32 %f867, 0f3F000000, 0f3E800000, %p150;
mul.f32 %f218, %f867, %f1017;
mul.f32 %f219, %f867, %f1018;
mul.f32 %f220, %f867, %f1019;
mul.f32 %f221, %f867, %f1020;
ld.global.f32 %f868, [lightColor];
mul.f32 %f222, %f218, %f868;
ld.global.f32 %f869, [lightColor+4];
mul.f32 %f223, %f218, %f869;
ld.global.f32 %f870, [lightColor+8];
mul.f32 %f224, %f218, %f870;
ld.global.u32 %r312, [additive];
setp.eq.s32 %p138, %r312, 0;
// inline asm
{ cvt.rn.f16.f32 %rs35, %f407;}
// inline asm
@%p138 bra BB0_132;
mov.u64 %rd129, image_RNM0;
cvta.global.u64 %rd118, %rd129;
mov.u32 %r316, 8;
// inline asm
call (%rd117), _rt_buffer_get_64, (%rd118, %r103, %r316, %rd18, %rd19, %rd27, %rd27);
// inline asm
ld.v4.u16 {%rs42, %rs43, %rs44, %rs45}, [%rd117];
// inline asm
{ cvt.f32.f16 %f871, %rs42;}
// inline asm
// inline asm
{ cvt.f32.f16 %f872, %rs43;}
// inline asm
// inline asm
{ cvt.f32.f16 %f873, %rs44;}
// inline asm
// inline asm
call (%rd123), _rt_buffer_get_64, (%rd118, %r103, %r316, %rd18, %rd19, %rd27, %rd27);
// inline asm
add.f32 %f874, %f222, %f871;
add.f32 %f875, %f223, %f872;
add.f32 %f876, %f224, %f873;
// inline asm
{ cvt.rn.f16.f32 %rs41, %f876;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs40, %f875;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs39, %f874;}
// inline asm
st.v4.u16 [%rd123], {%rs39, %rs40, %rs41, %rs35};
bra.uni BB0_133;
BB0_132:
mov.u64 %rd136, image_RNM0;
cvta.global.u64 %rd131, %rd136;
mov.u32 %r318, 8;
// inline asm
call (%rd130), _rt_buffer_get_64, (%rd131, %r103, %r318, %rd18, %rd19, %rd27, %rd27);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs48, %f224;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs47, %f223;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs46, %f222;}
// inline asm
st.v4.u16 [%rd130], {%rs46, %rs47, %rs48, %rs35};
BB0_133:
mov.f32 %f881, 0f34000000;
max.f32 %f882, %f218, %f881;
div.rn.f32 %f883, %f219, %f882;
fma.rn.f32 %f225, %f883, 0f3F000000, 0f3F000000;
div.rn.f32 %f884, %f220, %f882;
fma.rn.f32 %f226, %f884, 0f3F000000, 0f3F000000;
div.rn.f32 %f885, %f221, %f882;
fma.rn.f32 %f227, %f885, 0f3F000000, 0f3F000000;
ld.global.u32 %r319, [additive];
setp.eq.s32 %p139, %r319, 0;
// inline asm
{ cvt.rn.f16.f32 %rs49, %f407;}
// inline asm
@%p139 bra BB0_135;
mov.u64 %rd149, image_RNM1;
cvta.global.u64 %rd138, %rd149;
mov.u32 %r323, 8;
// inline asm
call (%rd137), _rt_buffer_get_64, (%rd138, %r103, %r323, %rd18, %rd19, %rd27, %rd27);
// inline asm
ld.v4.u16 {%rs56, %rs57, %rs58, %rs59}, [%rd137];
// inline asm
{ cvt.f32.f16 %f886, %rs56;}
// inline asm
// inline asm
{ cvt.f32.f16 %f887, %rs57;}
// inline asm
// inline asm
{ cvt.f32.f16 %f888, %rs58;}
// inline asm
// inline asm
call (%rd143), _rt_buffer_get_64, (%rd138, %r103, %r323, %rd18, %rd19, %rd27, %rd27);
// inline asm
add.f32 %f889, %f225, %f886;
add.f32 %f890, %f225, %f887;
add.f32 %f891, %f225, %f888;
// inline asm
{ cvt.rn.f16.f32 %rs55, %f891;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs54, %f890;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs53, %f889;}
// inline asm
st.v4.u16 [%rd143], {%rs53, %rs54, %rs55, %rs49};
bra.uni BB0_136;
BB0_135:
mov.u64 %rd156, image_RNM1;
cvta.global.u64 %rd151, %rd156;
mov.u32 %r325, 8;
// inline asm
call (%rd150), _rt_buffer_get_64, (%rd151, %r103, %r325, %rd18, %rd19, %rd27, %rd27);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs60, %f225;}
// inline asm
st.v4.u16 [%rd150], {%rs60, %rs60, %rs60, %rs49};
BB0_136:
ld.global.u32 %r326, [additive];
setp.eq.s32 %p140, %r326, 0;
// inline asm
{ cvt.rn.f16.f32 %rs61, %f407;}
// inline asm
@%p140 bra BB0_138;
mov.u64 %rd169, image_RNM2;
cvta.global.u64 %rd158, %rd169;
mov.u32 %r330, 8;
// inline asm
call (%rd157), _rt_buffer_get_64, (%rd158, %r103, %r330, %rd18, %rd19, %rd27, %rd27);
// inline asm
ld.v4.u16 {%rs68, %rs69, %rs70, %rs71}, [%rd157];
// inline asm
{ cvt.f32.f16 %f894, %rs68;}
// inline asm
// inline asm
{ cvt.f32.f16 %f895, %rs69;}
// inline asm
// inline asm
{ cvt.f32.f16 %f896, %rs70;}
// inline asm
// inline asm
call (%rd163), _rt_buffer_get_64, (%rd158, %r103, %r330, %rd18, %rd19, %rd27, %rd27);
// inline asm
add.f32 %f897, %f226, %f894;
add.f32 %f898, %f226, %f895;
add.f32 %f899, %f226, %f896;
// inline asm
{ cvt.rn.f16.f32 %rs67, %f899;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs66, %f898;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs65, %f897;}
// inline asm
st.v4.u16 [%rd163], {%rs65, %rs66, %rs67, %rs61};
bra.uni BB0_139;
BB0_138:
mov.u64 %rd176, image_RNM2;
cvta.global.u64 %rd171, %rd176;
mov.u32 %r332, 8;
// inline asm
call (%rd170), _rt_buffer_get_64, (%rd171, %r103, %r332, %rd18, %rd19, %rd27, %rd27);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs72, %f226;}
// inline asm
st.v4.u16 [%rd170], {%rs72, %rs72, %rs72, %rs61};
BB0_139:
ld.global.u32 %r333, [additive];
setp.eq.s32 %p141, %r333, 0;
// inline asm
{ cvt.rn.f16.f32 %rs73, %f407;}
// inline asm
@%p141 bra BB0_141;
mov.u64 %rd189, image_RNM3;
cvta.global.u64 %rd178, %rd189;
mov.u32 %r337, 8;
// inline asm
call (%rd177), _rt_buffer_get_64, (%rd178, %r103, %r337, %rd18, %rd19, %rd27, %rd27);
// inline asm
ld.v4.u16 {%rs80, %rs81, %rs82, %rs83}, [%rd177];
// inline asm
{ cvt.f32.f16 %f902, %rs80;}
// inline asm
// inline asm
{ cvt.f32.f16 %f903, %rs81;}
// inline asm
// inline asm
{ cvt.f32.f16 %f904, %rs82;}
// inline asm
// inline asm
call (%rd183), _rt_buffer_get_64, (%rd178, %r103, %r337, %rd18, %rd19, %rd27, %rd27);
// inline asm
add.f32 %f905, %f227, %f902;
add.f32 %f906, %f227, %f903;
add.f32 %f907, %f227, %f904;
// inline asm
{ cvt.rn.f16.f32 %rs79, %f907;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs78, %f906;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs77, %f905;}
// inline asm
st.v4.u16 [%rd183], {%rs77, %rs78, %rs79, %rs73};
bra.uni BB0_162;
BB0_141:
mov.u64 %rd196, image_RNM3;
cvta.global.u64 %rd191, %rd196;
mov.u32 %r339, 8;
// inline asm
call (%rd190), _rt_buffer_get_64, (%rd191, %r103, %r339, %rd18, %rd19, %rd27, %rd27);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs84, %f227;}
// inline asm
st.v4.u16 [%rd190], {%rs84, %rs84, %rs84, %rs73};
BB0_162:
ret;
}