ArabDesert/Assets/Editor/x64/Bakery/lmTexGI.ptx

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2024-05-25 09:10:35 +03:00
//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//
.version 6.1
.target sm_30
.address_size 64
// .globl _Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .texref albedoTex;
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry _Z6oxMainv(
)
{
.local .align 4 .b8 __local_depot0[40];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<94>;
.reg .b16 %rs<33>;
.reg .f32 %f<595>;
.reg .b32 %r<310>;
.reg .b64 %rd<106>;
mov.u64 %rd105, __local_depot0;
cvta.local.u64 %SP, %rd105;
ld.global.u32 %r1, [samples];
ld.global.v2.u32 {%r96, %r97}, [pixelID];
cvt.u64.u32 %rd17, %r96;
cvt.u64.u32 %rd18, %r97;
mov.u64 %rd21, uvnormal;
cvta.global.u64 %rd16, %rd21;
mov.u32 %r94, 2;
mov.u32 %r95, 4;
mov.u64 %rd20, 0;
// inline asm
call (%rd15), _rt_buffer_get_64, (%rd16, %r94, %r95, %rd17, %rd18, %rd20, %rd20);
// inline asm
ld.u32 %r2, [%rd15];
shr.u32 %r100, %r2, 16;
cvt.u16.u32 %rs1, %r100;
and.b16 %rs2, %rs1, 255;
cvt.u16.u32 %rs3, %r2;
or.b16 %rs4, %rs3, %rs2;
setp.eq.s16 %p4, %rs4, 0;
mov.f32 %f562, 0f00000000;
mov.f32 %f563, %f562;
mov.f32 %f564, %f562;
@%p4 bra BB0_2;
ld.u8 %rs5, [%rd15+1];
and.b16 %rs7, %rs3, 255;
cvt.rn.f32.u16 %f122, %rs7;
div.rn.f32 %f123, %f122, 0f437F0000;
fma.rn.f32 %f124, %f123, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f125, %rs5;
div.rn.f32 %f126, %f125, 0f437F0000;
fma.rn.f32 %f127, %f126, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f128, %rs2;
div.rn.f32 %f129, %f128, 0f437F0000;
fma.rn.f32 %f130, %f129, 0f40000000, 0fBF800000;
mul.f32 %f131, %f127, %f127;
fma.rn.f32 %f132, %f124, %f124, %f131;
fma.rn.f32 %f133, %f130, %f130, %f132;
sqrt.rn.f32 %f134, %f133;
rcp.rn.f32 %f135, %f134;
mul.f32 %f562, %f124, %f135;
mul.f32 %f563, %f127, %f135;
mul.f32 %f564, %f130, %f135;
BB0_2:
ld.global.v2.u32 {%r101, %r102}, [pixelID];
ld.global.v2.u32 {%r104, %r105}, [tileInfo];
add.s32 %r3, %r101, %r104;
add.s32 %r4, %r102, %r105;
setp.eq.f32 %p5, %f563, 0f00000000;
setp.eq.f32 %p6, %f562, 0f00000000;
and.pred %p7, %p6, %p5;
setp.eq.f32 %p8, %f564, 0f00000000;
and.pred %p9, %p7, %p8;
@%p9 bra BB0_93;
bra.uni BB0_3;
BB0_93:
ld.global.u32 %r309, [imageEnabled];
and.b32 %r267, %r309, 1;
setp.eq.b32 %p91, %r267, 1;
@!%p91 bra BB0_95;
bra.uni BB0_94;
BB0_94:
cvt.u64.u32 %rd79, %r3;
cvt.u64.u32 %rd80, %r4;
mov.u64 %rd83, image;
cvta.global.u64 %rd78, %rd83;
// inline asm
call (%rd77), _rt_buffer_get_64, (%rd78, %r94, %r95, %rd79, %rd80, %rd20, %rd20);
// inline asm
mov.u16 %rs28, 0;
st.v4.u8 [%rd77], {%rs28, %rs28, %rs28, %rs28};
ld.global.u32 %r309, [imageEnabled];
BB0_95:
and.b32 %r270, %r309, 4;
setp.eq.s32 %p92, %r270, 0;
@%p92 bra BB0_97;
cvt.u64.u32 %rd86, %r3;
cvt.u64.u32 %rd87, %r4;
mov.u64 %rd90, image_HDR;
cvta.global.u64 %rd85, %rd90;
mov.u32 %r272, 8;
// inline asm
call (%rd84), _rt_buffer_get_64, (%rd85, %r94, %r272, %rd86, %rd87, %rd20, %rd20);
// inline asm
mov.f32 %f530, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs29, %f530;}
// inline asm
mov.u16 %rs30, 0;
st.v4.u16 [%rd84], {%rs29, %rs29, %rs29, %rs30};
ld.global.u32 %r309, [imageEnabled];
BB0_97:
and.b32 %r273, %r309, 16;
setp.eq.s32 %p93, %r273, 0;
@%p93 bra BB0_99;
cvt.u64.u32 %rd93, %r3;
cvt.u64.u32 %rd94, %r4;
mov.u64 %rd97, image_HDR2;
cvta.global.u64 %rd92, %rd97;
mov.u32 %r275, 8;
// inline asm
call (%rd91), _rt_buffer_get_64, (%rd92, %r94, %r275, %rd93, %rd94, %rd20, %rd20);
// inline asm
mov.f32 %f531, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs31, %f531;}
// inline asm
mov.u16 %rs32, 0;
st.v4.u16 [%rd91], {%rs31, %rs31, %rs31, %rs32};
bra.uni BB0_99;
BB0_3:
ld.global.v2.u32 {%r115, %r116}, [pixelID];
cvt.u64.u32 %rd24, %r115;
cvt.u64.u32 %rd25, %r116;
mov.u64 %rd40, lightmapDirect;
cvta.global.u64 %rd23, %rd40;
mov.u32 %r110, 8;
// inline asm
call (%rd22), _rt_buffer_get_64, (%rd23, %r94, %r110, %rd24, %rd25, %rd20, %rd20);
// inline asm
ld.v4.u16 {%rs12, %rs13, %rs14, %rs15}, [%rd22];
// inline asm
{ cvt.f32.f16 %f136, %rs12;}
// inline asm
// inline asm
{ cvt.f32.f16 %f137, %rs13;}
// inline asm
// inline asm
{ cvt.f32.f16 %f138, %rs14;}
// inline asm
ld.global.v2.u32 {%r119, %r120}, [pixelID];
cvt.u64.u32 %rd30, %r119;
cvt.u64.u32 %rd31, %r120;
mov.u64 %rd41, uvpos;
cvta.global.u64 %rd29, %rd41;
mov.u32 %r112, 12;
// inline asm
call (%rd28), _rt_buffer_get_64, (%rd29, %r94, %r112, %rd30, %rd31, %rd20, %rd20);
// inline asm
ld.f32 %f142, [%rd28+8];
ld.f32 %f143, [%rd28+4];
ld.f32 %f144, [%rd28];
mul.f32 %f145, %f144, 0f3456BF95;
mul.f32 %f146, %f143, 0f3456BF95;
mul.f32 %f147, %f142, 0f3456BF95;
abs.f32 %f148, %f562;
div.rn.f32 %f149, %f145, %f148;
abs.f32 %f150, %f563;
div.rn.f32 %f151, %f146, %f150;
abs.f32 %f152, %f564;
div.rn.f32 %f153, %f147, %f152;
abs.f32 %f154, %f149;
abs.f32 %f155, %f151;
abs.f32 %f156, %f153;
mov.f32 %f157, 0f38D1B717;
max.f32 %f158, %f154, %f157;
max.f32 %f159, %f155, %f157;
max.f32 %f160, %f156, %f157;
fma.rn.f32 %f10, %f562, %f158, %f144;
fma.rn.f32 %f11, %f563, %f159, %f143;
fma.rn.f32 %f12, %f564, %f160, %f142;
setp.gt.f32 %p10, %f148, %f152;
neg.f32 %f161, %f563;
selp.f32 %f162, %f161, 0f00000000, %p10;
neg.f32 %f163, %f564;
selp.f32 %f164, %f562, %f163, %p10;
selp.f32 %f165, 0f00000000, %f563, %p10;
mul.f32 %f166, %f164, %f164;
fma.rn.f32 %f167, %f162, %f162, %f166;
fma.rn.f32 %f168, %f165, %f165, %f167;
sqrt.rn.f32 %f169, %f168;
rcp.rn.f32 %f170, %f169;
mul.f32 %f13, %f162, %f170;
mul.f32 %f14, %f164, %f170;
mul.f32 %f15, %f165, %f170;
ld.global.v2.u32 {%r123, %r124}, [pixelID];
cvt.u64.u32 %rd36, %r123;
cvt.u64.u32 %rd37, %r124;
mov.u64 %rd42, rnd_seeds;
cvta.global.u64 %rd35, %rd42;
// inline asm
call (%rd34), _rt_buffer_get_64, (%rd35, %r94, %r95, %rd36, %rd37, %rd20, %rd20);
// inline asm
mov.f32 %f568, 0f00000000;
setp.lt.s32 %p11, %r1, 1;
mov.f32 %f569, %f568;
mov.f32 %f570, %f568;
@%p11 bra BB0_54;
cvt.rn.f32.s32 %f174, %r1;
rcp.rn.f32 %f16, %f174;
ld.u32 %r285, [%rd34];
mul.f32 %f17, %f10, 0f3456BF95;
mul.f32 %f18, %f11, 0f3456BF95;
mul.f32 %f19, %f12, 0f3456BF95;
mul.f32 %f175, %f562, %f14;
mul.f32 %f176, %f563, %f13;
sub.f32 %f20, %f176, %f175;
mul.f32 %f177, %f564, %f13;
mul.f32 %f178, %f562, %f15;
sub.f32 %f21, %f178, %f177;
mul.f32 %f179, %f563, %f15;
mul.f32 %f180, %f564, %f14;
sub.f32 %f22, %f180, %f179;
mov.f32 %f568, 0f00000000;
mov.u32 %r127, 0;
abs.f32 %f181, %f18;
abs.f32 %f182, %f17;
max.f32 %f183, %f182, %f181;
abs.f32 %f184, %f19;
max.f32 %f185, %f183, %f184;
mov.u32 %r282, %r127;
mov.f32 %f569, %f568;
mov.f32 %f570, %f568;
BB0_5:
cvt.rn.f32.s32 %f26, %r282;
max.f32 %f27, %f185, %f157;
mov.u32 %r284, %r127;
BB0_6:
mad.lo.s32 %r129, %r285, 1664525, 1013904223;
and.b32 %r130, %r129, 16777215;
cvt.rn.f32.u32 %f187, %r130;
fma.rn.f32 %f188, %f187, 0f33800000, %f26;
mul.f32 %f189, %f16, %f188;
mad.lo.s32 %r285, %r129, 1664525, 1013904223;
and.b32 %r131, %r285, 16777215;
cvt.rn.f32.u32 %f190, %r131;
cvt.rn.f32.s32 %f191, %r284;
fma.rn.f32 %f192, %f190, 0f33800000, %f191;
mul.f32 %f193, %f16, %f192;
sqrt.rn.f32 %f31, %f189;
mul.f32 %f577, %f193, 0f40C90FDB;
abs.f32 %f33, %f577;
setp.neu.f32 %p12, %f33, 0f7F800000;
mov.f32 %f571, %f577;
@%p12 bra BB0_8;
mov.f32 %f194, 0f00000000;
mul.rn.f32 %f571, %f577, %f194;
BB0_8:
mul.f32 %f195, %f571, 0f3F22F983;
cvt.rni.s32.f32 %r295, %f195;
cvt.rn.f32.s32 %f196, %r295;
neg.f32 %f197, %f196;
mov.f32 %f198, 0f3FC90FDA;
fma.rn.f32 %f199, %f197, %f198, %f571;
mov.f32 %f200, 0f33A22168;
fma.rn.f32 %f201, %f197, %f200, %f199;
mov.f32 %f202, 0f27C234C5;
fma.rn.f32 %f572, %f197, %f202, %f201;
abs.f32 %f203, %f571;
setp.leu.f32 %p13, %f203, 0f47CE4780;
@%p13 bra BB0_19;
mov.b32 %r12, %f571;
shr.u32 %r13, %r12, 23;
shl.b32 %r134, %r12, 8;
or.b32 %r14, %r134, -2147483648;
add.u64 %rd44, %SP, 12;
cvta.to.local.u64 %rd102, %rd44;
mov.u32 %r287, 0;
mov.u64 %rd101, __cudart_i2opi_f;
mov.u32 %r286, -6;
BB0_10:
.pragma "nounroll";
ld.const.u32 %r137, [%rd101];
// inline asm
{
mad.lo.cc.u32 %r135, %r137, %r14, %r287;
madc.hi.u32 %r287, %r137, %r14, 0;
}
// inline asm
st.local.u32 [%rd102], %r135;
add.s64 %rd102, %rd102, 4;
add.s64 %rd101, %rd101, 4;
add.s32 %r286, %r286, 1;
setp.ne.s32 %p14, %r286, 0;
@%p14 bra BB0_10;
and.b32 %r140, %r13, 255;
add.s32 %r141, %r140, -128;
shr.u32 %r142, %r141, 5;
and.b32 %r19, %r12, -2147483648;
cvta.to.local.u64 %rd46, %rd44;
st.local.u32 [%rd46+24], %r287;
mov.u32 %r143, 6;
sub.s32 %r144, %r143, %r142;
mul.wide.s32 %rd47, %r144, 4;
add.s64 %rd8, %rd46, %rd47;
ld.local.u32 %r288, [%rd8];
ld.local.u32 %r289, [%rd8+-4];
and.b32 %r22, %r13, 31;
setp.eq.s32 %p15, %r22, 0;
@%p15 bra BB0_13;
mov.u32 %r145, 32;
sub.s32 %r146, %r145, %r22;
shr.u32 %r147, %r289, %r146;
shl.b32 %r148, %r288, %r22;
add.s32 %r288, %r147, %r148;
ld.local.u32 %r149, [%rd8+-8];
shr.u32 %r150, %r149, %r146;
shl.b32 %r151, %r289, %r22;
add.s32 %r289, %r150, %r151;
BB0_13:
shr.u32 %r152, %r289, 30;
shl.b32 %r153, %r288, 2;
add.s32 %r290, %r152, %r153;
shl.b32 %r28, %r289, 2;
shr.u32 %r154, %r290, 31;
shr.u32 %r155, %r288, 30;
add.s32 %r29, %r154, %r155;
setp.eq.s32 %p16, %r154, 0;
@%p16 bra BB0_14;
bra.uni BB0_15;
BB0_14:
mov.u32 %r291, %r19;
mov.u32 %r292, %r28;
bra.uni BB0_16;
BB0_15:
not.b32 %r156, %r290;
neg.s32 %r292, %r28;
setp.eq.s32 %p17, %r28, 0;
selp.u32 %r157, 1, 0, %p17;
add.s32 %r290, %r157, %r156;
xor.b32 %r291, %r19, -2147483648;
BB0_16:
clz.b32 %r294, %r290;
setp.eq.s32 %p18, %r294, 0;
shl.b32 %r158, %r290, %r294;
mov.u32 %r159, 32;
sub.s32 %r160, %r159, %r294;
shr.u32 %r161, %r292, %r160;
add.s32 %r162, %r161, %r158;
selp.b32 %r37, %r290, %r162, %p18;
mov.u32 %r163, -921707870;
mul.hi.u32 %r293, %r37, %r163;
setp.eq.s32 %p19, %r19, 0;
neg.s32 %r164, %r29;
selp.b32 %r295, %r29, %r164, %p19;
setp.lt.s32 %p20, %r293, 1;
@%p20 bra BB0_18;
mul.lo.s32 %r165, %r37, -921707870;
shr.u32 %r166, %r165, 31;
shl.b32 %r167, %r293, 1;
add.s32 %r293, %r166, %r167;
add.s32 %r294, %r294, 1;
BB0_18:
mov.u32 %r168, 126;
sub.s32 %r169, %r168, %r294;
shl.b32 %r170, %r169, 23;
add.s32 %r171, %r293, 1;
shr.u32 %r172, %r171, 7;
add.s32 %r173, %r172, 1;
shr.u32 %r174, %r173, 1;
add.s32 %r175, %r174, %r170;
or.b32 %r176, %r175, %r291;
mov.b32 %f572, %r176;
BB0_19:
mul.rn.f32 %f39, %f572, %f572;
add.s32 %r45, %r295, 1;
and.b32 %r46, %r45, 1;
setp.eq.s32 %p21, %r46, 0;
@%p21 bra BB0_21;
bra.uni BB0_20;
BB0_21:
mov.f32 %f206, 0f3C08839E;
mov.f32 %f207, 0fB94CA1F9;
fma.rn.f32 %f573, %f207, %f39, %f206;
bra.uni BB0_22;
BB0_20:
mov.f32 %f204, 0fBAB6061A;
mov.f32 %f205, 0f37CCF5CE;
fma.rn.f32 %f573, %f205, %f39, %f204;
BB0_22:
@%p21 bra BB0_24;
bra.uni BB0_23;
BB0_24:
mov.f32 %f211, 0fBE2AAAA3;
fma.rn.f32 %f212, %f573, %f39, %f211;
mov.f32 %f213, 0f00000000;
fma.rn.f32 %f574, %f212, %f39, %f213;
bra.uni BB0_25;
BB0_23:
mov.f32 %f208, 0f3D2AAAA5;
fma.rn.f32 %f209, %f573, %f39, %f208;
mov.f32 %f210, 0fBF000000;
fma.rn.f32 %f574, %f209, %f39, %f210;
BB0_25:
fma.rn.f32 %f575, %f574, %f572, %f572;
@%p21 bra BB0_27;
mov.f32 %f214, 0f3F800000;
fma.rn.f32 %f575, %f574, %f39, %f214;
BB0_27:
and.b32 %r177, %r45, 2;
setp.eq.s32 %p24, %r177, 0;
@%p24 bra BB0_29;
mov.f32 %f215, 0f00000000;
mov.f32 %f216, 0fBF800000;
fma.rn.f32 %f575, %f575, %f216, %f215;
BB0_29:
@%p12 bra BB0_31;
mov.f32 %f217, 0f00000000;
mul.rn.f32 %f577, %f577, %f217;
BB0_31:
mul.f32 %f218, %f577, 0f3F22F983;
cvt.rni.s32.f32 %r305, %f218;
cvt.rn.f32.s32 %f219, %r305;
neg.f32 %f220, %f219;
fma.rn.f32 %f222, %f220, %f198, %f577;
fma.rn.f32 %f224, %f220, %f200, %f222;
fma.rn.f32 %f578, %f220, %f202, %f224;
abs.f32 %f226, %f577;
setp.leu.f32 %p26, %f226, 0f47CE4780;
@%p26 bra BB0_42;
mov.b32 %r48, %f577;
shr.u32 %r49, %r48, 23;
shl.b32 %r180, %r48, 8;
or.b32 %r50, %r180, -2147483648;
add.u64 %rd49, %SP, 12;
cvta.to.local.u64 %rd104, %rd49;
mov.u32 %r297, 0;
mov.u64 %rd103, __cudart_i2opi_f;
mov.u32 %r296, -6;
BB0_33:
.pragma "nounroll";
ld.const.u32 %r183, [%rd103];
// inline asm
{
mad.lo.cc.u32 %r181, %r183, %r50, %r297;
madc.hi.u32 %r297, %r183, %r50, 0;
}
// inline asm
st.local.u32 [%rd104], %r181;
add.s64 %rd104, %rd104, 4;
add.s64 %rd103, %rd103, 4;
add.s32 %r296, %r296, 1;
setp.ne.s32 %p27, %r296, 0;
@%p27 bra BB0_33;
and.b32 %r186, %r49, 255;
add.s32 %r187, %r186, -128;
shr.u32 %r188, %r187, 5;
and.b32 %r55, %r48, -2147483648;
cvta.to.local.u64 %rd51, %rd49;
st.local.u32 [%rd51+24], %r297;
mov.u32 %r189, 6;
sub.s32 %r190, %r189, %r188;
mul.wide.s32 %rd52, %r190, 4;
add.s64 %rd14, %rd51, %rd52;
ld.local.u32 %r298, [%rd14];
ld.local.u32 %r299, [%rd14+-4];
and.b32 %r58, %r49, 31;
setp.eq.s32 %p28, %r58, 0;
@%p28 bra BB0_36;
mov.u32 %r191, 32;
sub.s32 %r192, %r191, %r58;
shr.u32 %r193, %r299, %r192;
shl.b32 %r194, %r298, %r58;
add.s32 %r298, %r193, %r194;
ld.local.u32 %r195, [%rd14+-8];
shr.u32 %r196, %r195, %r192;
shl.b32 %r197, %r299, %r58;
add.s32 %r299, %r196, %r197;
BB0_36:
shr.u32 %r198, %r299, 30;
shl.b32 %r199, %r298, 2;
add.s32 %r300, %r198, %r199;
shl.b32 %r64, %r299, 2;
shr.u32 %r200, %r300, 31;
shr.u32 %r201, %r298, 30;
add.s32 %r65, %r200, %r201;
setp.eq.s32 %p29, %r200, 0;
@%p29 bra BB0_37;
bra.uni BB0_38;
BB0_37:
mov.u32 %r301, %r55;
mov.u32 %r302, %r64;
bra.uni BB0_39;
BB0_38:
not.b32 %r202, %r300;
neg.s32 %r302, %r64;
setp.eq.s32 %p30, %r64, 0;
selp.u32 %r203, 1, 0, %p30;
add.s32 %r300, %r203, %r202;
xor.b32 %r301, %r55, -2147483648;
BB0_39:
clz.b32 %r304, %r300;
setp.eq.s32 %p31, %r304, 0;
shl.b32 %r204, %r300, %r304;
mov.u32 %r205, 32;
sub.s32 %r206, %r205, %r304;
shr.u32 %r207, %r302, %r206;
add.s32 %r208, %r207, %r204;
selp.b32 %r73, %r300, %r208, %p31;
mov.u32 %r209, -921707870;
mul.hi.u32 %r303, %r73, %r209;
setp.eq.s32 %p32, %r55, 0;
neg.s32 %r210, %r65;
selp.b32 %r305, %r65, %r210, %p32;
setp.lt.s32 %p33, %r303, 1;
@%p33 bra BB0_41;
mul.lo.s32 %r211, %r73, -921707870;
shr.u32 %r212, %r211, 31;
shl.b32 %r213, %r303, 1;
add.s32 %r303, %r212, %r213;
add.s32 %r304, %r304, 1;
BB0_41:
mov.u32 %r214, 126;
sub.s32 %r215, %r214, %r304;
shl.b32 %r216, %r215, 23;
add.s32 %r217, %r303, 1;
shr.u32 %r218, %r217, 7;
add.s32 %r219, %r218, 1;
shr.u32 %r220, %r219, 1;
add.s32 %r221, %r220, %r216;
or.b32 %r222, %r221, %r301;
mov.b32 %f578, %r222;
BB0_42:
mul.rn.f32 %f56, %f578, %f578;
and.b32 %r81, %r305, 1;
setp.eq.s32 %p34, %r81, 0;
@%p34 bra BB0_44;
bra.uni BB0_43;
BB0_44:
mov.f32 %f229, 0f3C08839E;
mov.f32 %f230, 0fB94CA1F9;
fma.rn.f32 %f579, %f230, %f56, %f229;
bra.uni BB0_45;
BB0_43:
mov.f32 %f227, 0fBAB6061A;
mov.f32 %f228, 0f37CCF5CE;
fma.rn.f32 %f579, %f228, %f56, %f227;
BB0_45:
@%p34 bra BB0_47;
bra.uni BB0_46;
BB0_47:
mov.f32 %f234, 0fBE2AAAA3;
fma.rn.f32 %f235, %f579, %f56, %f234;
mov.f32 %f236, 0f00000000;
fma.rn.f32 %f580, %f235, %f56, %f236;
bra.uni BB0_48;
BB0_46:
mov.f32 %f231, 0f3D2AAAA5;
fma.rn.f32 %f232, %f579, %f56, %f231;
mov.f32 %f233, 0fBF000000;
fma.rn.f32 %f580, %f232, %f56, %f233;
BB0_48:
fma.rn.f32 %f581, %f580, %f578, %f578;
@%p34 bra BB0_50;
mov.f32 %f237, 0f3F800000;
fma.rn.f32 %f581, %f580, %f56, %f237;
BB0_50:
and.b32 %r223, %r305, 2;
setp.eq.s32 %p37, %r223, 0;
@%p37 bra BB0_52;
mov.f32 %f238, 0f00000000;
mov.f32 %f239, 0fBF800000;
fma.rn.f32 %f581, %f581, %f239, %f238;
BB0_52:
mul.f32 %f248, %f31, %f575;
add.u64 %rd53, %SP, 0;
cvta.to.local.u64 %rd54, %rd53;
mul.f32 %f249, %f248, %f248;
mov.f32 %f250, 0f3F800000;
sub.f32 %f251, %f250, %f249;
mul.f32 %f252, %f31, %f581;
mul.f32 %f253, %f252, %f252;
sub.f32 %f254, %f251, %f253;
mov.f32 %f255, 0f00000000;
max.f32 %f256, %f255, %f254;
sqrt.rn.f32 %f257, %f256;
mul.f32 %f258, %f13, %f252;
mul.f32 %f259, %f14, %f252;
mul.f32 %f260, %f15, %f252;
fma.rn.f32 %f261, %f22, %f248, %f258;
fma.rn.f32 %f262, %f21, %f248, %f259;
fma.rn.f32 %f263, %f20, %f248, %f260;
fma.rn.f32 %f243, %f562, %f257, %f261;
fma.rn.f32 %f244, %f563, %f257, %f262;
fma.rn.f32 %f245, %f564, %f257, %f263;
mov.u32 %r225, 0;
st.local.u32 [%rd54+8], %r225;
st.local.u32 [%rd54+4], %r225;
st.local.u32 [%rd54], %r225;
ld.global.u32 %r224, [root];
mov.f32 %f247, 0f6C4ECB8F;
// inline asm
call _rt_trace_64, (%r224, %f10, %f11, %f12, %f243, %f244, %f245, %r225, %f27, %f247, %rd53, %r112);
// inline asm
ld.local.f32 %f264, [%rd54];
add.f32 %f570, %f570, %f264;
ld.local.f32 %f265, [%rd54+4];
add.f32 %f569, %f569, %f265;
ld.local.f32 %f266, [%rd54+8];
add.f32 %f568, %f568, %f266;
add.s32 %r284, %r284, 1;
setp.lt.s32 %p38, %r284, %r1;
@%p38 bra BB0_6;
add.s32 %r282, %r282, 1;
setp.lt.s32 %p39, %r282, %r1;
@%p39 bra BB0_5;
BB0_54:
cvt.rn.f32.u32 %f267, %r4;
cvt.rn.f32.u32 %f268, %r3;
tex.2d.v4.f32.f32 {%f269, %f270, %f271, %f272}, [albedoTex, {%f268, %f267}];
mul.lo.s32 %r227, %r1, %r1;
cvt.rn.f32.s32 %f273, %r227;
rcp.rn.f32 %f274, %f273;
mul.f32 %f275, %f570, %f274;
mul.f32 %f276, %f569, %f274;
mul.f32 %f277, %f568, %f274;
mul.f32 %f74, %f275, %f269;
mul.f32 %f75, %f276, %f270;
mul.f32 %f76, %f277, %f271;
add.f32 %f77, %f136, %f74;
add.f32 %f78, %f137, %f75;
add.f32 %f79, %f138, %f76;
ld.global.u32 %r307, [imageEnabled];
and.b32 %r228, %r307, 1;
setp.eq.b32 %p40, %r228, 1;
@!%p40 bra BB0_89;
bra.uni BB0_55;
BB0_55:
mov.f32 %f280, 0f3E666666;
cvt.rzi.f32.f32 %f281, %f280;
fma.rn.f32 %f282, %f281, 0fC0000000, 0f3EE66666;
abs.f32 %f80, %f282;
abs.f32 %f81, %f77;
setp.lt.f32 %p41, %f81, 0f00800000;
mul.f32 %f283, %f81, 0f4B800000;
selp.f32 %f284, 0fC3170000, 0fC2FE0000, %p41;
selp.f32 %f285, %f283, %f81, %p41;
mov.b32 %r229, %f285;
and.b32 %r230, %r229, 8388607;
or.b32 %r231, %r230, 1065353216;
mov.b32 %f286, %r231;
shr.u32 %r232, %r229, 23;
cvt.rn.f32.u32 %f287, %r232;
add.f32 %f288, %f284, %f287;
setp.gt.f32 %p42, %f286, 0f3FB504F3;
mul.f32 %f289, %f286, 0f3F000000;
add.f32 %f290, %f288, 0f3F800000;
selp.f32 %f291, %f289, %f286, %p42;
selp.f32 %f292, %f290, %f288, %p42;
add.f32 %f293, %f291, 0fBF800000;
add.f32 %f279, %f291, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f278,%f279;
// inline asm
add.f32 %f294, %f293, %f293;
mul.f32 %f295, %f278, %f294;
mul.f32 %f296, %f295, %f295;
mov.f32 %f297, 0f3C4CAF63;
mov.f32 %f298, 0f3B18F0FE;
fma.rn.f32 %f299, %f298, %f296, %f297;
mov.f32 %f300, 0f3DAAAABD;
fma.rn.f32 %f301, %f299, %f296, %f300;
mul.rn.f32 %f302, %f301, %f296;
mul.rn.f32 %f303, %f302, %f295;
sub.f32 %f304, %f293, %f295;
neg.f32 %f305, %f295;
add.f32 %f306, %f304, %f304;
fma.rn.f32 %f307, %f305, %f293, %f306;
mul.rn.f32 %f308, %f278, %f307;
add.f32 %f309, %f303, %f295;
sub.f32 %f310, %f295, %f309;
add.f32 %f311, %f303, %f310;
add.f32 %f312, %f308, %f311;
add.f32 %f313, %f309, %f312;
sub.f32 %f314, %f309, %f313;
add.f32 %f315, %f312, %f314;
mov.f32 %f316, 0f3F317200;
mul.rn.f32 %f317, %f292, %f316;
mov.f32 %f318, 0f35BFBE8E;
mul.rn.f32 %f319, %f292, %f318;
add.f32 %f320, %f317, %f313;
sub.f32 %f321, %f317, %f320;
add.f32 %f322, %f313, %f321;
add.f32 %f323, %f315, %f322;
add.f32 %f324, %f319, %f323;
add.f32 %f325, %f320, %f324;
sub.f32 %f326, %f320, %f325;
add.f32 %f327, %f324, %f326;
mov.f32 %f328, 0f3EE66666;
mul.rn.f32 %f329, %f328, %f325;
neg.f32 %f330, %f329;
fma.rn.f32 %f331, %f328, %f325, %f330;
fma.rn.f32 %f332, %f328, %f327, %f331;
mov.f32 %f333, 0f00000000;
fma.rn.f32 %f334, %f333, %f325, %f332;
add.rn.f32 %f335, %f329, %f334;
neg.f32 %f336, %f335;
add.rn.f32 %f337, %f329, %f336;
add.rn.f32 %f338, %f337, %f334;
mov.b32 %r233, %f335;
setp.eq.s32 %p43, %r233, 1118925336;
add.s32 %r234, %r233, -1;
mov.b32 %f339, %r234;
add.f32 %f340, %f338, 0f37000000;
selp.f32 %f341, %f339, %f335, %p43;
selp.f32 %f82, %f340, %f338, %p43;
mul.f32 %f342, %f341, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f343, %f342;
mov.f32 %f344, 0fBF317200;
fma.rn.f32 %f345, %f343, %f344, %f341;
mov.f32 %f346, 0fB5BFBE8E;
fma.rn.f32 %f347, %f343, %f346, %f345;
mul.f32 %f348, %f347, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f349, %f348;
add.f32 %f350, %f343, 0f00000000;
ex2.approx.f32 %f351, %f350;
mul.f32 %f352, %f349, %f351;
setp.lt.f32 %p44, %f341, 0fC2D20000;
selp.f32 %f353, 0f00000000, %f352, %p44;
setp.gt.f32 %p45, %f341, 0f42D20000;
selp.f32 %f586, 0f7F800000, %f353, %p45;
setp.eq.f32 %p46, %f586, 0f7F800000;
@%p46 bra BB0_57;
fma.rn.f32 %f586, %f586, %f82, %f586;
BB0_57:
setp.lt.f32 %p47, %f77, 0f00000000;
setp.eq.f32 %p48, %f80, 0f3F800000;
and.pred %p1, %p47, %p48;
mov.b32 %r235, %f586;
xor.b32 %r236, %r235, -2147483648;
mov.b32 %f354, %r236;
selp.f32 %f588, %f354, %f586, %p1;
setp.eq.f32 %p49, %f77, 0f00000000;
@%p49 bra BB0_60;
bra.uni BB0_58;
BB0_60:
add.f32 %f357, %f77, %f77;
selp.f32 %f588, %f357, 0f00000000, %p48;
bra.uni BB0_61;
BB0_58:
setp.geu.f32 %p50, %f77, 0f00000000;
@%p50 bra BB0_61;
mov.f32 %f555, 0f3EE66666;
cvt.rzi.f32.f32 %f356, %f555;
setp.neu.f32 %p51, %f356, 0f3EE66666;
selp.f32 %f588, 0f7FFFFFFF, %f588, %p51;
BB0_61:
abs.f32 %f532, %f77;
add.f32 %f358, %f532, 0f3EE66666;
mov.b32 %r237, %f358;
setp.lt.s32 %p53, %r237, 2139095040;
@%p53 bra BB0_66;
abs.f32 %f553, %f77;
setp.gtu.f32 %p54, %f553, 0f7F800000;
@%p54 bra BB0_65;
bra.uni BB0_63;
BB0_65:
add.f32 %f588, %f77, 0f3EE66666;
bra.uni BB0_66;
BB0_63:
abs.f32 %f554, %f77;
setp.neu.f32 %p55, %f554, 0f7F800000;
@%p55 bra BB0_66;
selp.f32 %f588, 0fFF800000, 0f7F800000, %p1;
BB0_66:
mov.f32 %f541, 0fB5BFBE8E;
mov.f32 %f540, 0fBF317200;
mov.f32 %f539, 0f00000000;
mov.f32 %f538, 0f35BFBE8E;
mov.f32 %f537, 0f3F317200;
mov.f32 %f536, 0f3DAAAABD;
mov.f32 %f535, 0f3C4CAF63;
mov.f32 %f534, 0f3B18F0FE;
mov.f32 %f533, 0f3EE66666;
setp.eq.f32 %p56, %f77, 0f3F800000;
selp.f32 %f93, 0f3F800000, %f588, %p56;
abs.f32 %f94, %f78;
setp.lt.f32 %p57, %f94, 0f00800000;
mul.f32 %f361, %f94, 0f4B800000;
selp.f32 %f362, 0fC3170000, 0fC2FE0000, %p57;
selp.f32 %f363, %f361, %f94, %p57;
mov.b32 %r238, %f363;
and.b32 %r239, %r238, 8388607;
or.b32 %r240, %r239, 1065353216;
mov.b32 %f364, %r240;
shr.u32 %r241, %r238, 23;
cvt.rn.f32.u32 %f365, %r241;
add.f32 %f366, %f362, %f365;
setp.gt.f32 %p58, %f364, 0f3FB504F3;
mul.f32 %f367, %f364, 0f3F000000;
add.f32 %f368, %f366, 0f3F800000;
selp.f32 %f369, %f367, %f364, %p58;
selp.f32 %f370, %f368, %f366, %p58;
add.f32 %f371, %f369, 0fBF800000;
add.f32 %f360, %f369, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f359,%f360;
// inline asm
add.f32 %f372, %f371, %f371;
mul.f32 %f373, %f359, %f372;
mul.f32 %f374, %f373, %f373;
fma.rn.f32 %f377, %f534, %f374, %f535;
fma.rn.f32 %f379, %f377, %f374, %f536;
mul.rn.f32 %f380, %f379, %f374;
mul.rn.f32 %f381, %f380, %f373;
sub.f32 %f382, %f371, %f373;
neg.f32 %f383, %f373;
add.f32 %f384, %f382, %f382;
fma.rn.f32 %f385, %f383, %f371, %f384;
mul.rn.f32 %f386, %f359, %f385;
add.f32 %f387, %f381, %f373;
sub.f32 %f388, %f373, %f387;
add.f32 %f389, %f381, %f388;
add.f32 %f390, %f386, %f389;
add.f32 %f391, %f387, %f390;
sub.f32 %f392, %f387, %f391;
add.f32 %f393, %f390, %f392;
mul.rn.f32 %f395, %f370, %f537;
mul.rn.f32 %f397, %f370, %f538;
add.f32 %f398, %f395, %f391;
sub.f32 %f399, %f395, %f398;
add.f32 %f400, %f391, %f399;
add.f32 %f401, %f393, %f400;
add.f32 %f402, %f397, %f401;
add.f32 %f403, %f398, %f402;
sub.f32 %f404, %f398, %f403;
add.f32 %f405, %f402, %f404;
mul.rn.f32 %f407, %f533, %f403;
neg.f32 %f408, %f407;
fma.rn.f32 %f409, %f533, %f403, %f408;
fma.rn.f32 %f410, %f533, %f405, %f409;
fma.rn.f32 %f412, %f539, %f403, %f410;
add.rn.f32 %f413, %f407, %f412;
neg.f32 %f414, %f413;
add.rn.f32 %f415, %f407, %f414;
add.rn.f32 %f416, %f415, %f412;
mov.b32 %r242, %f413;
setp.eq.s32 %p59, %r242, 1118925336;
add.s32 %r243, %r242, -1;
mov.b32 %f417, %r243;
add.f32 %f418, %f416, 0f37000000;
selp.f32 %f419, %f417, %f413, %p59;
selp.f32 %f95, %f418, %f416, %p59;
mul.f32 %f420, %f419, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f421, %f420;
fma.rn.f32 %f423, %f421, %f540, %f419;
fma.rn.f32 %f425, %f421, %f541, %f423;
mul.f32 %f426, %f425, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f427, %f426;
add.f32 %f428, %f421, 0f00000000;
ex2.approx.f32 %f429, %f428;
mul.f32 %f430, %f427, %f429;
setp.lt.f32 %p60, %f419, 0fC2D20000;
selp.f32 %f431, 0f00000000, %f430, %p60;
setp.gt.f32 %p61, %f419, 0f42D20000;
selp.f32 %f589, 0f7F800000, %f431, %p61;
setp.eq.f32 %p62, %f589, 0f7F800000;
@%p62 bra BB0_68;
fma.rn.f32 %f589, %f589, %f95, %f589;
BB0_68:
setp.lt.f32 %p63, %f78, 0f00000000;
and.pred %p2, %p63, %p48;
mov.b32 %r244, %f589;
xor.b32 %r245, %r244, -2147483648;
mov.b32 %f432, %r245;
selp.f32 %f591, %f432, %f589, %p2;
setp.eq.f32 %p65, %f78, 0f00000000;
@%p65 bra BB0_71;
bra.uni BB0_69;
BB0_71:
add.f32 %f435, %f78, %f78;
selp.f32 %f591, %f435, 0f00000000, %p48;
bra.uni BB0_72;
BB0_69:
setp.geu.f32 %p66, %f78, 0f00000000;
@%p66 bra BB0_72;
mov.f32 %f552, 0f3EE66666;
cvt.rzi.f32.f32 %f434, %f552;
setp.neu.f32 %p67, %f434, 0f3EE66666;
selp.f32 %f591, 0f7FFFFFFF, %f591, %p67;
BB0_72:
abs.f32 %f556, %f78;
add.f32 %f436, %f556, 0f3EE66666;
mov.b32 %r246, %f436;
setp.lt.s32 %p69, %r246, 2139095040;
@%p69 bra BB0_77;
abs.f32 %f557, %f78;
setp.gtu.f32 %p70, %f557, 0f7F800000;
@%p70 bra BB0_76;
bra.uni BB0_74;
BB0_76:
add.f32 %f591, %f78, 0f3EE66666;
bra.uni BB0_77;
BB0_74:
abs.f32 %f558, %f78;
setp.neu.f32 %p71, %f558, 0f7F800000;
@%p71 bra BB0_77;
selp.f32 %f591, 0fFF800000, 0f7F800000, %p2;
BB0_77:
mov.f32 %f550, 0fB5BFBE8E;
mov.f32 %f549, 0fBF317200;
mov.f32 %f548, 0f00000000;
mov.f32 %f547, 0f35BFBE8E;
mov.f32 %f546, 0f3F317200;
mov.f32 %f545, 0f3DAAAABD;
mov.f32 %f544, 0f3C4CAF63;
mov.f32 %f543, 0f3B18F0FE;
mov.f32 %f542, 0f3EE66666;
setp.eq.f32 %p72, %f78, 0f3F800000;
selp.f32 %f106, 0f3F800000, %f591, %p72;
abs.f32 %f107, %f79;
setp.lt.f32 %p73, %f107, 0f00800000;
mul.f32 %f439, %f107, 0f4B800000;
selp.f32 %f440, 0fC3170000, 0fC2FE0000, %p73;
selp.f32 %f441, %f439, %f107, %p73;
mov.b32 %r247, %f441;
and.b32 %r248, %r247, 8388607;
or.b32 %r249, %r248, 1065353216;
mov.b32 %f442, %r249;
shr.u32 %r250, %r247, 23;
cvt.rn.f32.u32 %f443, %r250;
add.f32 %f444, %f440, %f443;
setp.gt.f32 %p74, %f442, 0f3FB504F3;
mul.f32 %f445, %f442, 0f3F000000;
add.f32 %f446, %f444, 0f3F800000;
selp.f32 %f447, %f445, %f442, %p74;
selp.f32 %f448, %f446, %f444, %p74;
add.f32 %f449, %f447, 0fBF800000;
add.f32 %f438, %f447, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f437,%f438;
// inline asm
add.f32 %f450, %f449, %f449;
mul.f32 %f451, %f437, %f450;
mul.f32 %f452, %f451, %f451;
fma.rn.f32 %f455, %f543, %f452, %f544;
fma.rn.f32 %f457, %f455, %f452, %f545;
mul.rn.f32 %f458, %f457, %f452;
mul.rn.f32 %f459, %f458, %f451;
sub.f32 %f460, %f449, %f451;
neg.f32 %f461, %f451;
add.f32 %f462, %f460, %f460;
fma.rn.f32 %f463, %f461, %f449, %f462;
mul.rn.f32 %f464, %f437, %f463;
add.f32 %f465, %f459, %f451;
sub.f32 %f466, %f451, %f465;
add.f32 %f467, %f459, %f466;
add.f32 %f468, %f464, %f467;
add.f32 %f469, %f465, %f468;
sub.f32 %f470, %f465, %f469;
add.f32 %f471, %f468, %f470;
mul.rn.f32 %f473, %f448, %f546;
mul.rn.f32 %f475, %f448, %f547;
add.f32 %f476, %f473, %f469;
sub.f32 %f477, %f473, %f476;
add.f32 %f478, %f469, %f477;
add.f32 %f479, %f471, %f478;
add.f32 %f480, %f475, %f479;
add.f32 %f481, %f476, %f480;
sub.f32 %f482, %f476, %f481;
add.f32 %f483, %f480, %f482;
mul.rn.f32 %f485, %f542, %f481;
neg.f32 %f486, %f485;
fma.rn.f32 %f487, %f542, %f481, %f486;
fma.rn.f32 %f488, %f542, %f483, %f487;
fma.rn.f32 %f490, %f548, %f481, %f488;
add.rn.f32 %f491, %f485, %f490;
neg.f32 %f492, %f491;
add.rn.f32 %f493, %f485, %f492;
add.rn.f32 %f494, %f493, %f490;
mov.b32 %r251, %f491;
setp.eq.s32 %p75, %r251, 1118925336;
add.s32 %r252, %r251, -1;
mov.b32 %f495, %r252;
add.f32 %f496, %f494, 0f37000000;
selp.f32 %f497, %f495, %f491, %p75;
selp.f32 %f108, %f496, %f494, %p75;
mul.f32 %f498, %f497, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f499, %f498;
fma.rn.f32 %f501, %f499, %f549, %f497;
fma.rn.f32 %f503, %f499, %f550, %f501;
mul.f32 %f504, %f503, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f505, %f504;
add.f32 %f506, %f499, 0f00000000;
ex2.approx.f32 %f507, %f506;
mul.f32 %f508, %f505, %f507;
setp.lt.f32 %p76, %f497, 0fC2D20000;
selp.f32 %f509, 0f00000000, %f508, %p76;
setp.gt.f32 %p77, %f497, 0f42D20000;
selp.f32 %f592, 0f7F800000, %f509, %p77;
setp.eq.f32 %p78, %f592, 0f7F800000;
@%p78 bra BB0_79;
fma.rn.f32 %f592, %f592, %f108, %f592;
BB0_79:
setp.lt.f32 %p79, %f79, 0f00000000;
and.pred %p3, %p79, %p48;
mov.b32 %r253, %f592;
xor.b32 %r254, %r253, -2147483648;
mov.b32 %f510, %r254;
selp.f32 %f594, %f510, %f592, %p3;
setp.eq.f32 %p81, %f79, 0f00000000;
@%p81 bra BB0_82;
bra.uni BB0_80;
BB0_82:
add.f32 %f513, %f79, %f79;
selp.f32 %f594, %f513, 0f00000000, %p48;
bra.uni BB0_83;
BB0_80:
setp.geu.f32 %p82, %f79, 0f00000000;
@%p82 bra BB0_83;
mov.f32 %f551, 0f3EE66666;
cvt.rzi.f32.f32 %f512, %f551;
setp.neu.f32 %p83, %f512, 0f3EE66666;
selp.f32 %f594, 0f7FFFFFFF, %f594, %p83;
BB0_83:
abs.f32 %f559, %f79;
add.f32 %f514, %f559, 0f3EE66666;
mov.b32 %r255, %f514;
setp.lt.s32 %p85, %r255, 2139095040;
@%p85 bra BB0_88;
abs.f32 %f560, %f79;
setp.gtu.f32 %p86, %f560, 0f7F800000;
@%p86 bra BB0_87;
bra.uni BB0_85;
BB0_87:
add.f32 %f594, %f79, 0f3EE66666;
bra.uni BB0_88;
BB0_85:
abs.f32 %f561, %f79;
setp.neu.f32 %p87, %f561, 0f7F800000;
@%p87 bra BB0_88;
selp.f32 %f594, 0fFF800000, 0f7F800000, %p3;
BB0_88:
mov.u32 %r277, 4;
mov.u64 %rd98, 0;
mov.u32 %r276, 2;
setp.eq.f32 %p88, %f79, 0f3F800000;
selp.f32 %f515, 0f3F800000, %f594, %p88;
cvt.u64.u32 %rd59, %r4;
cvt.u64.u32 %rd58, %r3;
mov.u64 %rd62, image;
cvta.global.u64 %rd57, %rd62;
// inline asm
call (%rd56), _rt_buffer_get_64, (%rd57, %r276, %r277, %rd58, %rd59, %rd98, %rd98);
// inline asm
cvt.sat.f32.f32 %f516, %f515;
mul.f32 %f517, %f516, 0f437FFD71;
cvt.rzi.u32.f32 %r258, %f517;
cvt.sat.f32.f32 %f518, %f106;
mul.f32 %f519, %f518, 0f437FFD71;
cvt.rzi.u32.f32 %r259, %f519;
cvt.sat.f32.f32 %f520, %f93;
mul.f32 %f521, %f520, 0f437FFD71;
cvt.rzi.u32.f32 %r260, %f521;
cvt.u16.u32 %rs16, %r258;
cvt.u16.u32 %rs17, %r260;
cvt.u16.u32 %rs18, %r259;
mov.u16 %rs19, 255;
st.v4.u8 [%rd56], {%rs16, %rs18, %rs17, %rs19};
ld.global.u32 %r307, [imageEnabled];
BB0_89:
and.b32 %r261, %r307, 4;
setp.eq.s32 %p89, %r261, 0;
@%p89 bra BB0_91;
mov.u32 %r279, 8;
mov.u64 %rd99, 0;
mov.u32 %r278, 2;
cvt.u64.u32 %rd65, %r3;
cvt.u64.u32 %rd66, %r4;
mov.u64 %rd69, image_HDR;
cvta.global.u64 %rd64, %rd69;
// inline asm
call (%rd63), _rt_buffer_get_64, (%rd64, %r278, %r279, %rd65, %rd66, %rd99, %rd99);
// inline asm
mov.f32 %f525, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs23, %f525;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs22, %f79;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs21, %f78;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs20, %f77;}
// inline asm
st.v4.u16 [%rd63], {%rs20, %rs21, %rs22, %rs23};
ld.global.u32 %r307, [imageEnabled];
BB0_91:
and.b32 %r264, %r307, 16;
setp.eq.s32 %p90, %r264, 0;
@%p90 bra BB0_99;
mov.u32 %r281, 8;
mov.u64 %rd100, 0;
mov.u32 %r280, 2;
cvt.u64.u32 %rd72, %r3;
cvt.u64.u32 %rd73, %r4;
mov.u64 %rd76, image_HDR2;
cvta.global.u64 %rd71, %rd76;
// inline asm
call (%rd70), _rt_buffer_get_64, (%rd71, %r280, %r281, %rd72, %rd73, %rd100, %rd100);
// inline asm
mov.f32 %f529, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs27, %f529;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs26, %f76;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs25, %f75;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs24, %f74;}
// inline asm
st.v4.u16 [%rd70], {%rs24, %rs25, %rs26, %rs27};
BB0_99:
ret;
}