ArabDesert/Assets/Editor/x64/Bakery/lmAOdir.ptx

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2024-05-25 09:10:35 +03:00
//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//
.version 6.1
.target sm_30
.address_size 64
// .globl _Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Dir[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 4 .u32 samples;
.global .align 4 .f32 lightRadius;
.global .align 4 .f32 intensity;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightRadiusE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9intensityE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename11lightRadiusE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9intensityE[6] = {102, 108, 111, 97, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum11lightRadiusE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9intensityE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic11lightRadiusE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic9intensityE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation11lightRadiusE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9intensityE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry _Z6oxMainv(
)
{
.local .align 4 .b8 __local_depot0[32];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<63>;
.reg .b16 %rs<48>;
.reg .f32 %f<392>;
.reg .b32 %r<294>;
.reg .b64 %rd<126>;
mov.u64 %rd125, __local_depot0;
cvta.local.u64 %SP, %rd125;
ld.global.v2.u32 {%r97, %r98}, [pixelID];
cvt.u64.u32 %rd22, %r97;
cvt.u64.u32 %rd23, %r98;
mov.u64 %rd26, uvnormal;
cvta.global.u64 %rd21, %rd26;
mov.u32 %r95, 2;
mov.u32 %r96, 4;
mov.u64 %rd25, 0;
// inline asm
call (%rd20), _rt_buffer_get_64, (%rd21, %r95, %r96, %rd22, %rd23, %rd25, %rd25);
// inline asm
ld.u32 %r1, [%rd20];
shr.u32 %r101, %r1, 16;
cvt.u16.u32 %rs1, %r101;
and.b16 %rs3, %rs1, 255;
cvt.u16.u32 %rs4, %r1;
or.b16 %rs5, %rs4, %rs3;
setp.eq.s16 %p2, %rs5, 0;
mov.f32 %f358, 0f00000000;
mov.f32 %f359, %f358;
mov.f32 %f360, %f358;
@%p2 bra BB0_2;
ld.u8 %rs6, [%rd20+1];
and.b16 %rs8, %rs4, 255;
cvt.rn.f32.u16 %f96, %rs8;
div.rn.f32 %f97, %f96, 0f437F0000;
fma.rn.f32 %f98, %f97, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f99, %rs6;
div.rn.f32 %f100, %f99, 0f437F0000;
fma.rn.f32 %f101, %f100, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f102, %rs3;
div.rn.f32 %f103, %f102, 0f437F0000;
fma.rn.f32 %f104, %f103, 0f40000000, 0fBF800000;
mul.f32 %f105, %f101, %f101;
fma.rn.f32 %f106, %f98, %f98, %f105;
fma.rn.f32 %f107, %f104, %f104, %f106;
sqrt.rn.f32 %f108, %f107;
rcp.rn.f32 %f109, %f108;
mul.f32 %f358, %f98, %f109;
mul.f32 %f359, %f101, %f109;
mul.f32 %f360, %f104, %f109;
BB0_2:
ld.global.v2.u32 {%r102, %r103}, [pixelID];
ld.global.v2.u32 {%r105, %r106}, [tileInfo];
add.s32 %r2, %r102, %r105;
add.s32 %r3, %r103, %r106;
setp.eq.f32 %p3, %f359, 0f00000000;
setp.eq.f32 %p4, %f358, 0f00000000;
and.pred %p5, %p4, %p3;
setp.eq.f32 %p6, %f360, 0f00000000;
and.pred %p7, %p5, %p6;
@%p7 bra BB0_75;
bra.uni BB0_3;
BB0_75:
ld.global.u8 %rs30, [imageEnabled];
and.b16 %rs31, %rs30, 4;
setp.eq.s16 %p59, %rs31, 0;
@%p59 bra BB0_79;
ld.global.u32 %r250, [additive];
setp.eq.s32 %p60, %r250, 0;
cvt.u64.u32 %rd18, %r2;
cvt.u64.u32 %rd19, %r3;
@%p60 bra BB0_78;
mov.u64 %rd99, image_HDR;
cvta.global.u64 %rd88, %rd99;
mov.u32 %r254, 8;
// inline asm
call (%rd87), _rt_buffer_get_64, (%rd88, %r95, %r254, %rd18, %rd19, %rd25, %rd25);
// inline asm
ld.v4.u16 {%rs38, %rs39, %rs40, %rs41}, [%rd87];
// inline asm
{ cvt.f32.f16 %f348, %rs38;}
// inline asm
// inline asm
{ cvt.f32.f16 %f349, %rs39;}
// inline asm
// inline asm
{ cvt.f32.f16 %f350, %rs40;}
// inline asm
// inline asm
call (%rd93), _rt_buffer_get_64, (%rd88, %r95, %r254, %rd18, %rd19, %rd25, %rd25);
// inline asm
add.f32 %f351, %f348, 0f00000000;
add.f32 %f352, %f349, 0f00000000;
add.f32 %f353, %f350, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs37, %f353;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs36, %f352;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs35, %f351;}
// inline asm
mov.u16 %rs42, 0;
st.v4.u16 [%rd93], {%rs35, %rs36, %rs37, %rs42};
bra.uni BB0_79;
BB0_3:
ld.global.v2.u32 {%r114, %r115}, [pixelID];
cvt.u64.u32 %rd29, %r114;
cvt.u64.u32 %rd30, %r115;
mov.u64 %rd39, uvpos;
cvta.global.u64 %rd28, %rd39;
mov.u32 %r111, 12;
// inline asm
call (%rd27), _rt_buffer_get_64, (%rd28, %r95, %r111, %rd29, %rd30, %rd25, %rd25);
// inline asm
ld.f32 %f114, [%rd27+8];
ld.f32 %f115, [%rd27+4];
ld.f32 %f116, [%rd27];
mul.f32 %f117, %f116, 0f3456BF95;
mul.f32 %f118, %f115, 0f3456BF95;
mul.f32 %f119, %f114, 0f3456BF95;
abs.f32 %f120, %f358;
div.rn.f32 %f121, %f117, %f120;
abs.f32 %f122, %f359;
div.rn.f32 %f123, %f118, %f122;
abs.f32 %f124, %f360;
div.rn.f32 %f125, %f119, %f124;
abs.f32 %f126, %f121;
abs.f32 %f127, %f123;
abs.f32 %f128, %f125;
mov.f32 %f129, 0f38D1B717;
max.f32 %f130, %f126, %f129;
max.f32 %f131, %f127, %f129;
max.f32 %f132, %f128, %f129;
fma.rn.f32 %f7, %f358, %f130, %f116;
fma.rn.f32 %f8, %f359, %f131, %f115;
fma.rn.f32 %f9, %f360, %f132, %f114;
setp.gt.f32 %p8, %f120, %f124;
neg.f32 %f133, %f359;
selp.f32 %f134, %f133, 0f00000000, %p8;
neg.f32 %f135, %f360;
selp.f32 %f136, %f358, %f135, %p8;
selp.f32 %f137, 0f00000000, %f359, %p8;
mul.f32 %f138, %f136, %f136;
fma.rn.f32 %f139, %f134, %f134, %f138;
fma.rn.f32 %f140, %f137, %f137, %f139;
sqrt.rn.f32 %f141, %f140;
rcp.rn.f32 %f142, %f141;
mul.f32 %f10, %f134, %f142;
mul.f32 %f11, %f136, %f142;
mul.f32 %f12, %f137, %f142;
ld.global.v2.u32 {%r118, %r119}, [pixelID];
cvt.u64.u32 %rd35, %r118;
cvt.u64.u32 %rd36, %r119;
mov.u64 %rd40, rnd_seeds;
cvta.global.u64 %rd34, %rd40;
// inline asm
call (%rd33), _rt_buffer_get_64, (%rd34, %r95, %r96, %rd35, %rd36, %rd25, %rd25);
// inline asm
ld.global.u32 %r264, [samples];
mov.f32 %f381, 0f00000000;
setp.lt.s32 %p9, %r264, 1;
@%p9 bra BB0_4;
cvt.rn.f32.s32 %f147, %r264;
rcp.rn.f32 %f13, %f147;
ld.u32 %r290, [%rd33];
mul.f32 %f14, %f7, 0f3456BF95;
mul.f32 %f15, %f8, 0f3456BF95;
mul.f32 %f16, %f9, 0f3456BF95;
mul.f32 %f148, %f358, %f11;
mul.f32 %f149, %f359, %f10;
sub.f32 %f17, %f149, %f148;
mul.f32 %f150, %f360, %f10;
mul.f32 %f151, %f358, %f12;
sub.f32 %f18, %f151, %f150;
mul.f32 %f152, %f359, %f12;
mul.f32 %f153, %f360, %f11;
sub.f32 %f19, %f153, %f152;
mov.f32 %f381, 0f00000000;
mov.u32 %r265, 0;
abs.f32 %f154, %f15;
abs.f32 %f155, %f14;
max.f32 %f156, %f155, %f154;
abs.f32 %f157, %f16;
max.f32 %f158, %f156, %f157;
mov.f32 %f382, %f381;
mov.f32 %f383, %f381;
mov.f32 %f384, %f381;
BB0_6:
setp.lt.s32 %p10, %r264, 1;
@%p10 bra BB0_55;
cvt.rn.f32.s32 %f24, %r265;
max.f32 %f25, %f158, %f129;
mov.u32 %r267, 0;
BB0_8:
mad.lo.s32 %r124, %r290, 1664525, 1013904223;
and.b32 %r125, %r124, 16777215;
cvt.rn.f32.u32 %f160, %r125;
fma.rn.f32 %f161, %f160, 0f33800000, %f24;
mul.f32 %f162, %f13, %f161;
mad.lo.s32 %r290, %r124, 1664525, 1013904223;
and.b32 %r126, %r290, 16777215;
cvt.rn.f32.u32 %f163, %r126;
cvt.rn.f32.s32 %f164, %r267;
fma.rn.f32 %f165, %f163, 0f33800000, %f164;
mul.f32 %f166, %f13, %f165;
sqrt.rn.f32 %f30, %f162;
mul.f32 %f375, %f166, 0f40C90FDB;
abs.f32 %f32, %f375;
setp.neu.f32 %p11, %f32, 0f7F800000;
mov.f32 %f369, %f375;
@%p11 bra BB0_10;
mov.f32 %f167, 0f00000000;
mul.rn.f32 %f369, %f375, %f167;
BB0_10:
mul.f32 %f168, %f369, 0f3F22F983;
cvt.rni.s32.f32 %r278, %f168;
cvt.rn.f32.s32 %f169, %r278;
neg.f32 %f170, %f169;
mov.f32 %f171, 0f3FC90FDA;
fma.rn.f32 %f172, %f170, %f171, %f369;
mov.f32 %f173, 0f33A22168;
fma.rn.f32 %f174, %f170, %f173, %f172;
mov.f32 %f175, 0f27C234C5;
fma.rn.f32 %f370, %f170, %f175, %f174;
abs.f32 %f176, %f369;
setp.leu.f32 %p12, %f176, 0f47CE4780;
@%p12 bra BB0_21;
mov.b32 %r13, %f369;
shr.u32 %r14, %r13, 23;
shl.b32 %r129, %r13, 8;
or.b32 %r15, %r129, -2147483648;
add.u64 %rd42, %SP, 4;
cvta.to.local.u64 %rd122, %rd42;
mov.u32 %r270, 0;
mov.u64 %rd121, __cudart_i2opi_f;
mov.u32 %r269, -6;
BB0_12:
.pragma "nounroll";
ld.const.u32 %r132, [%rd121];
// inline asm
{
mad.lo.cc.u32 %r130, %r132, %r15, %r270;
madc.hi.u32 %r270, %r132, %r15, 0;
}
// inline asm
st.local.u32 [%rd122], %r130;
add.s64 %rd122, %rd122, 4;
add.s64 %rd121, %rd121, 4;
add.s32 %r269, %r269, 1;
setp.ne.s32 %p13, %r269, 0;
@%p13 bra BB0_12;
and.b32 %r135, %r14, 255;
add.s32 %r136, %r135, -128;
shr.u32 %r137, %r136, 5;
and.b32 %r20, %r13, -2147483648;
cvta.to.local.u64 %rd44, %rd42;
st.local.u32 [%rd44+24], %r270;
mov.u32 %r138, 6;
sub.s32 %r139, %r138, %r137;
mul.wide.s32 %rd45, %r139, 4;
add.s64 %rd8, %rd44, %rd45;
ld.local.u32 %r271, [%rd8];
ld.local.u32 %r272, [%rd8+-4];
and.b32 %r23, %r14, 31;
setp.eq.s32 %p14, %r23, 0;
@%p14 bra BB0_15;
mov.u32 %r140, 32;
sub.s32 %r141, %r140, %r23;
shr.u32 %r142, %r272, %r141;
shl.b32 %r143, %r271, %r23;
add.s32 %r271, %r142, %r143;
ld.local.u32 %r144, [%rd8+-8];
shr.u32 %r145, %r144, %r141;
shl.b32 %r146, %r272, %r23;
add.s32 %r272, %r145, %r146;
BB0_15:
shr.u32 %r147, %r272, 30;
shl.b32 %r148, %r271, 2;
add.s32 %r273, %r147, %r148;
shl.b32 %r29, %r272, 2;
shr.u32 %r149, %r273, 31;
shr.u32 %r150, %r271, 30;
add.s32 %r30, %r149, %r150;
setp.eq.s32 %p15, %r149, 0;
@%p15 bra BB0_16;
bra.uni BB0_17;
BB0_16:
mov.u32 %r274, %r20;
mov.u32 %r275, %r29;
bra.uni BB0_18;
BB0_17:
not.b32 %r151, %r273;
neg.s32 %r275, %r29;
setp.eq.s32 %p16, %r29, 0;
selp.u32 %r152, 1, 0, %p16;
add.s32 %r273, %r152, %r151;
xor.b32 %r274, %r20, -2147483648;
BB0_18:
clz.b32 %r277, %r273;
setp.eq.s32 %p17, %r277, 0;
shl.b32 %r153, %r273, %r277;
mov.u32 %r154, 32;
sub.s32 %r155, %r154, %r277;
shr.u32 %r156, %r275, %r155;
add.s32 %r157, %r156, %r153;
selp.b32 %r38, %r273, %r157, %p17;
mov.u32 %r158, -921707870;
mul.hi.u32 %r276, %r38, %r158;
setp.eq.s32 %p18, %r20, 0;
neg.s32 %r159, %r30;
selp.b32 %r278, %r30, %r159, %p18;
setp.lt.s32 %p19, %r276, 1;
@%p19 bra BB0_20;
mul.lo.s32 %r160, %r38, -921707870;
shr.u32 %r161, %r160, 31;
shl.b32 %r162, %r276, 1;
add.s32 %r276, %r161, %r162;
add.s32 %r277, %r277, 1;
BB0_20:
mov.u32 %r163, 126;
sub.s32 %r164, %r163, %r277;
shl.b32 %r165, %r164, 23;
add.s32 %r166, %r276, 1;
shr.u32 %r167, %r166, 7;
add.s32 %r168, %r167, 1;
shr.u32 %r169, %r168, 1;
add.s32 %r170, %r169, %r165;
or.b32 %r171, %r170, %r274;
mov.b32 %f370, %r171;
BB0_21:
mul.rn.f32 %f38, %f370, %f370;
add.s32 %r46, %r278, 1;
and.b32 %r47, %r46, 1;
setp.eq.s32 %p20, %r47, 0;
@%p20 bra BB0_23;
bra.uni BB0_22;
BB0_23:
mov.f32 %f179, 0f3C08839E;
mov.f32 %f180, 0fB94CA1F9;
fma.rn.f32 %f371, %f180, %f38, %f179;
bra.uni BB0_24;
BB0_22:
mov.f32 %f177, 0fBAB6061A;
mov.f32 %f178, 0f37CCF5CE;
fma.rn.f32 %f371, %f178, %f38, %f177;
BB0_24:
@%p20 bra BB0_26;
bra.uni BB0_25;
BB0_26:
mov.f32 %f184, 0fBE2AAAA3;
fma.rn.f32 %f185, %f371, %f38, %f184;
mov.f32 %f186, 0f00000000;
fma.rn.f32 %f372, %f185, %f38, %f186;
bra.uni BB0_27;
BB0_25:
mov.f32 %f181, 0f3D2AAAA5;
fma.rn.f32 %f182, %f371, %f38, %f181;
mov.f32 %f183, 0fBF000000;
fma.rn.f32 %f372, %f182, %f38, %f183;
BB0_27:
fma.rn.f32 %f373, %f372, %f370, %f370;
@%p20 bra BB0_29;
mov.f32 %f187, 0f3F800000;
fma.rn.f32 %f373, %f372, %f38, %f187;
BB0_29:
and.b32 %r172, %r46, 2;
setp.eq.s32 %p23, %r172, 0;
@%p23 bra BB0_31;
mov.f32 %f188, 0f00000000;
mov.f32 %f189, 0fBF800000;
fma.rn.f32 %f373, %f373, %f189, %f188;
BB0_31:
@%p11 bra BB0_33;
mov.f32 %f190, 0f00000000;
mul.rn.f32 %f375, %f375, %f190;
BB0_33:
mul.f32 %f191, %f375, 0f3F22F983;
cvt.rni.s32.f32 %r288, %f191;
cvt.rn.f32.s32 %f192, %r288;
neg.f32 %f193, %f192;
fma.rn.f32 %f195, %f193, %f171, %f375;
fma.rn.f32 %f197, %f193, %f173, %f195;
fma.rn.f32 %f376, %f193, %f175, %f197;
abs.f32 %f199, %f375;
setp.leu.f32 %p25, %f199, 0f47CE4780;
@%p25 bra BB0_44;
mov.b32 %r49, %f375;
shr.u32 %r50, %r49, 23;
shl.b32 %r175, %r49, 8;
or.b32 %r51, %r175, -2147483648;
add.u64 %rd47, %SP, 4;
cvta.to.local.u64 %rd124, %rd47;
mov.u32 %r280, 0;
mov.u64 %rd123, __cudart_i2opi_f;
mov.u32 %r279, -6;
BB0_35:
.pragma "nounroll";
ld.const.u32 %r178, [%rd123];
// inline asm
{
mad.lo.cc.u32 %r176, %r178, %r51, %r280;
madc.hi.u32 %r280, %r178, %r51, 0;
}
// inline asm
st.local.u32 [%rd124], %r176;
add.s64 %rd124, %rd124, 4;
add.s64 %rd123, %rd123, 4;
add.s32 %r279, %r279, 1;
setp.ne.s32 %p26, %r279, 0;
@%p26 bra BB0_35;
and.b32 %r181, %r50, 255;
add.s32 %r182, %r181, -128;
shr.u32 %r183, %r182, 5;
and.b32 %r56, %r49, -2147483648;
cvta.to.local.u64 %rd49, %rd47;
st.local.u32 [%rd49+24], %r280;
mov.u32 %r184, 6;
sub.s32 %r185, %r184, %r183;
mul.wide.s32 %rd50, %r185, 4;
add.s64 %rd14, %rd49, %rd50;
ld.local.u32 %r281, [%rd14];
ld.local.u32 %r282, [%rd14+-4];
and.b32 %r59, %r50, 31;
setp.eq.s32 %p27, %r59, 0;
@%p27 bra BB0_38;
mov.u32 %r186, 32;
sub.s32 %r187, %r186, %r59;
shr.u32 %r188, %r282, %r187;
shl.b32 %r189, %r281, %r59;
add.s32 %r281, %r188, %r189;
ld.local.u32 %r190, [%rd14+-8];
shr.u32 %r191, %r190, %r187;
shl.b32 %r192, %r282, %r59;
add.s32 %r282, %r191, %r192;
BB0_38:
shr.u32 %r193, %r282, 30;
shl.b32 %r194, %r281, 2;
add.s32 %r283, %r193, %r194;
shl.b32 %r65, %r282, 2;
shr.u32 %r195, %r283, 31;
shr.u32 %r196, %r281, 30;
add.s32 %r66, %r195, %r196;
setp.eq.s32 %p28, %r195, 0;
@%p28 bra BB0_39;
bra.uni BB0_40;
BB0_39:
mov.u32 %r284, %r56;
mov.u32 %r285, %r65;
bra.uni BB0_41;
BB0_40:
not.b32 %r197, %r283;
neg.s32 %r285, %r65;
setp.eq.s32 %p29, %r65, 0;
selp.u32 %r198, 1, 0, %p29;
add.s32 %r283, %r198, %r197;
xor.b32 %r284, %r56, -2147483648;
BB0_41:
clz.b32 %r287, %r283;
setp.eq.s32 %p30, %r287, 0;
shl.b32 %r199, %r283, %r287;
mov.u32 %r200, 32;
sub.s32 %r201, %r200, %r287;
shr.u32 %r202, %r285, %r201;
add.s32 %r203, %r202, %r199;
selp.b32 %r74, %r283, %r203, %p30;
mov.u32 %r204, -921707870;
mul.hi.u32 %r286, %r74, %r204;
setp.eq.s32 %p31, %r56, 0;
neg.s32 %r205, %r66;
selp.b32 %r288, %r66, %r205, %p31;
setp.lt.s32 %p32, %r286, 1;
@%p32 bra BB0_43;
mul.lo.s32 %r206, %r74, -921707870;
shr.u32 %r207, %r206, 31;
shl.b32 %r208, %r286, 1;
add.s32 %r286, %r207, %r208;
add.s32 %r287, %r287, 1;
BB0_43:
mov.u32 %r209, 126;
sub.s32 %r210, %r209, %r287;
shl.b32 %r211, %r210, 23;
add.s32 %r212, %r286, 1;
shr.u32 %r213, %r212, 7;
add.s32 %r214, %r213, 1;
shr.u32 %r215, %r214, 1;
add.s32 %r216, %r215, %r211;
or.b32 %r217, %r216, %r284;
mov.b32 %f376, %r217;
BB0_44:
mul.rn.f32 %f55, %f376, %f376;
and.b32 %r82, %r288, 1;
setp.eq.s32 %p33, %r82, 0;
@%p33 bra BB0_46;
bra.uni BB0_45;
BB0_46:
mov.f32 %f202, 0f3C08839E;
mov.f32 %f203, 0fB94CA1F9;
fma.rn.f32 %f377, %f203, %f55, %f202;
bra.uni BB0_47;
BB0_45:
mov.f32 %f200, 0fBAB6061A;
mov.f32 %f201, 0f37CCF5CE;
fma.rn.f32 %f377, %f201, %f55, %f200;
BB0_47:
@%p33 bra BB0_49;
bra.uni BB0_48;
BB0_49:
mov.f32 %f207, 0fBE2AAAA3;
fma.rn.f32 %f208, %f377, %f55, %f207;
mov.f32 %f209, 0f00000000;
fma.rn.f32 %f378, %f208, %f55, %f209;
bra.uni BB0_50;
BB0_48:
mov.f32 %f204, 0f3D2AAAA5;
fma.rn.f32 %f205, %f377, %f55, %f204;
mov.f32 %f206, 0fBF000000;
fma.rn.f32 %f378, %f205, %f55, %f206;
BB0_50:
fma.rn.f32 %f379, %f378, %f376, %f376;
@%p33 bra BB0_52;
mov.f32 %f210, 0f3F800000;
fma.rn.f32 %f379, %f378, %f55, %f210;
BB0_52:
and.b32 %r218, %r288, 2;
setp.eq.s32 %p36, %r218, 0;
@%p36 bra BB0_54;
mov.f32 %f211, 0f00000000;
mov.f32 %f212, 0fBF800000;
fma.rn.f32 %f379, %f379, %f212, %f211;
BB0_54:
mul.f32 %f221, %f30, %f373;
add.u64 %rd51, %SP, 0;
cvta.to.local.u64 %rd52, %rd51;
mul.f32 %f222, %f221, %f221;
mov.f32 %f223, 0f3F800000;
sub.f32 %f224, %f223, %f222;
mul.f32 %f225, %f30, %f379;
mul.f32 %f226, %f225, %f225;
sub.f32 %f227, %f224, %f226;
mov.f32 %f228, 0f00000000;
max.f32 %f229, %f228, %f227;
sqrt.rn.f32 %f230, %f229;
mul.f32 %f231, %f10, %f225;
mul.f32 %f232, %f11, %f225;
mul.f32 %f233, %f12, %f225;
fma.rn.f32 %f234, %f19, %f221, %f231;
fma.rn.f32 %f235, %f18, %f221, %f232;
fma.rn.f32 %f236, %f17, %f221, %f233;
fma.rn.f32 %f216, %f358, %f230, %f234;
fma.rn.f32 %f217, %f359, %f230, %f235;
fma.rn.f32 %f218, %f360, %f230, %f236;
ld.global.f32 %f220, [lightRadius];
mov.u32 %r222, 1065353216;
st.local.u32 [%rd52], %r222;
ld.global.u32 %r219, [root];
mov.u32 %r220, 1;
// inline asm
call _rt_trace_64, (%r219, %f7, %f8, %f9, %f216, %f217, %f218, %r220, %f25, %f220, %rd51, %r96);
// inline asm
ld.local.f32 %f237, [%rd52];
add.f32 %f381, %f381, %f237;
fma.rn.f32 %f384, %f216, %f237, %f384;
fma.rn.f32 %f383, %f217, %f237, %f383;
fma.rn.f32 %f382, %f218, %f237, %f382;
ld.global.u32 %r264, [samples];
add.s32 %r267, %r267, 1;
setp.lt.s32 %p37, %r267, %r264;
@%p37 bra BB0_8;
BB0_55:
add.s32 %r265, %r265, 1;
setp.lt.s32 %p38, %r265, %r264;
@%p38 bra BB0_6;
bra.uni BB0_56;
BB0_4:
mov.f32 %f382, %f381;
mov.f32 %f383, %f381;
mov.f32 %f384, %f381;
BB0_56:
mul.lo.s32 %r223, %r264, %r264;
cvt.rn.f32.s32 %f238, %r223;
div.rn.f32 %f239, %f381, %f238;
add.f32 %f240, %f239, 0fBF800000;
ld.global.f32 %f241, [intensity];
fma.rn.f32 %f242, %f241, %f240, 0f3F800000;
cvt.sat.f32.f32 %f79, %f242;
ld.global.u8 %rs10, [imageEnabled];
and.b16 %rs11, %rs10, 4;
setp.eq.s16 %p39, %rs11, 0;
@%p39 bra BB0_60;
ld.global.u32 %r224, [additive];
setp.eq.s32 %p40, %r224, 0;
cvt.u64.u32 %rd15, %r2;
cvt.u64.u32 %rd16, %r3;
mov.f32 %f243, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs12, %f243;}
// inline asm
@%p40 bra BB0_59;
mov.u64 %rd65, image_HDR;
cvta.global.u64 %rd54, %rd65;
mov.u32 %r228, 8;
// inline asm
call (%rd53), _rt_buffer_get_64, (%rd54, %r95, %r228, %rd15, %rd16, %rd25, %rd25);
// inline asm
ld.v4.u16 {%rs19, %rs20, %rs21, %rs22}, [%rd53];
// inline asm
{ cvt.f32.f16 %f244, %rs19;}
// inline asm
// inline asm
{ cvt.f32.f16 %f245, %rs20;}
// inline asm
// inline asm
{ cvt.f32.f16 %f246, %rs21;}
// inline asm
// inline asm
call (%rd59), _rt_buffer_get_64, (%rd54, %r95, %r228, %rd15, %rd16, %rd25, %rd25);
// inline asm
add.f32 %f247, %f79, %f244;
add.f32 %f248, %f79, %f245;
add.f32 %f249, %f79, %f246;
// inline asm
{ cvt.rn.f16.f32 %rs18, %f249;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs17, %f248;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs16, %f247;}
// inline asm
st.v4.u16 [%rd59], {%rs16, %rs17, %rs18, %rs12};
bra.uni BB0_60;
BB0_78:
mov.u64 %rd106, image_HDR;
cvta.global.u64 %rd101, %rd106;
mov.u32 %r256, 8;
// inline asm
call (%rd100), _rt_buffer_get_64, (%rd101, %r95, %r256, %rd18, %rd19, %rd25, %rd25);
// inline asm
mov.f32 %f354, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs43, %f354;}
// inline asm
mov.u16 %rs44, 0;
st.v4.u16 [%rd100], {%rs43, %rs43, %rs43, %rs44};
BB0_79:
ld.global.u32 %r293, [imageEnabled];
and.b32 %r257, %r293, 8;
setp.eq.s32 %p61, %r257, 0;
@%p61 bra BB0_81;
cvt.u64.u32 %rd109, %r2;
cvt.u64.u32 %rd110, %r3;
mov.u64 %rd113, image_Mask;
cvta.global.u64 %rd108, %rd113;
// inline asm
call (%rd107), _rt_buffer_get_64, (%rd108, %r95, %r95, %rd109, %rd110, %rd25, %rd25);
// inline asm
mov.f32 %f357, 0f00000000;
cvt.rzi.u32.f32 %r260, %f357;
cvt.u16.u32 %rs45, %r260;
mov.u16 %rs46, 0;
st.v2.u8 [%rd107], {%rs45, %rs46};
ld.global.u32 %r293, [imageEnabled];
BB0_81:
and.b32 %r261, %r293, 64;
setp.eq.s32 %p62, %r261, 0;
@%p62 bra BB0_83;
cvt.u64.u32 %rd116, %r2;
cvt.u64.u32 %rd117, %r3;
mov.u64 %rd120, image_Dir;
cvta.global.u64 %rd115, %rd120;
// inline asm
call (%rd114), _rt_buffer_get_64, (%rd115, %r95, %r96, %rd116, %rd117, %rd25, %rd25);
// inline asm
mov.u16 %rs47, 0;
st.v4.u8 [%rd114], {%rs47, %rs47, %rs47, %rs47};
bra.uni BB0_83;
BB0_59:
mov.u64 %rd72, image_HDR;
cvta.global.u64 %rd67, %rd72;
mov.u32 %r230, 8;
// inline asm
call (%rd66), _rt_buffer_get_64, (%rd67, %r95, %r230, %rd15, %rd16, %rd25, %rd25);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs23, %f79;}
// inline asm
st.v4.u16 [%rd66], {%rs23, %rs23, %rs23, %rs12};
BB0_60:
ld.global.u32 %r292, [imageEnabled];
and.b32 %r231, %r292, 8;
setp.eq.s32 %p41, %r231, 0;
@%p41 bra BB0_73;
cvt.u64.u32 %rd75, %r2;
cvt.u64.u32 %rd76, %r3;
mov.u64 %rd79, image_Mask;
cvta.global.u64 %rd74, %rd79;
// inline asm
call (%rd73), _rt_buffer_get_64, (%rd74, %r95, %r95, %rd75, %rd76, %rd25, %rd25);
// inline asm
mov.f32 %f253, 0f3E68BA2E;
cvt.rzi.f32.f32 %f254, %f253;
fma.rn.f32 %f255, %f254, 0fC0000000, 0f3EE8BA2E;
abs.f32 %f80, %f255;
abs.f32 %f81, %f79;
setp.lt.f32 %p42, %f81, 0f00800000;
mul.f32 %f256, %f81, 0f4B800000;
selp.f32 %f257, 0fC3170000, 0fC2FE0000, %p42;
selp.f32 %f258, %f256, %f81, %p42;
mov.b32 %r234, %f258;
and.b32 %r235, %r234, 8388607;
or.b32 %r236, %r235, 1065353216;
mov.b32 %f259, %r236;
shr.u32 %r237, %r234, 23;
cvt.rn.f32.u32 %f260, %r237;
add.f32 %f261, %f257, %f260;
setp.gt.f32 %p43, %f259, 0f3FB504F3;
mul.f32 %f262, %f259, 0f3F000000;
add.f32 %f263, %f261, 0f3F800000;
selp.f32 %f264, %f262, %f259, %p43;
selp.f32 %f265, %f263, %f261, %p43;
add.f32 %f266, %f264, 0fBF800000;
add.f32 %f252, %f264, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f251,%f252;
// inline asm
add.f32 %f267, %f266, %f266;
mul.f32 %f268, %f251, %f267;
mul.f32 %f269, %f268, %f268;
mov.f32 %f270, 0f3C4CAF63;
mov.f32 %f271, 0f3B18F0FE;
fma.rn.f32 %f272, %f271, %f269, %f270;
mov.f32 %f273, 0f3DAAAABD;
fma.rn.f32 %f274, %f272, %f269, %f273;
mul.rn.f32 %f275, %f274, %f269;
mul.rn.f32 %f276, %f275, %f268;
sub.f32 %f277, %f266, %f268;
neg.f32 %f278, %f268;
add.f32 %f279, %f277, %f277;
fma.rn.f32 %f280, %f278, %f266, %f279;
mul.rn.f32 %f281, %f251, %f280;
add.f32 %f282, %f276, %f268;
sub.f32 %f283, %f268, %f282;
add.f32 %f284, %f276, %f283;
add.f32 %f285, %f281, %f284;
add.f32 %f286, %f282, %f285;
sub.f32 %f287, %f282, %f286;
add.f32 %f288, %f285, %f287;
mov.f32 %f289, 0f3F317200;
mul.rn.f32 %f290, %f265, %f289;
mov.f32 %f291, 0f35BFBE8E;
mul.rn.f32 %f292, %f265, %f291;
add.f32 %f293, %f290, %f286;
sub.f32 %f294, %f290, %f293;
add.f32 %f295, %f286, %f294;
add.f32 %f296, %f288, %f295;
add.f32 %f297, %f292, %f296;
add.f32 %f298, %f293, %f297;
sub.f32 %f299, %f293, %f298;
add.f32 %f300, %f297, %f299;
mov.f32 %f301, 0f3EE8BA2E;
mul.rn.f32 %f302, %f301, %f298;
neg.f32 %f303, %f302;
fma.rn.f32 %f304, %f301, %f298, %f303;
fma.rn.f32 %f305, %f301, %f300, %f304;
mov.f32 %f306, 0f00000000;
fma.rn.f32 %f307, %f306, %f298, %f305;
add.rn.f32 %f308, %f302, %f307;
neg.f32 %f309, %f308;
add.rn.f32 %f310, %f302, %f309;
add.rn.f32 %f311, %f310, %f307;
mov.b32 %r238, %f308;
setp.eq.s32 %p44, %r238, 1118925336;
add.s32 %r239, %r238, -1;
mov.b32 %f312, %r239;
add.f32 %f313, %f311, 0f37000000;
selp.f32 %f314, %f312, %f308, %p44;
selp.f32 %f82, %f313, %f311, %p44;
mul.f32 %f315, %f314, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f316, %f315;
mov.f32 %f317, 0fBF317200;
fma.rn.f32 %f318, %f316, %f317, %f314;
mov.f32 %f319, 0fB5BFBE8E;
fma.rn.f32 %f320, %f316, %f319, %f318;
mul.f32 %f321, %f320, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f322, %f321;
add.f32 %f323, %f316, 0f00000000;
ex2.approx.f32 %f324, %f323;
mul.f32 %f325, %f322, %f324;
setp.lt.f32 %p45, %f314, 0fC2D20000;
selp.f32 %f326, 0f00000000, %f325, %p45;
setp.gt.f32 %p46, %f314, 0f42D20000;
selp.f32 %f389, 0f7F800000, %f326, %p46;
setp.eq.f32 %p47, %f389, 0f7F800000;
@%p47 bra BB0_63;
fma.rn.f32 %f389, %f389, %f82, %f389;
BB0_63:
setp.lt.f32 %p48, %f79, 0f00000000;
setp.eq.f32 %p49, %f80, 0f3F800000;
and.pred %p1, %p48, %p49;
mov.b32 %r240, %f389;
xor.b32 %r241, %r240, -2147483648;
mov.b32 %f327, %r241;
selp.f32 %f391, %f327, %f389, %p1;
setp.eq.f32 %p50, %f79, 0f00000000;
@%p50 bra BB0_66;
bra.uni BB0_64;
BB0_66:
add.f32 %f330, %f79, %f79;
selp.f32 %f391, %f330, 0f00000000, %p49;
bra.uni BB0_67;
BB0_64:
setp.geu.f32 %p51, %f79, 0f00000000;
@%p51 bra BB0_67;
cvt.rzi.f32.f32 %f329, %f301;
setp.neu.f32 %p52, %f329, 0f3EE8BA2E;
selp.f32 %f391, 0f7FFFFFFF, %f391, %p52;
BB0_67:
add.f32 %f331, %f81, 0f3EE8BA2E;
mov.b32 %r242, %f331;
setp.lt.s32 %p54, %r242, 2139095040;
@%p54 bra BB0_72;
setp.gtu.f32 %p55, %f81, 0f7F800000;
@%p55 bra BB0_71;
bra.uni BB0_69;
BB0_71:
add.f32 %f391, %f79, 0f3EE8BA2E;
bra.uni BB0_72;
BB0_69:
setp.neu.f32 %p56, %f81, 0f7F800000;
@%p56 bra BB0_72;
selp.f32 %f391, 0fFF800000, 0f7F800000, %p1;
BB0_72:
mul.f32 %f332, %f391, 0f437F0000;
setp.eq.f32 %p57, %f79, 0f3F800000;
selp.f32 %f333, 0f437F0000, %f332, %p57;
cvt.rzi.u32.f32 %r243, %f333;
cvt.u16.u32 %rs24, %r243;
mov.u16 %rs25, 255;
st.v2.u8 [%rd73], {%rs24, %rs25};
ld.global.u32 %r292, [imageEnabled];
BB0_73:
and.b32 %r244, %r292, 64;
setp.eq.s32 %p58, %r244, 0;
@%p58 bra BB0_83;
mul.f32 %f334, %f383, %f383;
fma.rn.f32 %f335, %f384, %f384, %f334;
fma.rn.f32 %f336, %f382, %f382, %f335;
sqrt.rn.f32 %f337, %f336;
rcp.rn.f32 %f338, %f337;
mul.f32 %f339, %f384, %f338;
mul.f32 %f340, %f383, %f338;
mul.f32 %f341, %f382, %f338;
cvt.u64.u32 %rd83, %r3;
cvt.u64.u32 %rd82, %r2;
mov.u64 %rd86, image_Dir;
cvta.global.u64 %rd81, %rd86;
// inline asm
call (%rd80), _rt_buffer_get_64, (%rd81, %r95, %r96, %rd82, %rd83, %rd25, %rd25);
// inline asm
fma.rn.f32 %f342, %f339, 0f3F000000, 0f3F000000;
mul.f32 %f343, %f342, 0f437F0000;
cvt.rzi.u32.f32 %r247, %f343;
fma.rn.f32 %f344, %f340, 0f3F000000, 0f3F000000;
mul.f32 %f345, %f344, 0f437F0000;
cvt.rzi.u32.f32 %r248, %f345;
fma.rn.f32 %f346, %f341, 0f3F000000, 0f3F000000;
mul.f32 %f347, %f346, 0f437F0000;
cvt.rzi.u32.f32 %r249, %f347;
cvt.u16.u32 %rs26, %r249;
cvt.u16.u32 %rs27, %r248;
cvt.u16.u32 %rs28, %r247;
mov.u16 %rs29, 255;
st.v4.u8 [%rd80], {%rs28, %rs27, %rs26, %rs29};
BB0_83:
ret;
}