328 lines
12 KiB
Plaintext
328 lines
12 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 uvnormal[1];
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image2[1];
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.global .align 1 .b8 imageHDR[1];
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.global .align 1 .b8 imageFinal[1];
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.global .align 4 .f32 DoNormalize;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11DoNormalizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename11DoNormalizeE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11DoNormalizeE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11DoNormalizeE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11DoNormalizeE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.reg .pred %p<4>;
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.reg .b16 %rs<20>;
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.reg .f32 %f<88>;
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.reg .b32 %r<79>;
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.reg .b64 %rd<80>;
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ld.global.v2.u32 {%r20, %r21}, [pixelID];
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cvt.u64.u32 %rd4, %r20;
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cvt.u64.u32 %rd5, %r21;
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mov.u64 %rd56, imageHDR;
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cvta.global.u64 %rd3, %rd56;
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mov.u32 %r18, 2;
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mov.u32 %r7, 8;
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mov.u64 %rd55, 0;
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// inline asm
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call (%rd2), _rt_buffer_get_64, (%rd3, %r18, %r7, %rd4, %rd5, %rd55, %rd55);
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// inline asm
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ld.u16 %rs2, [%rd2];
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// inline asm
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{ cvt.f32.f16 %f17, %rs2;}
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// inline asm
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ld.global.v2.u32 {%r24, %r25}, [pixelID];
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cvt.u64.u32 %rd10, %r24;
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cvt.u64.u32 %rd11, %r25;
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// inline asm
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call (%rd8), _rt_buffer_get_64, (%rd3, %r18, %r7, %rd10, %rd11, %rd55, %rd55);
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// inline asm
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ld.u16 %rs3, [%rd8+2];
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// inline asm
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{ cvt.f32.f16 %f18, %rs3;}
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// inline asm
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ld.global.v2.u32 {%r28, %r29}, [pixelID];
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cvt.u64.u32 %rd16, %r28;
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cvt.u64.u32 %rd17, %r29;
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// inline asm
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call (%rd14), _rt_buffer_get_64, (%rd3, %r18, %r7, %rd16, %rd17, %rd55, %rd55);
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// inline asm
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ld.u16 %rs4, [%rd14+4];
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// inline asm
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{ cvt.f32.f16 %f19, %rs4;}
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// inline asm
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mul.f32 %f20, %f18, 0f3F372474;
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fma.rn.f32 %f21, %f17, 0f3E59999A, %f20;
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fma.rn.f32 %f22, %f19, 0f3D93A92A, %f21;
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ld.global.v2.u32 {%r32, %r33}, [pixelID];
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cvt.u64.u32 %rd22, %r32;
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cvt.u64.u32 %rd23, %r33;
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mov.u64 %rd57, image2;
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cvta.global.u64 %rd21, %rd57;
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mov.u32 %r19, 16;
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// inline asm
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call (%rd20), _rt_buffer_get_64, (%rd21, %r18, %r19, %rd22, %rd23, %rd55, %rd55);
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// inline asm
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ld.v4.f32 {%f23, %f24, %f25, %f26}, [%rd20];
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ld.global.v2.u32 {%r36, %r37}, [pixelID];
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cvt.u64.u32 %rd28, %r36;
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cvt.u64.u32 %rd29, %r37;
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mov.u64 %rd58, image;
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cvta.global.u64 %rd27, %rd58;
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mov.u32 %r17, 4;
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// inline asm
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call (%rd26), _rt_buffer_get_64, (%rd27, %r18, %r17, %rd28, %rd29, %rd55, %rd55);
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// inline asm
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ld.u8 %rs5, [%rd26];
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cvt.rn.f32.u16 %f30, %rs5;
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div.rn.f32 %f31, %f30, 0f437F0000;
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fma.rn.f32 %f32, %f31, 0f40000000, 0fBF800000;
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ld.global.v2.u32 {%r40, %r41}, [pixelID];
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cvt.u64.u32 %rd34, %r40;
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cvt.u64.u32 %rd35, %r41;
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// inline asm
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call (%rd32), _rt_buffer_get_64, (%rd27, %r18, %r17, %rd34, %rd35, %rd55, %rd55);
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// inline asm
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ld.u8 %rs6, [%rd32+1];
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cvt.rn.f32.u16 %f33, %rs6;
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div.rn.f32 %f34, %f33, 0f437F0000;
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fma.rn.f32 %f35, %f34, 0f40000000, 0fBF800000;
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ld.global.v2.u32 {%r44, %r45}, [pixelID];
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cvt.u64.u32 %rd40, %r44;
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cvt.u64.u32 %rd41, %r45;
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// inline asm
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call (%rd38), _rt_buffer_get_64, (%rd27, %r18, %r17, %rd40, %rd41, %rd55, %rd55);
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// inline asm
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ld.u8 %rs7, [%rd38+2];
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cvt.rn.f32.u16 %f36, %rs7;
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div.rn.f32 %f37, %f36, 0f437F0000;
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fma.rn.f32 %f38, %f37, 0f40000000, 0fBF800000;
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mul.f32 %f39, %f35, %f35;
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fma.rn.f32 %f40, %f32, %f32, %f39;
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fma.rn.f32 %f41, %f38, %f38, %f40;
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sqrt.rn.f32 %f42, %f41;
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rcp.rn.f32 %f43, %f42;
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mul.f32 %f44, %f32, %f43;
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mul.f32 %f45, %f35, %f43;
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mul.f32 %f46, %f38, %f43;
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fma.rn.f32 %f1, %f22, %f44, %f23;
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fma.rn.f32 %f2, %f22, %f45, %f24;
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fma.rn.f32 %f3, %f22, %f46, %f25;
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ld.global.v2.u32 {%r48, %r49}, [pixelID];
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cvt.u64.u32 %rd46, %r48;
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cvt.u64.u32 %rd47, %r49;
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// inline asm
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call (%rd44), _rt_buffer_get_64, (%rd27, %r18, %r17, %rd46, %rd47, %rd55, %rd55);
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// inline asm
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ld.u8 %rs8, [%rd44+3];
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cvt.rn.f32.u16 %f47, %rs8;
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div.rn.f32 %f48, %f47, 0f437F0000;
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ld.global.v2.u32 {%r52, %r53}, [pixelID];
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cvt.u64.u32 %rd52, %r52;
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cvt.u64.u32 %rd53, %r53;
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// inline asm
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call (%rd50), _rt_buffer_get_64, (%rd21, %r18, %r19, %rd52, %rd53, %rd55, %rd55);
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// inline asm
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ld.f32 %f49, [%rd50+12];
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min.f32 %f87, %f48, %f49;
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ld.global.f32 %f50, [DoNormalize];
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setp.gt.f32 %p1, %f50, 0f3F000000;
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@%p1 bra BB0_2;
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bra.uni BB0_1;
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BB0_2:
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mul.f32 %f54, %f2, %f2;
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fma.rn.f32 %f55, %f1, %f1, %f54;
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fma.rn.f32 %f56, %f3, %f3, %f55;
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sqrt.rn.f32 %f57, %f56;
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rcp.rn.f32 %f58, %f57;
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mul.f32 %f5, %f1, %f58;
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mul.f32 %f6, %f2, %f58;
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mul.f32 %f7, %f3, %f58;
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ld.global.v2.u32 {%r64, %r65}, [pixelID];
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cvt.u64.u32 %rd68, %r64;
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cvt.u64.u32 %rd69, %r65;
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mov.u64 %rd72, uvnormal;
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cvta.global.u64 %rd67, %rd72;
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// inline asm
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call (%rd66), _rt_buffer_get_64, (%rd67, %r18, %r17, %rd68, %rd69, %rd55, %rd55);
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// inline asm
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ld.u32 %r1, [%rd66];
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shr.u32 %r68, %r1, 16;
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cvt.u16.u32 %rs1, %r68;
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and.b16 %rs9, %rs1, 255;
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cvt.u16.u32 %rs10, %r1;
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or.b16 %rs11, %rs10, %rs9;
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setp.eq.s16 %p2, %rs11, 0;
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mov.f32 %f84, 0f00000000;
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mov.f32 %f85, %f84;
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mov.f32 %f86, %f84;
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@%p2 bra BB0_4;
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ld.u8 %rs12, [%rd66+1];
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and.b16 %rs14, %rs10, 255;
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cvt.rn.f32.u16 %f59, %rs14;
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div.rn.f32 %f60, %f59, 0f437F0000;
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fma.rn.f32 %f61, %f60, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f62, %rs12;
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div.rn.f32 %f63, %f62, 0f437F0000;
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fma.rn.f32 %f64, %f63, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f65, %rs9;
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div.rn.f32 %f66, %f65, 0f437F0000;
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fma.rn.f32 %f67, %f66, 0f40000000, 0fBF800000;
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mul.f32 %f68, %f64, %f64;
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fma.rn.f32 %f69, %f61, %f61, %f68;
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fma.rn.f32 %f70, %f67, %f67, %f69;
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sqrt.rn.f32 %f71, %f70;
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rcp.rn.f32 %f72, %f71;
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mul.f32 %f84, %f61, %f72;
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mul.f32 %f85, %f64, %f72;
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mul.f32 %f86, %f67, %f72;
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BB0_4:
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mul.f32 %f73, %f6, %f85;
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fma.rn.f32 %f74, %f5, %f84, %f73;
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fma.rn.f32 %f14, %f7, %f86, %f74;
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setp.leu.f32 %p3, %f87, 0f00000000;
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@%p3 bra BB0_6;
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fma.rn.f32 %f75, %f14, 0f3F000000, 0f3F000000;
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mov.f32 %f76, 0f3B808081;
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max.f32 %f87, %f75, %f76;
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BB0_6:
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ld.global.v2.u32 {%r71, %r72}, [pixelID];
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cvt.u64.u32 %rd75, %r71;
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cvt.u64.u32 %rd76, %r72;
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mov.u64 %rd79, imageFinal;
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cvta.global.u64 %rd74, %rd79;
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// inline asm
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call (%rd73), _rt_buffer_get_64, (%rd74, %r18, %r17, %rd75, %rd76, %rd55, %rd55);
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// inline asm
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fma.rn.f32 %f77, %f5, 0f3F000000, 0f3F000000;
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mul.f32 %f78, %f77, 0f437F0000;
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cvt.rzi.u32.f32 %r75, %f78;
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fma.rn.f32 %f79, %f6, 0f3F000000, 0f3F000000;
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mul.f32 %f80, %f79, 0f437F0000;
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cvt.rzi.u32.f32 %r76, %f80;
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fma.rn.f32 %f81, %f7, 0f3F000000, 0f3F000000;
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mul.f32 %f82, %f81, 0f437F0000;
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cvt.rzi.u32.f32 %r77, %f82;
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mul.f32 %f83, %f87, 0f437F0000;
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cvt.rzi.u32.f32 %r78, %f83;
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cvt.u16.u32 %rs16, %r78;
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cvt.u16.u32 %rs17, %r77;
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cvt.u16.u32 %rs18, %r76;
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cvt.u16.u32 %rs19, %r75;
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st.v4.u8 [%rd73], {%rs19, %rs18, %rs17, %rs16};
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bra.uni BB0_7;
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BB0_1:
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ld.global.v2.u32 {%r58, %r59}, [pixelID];
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cvt.u64.u32 %rd61, %r58;
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cvt.u64.u32 %rd62, %r59;
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// inline asm
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call (%rd59), _rt_buffer_get_64, (%rd21, %r18, %r19, %rd61, %rd62, %rd55, %rd55);
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// inline asm
|
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st.v4.f32 [%rd59], {%f1, %f2, %f3, %f87};
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|
|
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BB0_7:
|
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ret;
|
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}
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