539 lines
20 KiB
C++
539 lines
20 KiB
C++
#pragma once
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/// Defines the Half type (half-precision floating-point) including conversions
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/// to standard C types and basic arithmetic operations. Note that arithmetic
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/// operations are implemented by converting to floating point and
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/// performing the operation in float32, instead of using CUDA half intrinsics.
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/// Most uses of this type within ATen are memory bound, including the
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/// element-wise kernels, and the half intrinsics aren't efficient on all GPUs.
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/// If you are writing a compute bound kernel, you can use the CUDA half
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/// intrinsics directly on the Half type from device code.
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#include <c10/macros/Export.h>
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#include <c10/macros/Macros.h>
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#include <c10/util/TypeSafeSignMath.h>
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#include <c10/util/complex.h>
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#include <c10/util/floating_point_utils.h>
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#include <type_traits>
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#if defined(__cplusplus) && (__cplusplus >= 201103L)
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#include <cmath>
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#elif !defined(__OPENCL_VERSION__)
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#include <math.h>
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#endif
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#ifdef _MSC_VER
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#include <intrin.h>
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#endif
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#include <cstdint>
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#include <cstring>
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#include <iosfwd>
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#include <limits>
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#ifdef __CUDACC__
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#include <cuda_fp16.h>
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#endif
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#ifdef __HIPCC__
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#include <hip/hip_fp16.h>
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#endif
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#if defined(CL_SYCL_LANGUAGE_VERSION)
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#include <CL/sycl.hpp> // for SYCL 1.2.1
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#elif defined(SYCL_LANGUAGE_VERSION)
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#include <sycl/sycl.hpp> // for SYCL 2020
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#endif
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#if defined(__aarch64__) && !defined(C10_MOBILE) && !defined(__CUDACC__)
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#include <arm_neon.h>
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#endif
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namespace c10 {
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namespace detail {
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/*
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* Convert a 16-bit floating-point number in IEEE half-precision format, in bit
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* representation, to a 32-bit floating-point number in IEEE single-precision
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* format, in bit representation.
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*
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* @note The implementation doesn't use any floating-point operations.
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*/
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inline uint32_t fp16_ieee_to_fp32_bits(uint16_t h) {
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/*
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* Extend the half-precision floating-point number to 32 bits and shift to the
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* upper part of the 32-bit word:
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* +---+-----+------------+-------------------+
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* | S |EEEEE|MM MMMM MMMM|0000 0000 0000 0000|
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* +---+-----+------------+-------------------+
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* Bits 31 26-30 16-25 0-15
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*
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* S - sign bit, E - bits of the biased exponent, M - bits of the mantissa, 0
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* - zero bits.
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*/
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const uint32_t w = (uint32_t)h << 16;
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/*
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* Extract the sign of the input number into the high bit of the 32-bit word:
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*
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* +---+----------------------------------+
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* | S |0000000 00000000 00000000 00000000|
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* +---+----------------------------------+
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* Bits 31 0-31
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*/
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const uint32_t sign = w & UINT32_C(0x80000000);
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/*
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* Extract mantissa and biased exponent of the input number into the bits 0-30
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* of the 32-bit word:
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*
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* +---+-----+------------+-------------------+
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* | 0 |EEEEE|MM MMMM MMMM|0000 0000 0000 0000|
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* +---+-----+------------+-------------------+
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* Bits 30 27-31 17-26 0-16
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*/
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const uint32_t nonsign = w & UINT32_C(0x7FFFFFFF);
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/*
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* Renorm shift is the number of bits to shift mantissa left to make the
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* half-precision number normalized. If the initial number is normalized, some
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* of its high 6 bits (sign == 0 and 5-bit exponent) equals one. In this case
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* renorm_shift == 0. If the number is denormalize, renorm_shift > 0. Note
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* that if we shift denormalized nonsign by renorm_shift, the unit bit of
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* mantissa will shift into exponent, turning the biased exponent into 1, and
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* making mantissa normalized (i.e. without leading 1).
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*/
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#ifdef _MSC_VER
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unsigned long nonsign_bsr;
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_BitScanReverse(&nonsign_bsr, (unsigned long)nonsign);
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uint32_t renorm_shift = (uint32_t)nonsign_bsr ^ 31;
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#else
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uint32_t renorm_shift = __builtin_clz(nonsign);
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#endif
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renorm_shift = renorm_shift > 5 ? renorm_shift - 5 : 0;
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/*
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* Iff half-precision number has exponent of 15, the addition overflows
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* it into bit 31, and the subsequent shift turns the high 9 bits
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* into 1. Thus inf_nan_mask == 0x7F800000 if the half-precision number
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* had exponent of 15 (i.e. was NaN or infinity) 0x00000000 otherwise
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*/
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const int32_t inf_nan_mask =
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((int32_t)(nonsign + 0x04000000) >> 8) & INT32_C(0x7F800000);
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/*
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* Iff nonsign is 0, it overflows into 0xFFFFFFFF, turning bit 31
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* into 1. Otherwise, bit 31 remains 0. The signed shift right by 31
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* broadcasts bit 31 into all bits of the zero_mask. Thus zero_mask ==
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* 0xFFFFFFFF if the half-precision number was zero (+0.0h or -0.0h)
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* 0x00000000 otherwise
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*/
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const int32_t zero_mask = (int32_t)(nonsign - 1) >> 31;
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/*
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* 1. Shift nonsign left by renorm_shift to normalize it (if the input
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* was denormal)
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* 2. Shift nonsign right by 3 so the exponent (5 bits originally)
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* becomes an 8-bit field and 10-bit mantissa shifts into the 10 high
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* bits of the 23-bit mantissa of IEEE single-precision number.
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* 3. Add 0x70 to the exponent (starting at bit 23) to compensate the
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* different in exponent bias (0x7F for single-precision number less 0xF
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* for half-precision number).
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* 4. Subtract renorm_shift from the exponent (starting at bit 23) to
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* account for renormalization. As renorm_shift is less than 0x70, this
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* can be combined with step 3.
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* 5. Binary OR with inf_nan_mask to turn the exponent into 0xFF if the
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* input was NaN or infinity.
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* 6. Binary ANDNOT with zero_mask to turn the mantissa and exponent
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* into zero if the input was zero.
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* 7. Combine with the sign of the input number.
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*/
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return sign |
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((((nonsign << renorm_shift >> 3) + ((0x70 - renorm_shift) << 23)) |
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inf_nan_mask) &
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~zero_mask);
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}
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/*
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* Convert a 16-bit floating-point number in IEEE half-precision format, in bit
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* representation, to a 32-bit floating-point number in IEEE single-precision
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* format.
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*
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* @note The implementation relies on IEEE-like (no assumption about rounding
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* mode and no operations on denormals) floating-point operations and bitcasts
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* between integer and floating-point variables.
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*/
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C10_HOST_DEVICE inline float fp16_ieee_to_fp32_value(uint16_t h) {
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/*
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* Extend the half-precision floating-point number to 32 bits and shift to the
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* upper part of the 32-bit word:
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* +---+-----+------------+-------------------+
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* | S |EEEEE|MM MMMM MMMM|0000 0000 0000 0000|
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* +---+-----+------------+-------------------+
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* Bits 31 26-30 16-25 0-15
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*
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* S - sign bit, E - bits of the biased exponent, M - bits of the mantissa, 0
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* - zero bits.
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*/
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const uint32_t w = (uint32_t)h << 16;
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/*
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* Extract the sign of the input number into the high bit of the 32-bit word:
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*
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* +---+----------------------------------+
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* | S |0000000 00000000 00000000 00000000|
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* +---+----------------------------------+
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* Bits 31 0-31
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*/
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const uint32_t sign = w & UINT32_C(0x80000000);
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/*
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* Extract mantissa and biased exponent of the input number into the high bits
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* of the 32-bit word:
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*
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* +-----+------------+---------------------+
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* |EEEEE|MM MMMM MMMM|0 0000 0000 0000 0000|
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* +-----+------------+---------------------+
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* Bits 27-31 17-26 0-16
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*/
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const uint32_t two_w = w + w;
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/*
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* Shift mantissa and exponent into bits 23-28 and bits 13-22 so they become
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* mantissa and exponent of a single-precision floating-point number:
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*
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* S|Exponent | Mantissa
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* +-+---+-----+------------+----------------+
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* |0|000|EEEEE|MM MMMM MMMM|0 0000 0000 0000|
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* +-+---+-----+------------+----------------+
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* Bits | 23-31 | 0-22
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*
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* Next, there are some adjustments to the exponent:
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* - The exponent needs to be corrected by the difference in exponent bias
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* between single-precision and half-precision formats (0x7F - 0xF = 0x70)
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* - Inf and NaN values in the inputs should become Inf and NaN values after
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* conversion to the single-precision number. Therefore, if the biased
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* exponent of the half-precision input was 0x1F (max possible value), the
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* biased exponent of the single-precision output must be 0xFF (max possible
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* value). We do this correction in two steps:
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* - First, we adjust the exponent by (0xFF - 0x1F) = 0xE0 (see exp_offset
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* below) rather than by 0x70 suggested by the difference in the exponent bias
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* (see above).
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* - Then we multiply the single-precision result of exponent adjustment by
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* 2**(-112) to reverse the effect of exponent adjustment by 0xE0 less the
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* necessary exponent adjustment by 0x70 due to difference in exponent bias.
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* The floating-point multiplication hardware would ensure than Inf and
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* NaN would retain their value on at least partially IEEE754-compliant
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* implementations.
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*
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* Note that the above operations do not handle denormal inputs (where biased
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* exponent == 0). However, they also do not operate on denormal inputs, and
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* do not produce denormal results.
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*/
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constexpr uint32_t exp_offset = UINT32_C(0xE0) << 23;
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// const float exp_scale = 0x1.0p-112f;
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constexpr uint32_t scale_bits = (uint32_t)15 << 23;
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float exp_scale_val = 0;
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std::memcpy(&exp_scale_val, &scale_bits, sizeof(exp_scale_val));
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const float exp_scale = exp_scale_val;
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const float normalized_value =
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fp32_from_bits((two_w >> 4) + exp_offset) * exp_scale;
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/*
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* Convert denormalized half-precision inputs into single-precision results
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* (always normalized). Zero inputs are also handled here.
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*
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* In a denormalized number the biased exponent is zero, and mantissa has
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* on-zero bits. First, we shift mantissa into bits 0-9 of the 32-bit word.
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*
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* zeros | mantissa
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* +---------------------------+------------+
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* |0000 0000 0000 0000 0000 00|MM MMMM MMMM|
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* +---------------------------+------------+
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* Bits 10-31 0-9
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*
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* Now, remember that denormalized half-precision numbers are represented as:
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* FP16 = mantissa * 2**(-24).
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* The trick is to construct a normalized single-precision number with the
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* same mantissa and thehalf-precision input and with an exponent which would
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* scale the corresponding mantissa bits to 2**(-24). A normalized
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* single-precision floating-point number is represented as: FP32 = (1 +
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* mantissa * 2**(-23)) * 2**(exponent - 127) Therefore, when the biased
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* exponent is 126, a unit change in the mantissa of the input denormalized
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* half-precision number causes a change of the constructed single-precision
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* number by 2**(-24), i.e. the same amount.
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*
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* The last step is to adjust the bias of the constructed single-precision
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* number. When the input half-precision number is zero, the constructed
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* single-precision number has the value of FP32 = 1 * 2**(126 - 127) =
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* 2**(-1) = 0.5 Therefore, we need to subtract 0.5 from the constructed
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* single-precision number to get the numerical equivalent of the input
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* half-precision number.
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*/
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constexpr uint32_t magic_mask = UINT32_C(126) << 23;
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constexpr float magic_bias = 0.5f;
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const float denormalized_value =
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fp32_from_bits((two_w >> 17) | magic_mask) - magic_bias;
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/*
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* - Choose either results of conversion of input as a normalized number, or
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* as a denormalized number, depending on the input exponent. The variable
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* two_w contains input exponent in bits 27-31, therefore if its smaller than
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* 2**27, the input is either a denormal number, or zero.
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* - Combine the result of conversion of exponent and mantissa with the sign
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* of the input number.
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*/
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constexpr uint32_t denormalized_cutoff = UINT32_C(1) << 27;
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const uint32_t result = sign |
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(two_w < denormalized_cutoff ? fp32_to_bits(denormalized_value)
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: fp32_to_bits(normalized_value));
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return fp32_from_bits(result);
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}
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/*
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* Convert a 32-bit floating-point number in IEEE single-precision format to a
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* 16-bit floating-point number in IEEE half-precision format, in bit
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* representation.
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*
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* @note The implementation relies on IEEE-like (no assumption about rounding
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* mode and no operations on denormals) floating-point operations and bitcasts
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* between integer and floating-point variables.
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*/
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inline uint16_t fp16_ieee_from_fp32_value(float f) {
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// const float scale_to_inf = 0x1.0p+112f;
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// const float scale_to_zero = 0x1.0p-110f;
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constexpr uint32_t scale_to_inf_bits = (uint32_t)239 << 23;
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constexpr uint32_t scale_to_zero_bits = (uint32_t)17 << 23;
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float scale_to_inf_val = 0, scale_to_zero_val = 0;
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std::memcpy(&scale_to_inf_val, &scale_to_inf_bits, sizeof(scale_to_inf_val));
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std::memcpy(
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&scale_to_zero_val, &scale_to_zero_bits, sizeof(scale_to_zero_val));
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const float scale_to_inf = scale_to_inf_val;
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const float scale_to_zero = scale_to_zero_val;
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#if defined(_MSC_VER) && _MSC_VER == 1916
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float base = ((signbit(f) != 0 ? -f : f) * scale_to_inf) * scale_to_zero;
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#else
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float base = (fabsf(f) * scale_to_inf) * scale_to_zero;
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#endif
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const uint32_t w = fp32_to_bits(f);
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const uint32_t shl1_w = w + w;
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const uint32_t sign = w & UINT32_C(0x80000000);
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uint32_t bias = shl1_w & UINT32_C(0xFF000000);
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if (bias < UINT32_C(0x71000000)) {
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bias = UINT32_C(0x71000000);
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}
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base = fp32_from_bits((bias >> 1) + UINT32_C(0x07800000)) + base;
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const uint32_t bits = fp32_to_bits(base);
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const uint32_t exp_bits = (bits >> 13) & UINT32_C(0x00007C00);
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const uint32_t mantissa_bits = bits & UINT32_C(0x00000FFF);
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const uint32_t nonsign = exp_bits + mantissa_bits;
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return static_cast<uint16_t>(
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(sign >> 16) |
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(shl1_w > UINT32_C(0xFF000000) ? UINT16_C(0x7E00) : nonsign));
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}
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#if defined(__aarch64__) && !defined(C10_MOBILE) && !defined(__CUDACC__)
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constexpr inline float16_t fp16_from_bits(uint16_t h) {
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union {
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uint16_t as_bits;
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float16_t as_value;
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} fp16 = {h};
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return fp16.as_value;
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}
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constexpr inline uint16_t fp16_to_bits(float16_t f) {
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union {
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float16_t as_value;
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uint16_t as_bits;
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} fp16 = {.as_value = f};
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return fp16.as_bits;
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}
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// According to https://godbolt.org/z/8s14GvEjo it would translate to single
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// fcvt s0, h0
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inline float native_fp16_to_fp32_value(uint16_t h) {
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return static_cast<float>(fp16_from_bits(h));
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}
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inline uint16_t native_fp16_from_fp32_value(float f) {
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return fp16_to_bits(static_cast<float16_t>(f));
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}
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#endif
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} // namespace detail
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struct alignas(2) Half {
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unsigned short x;
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struct from_bits_t {};
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C10_HOST_DEVICE static constexpr from_bits_t from_bits() {
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return from_bits_t();
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}
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// HIP wants __host__ __device__ tag, CUDA does not
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#if defined(USE_ROCM)
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C10_HOST_DEVICE Half() = default;
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#else
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Half() = default;
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#endif
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constexpr C10_HOST_DEVICE Half(unsigned short bits, from_bits_t) : x(bits) {}
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#if defined(__aarch64__) && !defined(C10_MOBILE) && !defined(__CUDACC__)
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inline Half(float16_t value);
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inline operator float16_t() const;
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#else
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inline C10_HOST_DEVICE Half(float value);
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inline C10_HOST_DEVICE operator float() const;
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#endif
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#if defined(__CUDACC__) || defined(__HIPCC__)
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inline C10_HOST_DEVICE Half(const __half& value);
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inline C10_HOST_DEVICE operator __half() const;
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#endif
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#ifdef SYCL_LANGUAGE_VERSION
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inline C10_HOST_DEVICE Half(const sycl::half& value);
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inline C10_HOST_DEVICE operator sycl::half() const;
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#endif
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};
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// TODO : move to complex.h
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template <>
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struct alignas(4) complex<Half> {
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Half real_;
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Half imag_;
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// Constructors
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complex() = default;
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// Half constructor is not constexpr so the following constructor can't
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// be constexpr
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C10_HOST_DEVICE explicit inline complex(const Half& real, const Half& imag)
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: real_(real), imag_(imag) {}
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C10_HOST_DEVICE inline complex(const c10::complex<float>& value)
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: real_(value.real()), imag_(value.imag()) {}
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// Conversion operator
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inline C10_HOST_DEVICE operator c10::complex<float>() const {
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return {real_, imag_};
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}
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constexpr C10_HOST_DEVICE Half real() const {
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return real_;
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}
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constexpr C10_HOST_DEVICE Half imag() const {
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return imag_;
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}
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C10_HOST_DEVICE complex<Half>& operator+=(const complex<Half>& other) {
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real_ = static_cast<float>(real_) + static_cast<float>(other.real_);
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imag_ = static_cast<float>(imag_) + static_cast<float>(other.imag_);
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return *this;
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}
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C10_HOST_DEVICE complex<Half>& operator-=(const complex<Half>& other) {
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real_ = static_cast<float>(real_) - static_cast<float>(other.real_);
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imag_ = static_cast<float>(imag_) - static_cast<float>(other.imag_);
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return *this;
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}
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C10_HOST_DEVICE complex<Half>& operator*=(const complex<Half>& other) {
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auto a = static_cast<float>(real_);
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auto b = static_cast<float>(imag_);
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auto c = static_cast<float>(other.real());
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auto d = static_cast<float>(other.imag());
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real_ = a * c - b * d;
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imag_ = a * d + b * c;
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return *this;
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}
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};
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// In some versions of MSVC, there will be a compiler error when building.
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// C4146: unary minus operator applied to unsigned type, result still unsigned
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// C4804: unsafe use of type 'bool' in operation
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// It can be addressed by disabling the following warning.
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#ifdef _MSC_VER
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#pragma warning(push)
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#pragma warning(disable : 4146)
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#pragma warning(disable : 4804)
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#pragma warning(disable : 4018)
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#endif
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|
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// The overflow checks may involve float to int conversion which may
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// trigger precision loss warning. Re-enable the warning once the code
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// is fixed. See T58053069.
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C10_CLANG_DIAGNOSTIC_PUSH()
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#if C10_CLANG_HAS_WARNING("-Wimplicit-float-conversion")
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C10_CLANG_DIAGNOSTIC_IGNORE("-Wimplicit-float-conversion")
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#endif
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|
|
|
// bool can be converted to any type.
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|
// Without specializing on bool, in pytorch_linux_trusty_py2_7_9_build:
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|
// `error: comparison of constant '255' with boolean expression is always false`
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|
// for `f > limit::max()` below
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|
template <typename To, typename From>
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|
std::enable_if_t<std::is_same_v<From, bool>, bool> overflows(
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|
From /*f*/,
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|
bool strict_unsigned = false) {
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|
return false;
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|
}
|
|
|
|
// skip isnan and isinf check for integral types
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|
template <typename To, typename From>
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|
std::enable_if_t<std::is_integral_v<From> && !std::is_same_v<From, bool>, bool>
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|
overflows(From f, bool strict_unsigned = false) {
|
|
using limit = std::numeric_limits<typename scalar_value_type<To>::type>;
|
|
if constexpr (!limit::is_signed && std::numeric_limits<From>::is_signed) {
|
|
// allow for negative numbers to wrap using two's complement arithmetic.
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|
// For example, with uint8, this allows for `a - b` to be treated as
|
|
// `a + 255 * b`.
|
|
if (!strict_unsigned) {
|
|
return greater_than_max<To>(f) ||
|
|
(c10::is_negative(f) &&
|
|
-static_cast<uint64_t>(f) > static_cast<uint64_t>(limit::max()));
|
|
}
|
|
}
|
|
return c10::less_than_lowest<To>(f) || greater_than_max<To>(f);
|
|
}
|
|
|
|
template <typename To, typename From>
|
|
std::enable_if_t<std::is_floating_point_v<From>, bool> overflows(
|
|
From f,
|
|
bool strict_unsigned = false) {
|
|
using limit = std::numeric_limits<typename scalar_value_type<To>::type>;
|
|
if (limit::has_infinity && std::isinf(static_cast<double>(f))) {
|
|
return false;
|
|
}
|
|
if (!limit::has_quiet_NaN && (f != f)) {
|
|
return true;
|
|
}
|
|
return f < limit::lowest() || f > limit::max();
|
|
}
|
|
|
|
C10_CLANG_DIAGNOSTIC_POP()
|
|
|
|
#ifdef _MSC_VER
|
|
#pragma warning(pop)
|
|
#endif
|
|
|
|
template <typename To, typename From>
|
|
std::enable_if_t<is_complex<From>::value, bool> overflows(
|
|
From f,
|
|
bool strict_unsigned = false) {
|
|
// casts from complex to real are considered to overflow if the
|
|
// imaginary component is non-zero
|
|
if (!is_complex<To>::value && f.imag() != 0) {
|
|
return true;
|
|
}
|
|
// Check for overflow componentwise
|
|
// (Technically, the imag overflow check is guaranteed to be false
|
|
// when !is_complex<To>, but any optimizer worth its salt will be
|
|
// able to figure it out.)
|
|
return overflows<
|
|
typename scalar_value_type<To>::type,
|
|
typename From::value_type>(f.real()) ||
|
|
overflows<
|
|
typename scalar_value_type<To>::type,
|
|
typename From::value_type>(f.imag());
|
|
}
|
|
|
|
C10_API std::ostream& operator<<(std::ostream& out, const Half& value);
|
|
|
|
} // namespace c10
|
|
|
|
#include <c10/util/Half-inl.h> // IWYU pragma: keep
|